Hi David,
> This adds an endianness conversion when setting the baudrate using a
> vendor-specific command. Otherwise, bad things might happen on a big-
> endian system.
>
> Suggested-by: Marcel Holtmann
> Signed-off-by: David Lechner
> ---
> drivers/bluetooth/hci_ll.c | 4 +++-
> 1 file changed
Resolved all the Unnecessary space before function pointer arguments
checkpatch warnings. Issue found by checkpatch.
Signed-off-by: Dhaval Shah
---
drivers/misc/ad525x_dpot.h | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/misc/ad525x_dpot.h b/drivers/mis
Hi David,
> This adds support for setting the public address on Texas Instruments
> Bluetooth chips using a vendor-specific command.
>
> This has been tested on a CC2560A. The TI wiki also indicates that this
> command should work on TI WL17xx/WL18xx Bluetooth chips.
>
> Signed-off-by: David Lec
Hi David,
> This adds optional nvmem consumer properties to the ti,wlink-st device tree
> bindings to allow specifying the BD address.
>
> Signed-off-by: David Lechner
> ---
>
> v2 changes:
> * Renamed "mac-address" to "bd-address"
> * Fixed typos in example
> * Specify byte order of "bd-addre
On Fri, Dec 8, 2017 at 1:26 PM, kernel test robot wrote:
>
> FYI, we noticed the following commit (built with gcc-6):
>
> commit: ecca8f88da5c4260cc2bccfefd2a24976704c366 ("sctp: set frag_point in
> sctp_setsockopt_maxseg correctly")
> https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.g
Hi,
On Thu, 7 Dec 2017 12:50:50 -0500 Sinan Kaya wrote:
> On 12/7/2017 10:20 AM, Lothar Waßmann wrote:
> > Hi,
> >
> > On Thu, 7 Dec 2017 09:45:31 -0500 Sinan Kaya wrote:
> >> On 12/7/2017 8:10 AM, Lothar Waßmann wrote:
> +void *of_fwnode_get_match_data(const struct fwnode_handle *fwnode,
>
David,
On Fri, Dec 8, 2017 at 1:09 AM, David Daney wrote:
[]
> Changes in v5:
[]
> o Removed redundant licensing text boilerplate.
Thank you very much!
Acked-by: Philippe Ombredanne
--
Cordially
Philippe Ombredanne, the licensing scruffy
Resolved all the macros should not use a trailing semicolon
checkpatch warnings. Issue found by checkpatch.
Signed-off-by: Dhaval Shah
---
drivers/misc/ad525x_dpot.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/misc/ad525x_dpot.c b/drivers/misc/ad525x_dpot.c
Chromebooks use coreboot for system initialization. coreboot has always
had the default mainboard vendor string for Google machines set to
"Google". Google engineers set this string to "GOOGLE" for the coreboot
copy within their Chromium OS tree. The atmel_mxt_ts driver in its
current state is set
Resolved all the Prefer 'unsigned int' to bare use of 'unsigned'
checkpatch warnings. Issue found by checkpatch.
Signed-off-by: Dhaval Shah
---
drivers/misc/ad525x_dpot.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/misc/ad525x_dpot.c b/dri
Three types of checkpatch warning are resolved.
* First patch : Prefer 'unsigned int' to bare use of 'unsigned'
* Second patch : please, no space before tabs
* third patch : macros should not use a trailing semicolon
Issue found by checkpatch.
./scripts/checkpatch.pl -f --strict drivers/misc/
Resolved the please, no space beofore tabs checkpatch
warning. Issue found by checkpatch.
Signed-off-by: Dhaval Shah
---
drivers/misc/ad525x_dpot.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/misc/ad525x_dpot.c b/drivers/misc/ad525x_dpot.c
index 1c6b55655f52..577f
Hi David,
> This adds an optional nvmem consumer to get a BD address from an external
> source. The BD address is then set in the Bluetooth chip after the
> firmware has been loaded.
>
> This has been tested working with a TI CC2560A chip (in a LEGO MINDSTORMS
> EV3).
>
> Signed-off-by: David Le
Hi Daniel,
On 8 December 2017 at 14:58, Daniel Lezcano wrote:
> On 08/12/2017 06:03, Baolin Wang wrote:
>> The Spreadtrum SC9860 platform will use the architected timers as local
>> clock events, but we also need a broadcast timer device to wakeup the
>> cpus when the cpus are in sleep mode.
>>
>
On Thu 07-12-17 17:23:05, Suren Baghdasaryan wrote:
> Slab shrinkers can be quite time consuming and when signal
> is pending they can delay handling of the signal. If fatal
> signal is pending there is no point in shrinking that process
> since it will be killed anyway.
The thing is that we are _
Hi David,
On Thu, Dec 07, 2017 at 02:53:29PM -0500, David Miller wrote:
> From: Antoine Tenart
> Date: Thu, 7 Dec 2017 09:48:58 +0100
>
> > This patch adds a check to only free the TSO header buffer when its
> > allocation previously succeeded.
> >
> > Signed-off-by: Antoine Tenart
>
> No, p
Move local "sched.h" include to the bottom. sched.h defines
several macros that are getting redefined in ARCH-specific
code, for instance, finish_arch_post_lock_switch() and
prepare_arch_switch(), so we need ARCH-specific definitions
to come in first.
Suggested-by: Martin Schwidefsky
Signed-off-b
On Fri, Dec 08, 2017 at 01:41:10PM +0800, Huang, Ying wrote:
> Minchan Kim writes:
>
> > On Thu, Dec 07, 2017 at 04:29:37PM -0800, Andrew Morton wrote:
> >> On Thu, 7 Dec 2017 09:14:26 +0800 "Huang, Ying"
> >> wrote:
> >>
> >> > When the swapin is performed, after getting the swap entry infor
On 08/12/17 08:05, Ingo Molnar wrote:
>
> * Juergen Gross wrote:
>
>> In case the rsdp address in struct boot_params is specified don't try
>> to find the table by searching, but take the address directly as set
>> by the boot loader.
>>
>> Signed-off-by: Juergen Gross
>> ---
>> drivers/acpi/o
On Fri, Dec 8, 2017 at 12:40 AM, Matthew Wilcox wrote:
> On Fri, Dec 08, 2017 at 07:30:07AM +0800, Yang Shi wrote:
>> When running stress test with KASAN enabled, the below softlockup may
>> happen occasionally:
>>
>> NMI watchdog: BUG: soft lockup - CPU#7 stuck for 22s!
>> hardirqs last enabled
On Fri 08-12-17 12:42:55, changbin...@intel.com wrote:
> From: Changbin Du
>
> This patch introduced 4 new interfaces to allocate a prepared transparent
> huge page. These interfaces merge distributed two-step allocation as simple
> single step. And they can avoid issue like forget to call
> pre
Hi Jim&Wanpeng:
Thanks for your help.
2017-12-08 5:25 GMT+08:00 Jim Mattson :
> Try disabling the module parameter, "unrestricted_guest." Make sure
> that the module parameter, "emulate_invalid_guest_state" is enabled.
> This combination allows userspace to feed invalid guest state into t
>>> On 08.12.17 at 08:16, wrote:
> Also, a more fundamental question: why doesn't Xen use EFI to hand over
> hardware configuration details?
Iirc the main purpose of the change here is to allow booting PVH
(guest or Dom0) with Grub2 in the middle. PVH, at least for the
time being, is something t
On Thu, Dec 07, 2017 at 02:53:29PM -0500, David Miller wrote:
> From: Antoine Tenart
> Date: Thu, 7 Dec 2017 09:48:58 +0100
>
> > This patch adds a check to only free the TSO header buffer when its
> > allocation previously succeeded.
> >
> > Signed-off-by: Antoine Tenart
>
> No, please keep
Before flushing fifos required to check AHB master state and
flush when AHB master is in IDLE state.
Signed-off-by: Minas Harutyunyan
---
drivers/usb/dwc2/core.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c
ind
On Fri, Dec 8, 2017 at 7:08 AM, Dave Chinner wrote:
> [cc linux-...@vger.kernel.org]
>
> On Fri, Dec 08, 2017 at 06:42:32AM +0530, Dinesh Pathak wrote:
>> Hi, We are mounting and traversing one backup of a VM with XFS filesystem.
>> Sometimes during traversing, the process goes into D state and ca
On Thu 07-12-17 11:57:27, Matthew Wilcox wrote:
> On Thu, Dec 07, 2017 at 11:14:27AM -0800, Kees Cook wrote:
> > On Wed, Dec 6, 2017 at 9:46 PM, Michael Ellerman
> > wrote:
> > > Matthew Wilcox writes:
> > >> So, just like we currently say "exactly one of MAP_SHARED or
> > >> MAP_PRIVATE",
> >
On 14/11/2017 09:52, Benjamin Gaignard wrote:
> The clock driving counters is at 90MHz so the maximum period
> for 16 bis counters is around 750 ms
728 us
> which is a short period for a clocksource.
Which clocksource are you talking about ?
> For 32 bits counters this period is close
> 47 seco
On 2017/12/07 20:02, Ben Hutchings wrote:
> On Tue, 2017-11-28 at 11:23 +0100, Greg Kroah-Hartman wrote:
> > 4.4-stable review patch. If anyone has any objections, please let me know.
> >
> > --
> >
> > From: Benjamin Poirier
> >
> > commit 19110cfbb34d4af0cdfe14cd243f3b09dc95b
The audio blocks require specific clock rates. Until now we were using
the closest clock rate possible with integer N-M factors. This resulted
in audio playback being slightly slower than it should be.
The vendor kernel gets around this (for newer SoCs) by using sigma-delta
modulation to generate
* Jan Beulich wrote:
> >>> On 08.12.17 at 08:16, wrote:
> > Also, a more fundamental question: why doesn't Xen use EFI to hand over
> > hardware configuration details?
>
> Iirc the main purpose of the change here is to allow booting PVH
> (guest or Dom0) with Grub2 in the middle. PVH, at leas
On the A83T, the audio PLL should have its div1 set to 0, or /1, and
div2 set to 1, or /2. This setting is the default, and is required
to match the sigma-delta modulation parameters from the BSP kernel.
This patch adds a /2 fixed post divider to the audio PLL, and fixes
the enforced d1 & d2 value
On the A83T, the audio PLL should have its div1 set to 0, or /1, and
div2 set to 1, or /2. This setting is the default, and is required
to match the sigma-delta modulation parameters from the BSP kernel.
To do this, we first add fixed post-divider to the NM style clocks,
which is the type of clock
Hi,
This series follows previous improvements for the other Allwinner SoCs to
improve audio quality, in particular the speed and pitch of audio playback.
The audio PLLs in Allwinner SoCs cannot produce the correct frequency to
match the audio sample rate families through integer factors. As such
t
On 08/12/17 08:16, Ingo Molnar wrote:
>
> * Juergen Gross wrote:
>
>> Xen PVH guests receive the address of the RSDP table from Xen. In order
>> to support booting a Xen PVH guest via grub2 using the standard x86
>> boot entry we need a way fro grub2 to pass the RSDP address to the
>> kernel.
>>
From: Ben Luo
Guest enables pv timer functionality using this MSR
Signed-off-by: Yang Zhang
Signed-off-by: Quan Xu
Signed-off-by: Ben Luo
---
arch/x86/include/asm/kvm_host.h |5 +
arch/x86/include/uapi/asm/kvm_para.h |6 ++
arch/x86/kvm/lapic.c | 22 +++
From: Ben Luo
This patchset introduces a new paravirtualized mechanism to reduce VM-exit
caused by guest timer accessing.
In general, KVM guest programs tsc-deadline timestamp to MSR_IA32_TSC_DEADLINE
MSR. This will cause a VM-exit, and then KVM handles this timer for guest.
Also kvm always reg
On 08/12/17 08:22, Ingo Molnar wrote:
>
> * Juergen Gross wrote:
>
>> When booted via the special PVH entry save the RSDP address set in the
>> boot information block in struct boot_params. This will enable Xen to
>> locate the RSDP at an arbitrary address.
>>
>> Set the boot loader version to 2
From: Ben Luo
Introduce kvm_xchg_guest_cached to exchange value with guest
page atomically.
Signed-off-by: Yang Zhang
Signed-off-by: Quan Xu
Signed-off-by: Ben Luo
---
include/linux/kvm_host.h |3 +++
virt/kvm/kvm_main.c | 42 ++
2 files cha
From: Ben Luo
When pvtimer is enabled, KVM programs timer to a dedicated CPU
through IPI. Whether the vCPU is on the dedicated CPU or any
other CPU, the timer interrupt will be delivered properly.
No need to migrate timer.
Signed-off-by: Yang Zhang
Signed-off-by: Quan Xu
Signed-off-by: Ben Luo
From: Ben Luo
In general, KVM guest programs tsc-deadline timestamp to
MSR_IA32_TSC_DEADLINE MSR. This will cause a VM-exit, and
then KVM handles this timer for guest.
The tsc-deadline timestamp is mostly recorded in share page
with less VM-exit. We Introduce a periodically working kthread
to sc
From: Ben Luo
In general, KVM guest programs tsc-deadline timestamp to
MSR_IA32_TSC_DEADLINE MSR.
When pvtimer is enabled, we introduce a new mechanism to
reprogram KVM guest timer. A periodically working kthread
scans share page and synchronize timer setting for guest
on a dedicated CPU. The ne
From: Ben Luo
KVM_FEATURE_PV_TIMER enables guest to check whether pvtimer
can be enabled in guest.
Signed-off-by: Yang Zhang
Signed-off-by: Quan Xu
Signed-off-by: Ben Luo
---
Documentation/virtual/kvm/cpuid.txt |4
arch/x86/include/uapi/asm/kvm_para.h |1 +
arch/x86/kvm/cpuid.c
From: Ben Luo
KVM always registers timer on the CPU which vCPU was running on.
Even though vCPU thread is rescheduled to another CPU, the timer
will be migrated to the target CPU as well. When timer expired,
timer interrupt could make guest-mode vCPU VM-exit on this CPU.
Since the working kthrea
* Tianyu Lan wrote:
> Hi Jim&Wanpeng:
> Thanks for your help.
>
> 2017-12-08 5:25 GMT+08:00 Jim Mattson :
> > Try disabling the module parameter, "unrestricted_guest." Make sure
> > that the module parameter, "emulate_invalid_guest_state" is enabled.
> > This combination allows userspa
Commit-ID: a555e9d86ee384d9d3cb3310a57aed33f7e053d4
Gitweb: https://git.kernel.org/tip/a555e9d86ee384d9d3cb3310a57aed33f7e053d4
Author: Cheng Jian
AuthorDate: Thu, 7 Dec 2017 21:30:43 +0800
Committer: Ingo Molnar
CommitDate: Fri, 8 Dec 2017 07:51:53 +0100
sched/fair: Remove unused 'cur
On Fri, Dec 8, 2017 at 4:16 PM, syzbot
wrote:
> syzkaller has found reproducer for the following crash on
> 82bcf1def3b5f1251177ad47c44f7e17af039b4b
> git://git.cmpxchg.org/linux-mmots.git/master
> compiler: gcc (GCC) 7.1.1 20170620
> .config is attached
> Raw console output is attached.
>
> syzka
cgroup root name has max length limit, we should avoid copying
longer name than that to the name.
Signed-off-by: Ma Shimiao
---
kernel/cgroup/cgroup.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kernel/cgroup/cgroup.c b/kernel/cgroup/cgroup.c
index 0b1ffe147f24..3614a21ad
On Fri 08-12-17 16:38:46, kemi wrote:
>
>
> On 2017年11月30日 17:45, Michal Hocko wrote:
> > On Thu 30-11-17 17:32:08, kemi wrote:
>
> > Do not get me wrong. If we want to make per-node stats more optimal,
> > then by all means let's do that. But having 3 sets of counters is just
> > way to much.
>
* Juergen Gross wrote:
> >> +Offset/size: 0x268/8
> >> +Protocol: 2.14+
> >> +
> >> + This field can be set by the boot loader to tell the kernel the
> >> + physical address of the ACPI RSDP table.
> >> +
> >> + A value of 0 indicates the kernel should fall back to the standard
> >> + m
2017-12-08 16:44 GMT+08:00 Ingo Molnar :
>
> * Tianyu Lan wrote:
>
>> Hi Jim&Wanpeng:
>> Thanks for your help.
>>
>> 2017-12-08 5:25 GMT+08:00 Jim Mattson :
>> > Try disabling the module parameter, "unrestricted_guest." Make sure
>> > that the module parameter, "emulate_invalid_guest_stat
>>> On 07.12.17 at 23:45, wrote:
> The start info structure that is defined as part of the x86/HVM direct
> boot ABI and used for starting Xen PVH guests would be more versatile if
> it also included a way to efficiently pass information about the memory
> map to the guest.
>
> That way Xen PVH g
On 2017年11月30日 17:45, Michal Hocko wrote:
> On Thu 30-11-17 17:32:08, kemi wrote:
> Do not get me wrong. If we want to make per-node stats more optimal,
> then by all means let's do that. But having 3 sets of counters is just
> way to much.
>
Hi, Michal
Apologize to respond later in this ema
On Thu, Dec 07, 2017 at 11:22:51PM +, Srinivas Kandagatla wrote:
> Thankyou for taking time to review the patch,
>
> On 07/12/17 17:32, Jonathan Corbet wrote:
> >On Thu, 7 Dec 2017 10:27:08 +
> >srinivas.kandaga...@linaro.org wrote:
> >
> >A couple of overall comments...
> >
> >> Documen
Minchan Kim writes:
> On Fri, Dec 08, 2017 at 01:41:10PM +0800, Huang, Ying wrote:
>> Minchan Kim writes:
>>
>> > On Thu, Dec 07, 2017 at 04:29:37PM -0800, Andrew Morton wrote:
>> >> On Thu, 7 Dec 2017 09:14:26 +0800 "Huang, Ying"
>> >> wrote:
>> >>
>> >> > When the swapin is performed, aft
On 08/12/17 09:48, Ingo Molnar wrote:
>
> * Juergen Gross wrote:
>
+Offset/size: 0x268/8
+Protocol: 2.14+
+
+ This field can be set by the boot loader to tell the kernel the
+ physical address of the ACPI RSDP table.
+
+ A value of 0 indicates the kerne
On Thu, Dec 07, 2017 at 02:30:52PM +, Alan Cox wrote:
> > If you want to actually lock down a machine to implement content
> > protection, then you need secure boot without unlockable boot-loader and a
> > pile more bits in userspace.
>
> So let me take my Intel hat off for a moment.
>
> The
On Fri 2017-12-08 17:24:22, Sergey Senozhatsky wrote:
> Move local "sched.h" include to the bottom. sched.h defines
> several macros that are getting redefined in ARCH-specific
> code, for instance, finish_arch_post_lock_switch() and
> prepare_arch_switch(), so we need ARCH-specific definitions
> t
Hi, James,
Of course we don't want to send PR directly, if there is a better way.
So, I hope you can officially be a co-maintainer of linux-mips, and as
a result, our community will become more active. I think most of MIPS
developers have the same will as me.
Huacai
On Fri, Dec 8, 2017 at 3:51 P
On Thu, Dec 07, 2017 at 11:35:52AM +0100, Ingo Molnar wrote:
>
>
> * Gary Lin wrote:
>
> > On Thu, Dec 07, 2017 at 09:18:16AM +0100, Ingo Molnar wrote:
> > >
> > > * Gary Lin wrote:
> > >
> > > > On Thu, Dec 07, 2017 at 07:09:27AM +0100, Ingo Molnar wrote:
> > > > >
> > > > > * Gary Lin wr
On Wed, 2017-12-06 at 12:54 +0100, Neil Armstrong wrote:
> On the Amlogic Gx SoCs (GXBB, GXL & GXM), the VPU power domain is initialized
> by the vendor U-Boot code, but running mainline U-boot has been possible
> on these SoCs. But lacking such init made the system lock at kernel boot.
>
> A PM P
On Fri, Dec 08, 2017 at 03:31:55PM +0800, Chen-Yu Tsai wrote:
> Hi,
>
> This is my spin on enabling Ethernet on the A83T. It consists of
> Corentin's dtsi patch plus my board level patch. There's nothing
> really special about them.
>
> ChenYu
Applied both, thanks!
Maxime
--
Maxime Ripard, Fre
On Fri, Dec 08, 2017 at 04:35:09PM +0800, Chen-Yu Tsai wrote:
> Hi,
>
> This series follows previous improvements for the other Allwinner SoCs to
> improve audio quality, in particular the speed and pitch of audio playback.
> The audio PLLs in Allwinner SoCs cannot produce the correct frequency to
On 08/12/17 08:44, Vinod Koul wrote:
Do we really need a separate subdirectory for a single file?
May be not, TBH, I did take some inspiration from soundwire patches.
FWIW, SoundWire patches have more Documentation. We have 4 files atm, though
they are not part of current series, so a direct
On Fri, Dec 08, 2017 at 04:41:38PM +0800, Huang, Ying wrote:
> Minchan Kim writes:
>
> > On Fri, Dec 08, 2017 at 01:41:10PM +0800, Huang, Ying wrote:
> >> Minchan Kim writes:
> >>
> >> > On Thu, Dec 07, 2017 at 04:29:37PM -0800, Andrew Morton wrote:
> >> >> On Thu, 7 Dec 2017 09:14:26 +0800 "H
On Thu, Dec 07, 2017 at 05:02:35PM +0100, Andrew Lunn wrote:
> > Banks actually comes from the datasheet, Yes.
> > I don't mind renaming it but I would be making things up. As you wish ?
>
> Keep it as is for the moment.
>
> > Does the usual pages comes with this weird toggle thing to open the a
Hi,
On Thu, 7 Dec 2017 12:50:50 -0500 Sinan Kaya wrote:
> On 12/7/2017 10:20 AM, Lothar Waßmann wrote:
> > Hi,
> >
> > On Thu, 7 Dec 2017 09:45:31 -0500 Sinan Kaya wrote:
> >> On 12/7/2017 8:10 AM, Lothar Waßmann wrote:
> +void *of_fwnode_get_match_data(const struct fwnode_handle *fwnode,
>
From: Wanpeng Li
Reported by syzkaller:
WARNING: CPU: 0 PID: 12927 at arch/x86/kernel/traps.c:780
do_debug+0x222/0x250
CPU: 0 PID: 12927 Comm: syz-executor Tainted: G OE4.15.0-rc2+
#16
RIP: 0010:do_debug+0x222/0x250
Call Trace:
<#DB>
debug+0x3e/0x70
RIP: 00
On 12/08/2017 11:26 AM, Dmitry Vyukov wrote:
> On Fri, Dec 8, 2017 at 12:40 AM, Matthew Wilcox wrote:
>> On Fri, Dec 08, 2017 at 07:30:07AM +0800, Yang Shi wrote:
>>> When running stress test with KASAN enabled, the below softlockup may
>>> happen occasionally:
>>>
>>> NMI watchdog: BUG: soft lock
On Thu, Dec 07, 2017 at 07:21:02PM +0100, Corentin Labbe wrote:
> allwinner,leds-active-low have effect only on boards which us the internal
> PHY.
> So this patch remove it from all boards which do not use the internal PHY.
>
> Signed-off-by: Corentin Labbe
Applied, thanks!
Maxime
--
Maxime
From: Srinivas Kandagatla
This patch adds supplies that are required for msm8996. Two of them vdda
and vdda-1p8 are analog supplies that go in to controller, and the rest
of the two vddpe's are supplies to PCIe endpoints.
Without these supplies PCIe endpoints which require power supplies are
not
The macro used to access or set an RSS table entry was using an offset
of 8, while it should use an offset of 0. This lead to wrongly configure
the RSS table, not accessing the right entries.
Fixes: 1d7d15d79fb4 ("net: mvpp2: initialize the RSS tables")
Signed-off-by: Antoine Tenart
---
drivers/
On Mon, Dec 4, 2017 at 8:17 PM, Paul Lawrence wrote:
> From: Andrey Ryabinin
>
> LLVM doesn't understand GCC-style paramters ("--param asan-foo=bar"),
> thus we currently we don't use inline/globals/stack instrumentation
> when building the kernel with clang.
>
> Add support for LLVM-style parame
2017-12-08 9:34 GMT+01:00 Daniel Lezcano :
> On 14/11/2017 09:52, Benjamin Gaignard wrote:
>> The clock driving counters is at 90MHz so the maximum period
>> for 16 bis counters is around 750 ms
>
> 728 us
>
>> which is a short period for a clocksource.
>
> Which clocksource are you talking about ?
On Thu, 7 Dec 2017, David Rientjes wrote:
> I'm backporting and testing the following patch against Linus's tree. To
> clarify an earlier point, we don't actually have any change from upstream
> code that allows for free_pgtables() before the
> set_bit(MMF_OOM_SKIP);down_write();up_write() cyc
2017-12-08 16:28 GMT+08:00 Tianyu Lan :
> Hi Jim&Wanpeng:
> Thanks for your help.
>
> 2017-12-08 5:25 GMT+08:00 Jim Mattson :
>> Try disabling the module parameter, "unrestricted_guest." Make sure
>> that the module parameter, "emulate_invalid_guest_state" is enabled.
>> This combination a
On 12/8/2017 4:25 PM, Dave Chinner wrote:
On Fri, Dec 08, 2017 at 01:45:52PM +0900, Byungchul Park wrote:
On Fri, Dec 08, 2017 at 09:22:16AM +1100, Dave Chinner wrote:
On Thu, Dec 07, 2017 at 11:06:34AM -0500, Theodore Ts'o wrote:
On Wed, Dec 06, 2017 at 06:06:48AM -0800, Matthew Wilcox wrote:
On 14/11/2017 09:52, Benjamin Gaignard wrote:
> The CPU is a CortexM4 @ 200MHZ and the clocks driving
> the timers are at 90MHZ with a min delta at 1 you could
> have an interrupt each 0.01 ms which is really to much.
> By increase it to 0x60 it give more time (around 1 ms)
> to CPU to handle the i
On 08/12/2017 10:25, Benjamin Gaignard wrote:
> 2017-12-08 9:34 GMT+01:00 Daniel Lezcano :
>> On 14/11/2017 09:52, Benjamin Gaignard wrote:
>>> The clock driving counters is at 90MHz so the maximum period
>>> for 16 bis counters is around 750 ms
>>
>> 728 us
>>
>>> which is a short period for a clo
Mostly a resend of the v3 posted by Stephen quite some time back [1]
except for few changes.
Based on reading some feedback from list,
* Dropped the patch "clk: Add safe switch hook" from v3 [2].
Now this is taken care by patch#10 in this series only for Krait.
* Dropped the path "clk: Av
From: Stephen Boyd
Krait CPUs have a handful of L2 cache controller registers that
live behind a cp15 based indirection register. First you program
the indirection register (l2cpselr) to point the L2 'window'
register (l2cpdr) at what you want to read/write. Then you
read/write the 'window' regi
From: Stephen Boyd
Describe the HFPLLs present on MSM8960 and APQ8064 devices.
Signed-off-by: Stephen Boyd
---
drivers/clk/qcom/gcc-msm8960.c | 172 +++
include/dt-bindings/clock/qcom,gcc-msm8960.h | 2 +
2 files changed, 174 insertions(+)
diff --git a/
From: Stephen Boyd
We want to reuse the logic in clk-mux.c for other clock drivers
that don't use readl as register accessors. Fortunately, there
really isn't much to the mux code besides the table indirection
and quirk flags if you assume any bit shifting and masking has
been done already. Pull
From: Stephen Boyd
The Krait CPU clocks are made up of a primary mux and secondary
mux for each CPU and the L2, controlled via cp15 accessors. For
Kraits within KPSSv1 each secondary mux accepts a different aux
source, but on KPSSv2 each secondary mux accepts the same aux
source.
Cc:
Signed-off
From: Stephen Boyd
The ACC and GCC regions present in KPSSv1 contain registers to
control clocks and power to each Krait CPU and L2. For CPUfreq
purposes probe these devices and expose a mux clock that chooses
between PXO and PLL8.
Cc:
Signed-off-by: Stephen Boyd
---
.../devicetree/bindings/a
2017-12-08 10:29 GMT+01:00 Daniel Lezcano :
> On 08/12/2017 10:25, Benjamin Gaignard wrote:
>> 2017-12-08 9:34 GMT+01:00 Daniel Lezcano :
>>> On 14/11/2017 09:52, Benjamin Gaignard wrote:
The clock driving counters is at 90MHz so the maximum period
for 16 bis counters is around 750 ms
>>>
When the Hfplls are reprogrammed during the rate change,
the primary muxes which are sourced from the same hfpll
for higher frequencies, needs to be switched to the 'safe
secondary mux' as the parent for that small window. This
is done by registering a clk notifier for the muxes and
switching to th
From: Stephen Boyd
The Krait clocks are made up of a series of muxes and a divider
that choose between a fixed rate clock and dedicated HFPLLs for
each CPU. Instead of using mmio accesses to remux parents, the
Krait implementation exposes the remux control via cp15
registers. Support these clocks
From: Stephen Boyd
Describe the HFPLLs present on IPQ806X devices.
Signed-off-by: Stephen Boyd
---
drivers/clk/qcom/gcc-ipq806x.c | 82 ++
1 file changed, 82 insertions(+)
diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c
inde
From: Stephen Boyd
Register a cpufreq-generic device whenever we detect that a
"qcom,krait" compatible CPU is present in DT.
Cc:
Signed-off-by: Stephen Boyd
---
.../devicetree/bindings/arm/msm/qcom,pvs.txt | 38
drivers/cpufreq/Kconfig.arm| 9 +
drivers/c
On Thu, 2017-12-07 at 16:10 -0600, Rob Herring wrote:
> On Thu, Dec 07, 2017 at 05:52:58PM +0800, Yixun Lan wrote:
> > From: Qiufang Dai
> >
> > Add the required header for the clocks ID dt-bindings
> > exported from various subsystem in the Meson-AXG SoC.
> >
> > Signed-off-by: Qiufang Dai
> >
Linus,
Please git pull the following tag:
git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip.git
for-linus-4.15-rc3-tag
xen: fixes for 4.15-rc3
Those are just two small fixes for the nev pvcalls frontend driver.
Thanks.
Juergen
drivers/xen/pvcalls-front.c | 4 +++-
1 file changed, 3 in
The Platform data was removed earlier by,
'commit eb96924acddc ("cpufreq: dt: Kill platform-data")'
since there were no users at that time.
Now this is required when the each of the cpu clocks
can be scaled independently, which is the case
for krait cores. So reintroduce it.
Signed-off-by: Srichar
On Fri, 8 Dec 2017, Ingo Molnar wrote:
> * Andy Lutomirski wrote:
> > I don't love mucking with user address space. I'm also quite nervous about
> > putting it in our near anything that could pass an access_ok check, since
> > we're
> > totally screwed if the bad guys can figure out how to wri
From: Stephen Boyd
On some devices (MSM8974 for example), the HFPLLs are
instantiated within the Krait processor subsystem as separate
register regions. Add a driver for these PLLs so that we can
provide HFPLL clocks for use by the system.
Cc:
Signed-off-by: Stephen Boyd
---
.../devicetree/bi
On 2017-12-08 Fri 07:51 +，James Hogan Wrote：
> On Fri, Dec 08, 2017 at 12:01:46PM +0800, Jiaxun Yang wrote:
> > Also we're going to separate code between
> > Loongson2 and Loongson3 since they are becoming more and more
> > identical.
>
> Do you mean you want to combine them?
Sorry, my fault.
oops, got Mike's id wrong. Will just re-post fixing his id.
On 12/8/2017 2:59 PM, Sricharan R wrote:
> Mostly a resend of the v3 posted by Stephen quite some time back [1]
> except for few changes.
> Based on reading some feedback from list,
> * Dropped the patch "clk: Add safe switch hook" fr
From: Stephen Boyd
HFPLLs are the main frequency source for Krait CPU clocks. Add
support for changing the rate of these PLLs.
Signed-off-by: Stephen Boyd
---
drivers/clk/qcom/Makefile| 1 +
drivers/clk/qcom/clk-hfpll.c | 253 +++
drivers/clk/qcom/
>>> On 07.12.17 at 23:21, wrote:
> Due to the complexity with the PCI lock we cannot do the reset when a
> device is bound ('echo $BDF > bind') or when unbound ('echo $BDF > unbind')
> as the pci_[slot|bus]_reset also takes the same lock resulting in a
> dead-lock.
It took me a moment to figure t
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