* Dave Hansen wrote:
>
> The MPX hardware data structurse are defined in a weird way: they define
> their size in bytes and then union that with the type with which we want
> to access them.
>
> Yes, this is weird, but it does work. But, new GCC's complain that we
> are accessing the array ou
From: Kai Heng Feng
On Asus GL502VSK and UX305LA, ACPI incorrectly reports discharging when
battery is full and AC is plugged.
However rate_now is correct under this circumstance, hence we can use
"rate_now == 0" as a predicate to report battery full status correctly.
BugLink: https://bugs.laun
* Dave Hansen wrote:
> Hi Ingo,
>
> Here are some small updates to Protection Keys documentation, and
> some small fixes to the selftests that we discussed.
Note that even with all the patches applied, a build warning remains:
gcc -m32 -o /home/mingo/tip/tools/testing/selftests/x86/protection
Print file names of files that differ. For example, instead of:
Warning: Intel PT: x86 instruction decoder differs from kernel
print:
Warning: Intel PT: x86 instruction decoder header at
'tools/perf/util/intel-pt-decoder/inat.h' differs from latest version at
'arch/x86/include/asm/inat.h'
Hi
Here are 2 patches for Intel PT to improve build messages and bring
instruction decoder files into line with the kernel.
Adrian Hunter (2):
perf intel-pt: Improve build messages for files that differ from the
kernel
perf intel-pt: Bring instruction decoder files into line with th
Commit-ID: aa5222e92f8000ed3c1c38dddf11c83222aadfb3
Gitweb: https://git.kernel.org/tip/aa5222e92f8000ed3c1c38dddf11c83222aadfb3
Author: Dan Carpenter
AuthorDate: Fri, 13 Oct 2017 10:01:22 +0300
Committer: Ingo Molnar
CommitDate: Tue, 21 Nov 2017 09:25:01 +0100
sched/deadline: Don't use
There are just a few new defines which do not affect perf tools.
Signed-off-by: Adrian Hunter
---
tools/perf/util/intel-pt-decoder/inat.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/tools/perf/util/intel-pt-decoder/inat.h
b/tools/perf/util/intel-pt-decoder/inat.h
index 125ec
Hi Alan,
> Which raises another question. If there are multiple GPL 2.0 texts which
> are *supposedly* legally identical but this has never been tested in law
> -that implies SPDX is wrong in tagging them identically in case they turn
> out not to be...
For the cases, and the differences we're ta
On 11/20/2017 09:52 PM, Jens Axboe wrote:
> On 11/20/2017 01:49 PM, Christian Borntraeger wrote:
>>
>>
>> On 11/20/2017 08:42 PM, Jens Axboe wrote:
>>> On 11/20/2017 12:29 PM, Christian Borntraeger wrote:
On 11/20/2017 08:20 PM, Bart Van Assche wrote:
> On Fri, 2017-11-17 at 15
On Tue, 21 Nov 2017, Mike Galbraith wrote:
> On Mon, 2017-11-20 at 16:33 -0500, Mikulas Patocka wrote:
> >
> > Is there some specific scenario where you need to call
> > blk_schedule_flush_plug from rt_spin_lock_fastlock?
>
> Excellent question. What's the difference between not getting IO
> st
On 2017/11/21 11:44, Chen Feng wrote:
> With kaslr and kasan enable both, I got the follow issue.
>
> [ 16.130523s]kasan: reg->base = 1, phys_end =1c000,start =
> 4000, end = ffc0
> [ 16.142517s]___alloc_bootmem_nopanic:257
> [ 16.148284s]__alloc_memory
Hi Yury,
On Thu, Nov 9, 2017 at 3:07 PM, Yury Norov wrote:
> find_bit functions are widely used in the kernel, including hot paths.
> This module tests performance of that functions in 2 typical scenarios:
> randomly filled bitmap with relatively equal distribution of set and
> cleared bits, and
Whoops, my bad. Sorry
Thanks,
Romain
2017-11-20 21:34 GMT+01:00 Bjorn Helgaas :
> On Mon, Nov 20, 2017 at 08:32:47PM +0100, Romain Perier wrote:
>> From: Romain Perier
>>
>> Now that all the drivers use dma pool API, we can remove the macro
>> functions for PCI pool.
>>
>> Signed-off-by: Romain
JFYI these patch is in Virtuozzo7 kernel from September, and we have no
issues found with it until now by out testing, and initial problem does
not reproduce for 2.5 months.
* Adrian Hunter wrote:
> Print file names of files that differ. For example, instead of:
>
> Warning: Intel PT: x86 instruction decoder differs from kernel
>
> print:
>
> Warning: Intel PT: x86 instruction decoder header at
> 'tools/perf/util/intel-pt-decoder/inat.h' differs from latest
Commit-ID: c51ff2c7fc45da8b18b28c4f15eca5a9975dfb59
Gitweb: https://git.kernel.org/tip/c51ff2c7fc45da8b18b28c4f15eca5a9975dfb59
Author: Dave Hansen
AuthorDate: Fri, 10 Nov 2017 16:12:28 -0800
Committer: Ingo Molnar
CommitDate: Tue, 21 Nov 2017 09:34:52 +0100
x86/pkeys: Update documenta
Commit-ID: 91c49c2deb96ffc3c461eaae70219d89224076b7
Gitweb: https://git.kernel.org/tip/91c49c2deb96ffc3c461eaae70219d89224076b7
Author: Dave Hansen
AuthorDate: Fri, 10 Nov 2017 16:12:31 -0800
Committer: Ingo Molnar
CommitDate: Tue, 21 Nov 2017 09:34:52 +0100
x86/pkeys/selftests: Rename
Commit-ID: a6400120d042397675fcf694060779d21e9e762d
Gitweb: https://git.kernel.org/tip/a6400120d042397675fcf694060779d21e9e762d
Author: Dave Hansen
AuthorDate: Fri, 10 Nov 2017 16:12:29 -0800
Committer: Ingo Molnar
CommitDate: Tue, 21 Nov 2017 09:34:52 +0100
x86/mpx/selftests: Fix up w
Commit-ID: 7b659ee3e1fe0e8eb39730afb903c64e25490ec4
Gitweb: https://git.kernel.org/tip/7b659ee3e1fe0e8eb39730afb903c64e25490ec4
Author: Dave Hansen
AuthorDate: Fri, 10 Nov 2017 16:12:32 -0800
Committer: Ingo Molnar
CommitDate: Tue, 21 Nov 2017 09:34:52 +0100
x86/pkeys/selftests: Fix pr
Hi Vasyl
On 11/20/2017 11:46 PM, Vasyl Gomonovych wrote:
> To adapt fei->sram_size calculation via resource_size for memory size
> calculation before, in fei->sram = devm_ioremap_resource(dev, res).
> And make memory initialization range in
> memset_io for fei->sram appropriate
>
> Signed-off-by:
On Tue, Nov 21, 2017 at 08:58:51AM +0100, Greg KH wrote:
> On Mon, Nov 20, 2017 at 01:39:31PM +0100, Daniel Vetter wrote:
> > Of course our CI is open, so if someone is supremely bored and wants to
> > backport more stuff for drm/i915, they could do that. But atm it doesn't
> > happen, and then hav
On Tue, Nov 21, 2017 at 07:39:51AM +1000, Dave Airlie wrote:
> On 20 November 2017 at 23:13, Daniel Vetter wrote:
> > On Mon, Nov 20, 2017 at 01:39:31PM +0100, Daniel Vetter wrote:
> >> On Mon, Nov 20, 2017 at 11:21:52AM +, Emil Velikov wrote:
> >> > Hi all,
> >> >
> >> > Since I'm going sligh
On 21 November 2017 at 03:12, Stephen Boyd wrote:
> On 11/20, Chunyan Zhang wrote:
>> From: Cai Li
>>
>> In some cases the clock parent would be set NULL when doing re-parent,
>> it will cause a NULL pointer accessing if clk_set trace event is enabled,
>> since the trace event function would not
Hi Linus,
We see the below boot error IDs in 0day testing on your pre-RC1
merge commits. Most of them are not new regressions, and some are
known problems that have fixup patches planned for the upcoming -RC1.
In this thread, I'll show details and reproduce information for some
of them, hoping t
Hello Jarkko,
On 11/21/2017 12:15 AM, Jarkko Sakkinen wrote:
> On Fri, Nov 17, 2017 at 11:07:24AM +0100, Javier Martinez Canillas wrote:
>> According to the TPM Library Specification, a TPM device must do a command
>> header validation before processing and return a TPM_RC_COMMAND_CODE code
>> if
On Mon, Nov 20, 2017 at 10:44 PM, Andy Lutomirski wrote:
> On Mon, Nov 20, 2017 at 9:07 AM, Andy Lutomirski wrote:
>> This sets up stack switching, including for SYSCALL. I think it's
>> in decent shape.
>>
>> Known issues:
>> - KASAN is likely to be busted. This could be fixed either by teach
The SPMI_PMIC clock divider driver configures the clkdiv modules present
on Qualcomm Technologies, Inc. SPMI PMIC. This driver provides a clock
interface for each clkdiv module and allows clock operations such as enable,
disable, set_rate, recalc_rate and round_rate.
Tirupathi Reddy (2):
clk: qc
Clkdiv module provides a clock output on the PMIC with CXO as
the source. This clock can be routed through PMIC GPIOs. Add
a device driver to configure this clkdiv module.
Signed-off-by: Stephen Boyd
Signed-off-by: Tirupathi Reddy
---
drivers/clk/qcom/Kconfig | 9 ++
drivers/clk/q
This patch adds device tree bindings for Qualcomm SPMI PMIC
clock divider module.
Signed-off-by: Tirupathi Reddy
---
.../bindings/clock/qcom,spmi-pmic-div.txt | 59 ++
1 file changed, 59 insertions(+)
create mode 100644
Documentation/devicetree/bindings/clock/qcom,
On 11/18/2017 5:26 AM, Stephen Boyd wrote:
On 11/17, Tirupathi Reddy wrote:
diff --git a/Documentation/devicetree/bindings/clock/clk-spmi-pmic-div.txt
b/Documentation/devicetree/bindings/clock/clk-spmi-pmic-div.txt
new file mode 100644
index 000..2cf2aba
--- /dev/null
+++ b/Documentation/d
On 11/18/2017 1:52 AM, Rob Herring wrote:
On Fri, Nov 17, 2017 at 03:18:47PM +0530, Tirupathi Reddy wrote:
Clkdiv module provides a clock output on the PMIC with CXO as
the source. This clock can be routed through PMIC GPIOs. Add
a device driver to configure this clkdiv module.
Signed-off-by:
2017-11-17 11:36 GMT+01:00 Arvind Yadav :
> platform_get_irq_byname() can fail here and we must check its return
> value.
>
Applied on drm-misc-next.
Thanks,
Benjamin
> Signed-off-by: Arvind Yadav
> ---
> drivers/gpu/drm/sti/sti_hdmi.c | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --gi
On Mon, 20 Nov 2017, Shawn Landden wrote:
Please use a short and comprehensible subject line and do not pack a full
sentence into it. The sentence wants to be in the change log body.
> +static DECLARE_WAIT_QUEUE_HEAD(oom_target);
> +
> +/* Clean up after a EPOLL_KILLME process quits.
> + * Called
On Tue, 2017-11-21 at 09:37 +0100, Thomas Gleixner wrote:
> On Tue, 21 Nov 2017, Mike Galbraith wrote:
> > On Mon, 2017-11-20 at 16:33 -0500, Mikulas Patocka wrote:
> > >
> > > Is there some specific scenario where you need to call
> > > blk_schedule_flush_plug from rt_spin_lock_fastlock?
> >
>
On 21 November 2017 at 16:57, Chunyan Zhang wrote:
> On 21 November 2017 at 03:12, Stephen Boyd wrote:
>> On 11/20, Chunyan Zhang wrote:
>>> From: Cai Li
>>>
>>> In some cases the clock parent would be set NULL when doing re-parent,
>>> it will cause a NULL pointer accessing if clk_set trace eve
From: Vivek Gautam
Pipe clock comes out of the phy and is available as long as
the phy is turned on. Clock controller fails to gate this
clock after the phy is turned off and generates a warning.
/ # [ 33.048561] gcc_usb3_phy_pipe_clk status stuck at 'on'
[ 33.048585] [ cut here
From: Vivek Gautam
Move from using array of clocks to clk_bulk_* APIs that
are available now.
Signed-off-by: Vivek Gautam
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 50 -
1 file changed, 16 insertions(+), 34 deletions(-)
diff --gi
PHY must be powered on before turning ON clocks and
attempting to initialize it. Driver is exposing
separate init and power_on routines for this.
Apparently USB dwc3 core driver performs power-on after
init. Also, poweron and init for QMP PHY need to be
executed together always, hence remove powero
PHY must be powered on before turning ON clocks and
attempting to initialize it. Driver is exposing
separate init and power_on routines for this.
Apparently USB dwc3 core driver performs power-on
after init. Also, poweron and init for QUSB2 PHY
need to be executed together always, hence remove
powe
New revision (v3) of QMP PHY uses different offsets
for almost all of the registers. Hence, move these
definitions to header file so that updated offsets
can be added for QMP v3.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 119 +--
drivers/phy
PHY block or asynchronous reset requires signal
to be asserted before de-asserting. Driver is only
de-asserting signal which is already low, hence
reset operation is a no-op. Fix this by asserting
signal first. Also, resetting requires PHY clocks
to be turned ON only after reset is finished. Fix
th
Update generic compatible string for QUSB2 V2 PHY. This will allow
all targets using QUSB2 V2 use same string.
Acked-by: Rob Herring
Signed-off-by: Manu Gautam
---
Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/Do
New version of QUSB2 PHY has some registers offset changed.
Add support to have register layout for a target and update
the same in phy_configuration.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qusb2.c | 131 --
1 file changed, 95 insertions(+),
Driver is currently performing PHY reset after starting
SERDES/PCS. As per hardware datasheet reset must be done
before starting PHY. Hence, update the sequence.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff -
Use register layout to add additional registers present
on QUSB2 PHY V2 version for PHY initialization.
Other than new registers on V2, following two register's
offset and bit definitions are different: POWERDOWN control
and PLL_STATUS.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qco
Disable clocks and enable DP/DM wakeup interrupts when
suspending PHY.
Core driver should notify speed to PHY driver to enable
appropriate DP/DM wakeup interrupts polarity in suspend state.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qusb2.c | 181 +++
Update compatible string and clock names for QMP version V3
USB PHY.
Acked-by: Rob Herring
Signed-off-by: Manu Gautam
---
Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/phy/qcom-qm
QMP V3 USB3 PHY is a DisplayPort (DP) and USB combo PHY
with dual RX/TX lanes to support type-c. There is a
separate block DP_COM for configuration related to type-c
or DP. Add support for dp_com region and secondary rx/tx
lanes initialization.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm
Disable clocks and enable PHY autonomous mode to detect
wakeup events when PHY is suspended.
Core driver should notify speed to PHY driver to enable
LFPS and/or RX_DET interrupts.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 185 +++-
drive
QCOM USB PHYs can monitor resume/remote-wakeup event in
suspended state. However PHY driver must know current
operational speed of PHY in order to set correct polarity of
wakeup events for detection. E.g. QUSB2 PHY monitors DP/DM
signals depending on speed is LS or FS/HS to detect resume.
Similarly
Registers offsets for QMP V3 PHY are changed from
previous versions (1/2), update same in header file.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qmp.h | 149
1 file changed, 149 insertions(+)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.
On 11/21/2017 10:07 AM, Javier Martinez Canillas wrote:
> On 11/21/2017 12:15 AM, Jarkko Sakkinen wrote:
>
>> matters less than breaking the sandbox.
>>
>
> Yes, sorry for that. It wasn't clear to me that there was a sandbox and my
> lack of familiarity with the code was the reason why I posted a
On Mon, Nov 20, 2017 at 08:03:06AM -0800, Andi Kleen wrote:
> > > Yes it is.
> > >
> > > It's for the complete sampling period because it is computed
> > > over the delta from the last sample to the previous sample.
> > >
> > > There isn't really a metric at a point, it is always over a interval.
On Thu, Nov 16, 2017 at 1:53 PM, Carlo Caione wrote:
> On Wed, Oct 18, 2017 at 7:05 PM, Pierre-Louis Bossart
> wrote:
>> On 10/18/17 11:49 AM, Carlo Caione wrote:
>>>
>>> From: Carlo Caione
>>>
>>> Introduce a new custom dapm routes map to quirk platforms with the
>>> internal mic connected to I
fadd2line script should use the binary tool
used for the target system.
Signed-off-by: Liu Changcheng
diff --git a/scripts/faddr2line b/scripts/faddr2line
index 1f5ce95..39e07d8 100755
--- a/scripts/faddr2line
+++ b/scripts/faddr2line
@@ -44,9 +44,16 @@
set -o errexit
set -o nounset
+READELF
On Tue, Nov 21, 2017 at 07:59:01AM +, Liuwenliang (Abbott Liu) wrote:
> On Nov 17, 2017 21:49 Marc Zyngier [mailto:marc.zyng...@arm.com] wrote:
> >On Sat, 18 Nov 2017 10:40:08 +
> >"Liuwenliang (Abbott Liu)" wrote:
>
> >> On Nov 17, 2017 15:36 Christoffer Dall [mailto:cd...@linaro.org
On 21/11/17 07:59, Liuwenliang (Abbott Liu) wrote:
> On Nov 17, 2017 21:49 Marc Zyngier [mailto:marc.zyng...@arm.com] wrote:
>> On Sat, 18 Nov 2017 10:40:08 +
>> "Liuwenliang (Abbott Liu)" wrote:
>
>>> On Nov 17, 2017 15:36 Christoffer Dall [mailto:cd...@linaro.org] wrote:
If your p
On powerpc32, patch_instruction() is called by apply_feature_fixups()
which is called from early_init()
There is the following note in front of early_init():
* Note that the kernel may be running at an address which is different
* from the address that it was linked at, so we must use RELOC/PTRR
We forgot to remov memory footprint accounting of per-cpu type
variables, fix it.
Fixes: 35782b233f37 ("f2fs: remove percpu_count due to performance regression")
Signed-off-by: Chao Yu
---
fs/f2fs/debug.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/fs/f2fs/debug.c b/fs/f2fs/debug.c
index
On 11/21/2017 09:35 AM, Christian Borntraeger wrote:
>
>
> On 11/20/2017 09:52 PM, Jens Axboe wrote:
>> On 11/20/2017 01:49 PM, Christian Borntraeger wrote:
>>>
>>>
>>> On 11/20/2017 08:42 PM, Jens Axboe wrote:
On 11/20/2017 12:29 PM, Christian Borntraeger wrote:
>
>
> On 11/20
From: Richard Leitner
Previously phy_id was u32 and phy_id_mask was unsigned int. As the
phy_id_mask defines the important bits of the phy_id (and is therefore
the same size) these two variables should be the same data type.
Signed-off-by: Richard Leitner
---
This patch is extracted from the "n
Le 21/11/2017 à 03:28, Balbir Singh a écrit :
On Sun, Nov 19, 2017 at 1:36 AM, LEROY Christophe
wrote:
Meelis Roos a écrit :
How early does it hang ? Any oops or trace ?
Very early - instead oif kernel emssages, I see some repeated gibberish
of some characteers, and the background turns
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From: Markus Elfring
Date: Tue, 21 Nov 2017 10:50:32 +0100
Add jump targets so that a bit of exception handling can be better reused
at the end of these functions.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring
---
tools/testing/selftests/timers/posix_
Hi Loic,
>> With 4.14 I get the following, the address doesn't look right, do you
>> have a link to the serdev patch headed to 4.15?
>>
>> # hciconfig
>> hci0: Type: Primary Bus: UART
>> BD Address: AA:AA:AA:AA:AA:AA ACL MTU: 1021:8 SCO MTU: 64:1
>> DOWN
>> RX bytes:54
On Mon 2017-11-20 16:57:19, Miroslav Benes wrote:
> On Wed, 15 Nov 2017, Miroslav Benes wrote:
>
> > If a task sleeps in a set of patched functions uninterruptedly, it could
> > block the whole transition indefinitely. Thus it may be useful to clear
> > its TIF_PATCH_PENDING to allow the process
Hi Greg,
Thanks for notifying the issue. This patch is supposed to be applied
on top of the below patch
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?h=v4.14&id=9166c44358346c0a92b11fd4e24925efff791648
which is not present in stable, I missed to keep stable mailing l
On 11/20/2017 11:51 PM, Greg Kroah-Hartman wrote:
On Tue, Nov 21, 2017 at 08:23:20AM +0100, Greg Kroah-Hartman wrote:
On Mon, Nov 20, 2017 at 06:13:42AM -0800, Guenter Roeck wrote:
On 11/19/2017 06:43 AM, Greg Kroah-Hartman wrote:
This is the start of the stable review cycle for the 4.13.15 re
Hi,
I saw this WARN_ON splat on ath9k in hostap mode. The code triggering the warning says it's a driver
bug.
Thanks for checking.
Ortwin
[Tue Nov 21 06:00:36 2017] [ cut here ]
[Tue Nov 21 06:00:36 2017] WARNING: CPU: 0 PID: 0 at net/mac80211/rx.c:629
ieee80211_rx_n
Dear eMail User,
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2017-11-21 18:00 GMT+08:00 syzbot
:
> Hello,
>
> syzkaller hit the following crash on
> 5a3517e009e979f21977d362212b7729c5165d92
> git://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/master
> compiler: gcc (GCC) 7.1.1 20170620
> .config is attached
> Raw console output is attached.
>
On 11/21/2017 10:50 AM, Christian Borntraeger wrote:
>
>
> On 11/21/2017 09:35 AM, Christian Borntraeger wrote:
>>
>>
>> On 11/20/2017 09:52 PM, Jens Axboe wrote:
>>> On 11/20/2017 01:49 PM, Christian Borntraeger wrote:
On 11/20/2017 08:42 PM, Jens Axboe wrote:
> On 11/20/201
On Mon, 20 Nov 2017, Benjamin Tissoires wrote:
> Hi,
>
> this is v3 rebased on top of for-next.
> There are no other changes.
>
> Cheers,
> Benjamin
>
> Benjamin Tissoires (4):
> HID: core: move the dynamic quirks handling in core
> HID: quirks: move the list of special devices into a quirk
On 16/11/17 10:50, H. Nikolaus Schaller wrote:
> From: Laurent Pinchart
>
> Commit d178e034d565 ("drm: omapdrm: Move FEAT_DPI_USES_VDDS_DSI feature
> to dpi code") replaced usage of platform data version with SoC matching
> to configure DPI VDDS. The SoC match entries were incorrect, they should
From: Cai Li
In some cases the clock parent would be set NULL when doing re-parent,
it will cause a NULL pointer accessing if clk_set trace event is
enabled.
This patch sets the parent as "none" if the input parameter is NULL.
Fixes: dfc202ead312 (clk: Add tracepoints for hardware operations)
S
Hi Colin,
On 17/11/17 20:49, Colin King wrote:
> From: Colin Ian King
>
> The two comparisons of the unsigned int ret for -ve error returns is
> always false because ret is unsigned. Fix this by making ret a signed
> int.
>
> Signed-off-by: Colin Ian King
> ---
> drivers/gpu/drm/omapdrm/dss/h
On 11/20/2017 02:57 AM, rui_f...@realsil.com.cn wrote:
> From: Rui Feng
>
> Add support for new chip rts5260.
> In order to support rts5260, the definitions of
> some internal registers and workflow have to be
> modified and are different from its predecessors
> and OCP function is added for RTS5
On 11/20/2017 02:57 AM, rui_f...@realsil.com.cn wrote:
> From: Rui Feng
>
> Because Realtek card reader drivers are pcie and usb drivers,
> and they bridge mmc subsystem and memstick subsystem, they are
> not mfd drivers. Greg and Lee Jones had a discussion about
> where to put the drivers, the r
Hi,
> Am 21.11.2017 um 11:25 schrieb Tomi Valkeinen :
>
> On 16/11/17 10:50, H. Nikolaus Schaller wrote:
>> From: Laurent Pinchart
>>
>> Commit d178e034d565 ("drm: omapdrm: Move FEAT_DPI_USES_VDDS_DSI feature
>> to dpi code") replaced usage of platform data version with SoC matching
>> to confi
Hi Palmer,
On Mon, Nov 20, 2017 at 01:28:01PM -0800, Palmer Dabbelt wrote:
> On Mon, 20 Nov 2017 12:28:56 PST (-0800), j.neuschae...@gmx.net wrote:
> > On Mon, Nov 20, 2017 at 11:50:00AM -0800, Palmer Dabbelt wrote:
> > > +RISC-V Supervisor Binary Interface (SBI)
> > > +
> > > +The RISC-V privileg
From: Jiri Kosina
Commit
799ba82de01e ("sched/deadline: Use C bitfields for the state flags")
converted state flags into one-bit signed int. Signed one-bit type can be
either 0 or -1, which is going to cause a problem once 1 is assigned to it
and then the value later tested against 1.
On Mon, Nov 20, 2017 at 09:07:32AM -0800, Andy Lutomirski wrote:
> This will simplify future changes that want scratch variables early in
> the SYSENTER handler -- they'll be able to spill registers to the
> stack. It also lets us get rid of a SWAPGS_UNSAFE_STACK user.
>
> This does not depend on
On Fri, Nov 17, 2017 at 02:33:01PM -0600, Tom Zanussi wrote:
> Add the necessary infrastructure to allow the variables defined on one
> event to be referenced in another. This allows variables set by a
> previous event to be referenced and used in expressions combining the
> variable values saved
On Tue, 21 Nov 2017, Jiri Kosina wrote:
> From: Jiri Kosina
>
> Commit
>
> 799ba82de01e ("sched/deadline: Use C bitfields for the state flags")
>
> converted state flags into one-bit signed int. Signed one-bit type can be
> either 0 or -1, which is going to cause a problem once 1 is ass
On Fri, Nov 17, 2017 at 04:11:31PM +0800, Chris Chiu wrote:
> On Fri, Nov 17, 2017 at 2:49 PM, Mika Westerberg
> wrote:
> > On Thu, Nov 16, 2017 at 09:27:51PM +0800, Chris Chiu wrote:
> >> On Thu, Nov 16, 2017 at 8:44 PM, Mika Westerberg
> >> wrote:
> >> > On Wed, Nov 15, 2017 at 06:19:56PM +0800
On 21 November 2017 at 02:46, Shuah Khan wrote:
> On 11/19/2017 07:32 AM, Greg Kroah-Hartman wrote:
>> This is the start of the stable review cycle for the 4.4.100 release.
>> There are 59 patches in this series, all will be posted as a response
>> to this one. If anyone has any issues with these
Hello,
On Tue, 21 Nov 2017 11:44:05 +0100 (CET)
Jiri Kosina wrote:
> From: Jiri Kosina
>
> Commit
>
> 799ba82de01e ("sched/deadline: Use C bitfields for the state flags")
>
> converted state flags into one-bit signed int. Signed one-bit type can be
> either 0 or -1, which is going to
When using the host personality, VMCI will grab a mutex for any
queue pair access. In the detach callback for the vmci vsock
transport, we call vsock_stream_has_data while holding a spinlock,
and vsock_stream_has_data will access a queue pair.
To avoid this, we can simply omit calling vsock_stream
Hi Palmer,
On Mon, Nov 20, 2017 at 11:50:22AM -0800, Palmer Dabbelt wrote:
> RISC-V doesn't currently specify a mechanism for enabling or disabling
> CPUs. Instead, we assume that all CPUs are enabled on boot, and if
> someone wants to save power we instead put a CPU to sleep via a WFI
> loop.
>
On 2017/11/21 16:35, syzbot wrote:
> Hello,
>
> syzkaller hit the following crash on ca91659962303d4fd5211a5e4e13df5cbb11e744
> git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/master
> compiler: gcc (GCC) 7.1.1 20170620
> .config is attached
> Raw console output is attached.
>
>
On Tue, Nov 21, 2017 at 01:41:45AM +0200, Jarkko Sakkinen wrote:
> In potential deployments of SGX, the owner could do this either in the
> firmware level or OS level depending whether the MSRs are configured as
> writable in the feature control.
>
> One option would be to have a config flag to de
On Mon, Nov 20, 2017 at 12:35:49PM -0800, Sami Tolvanen wrote:
> On Mon, Nov 20, 2017 at 02:47:20PM +, Mark Rutland wrote:
> > However, we could instead check ld-version, produce a warning, and
> > abort the build in such cases.
>
> I believe the version number of gold didn't change in binutil
Hi
- Original Message -
> On Mon, Nov 20, 2017 at 10:55:17AM +0100, Marc-André Lureau wrote:
> > Modify fw_cfg_read_blob() to use DMA if the device supports it.
> > Return errors, because the operation may fail.
> >
> > The DMA operation is expected to run synchronously with today qemu,
>
From: Sebastian Sjoholm
Date: Mon, 20 Nov 2017 19:05:17 +0100
> Quectel BG96 is an Qualcomm MDM9206 based IoT modem, supporting both
> CAT-M and NB-IoT. Tested hardware is BG96 mounted on Quectel development
> board (EVB). The USB id is added to qmi_wwan.c to allow QMI
> communication with the
Hello,
FYI this happens in mainline kernel 4.14.0-10859-gcf9b077.
It at least dates back to v4.5 .
It occurs in 2 out of 2 boots.
[ 204.036012] Average test time: 28300548370
[ 204.045272] Testing concurrent rhashtable access from 10 threads
[ 206.134970] Writes: Total: 2 Max/Min: 0/0 Fai
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