On 10/17/2017 04:50 PM, Josh Poimboeuf wrote:
> On Tue, Oct 17, 2017 at 04:36:00PM -0400, Boris Ostrovsky wrote:
>> On 10/17/2017 04:17 PM, Josh Poimboeuf wrote:
>>> On Tue, Oct 17, 2017 at 11:36:57AM -0400, Boris Ostrovsky wrote:
On 10/17/2017 10:36 AM, Josh Poimboeuf wrote:
> Maybe we ca
On Thu, Oct 12, 2017 at 02:27:17PM -0500, Benoit Parrot wrote:
> Device Tree bindings for the Video Processing Engine (VPE) driver.
>
> Signed-off-by: Benoit Parrot
> ---
> Documentation/devicetree/bindings/media/ti-vpe.txt | 41
> ++
> 1 file changed, 41 insertions(+)
> cr
On Sun, Sep 17, 2017 at 04:05:09PM -0700, Paul E. McKenney wrote:
> Hello!
>
> The topic of memory-ordering recipes came up at the Linux Plumbers
> Conference microconference on Friday, so I thought that I should summarize
> what is currently "out there":
And here is an updated list of potential
On Tue, Oct 17, 2017 at 04:59:41PM -0400, Boris Ostrovsky wrote:
> On 10/17/2017 04:50 PM, Josh Poimboeuf wrote:
> > On Tue, Oct 17, 2017 at 04:36:00PM -0400, Boris Ostrovsky wrote:
> >> On 10/17/2017 04:17 PM, Josh Poimboeuf wrote:
> >>> On Tue, Oct 17, 2017 at 11:36:57AM -0400, Boris Ostrovsky wr
On Tue, 17 Oct 2017, Paul E. McKenney wrote:
> On Tue, Oct 17, 2017 at 03:38:23PM -0400, Alan Stern wrote:
> > On Tue, 17 Oct 2017, Paul E. McKenney wrote:
> >
> > > How about this?
> > >
> > > 0.Simple special cases
> > >
> > > If there is only one CPU on the one hand or only one var
> +static int __write_ring(struct pvcalls_data_intf *intf,
> + struct pvcalls_data *data,
> + struct iov_iter *msg_iter,
> + int len)
> +{
> + RING_IDX cons, prod, size, masked_prod, masked_cons;
> + RING_IDX array_size = XEN_FLEX
On Tue, Oct 17, 2017 at 09:03:40PM +0200, Daniel Lezcano wrote:
> On 17/10/2017 20:25, Eduardo Valentin wrote:
> > Hello,
> >
> > On Tue, Oct 17, 2017 at 02:28:27PM +0200, Daniel Lezcano wrote:
> >> On 17/10/2017 05:54, Eduardo Valentin wrote:
> >>> On Tue, Oct 10, 2017 at 08:02:27PM +0200, Daniel
> >
> > Right, it doesn’t need load latency. 0x81d0 should be a better choice.
> > I will use 0x81d0 and 0x82d0 as default event for V2.
>
> That's model specific. You would need to check the model number if you do
> that.
>
> Also with modern perf you can use the correct event names of course.
On 17/10/2017 23:07, Eduardo Valentin wrote:
> On Tue, Oct 17, 2017 at 09:03:40PM +0200, Daniel Lezcano wrote:
>> On 17/10/2017 20:25, Eduardo Valentin wrote:
>>> Hello,
>>>
>>> On Tue, Oct 17, 2017 at 02:28:27PM +0200, Daniel Lezcano wrote:
On 17/10/2017 05:54, Eduardo Valentin wrote:
> O
On Tue, Oct 17, 2017 at 3:24 PM, Thierry Reding
wrote:
> On Tue, Oct 17, 2017 at 03:13:54PM -0500, Rob Herring wrote:
> [...]
>> > diff --git
>> > a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-vde.txt
>> > b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-vde.txt
> [...
On 17 October 2017 at 21:56, Roy Franz wrote:
> Convert slram to use memremap() to map the memory it uses to back an MTD
> device, as this is the proper interface for mapping memory. This change
> enables normal memory to be used to back an MTD device on arm64, as arm64
> prevents ioremap() being
On Fri, Oct 13, 2017 at 03:49:33PM +0800, Li Wei wrote:
> add ufs node document for Hisilicon.
>
> Signed-off-by: Li Wei
> ---
> Documentation/devicetree/bindings/ufs/ufs-hisi.txt | 47
> ++
> 1 file changed, 47 insertions(+)
> create mode 100644 Documentation/devicetree/bi
This patch creates a warning (CHECK)
"Concatenated strings should use spaces between elements"
There are no concatenated strings here.
(checkpatch is also used in the U-Boot project where wide strings
occur in the EFI implementation.)
Signed-off-by: Heinrich Schuchardt
---
test.c | 7 +++
On Fri, Oct 13, 2017 at 10:22:06AM +0200, Jerome Brunet wrote:
> The meson i2c driver seems to be compatible with more SoCs than
> initially thought. Let's use the most generic compatible he have in
> DT instead of the gxbb specific one
>
> Signed-off-by: Jerome Brunet
> ---
> Documentation/devi
Get the FPGA manager during region creation.
This is a baby step in refactoring the FPGA region code to
separate out common FPGA region code from FPGA region
Device Tree overlay support.
Signed-off-by: Alan Tull
---
v2: split out from another patch
v3: no change to this patch in this version of
Create of-fpga-region.c and move the following functions without
modification from fpga-region.c.
* of_fpga_region_find
* of_fpga_region_get_mgr
* of_fpga_region_get_bridges
* child_regions_with_firmware
* of_fpga_region_parse_ov
* of_fpga_region_notify_pre_apply
* of_fpga_region_notify_post_remov
New function of_fpga_region_parse_ov added, moving code
from fpga_region_notify_pre_apply. This function
gets the FPGA image info from the overlay and is able
to simplify some of the logic involved.
This is a baby step in refactoring the FPGA region code to
separate out common code from Device Tr
From: amd
The extent of pages specified when applying a reserved region should
include up to the last page of the range, but not the page following
the range.
Signed-off-by: Gary R Hook
---
drivers/iommu/amd_iommu.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers
Linus,
Testing a new trace event format, I triggered a bug by doing:
# modprobe trace-events-sample
# echo 1 > /sys/kernel/debug/tracing/events/sample-trace/enable
# rmmod trace-events-sample
This would cause an oops. The issue is that I added another trace
event sample that reused a reg
The FPGA may already have a static image programmed when
Linux boots. In that case a DT overlay may be used to add
the devices that already exist. This commit allows that
by shuffling the order of some checks.
Signed-off-by: Alan Tull
---
v4: Patch added to patchset in v4
v5: no change to this
* Create fpga-region.h.
* Export fpga_region_program_fpga.
* Move struct fpga_region and other things to the header.
This is a step in separating FPGA region common code
from Device Tree support.
Signed-off-by: Alan Tull
---
v2: split out from another patch
update author email
v3: changes du
Another step in separating common code from device tree specific
code for FPGA regions.
* add FPGA region register/unregister functions.
* add the register/unregister functions to the header
* use devm_kzalloc to alloc the region.
* add a method for getting bridges to the region struct
* add priv
Rename some functions that will be moved to
of-fpga-region.c. Also change some parameters
and export a function to help with refactoring.
This is a step towards the larger goal of separating
device tree support from FPGA region common code.
* fpga_region_get_manager -> of_fpga_region_get_mgr
*
Add a function for searching the fpga-region class. This
will be useful when device tree code is no longer in the
same file that declares the fpga-region class. Another
step in separating common FPGA region code from device
tree support.
Signed-off-by: Alan Tull
Acked-by: Moritz Fischer
---
v2
On Tue, Oct 17, 2017 at 12:46 PM, Rob Herring wrote:
> On Fri, Oct 13, 2017 at 04:51:03PM -0700, John Stultz wrote:
>> On Fri, Oct 13, 2017 at 2:41 PM, Rob Herring wrote:
>> > Someone has to decide what to put on the kernel command line. If you are
>> > setting the overlay in the command line at
The fpga menuconfig has gotten messy. The bridges and managers are
mixed together.
* Separate the bridges and things dependent on CONFIG_FPGA_BRIDGE
from the managers.
* Group the managers by vendor in order that they were added
to the kernel.
The following is what the menuconfig ends up loo
Use FPGA image info (region->info) when region code is
programming the FPGA to pass in multiple parameters.
This is a baby step in refactoring the FPGA region code to
separate out common FPGA region code from FPGA region
Device Tree overlay support.
Signed-off-by: Alan Tull
---
v2: split out fro
Make it easy to add attributes to low level FPGA drivers the right
way. Add attribute groups pointers to structures that are used when
registering a manager, bridge, or group. When the low level driver
registers, set the device attribute group. The attributes are
created in device_add.
Signed-o
When DT overlays are applied, each FPGA region keeps track of the fpga
image info as region->info. This pointer is assigned only if an
overlay causes the FPGA to be programmed. As it stands, this pointer
can be overwritten, causing a slow warning later when overlays are
removed.
This patch fixes
During a device tree overlay pre-apply notification, the check
for child FPGA regions can happen slightly earlier. This saves
us from allocating the FPGA image info that just gets thrown
away.
This is a baby step in refactoring the FPGA region code to
separate out common FPGA region code from FPG
fpga-mgr has three methods for programming FPGAs, depending on
whether the image is in a scatter gather list, a contiguous
buffer, or a firmware file. This makes it difficult to write
upper layers as the caller has to assume whether the FPGA image
is in a sg table, as a single buffer, or a firmware
Remove of_node_get/put in fpga_region_get/put. Not
needed and will get in the way when I separate out
the common FPGA region code from Device Tree support
code.
Signed-off-by: Alan Tull
Acked-by: Moritz Fischer
---
v2: split out from another patch
v3: Add Moritz' ack
v4: no change to this patch
* Change the fpga-mgr API to have one fpga_mgr_load function
instead of three.
* Separate common FPGA region code from Device Tree support
* Expose API functions for FPGA regions
* Add API functions for bridges where DT is not used.
* clean up drivers/fpga/Kconfig
* add attribute groups when
Use dev_err messages instead of pr_err.
Also s/®ion->dev/dev/ in two places where we already
have dev = ®ion->dev.
Signed-off-by: Alan Tull
Acked-by: Moritz Fischer
---
v2: new in this version of the patchset
v3: for bisectability some changes moved to earlier patches
v4: no change to this patc
Add two functions for getting the FPGA bridge from the device
rather than device tree node. This is to enable writing code
that will support using FPGA bridges without device tree.
Rename one old function to make it clear that it is device
tree-ish. This leaves us with 3 functions for getting a b
Previously when the user gets a FPGA manager, it was locked
and nobody else could use it for programming.
This commit makes it straightforward to save a reference to an
FPGA manager and only lock it when programming the FPGA.
Add functions that get an FPGA manager's mutex for exclusive use:
* fpg
On 18.10.2017 00:13, Rob Herring wrote:
> On Tue, Oct 17, 2017 at 3:24 PM, Thierry Reding
> wrote:
>> On Tue, Oct 17, 2017 at 03:13:54PM -0500, Rob Herring wrote:
>> [...]
diff --git
a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-vde.txt
b/Documentation/devicetree/bi
On Tue, Oct 17, 2017 at 09:10:16PM +, Liang, Kan wrote:
> > >
> > > Right, it doesn’t need load latency. 0x81d0 should be a better choice.
> > > I will use 0x81d0 and 0x82d0 as default event for V2.
> >
> > That's model specific. You would need to check the model number if you do
> > that.
>
On Mon, Aug 21, 2017 at 10:16 AM, Rob Herring wrote:
Hi Rob,
> With dependencies on a statically allocated full path name converted to
> use %pOF format specifier, we can store just the basename of node, and
> the unflattening of the FDT can be simplified.
>
> This commit will affect the remaini
> +
> +int pvcalls_front_recvmsg(struct socket *sock, struct msghdr *msg, size_t
> len,
> + int flags)
> +{
> + struct pvcalls_bedata *bedata;
> + int ret;
> + struct sock_mapping *map;
> +
> + if (flags & (MSG_CMSG_CLOEXEC|MSG_ERRQUEUE|MSG_OOB|MSG_TRUNC))
> +
On Tue, Oct 10, 2017 at 11:30:35AM +0530, Divagar Mohandass wrote:
> This adds eeprom "size" as optional property for i2c eeproms.
> The "size" property allows explicitly specifying the size of the
> EEPROM chip in bytes.
>
> Acked-by: Rob Herring
> Reviewed-by: Sakari Ailus
> Signed-off-by: Div
On Tue, Oct 10, 2017 at 11:30:36AM +0530, Divagar Mohandass wrote:
> Obtain the size of the EEPROM chip from DT if the "size" property is
> specified for the device.
>
> Suggested-by: Andy Shevchenko
> Reviewed-by: Andy Shevchenko
> Reviewed-by: Sakari Ailus
> Signed-off-by: Divagar Mohandass
On Tue, Oct 10, 2017 at 11:30:37AM +0530, Divagar Mohandass wrote:
> Currently the device is kept in D0, there is an opportunity
> to save power by enabling runtime pm.
>
> Device can be daisy chained from PMIC and we can't rely on I2C core
> for auto resume/suspend. Driver will decide when to res
From: Andi Kleen
I like _ONCE warnings because it's guaranteed that they don't
flood the log.
During testing I find it useful to reset the state of the once warnings,
so that I can rerun tests and see if they trigger again, or can
guarantee that a test run always hits the same warnings.
This pa
Hi,
> + {
> + .compatible = "atmel,spd",
> + .data = (void *)AT24_DEVICE_MAGIC(2048 / 8,
> + AT24_FLAG_READONLY | AT24_FLAG_IRUGO)
> + },
checkpatch reported this one as un-documented. And come to think of it,
since this is solely for EE
On Tue, Oct 17, 2017 at 09:09:59AM +0200, Eric Auger wrote:
> AT the moment if ITT only contains invalid entries,
> vgic_its_restore_itt returns 1 and this is considered as
> an an error in vgic_its_restore_dte.
>
> Also in case the device table only contains invalid entries,
> the table restore f
On 10/17/17 1:59 PM, David Rientjes wrote:
On Tue, 17 Oct 2017, Michal Hocko wrote:
On Mon 16-10-17 17:15:31, David Rientjes wrote:
Please simply dump statistics for all slab caches where the memory
footprint is greater than 5% of system memory.
Unconditionally? User controlable?
Uncondi
On Tue, Oct 17, 2017 at 4:40 PM, Wolfram Sang wrote:
> Hi,
>
>> + {
>> + .compatible = "atmel,spd",
>> + .data = (void *)AT24_DEVICE_MAGIC(2048 / 8,
>> + AT24_FLAG_READONLY | AT24_FLAG_IRUGO)
>> + },
>
> checkpatch reported this one as un
On Tue, 17 Oct 2017 20:44:19 +0100 Mark Brown wrote:
> Hi Andrew,
>
> Today's linux-next merge of (well, import of) the akpm tree got a
> bunch of patches that were either applied or have conflicts with other
> trees, apparmor and btrfs stand out.
I don't know why that should be.
I have a clea
On Mon, Sep 11, 2017 at 03:11:44PM -0500, Franklin S Cooper Jr wrote:
> 66AK2G has I2C instances that are not apart of the ALWAYS_ON power domain
> unlike other Keystone 2 SoCs and OMAPL138. Therefore, pm_runtime
> is required to insure the power domain used by the specific I2C instance is
> proper
On Mon, Sep 11, 2017 at 03:11:45PM -0500, Franklin S Cooper Jr wrote:
> Add pm-domains property which is required for 66AK2Gx. Also document 66AK2G
> unique clocks property usage.
>
> Signed-off-by: Franklin S Cooper Jr
> Acked-by: Rob Herring
> Acked-by: Sekhar Nori
Applied to for-next, thank
On Tue, Oct 17, 2017 at 4:32 PM, Alan Tull wrote:
> On Mon, Aug 21, 2017 at 10:16 AM, Rob Herring wrote:
>
> Hi Rob,
>
>> With dependencies on a statically allocated full path name converted to
>> use %pOF format specifier, we can store just the basename of node, and
>> the unflattening of the FD
On Tue, Oct 17, 2017 at 04:43:14PM -0500, Rob Herring wrote:
> On Tue, Oct 17, 2017 at 4:40 PM, Wolfram Sang wrote:
> > Hi,
> >
> >> + {
> >> + .compatible = "atmel,spd",
> >> + .data = (void *)AT24_DEVICE_MAGIC(2048 / 8,
> >> + AT24_FLAG_REA
On Tue, 17 Oct 2017, Dexuan Cui wrote:
> > From: Thomas Gleixner [mailto:t...@linutronix.de]
> > Sent: Tuesday, October 17, 2017 12:55 AM
> > --- a/arch/x86/Kconfig
> > +++ b/arch/x86/Kconfig
> > @@ -95,7 +95,7 @@ config X86
> > select GENERIC_IRQ_MATRIX_ALLOCATOR if X86_LOCAL_APIC
> >
On Wed, 18 Oct 2017, Yang Shi wrote:
> > > > Please simply dump statistics for all slab caches where the memory
> > > > footprint is greater than 5% of system memory.
> > >
> > > Unconditionally? User controlable?
> >
> > Unconditionally, it's a single line of output per slab cache and there
> >
On Thu, Sep 21, 2017 at 11:30:07PM +0100, Colin King wrote:
> From: Colin Ian King
>
> Don't populate const array supported_speeds on the stack, instead
> make it static. Makes the object code smaller by 150 bytes:
>
> Before:
>text data bss dec hex filename
>8474
On Tue, Oct 17, 2017 at 09:10:00AM +0200, Eric Auger wrote:
> vgic_its_restore_cte returns +1 if the collection table entry
> is valid and properly decoded. As a consequence, if the
> collection table is fully filled with valid data that are
> decoded without error, vgic_its_restore_collection_tabl
On Tue, 17 Oct 2017 14:40:17 -0700 Andi Kleen wrote:
> From: Andi Kleen
>
> I like _ONCE warnings because it's guaranteed that they don't
> flood the log.
>
> During testing I find it useful to reset the state of the once warnings,
> so that I can rerun tests and see if they trigger again, or
On Tue, Oct 17, 2017 at 05:03:01PM -0400, Alan Stern wrote:
> On Tue, 17 Oct 2017, Paul E. McKenney wrote:
>
> > On Tue, Oct 17, 2017 at 03:38:23PM -0400, Alan Stern wrote:
> > > On Tue, 17 Oct 2017, Paul E. McKenney wrote:
> > >
> > > > How about this?
> > > >
> > > > 0. Simple special cas
On Tue, Oct 17, 2017 at 09:10:01AM +0200, Eric Auger wrote:
> At the moment the device table save() returns -EINVAL if
> vgic_its_check_id() fails to return the gpa of the entry
> associated to the device/collection id. Let vgic_its_check_id()
> return an int instead of a bool and return a more pre
On Tue, Oct 17, 2017 at 12:22 PM, Dave Hansen
wrote:
>
> We do not have tracepoints for sys_modify_ldt() because we define
> it directly instead of using the normal SYSCALL_DEFINEx() macros.
>
> However, there is a reason sys_modify_ldt() does not use the macros:
> it has an 'int' return type inst
On 10/17/2017 01:56 PM, Roy Franz wrote:
Convert slram to use memremap() to map the memory it uses to back an MTD
device, as this is the proper interface for mapping memory. This change
enables normal memory to be used to back an MTD device on arm64, as arm64
prevents ioremap() being used on norm
On Tue, Oct 17, 2017 at 09:10:02AM +0200, Eric Auger wrote:
> The spec says it is UNPREDICTABLE to enable the ITS
> if any of the following conditions are true:
>
> - GITS_CBASER.Valid == 0.
> - GITS_BASER.Valid == 0, for any GITS_BASER register
> where the Type field indicates Device.
> - GITS_
On Tue, Oct 17, 2017 at 8:38 AM, Prakash Sangappa
wrote:
>
>
> On 10/16/17 5:52 PM, Andy Lutomirski wrote:
>>
>> On Mon, Oct 16, 2017 at 3:54 PM, prakash.sangappa
>> wrote:
>>>
>>>
>>> On 10/16/2017 03:07 PM, Nagarathnam Muthusamy wrote:
On 10/16/2017 02:36 PM, Andrew Morton w
On 10/16, Chao Yu wrote:
> On 2017/10/14 1:31, Jaegeuk Kim wrote:
> > If there's some data written through inline data or dentry, we need to shouw
> > st_blocks. This fixes reporting zero blocks even though there is small
> > written
> > data.
> >
> > Signed-off-by: Jaegeuk Kim
>
> Reviewed-by:
On Tue, Oct 17, 2017 at 09:10:02AM +0200, Eric Auger wrote:
> The spec says it is UNPREDICTABLE to enable the ITS
> if any of the following conditions are true:
>
> - GITS_CBASER.Valid == 0.
> - GITS_BASER.Valid == 0, for any GITS_BASER register
> where the Type field indicates Device.
> - GITS_
On Tue, Oct 17, 2017 at 1:00 AM, Borislav Petkov wrote:
> On Tue, Oct 17, 2017 at 06:57:43AM +0200, Markus Trippelsdorf wrote:
>> On 2017.10.16 at 18:06 -0700, Andy Lutomirski wrote:
>> > On Mon, Oct 16, 2017 at 3:15 AM, Borislav Petkov wrote:
>> > > On Mon, Oct 16, 2017 at 10:39:17AM +0800, kern
On Tue, 17 Oct 2017 08:50:12 -0700 Andrey Smirnov
wrote:
> On Sat, Apr 15, 2017 at 11:11 PM, Guenter Roeck wrote:
> > On 04/11/2017 09:06 AM, Andrey Smirnov wrote:
> >>
> >> Save a bit of cleanup code by leveraging newly added
> >> devm_register_reboot_notifier().
> >>
> >> Cc: cphe...@gmail.co
On Fri, Oct 13, 2017 at 11:16:42AM +0200, Jerome Brunet wrote:
> The meson pwm driver seems to be compatible with more SoCs than
> initially thought. Let's use the most generic compatibles he have in
> DT instead of the gxbb specific ones
>
> Signed-off-by: Jerome Brunet
> ---
> Documentation/de
On Tue, Oct 17, 2017 at 09:10:04AM +0200, Eric Auger wrote:
> At the moment vgic_its_process_commands() does not
> check the CBASER is valid before processing any command.
> Let's fix that.
>
> Also rename cbaser local variable into cbaser_pa to avoid
> any confusion with the full register.
>
> S
On 10/12/2017 11:55 AM, Colin King wrote:
From: Colin Ian King
Variable qim is assigned but never read, it is redundant and can
be removed.
Cleans up clang warning: Value stored to 'qim' is never read
Fixes: 4b394a232df7 ("crypto: ccp - Let a v5 CCP provide the same function as
v3")
Signed-o
> Seems useful. Can we document the new interface please?
>
> I'm not sure where :( If it was in /proc/sys/kernel then we'd have a
> Documentation file. But debugfs?
I added a new file Documentation/clearing-warn-once.txt
But longer term would be good to document all the debugfs
entries system
On Tue, Oct 17, 2017 at 05:27:15PM +, Roberts, William C wrote:
>
>
> > -Original Message-
> > From: Tobin C. Harding [mailto:m...@tobin.cc]
> > Sent: Monday, October 16, 2017 9:53 PM
> > To: kernel-harden...@lists.openwall.com
> > Cc: Tobin C. Harding ; Linus Torvalds > foundation.o
>
> +static unsigned int pvcalls_front_poll_passive(struct file *file,
> +struct pvcalls_bedata *bedata,
> +struct sock_mapping *map,
> +poll_table *wait)
> +{
> +
On Tue, Oct 17, 2017 at 09:10:05AM +0200, Eric Auger wrote:
> In case the device table save fails, we currently do not
> attempt to save the collection table. However it may
> happen that the device table fails because the structures
> in memory are inconsistent with device GITS_BASER however
> thi
From: Andi Kleen
I like _ONCE warnings because it's guaranteed that they don't
flood the log.
During testing I find it useful to reset the state of the once warnings,
so that I can rerun tests and see if they trigger again, or can
guarantee that a test run always hits the same warnings.
This pa
On Fri, Oct 13, 2017 at 01:35:27PM -0700, Guenter Roeck wrote:
> On Fri, Oct 13, 2017 at 04:26:57PM +0200, Peter Rosin wrote:
> > On 2017-10-13 15:50, Guenter Roeck wrote:
> > > On 10/13/2017 02:27 AM, Peter Rosin wrote:
> > >> With a nxp,se97 chip on an atmel sama5d31 board, the I2C adapter driver
On 10/17/17 2:50 PM, David Rientjes wrote:
On Wed, 18 Oct 2017, Yang Shi wrote:
Please simply dump statistics for all slab caches where the memory
footprint is greater than 5% of system memory.
Unconditionally? User controlable?
Unconditionally, it's a single line of output per slab cache
gOn Fri, Oct 13, 2017 at 01:56:40PM +0300, Todor Tomov wrote:
> Add DT binding document for Qualcomm Camera Control Interface driver
>
> CC: Rob Herring
> CC: Mark Rutland
> CC: devicet...@vger.kernel.org
> Signed-off-by: Todor Tomov
> ---
> .../devicetree/bindings/i2c/i2c-qcom-cci.txt |
On Tue, Oct 17, 2017 at 09:10:06AM +0200, Eric Auger wrote:
> From: wanghaibin
>
> We create 2 new functions that frees the device and
> collection lists. this is currently called by vgic_its_destroy()
> and we will add other callers in subsequent patches.
See my previous comments about language
On Fri, Oct 13, 2017 at 06:09:11PM +0200, Niklas Cassel wrote:
> Signed-off-by: Niklas Cassel
> ---
> .../devicetree/bindings/pci/axis,artpec6-pcie.txt | 3 +-
It is preferred to split binding patches. Regardless,
Acked-by: Rob Herring
> drivers/pci/dwc/Kconfig|
On Fri, Oct 13, 2017 at 06:09:13PM +0200, Niklas Cassel wrote:
> The ARTPEC-6 SoC and the ARTPEC-7 SoC are very similar.
> Unfortunately, some fields in the PCIECFG and PCIESTAT
> register have changed.
>
> Signed-off-by: Niklas Cassel
> ---
> .../devicetree/bindings/pci/axis,artpec6-pcie.txt |
SLAB_RECLAIM_ACCOUNT is a permanent attribute of a slab cache. Set
__GFP_RECLAIMABLE as part of its ->allocflags rather than check the cachep
flag on every page allocation.
Signed-off-by: David Rientjes
---
mm/slab.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/mm/s
On 10/17/2017 3:02 PM, Andy Lutomirski wrote:
On Tue, Oct 17, 2017 at 8:38 AM, Prakash Sangappa
wrote:
On 10/16/17 5:52 PM, Andy Lutomirski wrote:
On Mon, Oct 16, 2017 at 3:54 PM, prakash.sangappa
wrote:
On 10/16/2017 03:07 PM, Nagarathnam Muthusamy wrote:
On 10/16/2017 02:36 PM, Andre
On Tue, Oct 17, 2017 at 09:10:07AM +0200, Eric Auger wrote:
> When the GITS_BASER.Valid gets cleared, the data structures in
> guest RAM are not valid anymore. The device, collection
> and LPI lists stored in the in-kernel ITS represent the same
> information in some form of cache. So let's void th
On Tue, Oct 17, 2017 at 09:10:08AM +0200, Eric Auger wrote:
> At the moment, the in-kernel emulated ITS is not properly reset.
> On guest restart/reset some registers keep their old values and
> internal structures like device, ITE, and collection lists are not
> freed.
>
> This may lead to variou
On Wed, 18 Oct 2017, Yang Shi wrote:
> > Yes, this should catch occurrences of "huge unreclaimable slabs", right?
>
> Yes, it sounds so. Although single "huge" unreclaimable slab might not result
> in excessive slabs use in a whole, but this would help to filter out "small"
> unreclaimable slab.
On Tue, Oct 17, 2017 at 3:35 PM, prakash sangappa
wrote:
>
> On 10/17/2017 3:02 PM, Andy Lutomirski wrote:
>>
>> On Tue, Oct 17, 2017 at 8:38 AM, Prakash Sangappa
>> wrote:
>>>
>>>
>>> On 10/16/17 5:52 PM, Andy Lutomirski wrote:
On Mon, Oct 16, 2017 at 3:54 PM, prakash.sangappa
wr
Patched up with suggestions from Rob Herring, resend.
Marty E. Plummer (3):
clk: hisilicon: add CRG driver Hi3521A SoC
arm: hisi: enable Hi3521A SoC
arm: dts: add Hi3521A dts
arch/arm/boot/dts/Makefile| 2 +
arch/arm/boot/dts/hi3521a-rs-dm290e.dts | 41
arch/arm/b
Add CRG driver for Hi3521A SoC. CRG (Clock and Reset Generator) module
generates clock and reset signals used by other module blocks on SoC.
Signed-off-by: Marty E. Plummer
---
Changes in v2:
- Switched to SPDX tags and GPL-2.0+
drivers/clk/hisilicon/Kconfig | 7 ++
drivers/clk/
Add hi3521a.dtsi and hi3521a-rs-dm290e.dts for RaySharp CCTV systems,
marketed under the name Samsung SDR-B74301N
Signed-off-by: Marty E. Plummer
---
Chages in v2:
- Use SPDX tag and GPL-2.0+
- Add memory addresses to some nodes
- Add arm arch timer
- Add more specific compatible strings
Enable Hisilicon Hi3521A/Hi3520DCV300 SoC. This SoC series includes
hardware mutlimedia codec cores, commonly used in consumer cctv/dvr
security systems and ipcameras. The arm core is a Cortex A7.
Signed-off-by: Marty E. Plummer
---
arch/arm/mach-hisi/Kconfig | 6 ++
1 file changed, 6 insert
On Tue, Oct 17, 2017 at 4:24 PM, Rob Herring wrote:
> On Wed, Oct 11, 2017 at 06:34:22PM -0400, Jim Quinlan wrote:
>> The DT bindings description of the Brcmstb PCIe device is described. This
>> node can be used by almost all Broadcom settop box chips, using
>> ARM, ARM64, or MIPS CPU architectur
On Tue, 2017-10-17 at 23:17 +0200, Heinrich Schuchardt wrote:
> This patch creates a warning (CHECK)
> "Concatenated strings should use spaces between elements"
>
> There are no concatenated strings here.
Yes, there are.
> (checkpatch is also used in the U-Boot project where wide strings
> occur
In preparation to enabling -Wimplicit-fallthrough, mark switch cases
where we are expecting to fall through.
Notice that in this particular case I replaced the "NOBREAK" comment with
a "fall through" comment, which is what GCC is expecting to find.
Signed-off-by: Gustavo A. R. Silva
---
This cod
On Tue, 2017-10-17 at 08:57 -0700, James Bottomley wrote:
> On Tue, 2017-10-17 at 11:25 +0200, SF Markus Elfring wrote:
> > >
> > > Fixes is only for bug fixes. These don't fix any bugs.
> >
> > How do you distinguish these in questionable source code
> > from other error categories or software
On 10/17/2017 3:40 PM, Andy Lutomirski wrote:
On Tue, Oct 17, 2017 at 3:35 PM, prakash sangappa
wrote:
On 10/17/2017 3:02 PM, Andy Lutomirski wrote:
On Tue, Oct 17, 2017 at 8:38 AM, Prakash Sangappa
wrote:
On 10/16/17 5:52 PM, Andy Lutomirski wrote:
On Mon, Oct 16, 2017 at 3:54 PM, prakas
On Oct 12, 2017, at 10:16, Gustavo A. R. Silva wrote:
>
> In preparation to enabling -Wimplicit-fallthrough, mark switch cases
> where we are expecting to fall through.
>
> Signed-off-by: Gustavo A. R. Silva
This isn't strictly necessary, since LASSERT() never returns, but
not harmful either.
also:
http://git.kernel.org/cgit/linux/kernel/git/dhowells/linux-fs.git/log/?h=keys-fixes
Tagged thusly:
git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-fs.git
keys-fixes-20171017
Thanks,
David
---
The following changes since c
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