On Fri, Oct 06, 2017 at 06:33:31AM +, Icenowy Zheng wrote:
> In the CCU of the Allwinner R40 SoC, there's a GMAC configuration register,
> which is intended to be accessed by the dwmac-sun8i driver. On SoCs already
> supported by the driver the register is placed in the syscon rather than
> the
于 2017年10月9日 GMT+08:00 下午3:18:09, Maxime Ripard
写到:
>On Fri, Oct 06, 2017 at 06:33:31AM +, Icenowy Zheng wrote:
>> In the CCU of the Allwinner R40 SoC, there's a GMAC configuration
>register,
>> which is intended to be accessed by the dwmac-sun8i driver. On SoCs
>already
>> supported by the
On Thu 05-10-17 10:57:07, Waiman Long wrote:
> On 10/05/2017 04:59 AM, Jan Kara wrote:
> > On Wed 04-10-17 17:20:05, Waiman Long wrote:
> >> int alloc_dlock_list_heads(struct dlock_list_heads *dlist)
> >> {
> >> - int idx;
> >> + int idx, cnt = nr_dlock_lists ? nr_dlock_lists : nr_cpu_ids;
> >
Since commit 925a6efb8ff0c ("Btrfs: stop using
try_to_writeback_inodes_sb_nr to flush delalloc") this function hasn't
been used outside so stop exporting it.
Signed-off-by: Rakesh Pandit
---
fs/fs-writeback.c | 6 +++---
include/linux/writeback.h | 2 --
2 files changed, 3 insertions(+),
On 10/09/2017 11:14 AM, Aaron Lu wrote:
> __rmqueue() is called by rmqueue_bulk() and rmqueue() under zone->lock
> and that lock can be heavily contended with memory intensive applications.
>
> Since __rmqueue() is a small function, inline it can save us some time.
> With the will-it-scale/page_fa
Hi Alex,
On 21/09/2017 21:05, Alex Williamson wrote:
> MRRS defines the maximum read request size a device is allowed to
> make. Drivers will often increase this to allow more data transfer
> with a single request. Completions to this request are bound by the
> MPS setting for the bus. Aside fr
Hi Doug,
On 2017/9/28 4:56, Douglas Anderson wrote:
This attempts to instill a bit of paranoia to the code dealing with
the CTO timer. It's believed that this will make the CTO timer more
robust in the case that we're having very long interrupt latencies.
I have already got reports about the
- Original Message -
> From: "Tobin C. Harding"
> To: "Paolo Bonzini" , rkrc...@redhat.com
> Cc: k...@vger.kernel.org, linux-kernel@vger.kernel.org, "Tobin C. Harding"
>
> Sent: Monday, October 9, 2017 8:30:14 AM
> Subject: [PATCH] KVM: remove printing of token address
>
> KVM current
Thanks for your reply :)
Yes, you are right. Sorry for this false positive.
Thanks,
Jia-Ju Bai
On 2017/10/9 14:32, Clemens Ladisch wrote:
Jia-Ju Bai wrote:
The driver may sleep under a spinlock, and the function call path is:
snd_opl3_note_on (acquire the spinlock)
snd_opl3_find_patch
On Mon, Oct 09, 2017 at 01:07:36PM +0530, Anshuman Khandual wrote:
> On 10/09/2017 11:14 AM, Aaron Lu wrote:
> > __rmqueue() is called by rmqueue_bulk() and rmqueue() under zone->lock
> > and that lock can be heavily contended with memory intensive applications.
> >
> > Since __rmqueue() is a smal
On 09/10/2017 00:35, Jim Mattson wrote:
> If it were me, I'd apply De Morgan to that expression, but the logic looks
> fine.
>
> Reviewed-by: Jim Mattson
I'm okay with the way Wanpeng wrote it, but as a follow up this:
if (!cpu_has_vmx_ept() ||
!cpu_has_vmx_ept_4levels() ||
On Mon 09-10-17 14:34:11, kemi wrote:
>
>
> On 2017年10月03日 17:23, Michal Hocko wrote:
> > On Thu 28-09-17 14:11:41, Kemi Wang wrote:
> >> This is the second step which introduces a tunable interface that allow
> >> numa stats configurable for optimizing zone_statistics(), as suggested by
> >> Dav
Okay, I will send a patch :)
Thanks,
Jia-Ju Bai
On 2017/10/9 13:43, Greg KH wrote:
On Mon, Oct 09, 2017 at 09:10:28AM +0800, Jia-Ju Bai wrote:
According to device_main.c, the driver may sleep under a spinlock,
and the function call path is:
vt6655_suspend (acquire the spinlock)
pci_set_pow
Hi
Wenyou,
On Mon, Oct 09, 2017 at 01:49:44PM +0800, Yang, Wenyou wrote:
> Hi Sakari,
>
> Sorry for late answer, because I was in vacation last week.
>
> On 2017/9/29 5:25, Sakari Ailus wrote:
> > Hi Wenyou,
> >
> > On Thu, Sep 28, 2017 at 04:18:26PM +0800, Wenyou Yang wrote:
> > > To meet the
Hi Kishon
On 10/5/2017 2:38 PM, Manu Gautam wrote:
> Hi Jack,
>
> On 9/28/2017 10:23 PM, Jack Pham wrote:
>>
>> +static int qusb2_phy_set_mode(struct phy *phy, enum phy_mode mode)
>> +{
>> +struct qusb2_phy *qphy = phy_get_drvdata(phy);
>> +
>> +qphy->mode = mod
On 08/10/2017 04:35, Wanpeng Li wrote:
> From: Wanpeng Li
>
> SDM section 2.6 mentioned:
>
> After reset, all bits (except bit 0) in XCR0 are cleared to zero; XCR0[0] is
> set to 1.
>
> This patch sets XCRO to the 0x1 after vCPU reset.
>
> Cc: Paolo Bonzini
> Cc: Radim Krčmář
> Signed-off-
On Sat, Oct 07, 2017 at 05:43:32PM +, Levin, Alexander (Sasha Levin) wrote:
> On Sat, Oct 07, 2017 at 11:15:17AM +0200, Peter Zijlstra wrote:
> >On Sat, Oct 07, 2017 at 02:07:26AM +, Levin, Alexander (Sasha Levin)
> >wrote:
> >> And quite a few lines of your added trace (lmk if you need mo
This patches add support rockchip RGB output, Some Rockchip CRTCs, like rv1108,
can directly output parallel and serial RGB data to panel or to conversion chip.
So we add this driver to probe encoder and connector to support this case.
Sandy Huang (4):
devicetree/bindings: display: Add doucument
Hi rob,
Thanks for your reply.
在 2017/10/4 5:56, Rob Herring 写道:
On Fri, Sep 22, 2017 at 11:00:26AM +0800, Sandy Huang wrote:
This path add support rv1108 rgb output interface driver.
Signed-off-by: Sandy Huang
---
Changes in v2:
1. rename rockchip,rgb-mode to rgb-mode;
You can't just
Describe the panel property rgb-mode for parallel and serial
RGB output interface, include the connection relations for each
mode.
Signed-off-by: Sandy Huang
---
.../bindings/display/panel/panel-rgb.txt | 116 +
1 file changed, 116 insertions(+)
create mode 100644
This path add support rv1108 rgb output interface driver.
Signed-off-by: Sandy Huang
---
Changes in v3:
move rgb-mode to panel node which describe at:
Documentation/devicetree/bindings/display/panel/panel-rgb.txt
Changes in v2:
1. rename rockchip,rgb-mode to rgb-mode;
2. delete reg for signl
Some Rockchip CRTCs, like rv1108, can directly output parallel and
serial RGB data to panel or conversion chip, so we add this driver to
probe encoder and connector.
Signed-off-by: Sandy Huang
---
Changes in v3:
update for rgb-mode move to panel node.
Changes in v2:
1. add error log when prob
This patch add serial RGB output interface for rockchip vop, the
more info about serial RGB output interface described at the
following file:
Documentation/devicetree/bindings/display/panel/panel-rgb.txt
Signed-off-by: Sandy Huang
---
Changes in v3: None
Changes in v2: None
drivers/gpu/drm/roc
On Fri, Sep 01, 2017 at 03:21:11PM +0200, Peter Zijlstra wrote:
> When an entity migrates in (or out) of a runqueue, we need to add (or
> remove) its contribution from the entire PELT hierarchy, because even
> non-runnable entities are included in the load average sums.
>
> In order to do this we
On 09/30, Linus Torvalds wrote:
>On Thu, Sep 21, 2017 at 12:02 AM, NeilBrown wrote:
>>
>> I think it is crashing in
>> static inline bool ata_is_host_link(const struct ata_link *link)
>> {
>> return link == &link->ap->link || link == link->ap->slave_link;
>> }
>
>Yes. The code is
>
> 1a:
On Sat, Oct 07, 2017 at 11:28:57AM -0700, Paul E. McKenney wrote:
> But if you are saying that it would be good to have wait_for_completion()
> and complete() directly modeled at some point, no argument. In addition,
> I hope that the memory model is applied to other tools that analyze kernel
> co
On Mon, Oct 09, 2017 at 04:16:20PM +0800, Jia-Ju Bai wrote:
> The drivers vt6655 and gma500 call pci_set_power_state under a spinlock,
> which may sleep.
> The function call paths are:
> gma_power_begin (acquire the spinlock) (drivers/gpu/drm/gma500/power.c)
> gma_resume_pci
> pci_set_power_
The drivers vt6655 and gma500 call pci_set_power_state under a spinlock, which
may sleep.
The function call paths are:
gma_power_begin (acquire the spinlock) (drivers/gpu/drm/gma500/power.c)
gma_resume_pci
pci_set_power_state
__pci_start_power_transition (drivers/pci/pci.c)
msl
Hi All,
Do you have any comments on this patch set?
Thanks,
Shaokun
On 2017/9/21 18:40, Zhangshaokun wrote:
> Hi Mark/Will,
>
> Appreciate any comments from you.
>
> Thanks,
> Shaokun
>
> On 2017/8/22 16:07, Shaokun Zhang wrote:
>> This patchset adds support for HiSilicon SoC uncore PMUs driv
Hello Tristram,
in previous version I see that transit traffic (ping) goes to cpu,
then from cpu back to destination port. I.e. it works but with cpu
involving. Is this version supposed to work like that?
Thank you,
Maxim.
2017-10-06 23:33 GMT+03:00 :
> From: Tristram Ha
>
> Add Microchip KSZ8
Hi Ulf,
[auto build test ERROR on linus/master]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Ulf-Magnusson/kconfig-Remove-menu_end_entry/20171009-140245
config: x86_64-rhel
compiler: gcc-6
On Fri, Oct 06, 2017 at 02:09:51PM -0400, Jean-François Têtu wrote:
> The kcontrol for the third input (rxN_mix1_inp3) of both RX2
> and RX3 mixers are not using the correct control register. This simple
> patch fixes this.
Please don't resubmit patches that have already been applied, you should
s
On Fri, Oct 06, 2017 at 11:08:25PM +0200, Peter Zijlstra wrote:
> On Fri, Oct 06, 2017 at 08:57:56PM +, Mathieu Desnoyers wrote:
> > Hi Hans,
> >
> > I'm currently making sure the
> > MEMBARRIER_CMD_REGISTER_PRIVATE_EXPEDITED command makes its way into
> > the 4.14 kernel before the end of th
2017-10-09 5:44 GMT+09:00 Julia Lawall :
>
>
> On Sun, 8 Oct 2017, Sebastian Reichel wrote:
>
>> Hi,
>>
>> On Sun, Oct 08, 2017 at 09:18:39PM +0200, Julia Lawall wrote:
>> > Rename battery.cocci as check_bq27xxx_data.cocci and adjust the warning
>> > messages to indicate that some structures are th
Oh, sorry, I will send the patches for each driver.
Thanks,
Jia-Ju Bai
On 2017/10/9 16:17, Greg KH wrote:
On Mon, Oct 09, 2017 at 04:16:20PM +0800, Jia-Ju Bai wrote:
The drivers vt6655 and gma500 call pci_set_power_state under a spinlock, which
may sleep.
The function call paths are:
gma_pow
Hi Sakari,
On 4.10.2017 13:47, Laurent Pinchart wrote:
> CC'ing the I2C mainling list and the I2C maintainer.
>
> On Wednesday, 4 October 2017 13:30:08 EEST Sakari Ailus wrote:
>> Hi Todor,
>>
>> On Mon, Oct 02, 2017 at 04:28:45PM +0300, Todor Tomov wrote:
>>> As soon as the sensor is powered on
On 10/08/2017 12:07 PM, Jonathan Cameron wrote:
On Sun, 1 Oct 2017 21:48:18 +0200
Stefan Brüns wrote:
Reducing shunt and bus voltage range improves the accuracy, so allow
altering the default settings.
Both settings are exposed as gain values. While for the shunt voltage
this is straightfor
On Sat, Oct 07, 2017 at 10:36:55PM +, Levin, Alexander (Sasha Levin) wrote:
> From: Matt Ranostay
>
> [ Upstream commit 9834ffd1ecc3a401d0ce64c2d4235a726da6d4f9 ]
>
> We can get audio errors if hitting deeper idle states on omaps:
>
> [alsa.c:230] error: Fatal problem with alsa output, erro
On 07/10/2017 23:26, David Kozub wrote:
> Hi all,
>
> booting up kernel 4.14-rc3 with CS5535_CLOCK_EVENT_SRC on an ALIX 2c3
> (http://pcengines.ch/alix2c3.htm) dies with:
>
> [ 2.313086] cs5535-smb cs5535-smb: SCx200 device 'CS5535 ACB0'
> registered
> [ 2.338711] cs5535-mfgpt cs5535-mfgpt:
On Mon, 9 Oct 2017, Masahiro Yamada wrote:
> 2017-10-09 5:44 GMT+09:00 Julia Lawall :
> >
> >
> > On Sun, 8 Oct 2017, Sebastian Reichel wrote:
> >
> >> Hi,
> >>
> >> On Sun, Oct 08, 2017 at 09:18:39PM +0200, Julia Lawall wrote:
> >> > Rename battery.cocci as check_bq27xxx_data.cocci and adjust t
On most architectures[*], gcc turns __builtin_ffsll() into a call to
__ffsdi2(), which is not provided by any architecture, leading to
failures like:
rcar-gen3-cpg.c:(.text+0x289): undefined reference to `__ffsdi2'
To fix this, use __ffs64() instead, which is available on all
architectures.
The driver may sleep under a spinlock, and the function call path is:
vt6655_suspend (acquire the spinlock)
pci_set_power_state
__pci_start_power_transition (drivers/pci/pci.c)
msleep --> may sleep
To fix it, pci_set_power_state is called without having a spinlock.
This bug is found b
On Sun, Oct 08, 2017 at 10:13:57PM +0100, Al Viro wrote:
> On Sun, Oct 08, 2017 at 06:47:46PM +0300, Vladimir Davydov wrote:
> > On Sun, Oct 08, 2017 at 03:03:32AM +0100, Al Viro wrote:
> > > On Sun, Oct 08, 2017 at 01:56:08AM +0100, Al Viro wrote:
> > >
> > > > What's more, we need to be careful
Hi,
On Fri, Oct 06, 2017 at 08:34:07AM +, Chen-Yu Tsai wrote:
> On Fri, Oct 6, 2017 at 4:54 AM, Maxime Ripard
> wrote:
> > Old pinctrl drivers will need to disable strict mode for various reasons,
> > among which:
> > - Some DT will still have a pinctrl group for each GPIO used, which will
On Sat, Oct 07, 2017 at 06:26:10PM -0400, Nik Nyby wrote:
> This fixes a few typos in the snd_designware description.
Please submit patches using subject lines reflecting the style for the
subsystem. This makes it easier for people to identify relevant
patches. Look at what existing commits in t
Enable ostm0 and ostm1 timers to be used as clock source and clockevent
source. The timers provides greater accuracy than the already enabled
mtu2 one.
With these enabled:
clocksource: ostm: mask: 0x max_cycles: 0x, max_idle_ns:
57352151442 ns
sched_clock: 32 bits at 33MHz, resol
On 06.10.2017 19:23, Rob Herring wrote:
> On Fri, Oct 6, 2017 at 6:10 AM, Andrzej Hajda wrote:
>> Hi Rob,
>>
>> Thanks for review.
>>
>> On 06.10.2017 01:12, Rob Herring wrote:
>>> On Thu, Sep 28, 2017 at 03:07:27PM +0200, Andrzej Hajda wrote:
These bindings allows to describe most known stan
Add pin configuration subnode for ETHER pin group.
Signed-off-by: Jacopo Mondi
---
arch/arm/boot/dts/r7s72100-gr-peach.dts | 39 +
1 file changed, 39 insertions(+)
diff --git a/arch/arm/boot/dts/r7s72100-gr-peach.dts
b/arch/arm/boot/dts/r7s72100-gr-peach.dts
ind
The patch
ASoC: dwc: fix typos in Kconfig
has been applied to the asoc tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
th
Hi Simon,
this small series contains other two updates for GR-Peach.
The first patch is a re-proposal of the previously sent one. I have received
indication from netdev people to move the properties describing reset line to
the phy node. I've been suggested to use a different node layout as wel
2017-10-02 11:34 GMT+02:00 Benjamin Gaignard :
> With a call to drm_of_panel_bridge_remove() we could remove
> the bridge without store it in vc4_dpi internal driver structure.
+ Eric to get his point of view on that
>
> Signed-off-by: Benjamin Gaignard
> ---
> drivers/gpu/drm/vc4/vc4_dpi.c | 1
On Tue, Sep 26, 2017 at 05:17:13PM +0300, Mika Westerberg wrote:
> Hi,
>
> Currently when plugging PCIe device using native PCIe hotplug Linux PCI
> core tries to allocate bus space and resources so that the newly enumerated
> topology barely fits there. Now, if the PCIe topology that was just plu
On Sun, Oct 08, 2017 at 03:43:35PM +0100, Chris Wilson wrote:
> Quoting Harsha Sharma (2017-10-08 15:04:07)
> > @@ -624,7 +624,7 @@ static bool intel_fbdev_init_bios(struct drm_device
> > *dev,
> > ifbdev->preferred_bpp = fb->base.format->cpp[0] * 8;
> > ifbdev->fb = fb;
> >
> >
Update the PCIe phy settings based on new settings available
in AM572x Technical Reference Manual[1] Revision I, revised
April 2017 in Table 26-62 "Preferred PCIe_PHY_RX SCP Register
Settings".
[1] http://www.ti.com/lit/ug/spruhz6i/spruhz6i.pdf
Cc: Vignesh R
Signed-off-by: Kishon Vijay Abraham I
This was supposed to only update ti-pipe3 PHY registers. However because
of the way the ti-pipe3 PHY, OCP2SCP and PCIe controller are connected
in dra7xx where
PCIe controller --> ti-pipe3 PHY --> OCP2SCP
depends on depends on
updating t
Commit 8309f86cd41e ("x86/tsc: Provide 'tsc=unstable' boot parameter") adds
a new parameter 'tsc=unstable', but doesn't add some description to guide
users.
Append the description of 'tsc=unstable' at the end of 'tsc=' section.
Signed-off-by: Dou Liyang
---
Documentation/admin-guide/kernel-para
Add DT bindings documentation for Rockchip RGA
Signed-off-by: Jacob Chen
Signed-off-by: Yakir Yang
Acked-by: Rob Herring
---
.../devicetree/bindings/media/rockchip-rga.txt | 33 ++
1 file changed, 33 insertions(+)
create mode 100644 Documentation/devicetree/bindings/me
change in V11:
- fix compile warning
change in V10:
- move to rockchip/rga
- changes according to comments
- some style changes
change in V9:
- remove protduff things
- test with the latest v4l2-compliance
change in V8:
- remove protduff things
change in V6,V7:
- correct warning in checkpatch.p
PCI core access configuration space registers in resume_noirq callbacks.
In the case of dra7xx, PIPE3 PHY connected to PCIe controller has to be
enabled before accessing configuration space registers. Since
PIPE3 PHY is enabled by only configuring control module registers, no
aborts has been observ
This patch add the RGA dt config of rk3288 SoC.
Signed-off-by: Jacob Chen
Signed-off-by: Yakir Yang
---
arch/arm/boot/dts/rk3288.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index a0a0b08bff74..8c6dfc0abc42 1
Rockchip RGA is a separate 2D raster graphic acceleration unit. It
accelerates 2D graphics operations, such as point/line drawing, image
scaling, rotation, BitBLT, alpha blending and image blur/sharpness
The driver supports various operations from the rendering pipeline.
- copy
- fast solid colo
This patch add the RGA dt config of RK3399 SoC.
Signed-off-by: Jacob Chen
Signed-off-by: Yakir Yang
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
On Mon, Oct 02, 2017 at 07:19:56AM -0700, Christoph Hellwig wrote:
> Can you move this to the beginning of your series, just after
> the other edits to blk_mq_sched_dispatch_requests?
OK.
>
> > +static void blk_mq_do_dispatch_sched(struct request_queue *q,
> > +st
-support/20171009-155445
config: sparc64-allyesconfig (attached as .config)
compiler: sparc64-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
On Mon, 09 Oct 2017 04:42:15 +0200,
Jia-Ju Bai wrote:
>
> According to seq_virmidi.c, the driver may sleep under a read spinlock.
> The function call path is:
> snd_virmidi_dev_receive_event (acquire the spinlock)
> snd_seq_dump_var_event
> copy_from_user --> may sleep
>
> This bug is found
On Fri, Oct 06, 2017 at 06:29:08PM +0100, Chris Wilson wrote:
> Quoting Daniel Vetter (2017-10-06 15:20:09)
> > On Fri, Oct 06, 2017 at 12:03:49PM +0100, Chris Wilson wrote:
> > > Quoting Daniel Vetter (2017-10-06 10:06:37)
> > > > stop_machine is not really a locking primitive we should use, excep
2017-10-09 17:40 GMT+09:00 Julia Lawall :
>
>
> On Mon, 9 Oct 2017, Masahiro Yamada wrote:
>
>> 2017-10-09 5:44 GMT+09:00 Julia Lawall :
>> >
>> >
>> > On Sun, 8 Oct 2017, Sebastian Reichel wrote:
>> >
>> >> Hi,
>> >>
>> >> On Sun, Oct 08, 2017 at 09:18:39PM +0200, Julia Lawall wrote:
>> >> > Renam
Date: Wed, 4 Oct 2017 23:09:38 +0200
Subject: [PATCH] direct-io: Prevent NULL pointer access in submit_page_section
In the code added to function submit_page_section by commit b1058b981,
sdio->bio can currently be NULL when calling dio_bio_submit. This then
leads to a NULL pointer access in dio_b
In the code added to function submit_page_section by commit b1058b981,
sdio->bio can currently be NULL when calling dio_bio_submit. This then
leads to a NULL pointer access in dio_bio_submit, so check for a NULL
bio in submit_page_section before trying to submit it instead.
Fixes xfstest generic/
On Fri 06-10-17 01:20:20, Christoph Hellwig wrote:
> From 77881bd72b5fb1219fc74625b0380930f9c580df Mon Sep 17 00:00:00 2001
> From: Christoph Hellwig
> Date: Fri, 6 Oct 2017 10:18:53 +0200
> Subject: mm: move all laptop_mode handling to backing-dev.c
>
> It isn't block-device specific and oddly s
On Sat, Oct 07, 2017 at 03:10:06AM +, Levin, Alexander (Sasha Levin) wrote:
> We are experimenting with using neural network to aid with patch
> selection for stable kernel trees. There are quite a few commits that
> were not marked for stable, but are stable material, and we're trying
> to ge
From: Kees Cook
> Sent: 06 October 2017 20:40
...
> I'm in no rush for any specific change. There are about 900 call sites
> I'm making my way through, about 2/3rd are pretty trivial, and the
> less obvious is what I've started sending out now, since I expect some
> will need some more careful revi
From: tristram...@microchip.com
> Sent: 06 October 2017 21:33
> Replace license with GPL.
Don't you need permission from all the people who have updated
the files in order to make this change?
David
2017-09-27 15:20 GMT+02:00 Benjamin Gaignard :
> Make arguments checking more easy to read.
>
Hi Laura,
Even if we don't have found a solution for the second patch I believe
this one could be useful.
May I ask you your point of view on those few lines ?
Benjamin
> Signed-off-by: Benjamin Gaigna
On 06/10/17 19:25, Arvind Yadav wrote:
Here, dev->irq is not assigned with irq. comedi_legacy_detach()
is using dev->irq for release irq and dt282x_attach() is using dev->irq
for initialize comedi_subdevice.
Signed-off-by: Arvind Yadav
---
changes in v2:
comedi_isadma_alloc() can fail.
-support/20171009-155445
config: xtensa-allyesconfig (attached as .config)
compiler: xtensa-linux-gcc (GCC) 4.9.0
reproduce:
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to
2017-10-02 17:51 GMT+02:00 Benjamin Gaignard :
> version 4:
> - split patch in 3 parts
> - convert code to timer_of
> - only use 32 bits timers
> - add clocksource support
Hello Daniel,
Does the patches split sound good for you ?
Regards,
Benjamin
>
> version 3:
> - fix comments done by D
On Fri, Oct 06, 2017 at 06:37:52PM +0100, Chris Wilson wrote:
> Quoting Daniel Vetter (2017-10-06 15:20:09)
> > On Fri, Oct 06, 2017 at 12:03:49PM +0100, Chris Wilson wrote:
> > > Quoting Daniel Vetter (2017-10-06 10:06:37)
> > > > stop_machine is not really a locking primitive we should use, excep
On 09/10/2017 11:23, Benjamin Gaignard wrote:
> 2017-10-02 17:51 GMT+02:00 Benjamin Gaignard :
>> version 4:
>> - split patch in 3 parts
>> - convert code to timer_of
>> - only use 32 bits timers
>> - add clocksource support
>
> Hello Daniel,
>
> Does the patches split sound good for you ?
On 10/01/2017 09:48 PM, Stefan Brüns wrote:
According to the ABI documentation, the shunt resistor value should be
specificied in Ohm. As this is also used/documented for the MAX9611,
use the same for the INA2xx driver.
This poses an ABI break for anyone actually altering the shunt value
throu
Hi Todor,
On Mon, Oct 09, 2017 at 11:36:01AM +0300, Todor Tomov wrote:
> Hi Sakari,
>
> On 4.10.2017 13:47, Laurent Pinchart wrote:
> > CC'ing the I2C mainling list and the I2C maintainer.
> >
> > On Wednesday, 4 October 2017 13:30:08 EEST Sakari Ailus wrote:
> >> Hi Todor,
> >>
> >> On Mon, Oc
On Mon, Oct 09, 2017 at 10:36:30AM +0300, Rakesh Pandit wrote:
> Since commit 925a6efb8ff0c ("Btrfs: stop using
> try_to_writeback_inodes_sb_nr to flush delalloc") this function hasn't
> been used outside so stop exporting it.
It also only has a single caller left, so we might want to just inline
On 10/01/2017 09:25 PM, Damian Tometzki wrote:
Hello,
where i can found the patch in git.kernel.org ?
We don't have patches there. If you want to try this feature, you can
get the qemu side draft code here: https://github.com/wei-w-wang/qemu-lm
Best,
Wei
On Fri, Oct 06, 2017 at 07:38:22PM +0100, Mark Rutland wrote:
> Currently, perf record is broken on arm/arm64 systems when the PMU is
> specified explicitly as part of the event, e.g.
>
> $ ./perf record -e armv8_cortex_a53/cpu_cycles/u true
>
> In such cases, perf record fails to open events unl
On Sun, Oct 8, 2017 at 01:58:52 CEST Linus Walleij wrote:
CCing-in Sebastian Reichel who did the move to pinctrl and pinctrl support as
well.
> On Thu, Oct 5, 2017 at 9:50 AM, Lars Poeschel wrote:
> > The mcp23s08 driver was moved from gpio to pinctrl. This moves it's
> > devicetree binding doc
On Sun, Oct 8, 2017 at 5:02 PM, Boqun Feng wrote:
> Josef reported a HARDIRQ-safe -> HARDIRQ-unsafe lock order detected by
> lockdep:
>
> | [ 1270.472259] WARNING: HARDIRQ-safe -> HARDIRQ-unsafe lock order detected
> | [ 1270.472783] 4.14.0-rc1-xfstests-12888-g76833e8 #110 Not tainted
> | [ 1270.4
On Mon, Oct 09, 2017 at 09:08:57AM +0100, Morten Rasmussen wrote:
> > --- a/kernel/sched/debug.c
> > +++ b/kernel/sched/debug.c
> > @@ -565,6 +565,8 @@ void print_cfs_rq(struct seq_file *m, in
> > cfs_rq->removed.load_avg);
> > SEQ_printf(m, " .%-30s: %ld\n", "removed.util_
last_disk_size could be wrong due to concurrently updating, so using
i_sem semaphore to make last_disk_size updating exclusive to fix this
issue.
Signed-off-by: Chao Yu
---
fs/f2fs/data.c | 3 +++
fs/f2fs/f2fs.h | 10 --
fs/f2fs/file.c | 4
3 files changed, 15 insertions(+), 2 del
On Sat 07-10-17 06:58:04, Yafang Shao wrote:
> After disable periodic writeback by writing 0 to
> dirty_writeback_centisecs, the handler wb_workfn() will not be
> entered again until the dirty background limit reaches or
> sync syscall is executed or no enough free memory available or
> vmscan is t
Hi Yury,
On Mon, Oct 09, 2017 at 12:30:52AM +0300, Yury Norov wrote:
> On Fri, Oct 06, 2017 at 02:34:37PM +0100, Will Deacon wrote:
> > This is version two of the patches I posted yesterday:
> >
> >
> > http://lists.infradead.org/pipermail/linux-arm-kernel/2017-October/534666.html
> >
> > I'd
On 08/10/17 22:56, Christos Gkekas wrote:
Variable val holds the default brightness and is unsigned, therefore
checking whether it is less than zero is redundant.
Signed-off-by: Christos Gkekas
Acked-by: Daniel Thompson
---
drivers/video/backlight/tps65217_bl.c | 3 +--
1 file changed,
@ -1924,6 +1987,7 @@ struct ppc_emulated ppc_emulated = {
> WARN_EMULATED_SETUP(mfdscr),
> WARN_EMULATED_SETUP(mtdscr),
> WARN_EMULATED_SETUP(lq_stq),
> + WARN_EMULATED_SETUP(paste),
You'll need to rebase this on powerpc/next as this has changed upstream.
Mikey
Hi Paul,
On 09/10/17 01:24, Paul Burton wrote:
MIPS will soon not be a part of Imagination Technologies, and as such
many @imgtec.com email addresses will no longer be valid. This patch
updates the addresses for all those who:
- Have 10 or more patches in mainline authored using an @imgtec.c
Hi Sakari,
On 2017/10/9 15:58, Sakari Ailus wrote:
Hi
Wenyou,
On Mon, Oct 09, 2017 at 01:49:44PM +0800, Yang, Wenyou wrote:
Hi Sakari,
Sorry for late answer, because I was in vacation last week.
On 2017/9/29 5:25, Sakari Ailus wrote:
Hi Wenyou,
On Thu, Sep 28, 2017 at 04:18:26PM +0800, Wen
On Mon, Oct 09, 2017 at 08:52:43AM +0200, Peter Zijlstra wrote:
> On Mon, Oct 09, 2017 at 12:30:52AM +0300, Yury Norov wrote:
> > The bottomline of discussion [1] was that queued locks are more
> > effective when SoC has many CPUs. And 4 is not many.
>
> qspinlock, yes. qrwlock not, as it fully de
The driver may sleep under a spinlock, and the function call paths are:
gma_power_begin (acquire the spinlock) (drivers/gpu/drm/gma500/power.c)
gma_resume_pci
pci_set_power_state
__pci_start_power_transition (drivers/pci/pci.c)
msleep --> may sleep
gma_power_begin (acquire
On Mon, Oct 09, 2017 at 03:49:38AM -0400, Paolo Bonzini wrote:
>
>
> - Original Message -
> > From: "Tobin C. Harding"
> > To: "Paolo Bonzini" , rkrc...@redhat.com
> > Cc: k...@vger.kernel.org, linux-kernel@vger.kernel.org, "Tobin C. Harding"
> >
> > Sent: Monday, October 9, 2017 8:30:
I am a banker by profession and currently holds the position of Chief
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On Mon, Oct 09, 2017 at 10:14:50AM +0100, Mark Brown wrote:
> On Sat, Oct 07, 2017 at 03:10:06AM +, Levin, Alexander (Sasha Levin)
> wrote:
>
> > We are experimenting with using neural network to aid with patch
> > selection for stable kernel trees. There are quite a few commits that
> > were
Hi,
On Friday 01 September 2017 08:11 AM, Yoshihiro Shimoda wrote:
> The has_otg on previous code has the two meaning:
> - The channel has dedicated otg pins (ID, VBUS).
> - The channel can swap the role via sysfs.
>
> However, some SoCs (e.g. R-Car D3) doesn't have such dedicated pins,
> but t
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