Re: Extreme time jitter with suspend/resume cycles

Hi Thomas, On Thu, Oct 5, 2017 at 11:01 AM, Thomas Gleixner wrote: >> > Which SoC/clocksource driver are you talking about? >> >> NXP i.MX 6SoloX >> drivers/clocksource/timer-imx-gpt.c > > So that clocksource driver looks correct. Do you have an idea in which > context this time jump happens? Doe

[PATCH 2/2] powermac: Improve a size determination in five functions

From: Markus Elfring Date: Thu, 5 Oct 2017 22:40:39 +0200 Replace the specification of data structures by pointer dereferences as the parameter for the operator "sizeof" to make the corresponding size determination a bit safer according to the Linux coding style convention. This issue was detect

[PATCH 3/3] pinctrl: sunxi: Enforce the strict mode by default

The strict mode should always have been enabled on our driver, and leaving it unchecked just makes it harder to find a migration path as time passes. Let's enable it by default now so that hopefully the new SoCs should be safe. Signed-off-by: Maxime Ripard --- drivers/pinctrl/sunxi/pinctrl-sunx

[PATCH 0/3] pinctrl: sunxi: Start to enforce the strict mode

Hi, Here is an attempt to enable pinctrl's strict mode on our pinctrl drivers. Indeed, our controllers should have had that mode enabled since its introduction. However, there's a number of issues with old device trees that prevent from just enabling it for all the devices. There's basically two

[PATCH 2/3] pinctrl: sunxi: Disable strict mode for old pinctrl drivers

Old pinctrl drivers will need to disable strict mode for various reasons, among which: - Some DT will still have a pinctrl group for each GPIO used, which will be rejected by pin_request. While we could remove those nodes, we still have to deal with old DTs. - Some GPIOs on these boards

[PATCH 1/3] pinctrl: sunxi: Introduce the strict flag

Our pinctrl device should have had strict set all along. However, it wasn't the case, and most of our old device trees also have a pinctrl group in addition to the GPIOs properties, which mean that we can't really turn it on now. All our new SoCs don't have that group, so we should still enable th

Re: [PATCH] vfs: fix statfs64() returning impossible EOVERFLOW for 64-bit f_files

On Thu, Oct 05, 2017 at 09:36:36PM +0300, Sergey Klyaus wrote: > compat_statfs64 structure has some 32-bit and some 64-bit fields, so > 64d2ab32e "vfs: fix put_compat_statfs64() does not handle errors" fixed > 32-bit overflow checks not being performed, but accidentally enabled > checks for f_files

Re: [Part2 PATCH v5 11/31] crypto: ccp: Define SEV key management command id

On Wed, Oct 04, 2017 at 08:13:52AM -0500, Brijesh Singh wrote: > Define Secure Encrypted Virtualization (SEV) key management command id > and structure. The command definition is available in SEV KM [1] spec > 0.14. > > [1] http://support.amd.com/TechDocs/55766_SEV-KM API_Specification.pdf > > Cc

Re: [RFC PATCH 1/2] kbuild: Add a cache for generated variables

Hi, On Thu, Oct 5, 2017 at 12:26 AM, Masahiro Yamada wrote: > As far as I tested, I always see only one space after ":=" in v2. > > I did not consider this deeply, > but something is working nicely behind the scene. Try adding this to the end of the main Makefile: +$(info LDFLAGS_BUILD_ID = $(L

Re: [PATCH v4 12/14] platform/x86: wmi: create character devices when requested by drivers

On Thu, Oct 05, 2017 at 09:09:48PM +0200, Greg KH wrote: > On Thu, Oct 05, 2017 at 07:03:24PM +, mario.limoncie...@dell.com wrote: ... > > It's up to firmware to block the crazy stuff that you can put in a buffer. > > So userspace can pass any blob it wants to the firmware through this > inter

Applied "spi: spreadtrum adi: add hwspinlock dependency" to the spi tree

The patch spi: spreadtrum adi: add hwspinlock dependency has been applied to the spi tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Lin

Re: [PATCH v6 01/11] dt-bindings: net: Restore sun8i dwmac binding

On Wed, Sep 27, 2017 at 09:34:04AM +0200, Corentin Labbe wrote: > This patch restore dt-bindings documentation about dwmac-sun8i > This reverts commit 8aa33ec2f481 ("dt-bindings: net: Revert sun8i dwmac > binding") What's missing here is why you are reverting? > > Signed-off-by: Corentin Labbe

Re: Extreme time jitter with suspend/resume cycles

On Thu, 5 Oct 2017, Gabriel Beddingfield wrote: > Hi Thomas, > > On Thu, Oct 5, 2017 at 11:01 AM, Thomas Gleixner wrote: > >> > Which SoC/clocksource driver are you talking about? > >> > >> NXP i.MX 6SoloX > >> drivers/clocksource/timer-imx-gpt.c > > > > So that clocksource driver looks correct.

Re: [PATCH v2] ACPI / LPIT: Add Low Power Idle Table (LPIT) support

On Thursday, October 5, 2017 10:43:33 PM CEST Srinivas Pandruvada wrote: > On Thu, 2017-10-05 at 21:39 +0300, Andy Shevchenko wrote: > > On Thu, Oct 5, 2017 at 9:16 PM, Srinivas Pandruvada > > wrote: > > > > > > Added functionality to read LPIT table, which provides: > > > > > > - Sysfs interfac

Re: [Intel-wired-lan] [PATCH] PCI: Check/Set ARI capability before setting numVFs

On Wed, Oct 04, 2017 at 04:29:14PM -0700, Alexander Duyck wrote: > On Wed, Oct 4, 2017 at 4:01 PM, Bjorn Helgaas wrote: > > On Wed, Oct 04, 2017 at 08:52:58AM -0700, Tony Nguyen wrote: > >> This fixes a bug that can occur if an AER error is encountered while SRIOV > >> devices are present. > >> >

[PATCH V6 RESEND] sched/fair: Remove group imbalance from calculate_imbalance()

The group_imbalance path in calculate_imbalance() made sense when it was added back in 2007 with commit 908a7c1b9b80 ("sched: fix improper load balance across sched domain") because busiest->load_per_task factored into the amount of imbalance that was calculated. Beginning with commit dd5feea14a7d

Re: [PATCH] switchtec: make struct event_regs static

On Thu, Oct 05, 2017 at 11:01:45AM +0100, Colin King wrote: > From: Colin Ian King > > The structure event_regs is local to the source and does not need to > be in global scope, so make it static. > > Cleans up sparse warning: > symbol 'event_regs' was not declared. Should it be static > > Sign

Re: [PATCH] pci/ehp_hpc: Convert timers to use timer_setup()

On Wed, Oct 04, 2017 at 05:53:48PM -0700, Kees Cook wrote: > In preparation for unconditionally passing the struct timer_list pointer to > all timer callbacks, switch to using the new timer_setup() and from_timer() > to pass the timer pointer explicitly. This fixes what appears to be a bug > in pas

[PATCH v10 03/10] sparc64: simplify vmemmap_populate

Remove duplicating code by using common functions vmemmap_pud_populate and vmemmap_pgd_populate. Signed-off-by: Pavel Tatashin Reviewed-by: Steven Sistare Reviewed-by: Daniel Jordan Reviewed-by: Bob Picco Acked-by: David S. Miller Acked-by: Michal Hocko --- arch/sparc/mm/init_64.c | 23

[PATCH v10 01/10] x86/mm: setting fields in deferred pages

Without deferred struct page feature (CONFIG_DEFERRED_STRUCT_PAGE_INIT), flags and other fields in "struct page"es are never changed prior to first initializing struct pages by going through __init_single_page(). With deferred struct page feature enabled, however, we set fields in register_page_bo

[PATCH v10 08/10] arm64/kasan: use kasan_map_populate()

To optimize the performance of struct page initialization, vmemmap_populate() will no longer zero memory. Therefore, we must use a new interface to allocate and map kasan shadow memory, that also zeroes memory for us. Signed-off-by: Pavel Tatashin --- arch/arm64/mm/kasan_init.c | 12 ++-

[PATCH v10 10/10] sparc64: optimized struct page zeroing

Add an optimized mm_zero_struct_page(), so struct page's are zeroed without calling memset(). We do eight to ten regular stores based on the size of struct page. Compiler optimizes out the conditions of switch() statement. SPARC-M6 with 15T of memory, single thread performance:

[PATCH v10 04/10] mm: defining memblock_virt_alloc_try_nid_raw

* A new variant of memblock_virt_alloc_* allocations: memblock_virt_alloc_try_nid_raw() - Does not zero the allocated memory - Does not panic if request cannot be satisfied * optimize early system hash allocations Clients can call alloc_large_system_hash() with flag: HASH_ZERO to specify

[PATCH v10 09/10] mm: stop zeroing memory during allocation in vmemmap

vmemmap_alloc_block() will no longer zero the block, so zero memory at its call sites for everything except struct pages. Struct page memory is zero'd by struct page initialization. Replace allocators in sprase-vmemmap to use the non-zeroing version. So, we will get the performance improvement by

[PATCH v10 05/10] mm: zero reserved and unavailable struct pages

Some memory is reserved but unavailable: not present in memblock.memory (because not backed by physical pages), but present in memblock.reserved. Such memory has backing struct pages, but they are not initialized by going through __init_single_page(). In some cases these struct pages are accessed

[PATCH v10 02/10] sparc64/mm: setting fields in deferred pages

Without deferred struct page feature (CONFIG_DEFERRED_STRUCT_PAGE_INIT), flags and other fields in "struct page"es are never changed prior to first initializing struct pages by going through __init_single_page(). With deferred struct page feature enabled there is a case where we set some fields pr

[PATCH v10 06/10] mm/kasan: kasan specific map populate function

During early boot, kasan uses vmemmap_populate() to establish its shadow memory. But, that interface is intended for struct pages use. Because of the current project, vmemmap won't be zeroed during allocation, but kasan expects that memory to be zeroed. We are adding a new kasan_map_populate() fun

[PATCH v10 07/10] x86/kasan: use kasan_map_populate()

To optimize the performance of struct page initialization, vmemmap_populate() will no longer zero memory. Therefore, we must use a new interface to allocate and map kasan shadow memory, that also zeroes memory for us. Signed-off-by: Pavel Tatashin --- arch/x86/mm/kasan_init_64.c | 8 1

Re: Extreme time jitter with suspend/resume cycles

On Thu, Oct 5, 2017 at 2:04 PM, Thomas Gleixner wrote: >> > So that clocksource driver looks correct. Do you have an idea in which >> > context this time jump happens? Does it happen when you exercise your high >> > frequency suspend/resume dance or is that happening just when you let the >> > mac

[RELEASE] LTTng-modules 2.10.2 and 2.9.5 (Linux kernel tracer)

Hi, Those are two important bugfix releases coming shortly after 2.10.1 and 2.9.4, which introduced a NULL pointer dereference in the block layer instrumentation for kernels before 4.14. This issue has been caught by our CI at . All LTTng-modules users of versions 2.10.1 and

RE: [PATCH v4 4/5] cramfs: add mmap support

On Thu, 5 Oct 2017, Chris Brandt wrote: > On Wednesday, October 04, 2017, Nicolas Pitre wrote: > > Anyway, here's a replacement for patch 4/5 below: > > > > - >8 > > Subject: cramfs: add mmap support > > > > When cramfs_physmem is used then we have the opportunity to map files > > directly f

Re: [PATCH RT] time/hrtimer: Use softirq based wakeups for non-RT threads

Sebastian Andrzej Siewior writes: > Normal wake ups (like clock_nanosleep()) which are performed by normal > users can easily lead to 2ms latency spikes if (enough) hrtimer wakeups > are synchronized. > This patch moves all hrtimers wakeups to the softirq queue unless the > caller has a RT priori

Re: [PREVIEW] Add x86 zstd kernel compression

Hi, On 10/05/2017 09:22 PM, Nick Terrell wrote: On 10/5/17, 1:18 AM, "René Rebe" wrote: Hi Nick, On Oct 5, 2017, at 1:29, Nick Terrell wrote: On 10/4/17, 3:01 AM, "linux-kernel-ow...@vger.kernel.org on behalf of René Rebe" wrote: Hi, I noticed zstd compression was recently added for b

[PATCH v10 00/10] complete deferred page initialization

Changelog: v10 - v9 - Addressed new comments from Michal Hocko. - Sent "mm: deferred_init_memmap improvements" as a separate patch as it is also fixing existing problem. - Merged "mm: stop zeroing memory during allocation in vmemmap" with "mm: zero struct pages during initialization". - Added m

Re: [PATCH 2/2] PCI: mvebu: Check DRAM window size

On Mon, Sep 25, 2017 at 06:56:58PM -0500, Bjorn Helgaas wrote: > On Mon, Aug 28, 2017 at 05:25:17PM +0200, Jan Luebbe wrote: > > The sum of the DRAM windows may exceed 4GB (at least on Armada XP). > > Return an error in that case. > > > > Signed-off-by: Jan Luebbe > > Looking for an ack from Tho

Re: [Intel-wired-lan] [PATCH] PCI: Check/Set ARI capability before setting numVFs

On Thu, Oct 5, 2017 at 2:07 PM, Bjorn Helgaas wrote: > On Wed, Oct 04, 2017 at 04:29:14PM -0700, Alexander Duyck wrote: >> On Wed, Oct 4, 2017 at 4:01 PM, Bjorn Helgaas wrote: >> > On Wed, Oct 04, 2017 at 08:52:58AM -0700, Tony Nguyen wrote: >> >> This fixes a bug that can occur if an AER error i

Re: [PATCH v1 3/5] dt-bindings: Add DT bindings for NVIDIA Tegra AHB DMA controller

On 05.10.2017 23:33, Rob Herring wrote: > On Tue, Sep 26, 2017 at 02:22:04AM +0300, Dmitry Osipenko wrote: >> Document DT bindings for NVIDIA Tegra AHB DMA controller that presents >> on Tegra20/30 SoC's. >> >> Signed-off-by: Dmitry Osipenko >> --- >> .../bindings/dma/nvidia,tegra20-ahbdma.txt

Re: Extreme time jitter with suspend/resume cycles

Gabriel, On Thu, 5 Oct 2017, Gabriel Beddingfield wrote: > Hi John, > > On Wed, Oct 4, 2017 at 5:16 PM, John Stultz wrote: > >> Please let me know what you think -- and what the right approach for > >> solving this would be. > > > > So I suspect the best solution for you here is: provide some >

Re: [PATCH 1/3] arm/xen: don't inclide rwlock.h directly.1~B

On 2017-10-05 12:58:32 [-0700], Stefano Stabellini wrote: > Let me know if you want this patch to go via the xen tree. Yes, please. Sebastian

Re: Extreme time jitter with suspend/resume cycles

On Thu, 5 Oct 2017, Thomas Gleixner wrote: > On Thu, 5 Oct 2017, Gabriel Beddingfield wrote: > > > Hi Thomas, > > > > On Thu, Oct 5, 2017 at 11:01 AM, Thomas Gleixner wrote: > > >> > Which SoC/clocksource driver are you talking about? > > >> > > >> NXP i.MX 6SoloX > > >> drivers/clocksource/time

[RFC PATCH for 4.14 2/2] Fix: membarrier: Handle CLONE_VM + !CLONE_THREAD correctly on powerpc

Threads targeting the same VM but which belong to different thread groups is a tricky case. It has a few consequences: It turns out that we cannot rely on get_nr_threads(p) to count the number of threads using a VM. We can use (atomic_read(&mm->mm_users) == 1 && get_nr_threads(p) == 1) instead to

[RFC PATCH for 4.14 1/2] membarrier: Remove unused code for architectures without membarrier hooks

Architectures without membarrier hooks don't need to emit the empty membarrier_arch_switch_mm() static inline when CONFIG_MEMBARRIER=y. Adapt the CONFIG_MEMBARRIER=n counterpart to only emit the empty membarrier_arch_switch_mm() for architectures with membarrier hooks. Reported-by: Nicholas Piggi

Re: [PATCH tip/core/rcu 1/3] membarrier: Provide register expedited private command

- On Oct 5, 2017, at 12:21 PM, Peter Zijlstra pet...@infradead.org wrote: > On Thu, Oct 05, 2017 at 04:02:06PM +, Mathieu Desnoyers wrote: >> - On Oct 5, 2017, at 8:12 AM, Peter Zijlstra pet...@infradead.org wrote: >> >> > On Wed, Oct 04, 2017 at 02:37:53PM -0700, Paul E. McKenney wro

Re: [PATCH v3 1/2] soc: qcom: smem: Rename "uncached" accessors

On 10/04, Bjorn Andersson wrote: > In preparation for adding accessors for "cached" entries rename the > "uncached" accessors. Also rename "first" cached entry to "last", as > the cached list grows backwards. > > Signed-off-by: Bjorn Andersson > --- Reviewed-by: Stephen Boyd -- Qualcomm Innov

Re: [PATCH v3 2/2] soc: qcom: smem: Support getting cached entries

On 10/04, Bjorn Andersson wrote: > On msm8996 cached SMEM items are used for storing the GLINK FIFOs, so > for items not found in the uncached list we need to also search the > cased list for these items. > > Signed-off-by: Bjorn Andersson > --- Reviewed-by: Stephen Boyd -- Qualcomm Innovatio

Re: [PATCH v2] ACPI / LPIT: Add Low Power Idle Table (LPIT) support

On Thu, 2017-10-05 at 22:56 +0200, Rafael J. Wysocki wrote: > On Thursday, October 5, 2017 10:43:33 PM CEST Srinivas Pandruvada > wrote: > > > > On Thu, 2017-10-05 at 21:39 +0300, Andy Shevchenko wrote: > > > > > > On Thu, Oct 5, 2017 at 9:16 PM, Srinivas Pandruvada > > > wrote: > > > > > > > >

Re: [v10 3/6] mm, oom: cgroup-aware OOM killer

On Thu, 5 Oct 2017, Johannes Weiner wrote: > > It is, because it can quite clearly be a DoSand was prevented with > > Roman's earlier design of iterating usage up the hierarchy and comparing > > siblings based on that criteria. I know exactly why he chose that > > implementation detail early o

[PATCH v8 5/5] x86/xsave: Remove the explicit clearing of XSAVE dependend features

From: Andi Kleen Clearing a CPU feature with setup_clear_cpu_cap() clears all features which depend on it. Expressing feature dependencies in one place is easier to maintain than keeping functions like fpu__xstate_clear_all_cpu_caps() up to date. The features which depend on XSAVE have their dep

Support generic disabling of all XSAVE features

For performance testing and debugging it can be useful to disable XSAVE features individually. This patchkit hooks up XSAVE with the generic clearcpuid=... option, so that disabling a CPUID feature automatically disables the respective XSAVE feature. It also cleans up CPUID dependency management

[PATCH v8 1/5] x86/xsave: Move xsave initialization to after parsing early parameters

From: Andi Kleen Move the XSAVE initialization code to be after parsing early parameters. I don't see any reason why the FPU code needs to be initialized that early, nothing else in the initialization phase uses XSAVE. This is useful to be able to handle command line parameters in the XSAVE initi

[PATCH v8 4/5] x86/xsave: Make XSAVE check the base CPUID features before enabling

From: Andi Kleen Before enabling XSAVE, not only check the XSAVE specific CPUID bits, but also the base CPUID features of the respective XSAVE feature. This allows to disable individual XSAVE states using the existing clearcpuid= option, which can be useful for performance testing and debugging,

[PATCH v8 3/5] x86/cpuid: Make clearcpuid an early param

From: Andi Kleen Make clearcpuid= an early param, to make sure it is parsed before the XSAVE initialization. This allows to modify XSAVE state by clearing specific CPUID bits. Reviewed-by: Thomas Gleixner Signed-off-by: Andi Kleen --- arch/x86/kernel/cpu/common.c | 2 +- 1 file changed, 1 ins

Re: [PATCH] block/laptop_mode: Convert timers to use timer_setup()

Jens, On Thu, 5 Oct 2017, Jens Axboe wrote: > On 10/05/2017 01:23 PM, Thomas Gleixner wrote: > > Come on. You know very well that a prerequisite for global changes which is > > not yet used in Linus tree can get merged post merge windew in order to > > avoid massive inter maintainer tree dependenc

[PATCH v8 2/5] x86/cpuid: Add generic table for cpuid dependencies

From: Andi Kleen Some CPUID features depend on other features. Currently it's possible to to clear dependent features, but not clear the base features, which can cause various interesting problems. This patch implements a generic table to describe dependencies between CPUID features, to be used

Re: [PATCH] mwifiex: Use put_unaligned_le32

On 10/05/2017 12:07 PM, Himanshu Jha wrote: In this case, the key is CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS. It seems that asm-generic/unaligned.h is set up to include different headers, based on the expected architecture behavior. Yes, asm-generic/unaligned.h looks more appopriate and is most

Re: [PATCH v2] livepatch: unpatch all klp_objects if klp_module_coming fails

On Mon, Oct 02, 2017 at 11:56:48AM -0400, Joe Lawrence wrote: > When an incoming module is considered for livepatching by > klp_module_coming(), it iterates over multiple patches and multiple > kernel objects in this order: > > list_for_each_entry(patch, &klp_patches, list) { >

Re: [v10 3/6] mm, oom: cgroup-aware OOM killer

On Thu, 5 Oct 2017, Roman Gushchin wrote: > > This patchset exists because overcommit is real, exactly the same as > > overcommit within memcg hierarchies is real. 99% of the time we don't run > > into global oom because people aren't using their limits so it just works > > out. 1% of the tim

Re: [PATCH tip/core/rcu 1/3] membarrier: Provide register expedited private command

On Thu, Oct 05, 2017 at 04:02:06PM +, Mathieu Desnoyers wrote: > - On Oct 5, 2017, at 8:12 AM, Peter Zijlstra pet...@infradead.org wrote: > > > On Wed, Oct 04, 2017 at 02:37:53PM -0700, Paul E. McKenney wrote: > >> diff --git a/arch/powerpc/kernel/membarrier.c > >> b/arch/powerpc/kernel/m

Re: [PATCH] md: raid10: remove VLAIS

On Thu, Oct 05, 2017 at 11:28:47AM -0700, Matthias Kaehlcke wrote: > The raid10 driver can't be built with clang since it uses a variable > length array in a structure (VLAIS): > > drivers/md/raid10.c:4583:17: error: fields must have a constant size: > 'variable length array in structure' extens

[RFC GIT Pull V2] core watchdog sanitizing

Linus, please consider to pull the latest core-watchdog-for-linus git tree from: git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git core-watchdog-for-linus The watchdog (hard/softlockup detector) code is pretty much broken in its current state. The patch series addresses this by remov

Re: [PATCH] block/laptop_mode: Convert timers to use timer_setup()

On 10/05/2017 03:53 PM, Thomas Gleixner wrote: > Jens, > > On Thu, 5 Oct 2017, Jens Axboe wrote: >> On 10/05/2017 01:23 PM, Thomas Gleixner wrote: >>> Come on. You know very well that a prerequisite for global changes which is >>> not yet used in Linus tree can get merged post merge windew in orde

Re: [PATCH v6 11/11] of: mdio: Prevent of_mdiobus_register from scanning mdio-mux nodes

On Wed, Sep 27, 2017 at 09:50:46PM -0700, Florian Fainelli wrote: > > > On 09/27/2017 07:12 AM, Andrew Lunn wrote: > > On Wed, Sep 27, 2017 at 09:34:14AM +0200, Corentin Labbe wrote: > >> Each child node of an MDIO node is scanned as a PHY when calling > >> of_mdiobus_register() givint the follow

Re: [PATCH v2 08/17] dt-bindings: phy-qcom-qusb2: Update binding for QUSB2 V2 version

On Wed, Sep 27, 2017 at 02:29:04PM +0530, Manu Gautam wrote: > Update generic compatible string for QUSB2 V2 PHY. This will allow > all targets using QUSB2 V2 use same string. > > Signed-off-by: Manu Gautam > --- > Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt | 5 - > 1 file chan

Re: [PATCH v2] ACPI / LPIT: Add Low Power Idle Table (LPIT) support

On Thu, Oct 5, 2017 at 11:48 PM, Srinivas Pandruvada wrote: > On Thu, 2017-10-05 at 22:56 +0200, Rafael J. Wysocki wrote: >> On Thursday, October 5, 2017 10:43:33 PM CEST Srinivas Pandruvada >> wrote: >> > >> > On Thu, 2017-10-05 at 21:39 +0300, Andy Shevchenko wrote: >> > > >> > > On Thu, Oct 5,

Re: [PATCH 0/6] Switch arm64 over to qrwlock

Hi, On 10/05/2017 07:54 AM, Will Deacon wrote: Hi all, This patch series reworks bits of the qrwlock code that it can be used to replace the asm rwlocks currently implemented for arm64. The structure of the series is: Patches 1-3 : Work WFE into qrwlock using atomic_cond_read_acquire so

Re: [PATCH v2 12/17] dt-bindings: phy-qcom-qmp: Update bindings for QMP V3 USB PHY

On Wed, Sep 27, 2017 at 02:29:08PM +0530, Manu Gautam wrote: > Update compatible string and clock names for QMP version V3 > USB PHY. > > Signed-off-by: Manu Gautam > --- > Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt | 6 +- > 1 file changed, 5 insertions(+), 1 deletion(-) > > di

Re: [PATCH 8/9] dt-bindings: usb: mtk-xhci: add a optional property to disable u3ports

On Wed, Sep 27, 2017 at 05:23:04PM +0800, Chunfeng Yun wrote: > Add a new optional property to disable u3ports > > Signed-off-by: Chunfeng Yun > --- > .../devicetree/bindings/usb/mediatek,mtk-xhci.txt |2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/Documentation/devicetree/bindin

Re: [PATCH tip/core/rcu 1/3] membarrier: Provide register expedited private command

- On Oct 5, 2017, at 6:02 PM, Andrea Parri parri.and...@gmail.com wrote: > On Thu, Oct 05, 2017 at 04:02:06PM +, Mathieu Desnoyers wrote: >> - On Oct 5, 2017, at 8:12 AM, Peter Zijlstra pet...@infradead.org wrote: >> >> > On Wed, Oct 04, 2017 at 02:37:53PM -0700, Paul E. McKenney wrot

Re: [PATCH 9/9] dt-bindings: usb: mtk-xhci: remove dummy clocks and add optional ones

On Wed, Sep 27, 2017 at 05:23:05PM +0800, Chunfeng Yun wrote: > Remove dummy clocks for usb wakeup and add optional ones for > MCU_BUS_CK and DMA_BUS_CK. > > Signed-off-by: Chunfeng Yun > --- > .../devicetree/bindings/usb/mediatek,mtk-xhci.txt | 18 -- > 1 file changed, 8 inse

Re: [PATCH v6 11/11] of: mdio: Prevent of_mdiobus_register from scanning mdio-mux nodes

> Looking at this some more, why can't mdio-mux-mmio be used? Hi Rob That was my first thought. And then i dug into the details. The mux is more than just a couple of bits in an address space. Clocks needs to be enabled/disabled, and the MAC needs a reset, when the mux changes. So the mux needs i

[PATCH] fs, mm: account filp and names caches to kmemcg

The allocations from filp and names kmem caches can be directly triggered by user space applications. A buggy application can consume a significant amount of unaccounted system memory. Though we have not noticed such buggy applications in our production but upon close inspection, we found that a lo

Re: [PATCH v5 2/6] dt-bindings: input: Add common keyboard document bindings

On Wed, Sep 27, 2017 at 06:44:04PM +0800, Chen Zhong wrote: > This patch adds the device tree binding documentation for common > keyboard. > > Signed-off-by: Chen Zhong > --- > Documentation/devicetree/bindings/input/keys.txt |8 > 1 file changed, 8 insertions(+) > create mode 1006

Re: [PATCH v2] powerpc: Default to enabling STRICT_KERNEL_RWX

On Fri, Oct 6, 2017 at 6:03 AM, Kees Cook wrote: > When available, CONFIG_KERNEL_RWX should be default-enabled for PPC64. > On PPC32, there is a performance trade-off. > > Cc: Benjamin Herrenschmidt > Cc: Paul Mackerras > Cc: Michael Ellerman > Cc: Christophe LEROY > Cc: Balbir Singh > Cc: li

Re: [PATCH v5 3/6] dt-bindings: input: Add document bindings for mtk-pmic-keys

On Wed, Sep 27, 2017 at 06:44:05PM +0800, Chen Zhong wrote: > This patch adds the device tree binding documentation for the MediaTek > pmic keys found on PMIC MT6397/MT6323. > > Signed-off-by: Chen Zhong > --- > .../devicetree/bindings/input/mtk-pmic-keys.txt| 43 > >

Re: [PATCH v2 0/6] dt-bindings: rtc: document existing bindings

On Wed, Sep 27, 2017 at 04:03:39PM +0200, Alexandre Belloni wrote: > Document currently undocumented bindings. > > Rob, as discussed, all of this can probably go through your tree. > > Changes in v2: > - made a proper series > - fixed sirf2 example > - listed the ds1307 compatible that support

Re: [PATCH] vfs: fix statfs64() returning impossible EOVERFLOW for 64-bit f_files

On Thu, Oct 5, 2017 at 1:57 PM, Al Viro wrote: > > AFAICS, the real bug here is in hugetlbfs; that's where obscene values in > ->f_bsize come from. IMO all that code in put_compat_statfs64() should be > replaced with > if (kbuf->bsize != (u32)kbuf->bsize) > return -EOVERFL

Re: [PATCH 10/12] dt-bindings: usb: mtu3: add a optional property to disable u3ports

On Thu, Sep 28, 2017 at 08:17:18AM +0800, Chunfeng Yun wrote: > Add a new optional property to disable u3ports > > Signed-off-by: Chunfeng Yun > --- > .../devicetree/bindings/usb/mediatek,mtu3.txt |2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/Documentation/devicetree/bindin

Re: [RFC PATCH for 4.14 2/2] Fix: membarrier: Handle CLONE_VM + !CLONE_THREAD correctly on powerpc

- On Oct 5, 2017, at 5:40 PM, Mathieu Desnoyers mathieu.desnoy...@efficios.com wrote: > Threads targeting the same VM but which belong to different thread > groups is a tricky case. It has a few consequences: > > It turns out that we cannot rely on get_nr_threads(p) to count the > number of

Re: [PATCH 12/12] dt-bindings: usb: mtu3: remove optional pinctrls

On Thu, Sep 28, 2017 at 08:17:20AM +0800, Chunfeng Yun wrote: > Remove optional pinctrls due to using FORCE/RG_IDDIG to implement > manual switch function. Another not backwards compatible change. Please explain why that is okay. > > Signed-off-by: Chunfeng Yun > --- > .../devicetree/bindings

[RFC PATCH for 4.14 1/2] membarrier: Remove unused code for architectures without membarrier hooks

Architectures without membarrier hooks don't need to emit the empty membarrier_arch_switch_mm() static inline when CONFIG_MEMBARRIER=y. Adapt the CONFIG_MEMBARRIER=n counterpart to only emit the empty membarrier_arch_switch_mm() for architectures with membarrier hooks. Reported-by: Nicholas Piggi

[RFC PATCH v2 for 4.14 2/2] Fix: membarrier: Handle CLONE_VM + !CLONE_THREAD correctly on powerpc

Threads targeting the same VM but which belong to different thread groups is a tricky case. It has a few consequences: It turns out that we cannot rely on get_nr_threads(p) to count the number of threads using a VM. We can use (atomic_read(&mm->mm_users) == 1 && get_nr_threads(p) == 1) instead to

Re: [PATCH v4 11/11] arm: allwinner: Correct unit name in devicetree binding example

On Thu, Sep 28, 2017 at 03:49:28AM +0200, Stefan Brüns wrote: > Unit-names must not start with a leading 0. > > Signed-off-by: Stefan Brüns > > --- > > Changes in v4: > - Split minor fix in devicetree example from patch 6/10 > > Changes in v3: None > Changes in v2: None > > Documentation/dev

Re: [PATCH v8 2/5] x86/cpuid: Add generic table for cpuid dependencies

On Thu, 5 Oct 2017, Andi Kleen wrote: > +/* > + * Table of CPUID features that depend on others. > + * > + * This only includes dependencies that can be usefully disabled, not > + * features part of the base set (like FPU). > + */ > +const static struct cpuid_dep cpuid_deps[] = { > + { X86_FEAT

[GIT PULL] Power management fix for v4.14-rc4

Hi Linus, Please pull from the tag git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git \ pm-4.14-rc4 with top-most commit ca935f8e769c3e36e1b6339cc527a25c49f4d624 Merge branch 'pm-sleep' on top of commit 9e66317d3c92ddaab330c125dfe9d06eee268aff Linux 4.14-rc3 to receive a p

[PATCH] PM: docs: Fix stale reference in kernel-parameters.txt

From: Rafael J. Wysocki Commit 7aa7a0360a66 (PM: docs: Delete the obsolete states.txt document) forgot to update kernel-parameters.txt with a reference to the new sleep-states.rst document and it still points to states.txt that was dropped, so fix it now. Fixes: 7aa7a0360a66 (PM: docs: Delete th

Re: [PATCH tip/core/rcu 1/3] membarrier: Provide register expedited private command

On Thu, 5 Oct 2017 22:19:15 + (UTC) Mathieu Desnoyers wrote: > AFAIU the scheduler rq->lock is held while preemption is disabled. > synchronize_sched() is used here to ensure that all pre-existing > preempt-off critical sections have completed. > > So saying that we use synchronize_sched() t

Re: [linux-next][Oops] CPU toggle resulted in kernel crash

Kees Cook writes: > On Thu, Oct 5, 2017 at 10:21 AM, Abdul Haleem > wrote: >> Hi, >> >> CPU off on in a loop for single cpu results in kernel panic for >> 4.14.0-rc2-next-20170929 >> >> Machine: Power 8 PowerVM LPAR >> Kernel: 4.14.0-rc2-next-20170929 >> gcc: 5.1.1 >> config : attached >> >> Ste

Re: [PATCH] block/laptop_mode: Convert timers to use timer_setup()

On Thu, Oct 5, 2017 at 3:07 PM, Jens Axboe wrote: > Yes, it's not impossible, I just usually prefer not to. For this case, I > just setup a for-4.15/timer, that is the current block branch with -rc3 > pulled in. I applied the two patches for floppy and amiflop, I'm > assuming Kees will respin the

Re: [PATCH 0/8] KEYS: keyctl operations for asymmetric keys [ver #2]

On Thu, Jun 23, 2016 at 02:47:34PM +0100, David Howells wrote: > > Here's a set of patches that provides keyctl access for asymmetric keys, > including a query function, and functions to do encryption, decryption, > signature creation and signature verification. > > I've added a PKCS#8 asymmetric

[PATCH v2 16/16] iommu/vt-d: add intel iommu page response function

This patch adds page response support for Intel VT-d. Generic response data is taken from the IOMMU API then parsed into VT-d specific response descriptor format. Signed-off-by: Jacob Pan --- drivers/iommu/intel-iommu.c | 30 ++ 1 file changed, 30 insertions(+) diff

[PATCH v2 15/16] iommu: introduce page response function

When nested translation is turned on and guest owns the first level page tables, device page request can be forwared to the guest for handling faults. As the page response returns by the guest, IOMMU driver on the host need to process the response which informs the device and completes the page req

[PATCH v2 03/16] iommu: introduce iommu invalidate API function

From: "Liu, Yi L" When an SVM capable device is assigned to a guest, the first level page tables are owned by the guest and the guest PASID table pointer is linked to the device context entry of the physical IOMMU. Host IOMMU driver has no knowledge of caching structure updates unless the guest

[PATCH v2 13/16] iommu/intel-svm: notify page request to guest

If the source device of a page request has its PASID table pointer bond to a guest, the first level page tables are owned by the guest. In this case, we shall let guest OS to manage page fault. This patch uses the IOMMU fault notification API to send notifications, possibly via VFIO, to the guest

[PATCH v2 14/16] iommu/intel-svm: replace dev ops with fault report API

With the introduction of generic IOMMU device fault reporting API, we can replace the private fault callback functions with standard function and event data. Signed-off-by: Jacob Pan --- drivers/iommu/intel-svm.c | 7 +-- include/linux/intel-svm.h | 20 +++- 2 files changed,

[PATCH v2 12/16] iommu/vt-d: report unrecoverable device faults

Currently, when device DMA faults are detected by IOMMU the fault reasons are printed but the driver of the offending device is involved in fault handling. This patch uses per device fault reporting API to send fault event data for further processing. Offending device is identified by the source ID

[PATCH v2 10/16] iommu: introduce device fault report API

Traditionally, device specific faults are detected and handled within their own device drivers. When IOMMU is enabled, faults such as DMA related transactions are detected by IOMMU. There is no generic reporting mechanism to report faults back to the in-kernel device driver or the guest OS in case

[PATCH v2 06/16] iommu/vt-d: move device_domain_info to header

Allow both intel-iommu.c and dmar.c to access device_domain_info. Prepare for additional per device arch data used in TLB flush function Signed-off-by: Jacob Pan --- drivers/iommu/intel-iommu.c | 18 -- include/linux/intel-iommu.h | 19 +++ 2 files changed, 19 ins

[PATCH v2 11/16] iommu/vt-d: use threaded irq for dmar_fault

Currently, dmar fault IRQ handler does nothing more than rate limited printk, no critical hardware handling need to be done in IRQ context. Convert it to threaded IRQ would allow fault processing that requires process context. e.g. find out offending device based on source ID in the fault rasons.

[PATCH v2 05/16] iommu/vt-d: add iommu invalidate function

This patch adds Intel VT-d specific function to implement iommu passdown invalidate API. The use case is for supporting caching structure invalidation of assigned SVM capable devices. Emulated IOMMU exposes queue invalidation capability and passes down all descriptors from the guest to the physica

[PATCH v2 07/16] iommu/vt-d: assign PFSID in device TLB invalidation

When SRIOV VF device IOTLB is invalidated, we need to provide the PF source SID such that IOMMU hardware can gauge the depth of invalidation queue which is shared among VFs. This is needed when device invalidation throttle (DIT) capability is supported. Signed-off-by: Jacob Pan --- drivers/iommu

<    3   4   5   6   7   8   9   10   >