On 02/10/17 16:03, Pavel Machek wrote:
> On Mon 2017-10-02 14:06:03, Linus Walleij wrote:
>> On Mon, Oct 2, 2017 at 10:41 AM, Pavel Machek wrote:
>>
Bounce buffers are being removed from v4.15
>>
>> As Adrian states, this would make any last bugs go away. I would
>> even consider putting this
On 09/29/2017 04:56 AM, Will Deacon wrote:
> The full fix isn't just cosmetic; it's also addressing the wider problem
> of unannotated racing page table accesses outside of the specific failure
> case we've run into.
Let us know if there are additional tests we should be running on the
Red Hat en
On 02/10/17 17:09, Linus Walleij wrote:
> On Sun, Oct 1, 2017 at 12:57 PM, Tetsuo Handa
> wrote:
>
I inserted u-SD card, only to realize that it is not detected as it
should be. And dmesg indeed reveals:
>>>
>>> Tetsuo asked me to report this to linux-mm.
>>>
>>> But 2^4 is 16 pages, II
> On 2 Oct 2017, at 19.18, Rakesh Pandit wrote:
>
> On Mon, Oct 02, 2017 at 03:25:10PM +0300, Rakesh Pandit wrote:
>> On Mon, Oct 02, 2017 at 02:09:35PM +0200, Javier González wrote:
On 1 Oct 2017, at 15.25, Rakesh Pandit wrote:
While separating read and erase mempools in 22da65a
On Mon, 2017-10-02 at 22:25 -0500, Eric W. Biederman wrote:
> The code where it calls group_send_sig_info is buggy for pdeath_signal.
> And it no less buggy for this new case. There is no point to check
> permissions when sending a signal to yourself. Especially this signal
> gets cleared during
On 10/03/2017 07:15 AM, James Bottomley wrote:
> On Mon, 2017-10-02 at 21:11 -0700, John Johansen wrote:
>> On 10/02/2017 09:02 PM, James Bottomley wrote:
>>>
>>> The specific problem is that dnsmasq refuses to start on openSUSE
>>> Leap 42.2. The specific cause is that and attempt to open a
>>> P
On Tue, 3 Oct 2017, Michael Ellerman wrote:
> Hi Thomas,
> Unfortunately this is hitting the WARN_ON in start_wd_cpu() on powerpc
> because we're calling it multiple times for the boot CPU.
>
> The first call is via:
>
> start_wd_on_cpu+0x80/0x2f0
> watchdog_nmi_reconfigure+0x124/0x170
> so
This driver supports the ast2500, ast2400 (and derivative) BMC SoCs from
Aspeed.
This is v4. See patches for detailed changelogs.
v4: Address review from Andrew and Stephen.
v3: Address review from Andrew and has seen more testing on hardware
v2: split the driver out into a series of patches to
This adds the stub of a driver for the ASPEED SoCs. The clocks are
defined and the static registration is set up.
Signed-off-by: Joel Stanley
---
v3:
- use named initlisers for aspeed_gates table
- fix clocks typo
- Move ASPEED_NUM_CLKS to the bottom of the list
- Put gates at the start of th
This registers the core clocks; those which are required to calculate
the rate of the timer peripheral so the system can load a clocksource
driver.
Signed-off-by: Joel Stanley
---
v4:
- Add defines to document the BIT() macros
v3:
- Fix ast2400 ahb calculation
- Remove incorrect 'this is w
The majority of the clocks in the system are gates paired with a reset
controller that holds the IP in reset.
This borrows from clk_hw_register_gate, but registers two 'gates', one
to control the clock enable register and the other to control the reset
IP. This allows us to enforce the ordering:
This registers a platform driver to set up all of the non-core clocks.
The clocks that have configurable rates are now registered.
Signed-off-by: Joel Stanley
--
v4:
- Add eclk div table to fix ast2500 calculation
- Add defines to document the BIT() macros
- Pass dev where we can when regist
There are some resets that are not associated with gates. These are
represented by a reset controller.
Signed-off-by: Joel Stanley
---
v3:
- Add named initalisers for the reset defines
- Add define for ADC
---
drivers/clk/clk-aspeed.c | 82 +++-
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