On Fri, Sep 29, 2017 at 12:39:32AM +0200, Gerd Gerats wrote:
> >
> > So I suppose the purpose of that plist in futex is to enable waking up
> > the highest prio waiter, but with the advent of SCHED_DEADLINE that no
> > longer works.
>
> I do not understand, plist is the original data structure. I
On Thu, Sep 28, 2017 at 07:57:46PM +0200, Andrey Konovalov wrote:
> Hi!
>
> I've got the following report while fuzzing the kernel with syzkaller.
>
> On commit dc972a67cc54585bd83ad811c4e9b6ab3dcd427e (4.14-rc2+).
>
> There's no check on the connection_info->num_ports value when
> iterating ove
>> +Q: https://patchwork.kernel.org/project/linux-integrity/list/
> Is there a way of viewing not just the posted patches, but the discussion as
> well? Do we need to set up an archive as well?
Spinics is archiving us at
https://www.spinics.net/lists/linux-integrity/
It would be good to add thi
On Fri, Sep 29, 2017 at 4:32 PM, Maxime Ripard
wrote:
> Hi,
>
> On Fri, Sep 29, 2017 at 03:25:11AM +, Chen-Yu Tsai wrote:
>> The AXP81x family of PMIC is used with the Allwinner A83T and H8 SoCs.
>> This includes the AXP813 and AXP818. There is no discernible difference
>> except the labeling.
On Thu, Sep 28, 2017 at 01:03:39PM -0500, mike.tra...@hpe.com wrote:
>
> The UV BIOS goes to considerable effort to get the TSC synchronization
> accurate across the entire system. Included in that are multiple chassis
> that can have 32+ sockets. The architecture does support an external
> high
On Fri, Sep 29, 2017 at 08:22:53AM +, Chen-Yu Tsai wrote:
> The 2x outputs of the 2 video PLL clocks are directly used by the
> HDMI controller block.
>
> Export them so they can be referenced in the device tree.
>
> Fixes: c6e6c96d8fa6 ("clk: sunxi-ng: Add A31/A31s clocks")
> Signed-off-by:
On Fri, Sep 29, 2017 at 08:22:54AM +, Chen-Yu Tsai wrote:
> The HDMI DDC clock found in the CCU is the parent of the actual DDC
> clock within the HDMI controller. That clock is also named "hdmi-ddc".
>
> Rename the one in the CCU to "ddc". This makes more sense than renaming
> the one in the
Hello,
Entering nitpick mode.
On Thu, 28 Sep 2017 16:36:57 +0200, Gregory CLEMENT wrote:
> This enables the driver for the NAND flash device found on
> - PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
> + PXA3xx processors (NFCv1) and also on Armada 32bits(XP, 3
On Wed, Sep 20, 2017 at 1:43 PM, Minchan Kim wrote:
> With fast swap storage, platform want to use swap more aggressively
> and swap-in is crucial to application latency.
>
> The rw_page based synchronous devices like zram, pmem and btt are such
> fast storage. When I profile swapin performance wi
Hi Thomas,
On ven., sept. 29 2017, Thomas Petazzoni
wrote:
> Hello,
>
> Entering nitpick mode.
nitpick accpeted! :)
I am going to send a v2.
Gregory
>
> On Thu, 28 Sep 2017 16:36:57 +0200, Gregory CLEMENT wrote:
>
>>This enables the driver for the NAND flash device found on
>> -
[+ Timur]
On Thu, Sep 28, 2017 at 03:38:00PM -0400, Jon Masters wrote:
> On 09/27/2017 11:49 AM, Will Deacon wrote:
>
> > The moral of the story is that read-after-read (same address) ordering
> > *only*
> > applies if READ_ONCE is used consistently. This means we need to fix page
> > table dere
On Fri, Sep 01, 2017 at 03:21:02PM +0200, Peter Zijlstra wrote:
> Vincent reported that when running in a cgroup, his root
> cfs_rq->avg.load_avg dropped to 0 on task idle.
>
> This is because reweight_entity() will now immediately propagate the
> weight change of the group entity to its cfs_rq, a
On Thu, Sep 28, 2017 at 05:58:30PM -0700, Paul E. McKenney wrote:
> On Fri, Sep 29, 2017 at 07:59:09AM +1300, Michael Cree wrote:
> > On Thu, Sep 28, 2017 at 08:43:54AM -0700, Paul E. McKenney wrote:
> > > On Thu, Sep 28, 2017 at 09:45:35AM +0100, Will Deacon wrote:
> > > > On Thu, Sep 28, 2017 at
When the cmd_timer fired, it would try to access the command struct.
So cancel it before cleanup the command queue in xhci_hc_died(), to
avoid use-after-free reported by KASAN:
[ 176.952537] BUG: KASAN: use-after-free in
xhci_handle_command_timeout+0x68/0x224
[ 176.960846] Write of size 4 at add
Add missing kfree of allocated cros_ec_command.
Fixes: ff00af859354 ("platform/chrome: cros_ec: Add sysfs entry to set keyboard
wake lid angle")
Signed-off-by: Jeffy Chen
---
drivers/platform/chrome/cros_ec_sysfs.c | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --
From: Andrew Lunn
> Sent: 28 September 2017 20:34
...
> > There are 34 counters. In normal case using generic bus I/O or PCI to read
> > them
> > is very quick, but the switch is mostly accessed using SPI, or even I2C.
> > As the SPI
> > access is very slow.
>
> How slow is it? The Marvell swi
Acked-By: Peter De Schrijver
On Wed, Sep 27, 2017 at 06:53:10PM +0200, SF Markus Elfring wrote:
> From: Markus Elfring
> Date: Wed, 27 Sep 2017 18:40:34 +0200
>
> Omit extra messages for a memory allocation failure in these functions.
>
> This issue was detected by using the Coccinelle softwa
The comment in imx_flush_buffer() states that the state of 4 registers
are to be saved/restored, then only saves and restores 3 registers. The
missing register (UBRC) is read only and thus can't be restored.
Update the comment to reflect reality.
Signed-off-by: Martyn Welch
---
drivers/tty/seri
The save_stack_trace() and save_stack_trace_tsk() wrappers of
__save_stack_trace() add themselves to the call stack, and thus appear in the
recorded stacktraces. This is redundant and wasteful when we have limited space
to record the useful part of the backtrace with e.g. page_owner functionality.
On Fri, Sep 29, 2017 at 01:54:44PM +0800, Lin Xiulei wrote:
> From: "leilei.lin"
>
> This fix updating cgroup time when event is being scheduled in
> by descendants
>
> Signed-off-by: leilei.lin
> Reviewed-and-tested-by: Jiri Olsa
Thanks!
Commit-ID: 441430eb54a00586f95f1aefc48e0801bbd6a923
Gitweb: https://git.kernel.org/tip/441430eb54a00586f95f1aefc48e0801bbd6a923
Author: Alexander Shishkin
AuthorDate: Wed, 6 Sep 2017 19:08:11 +0300
Committer: Ingo Molnar
CommitDate: Fri, 29 Sep 2017 10:06:45 +0200
perf/aux: Only update
On Thu, Sep 28, 2017 at 04:05:14PM +, Paul E. McKenney wrote:
[...]
> > __schedule+0x201/0x2240 kernel/sched/core.c:3292
> > schedule+0x113/0x460 kernel/sched/core.c:3421
> > kvm_async_pf_task_wait+0x43f/0x940 arch/x86/kernel/kvm.c:158
>
> It is kvm_async_pf_task_wait() that calls schedule(
Commit-ID: 9c29c31830a4eca724e137a9339137204bbb31be
Gitweb: https://git.kernel.org/tip/9c29c31830a4eca724e137a9339137204bbb31be
Author: Prateek Sood
AuthorDate: Thu, 7 Sep 2017 20:00:58 +0530
Committer: Ingo Molnar
CommitDate: Fri, 29 Sep 2017 10:10:20 +0200
locking/rwsem-xadd: Fix mis
> On Fri, 22 Sep 2017, 冯锐 wrote:
>
> > > On Fri, Sep 22, 2017 at 05:36:24PM +0800, rui_f...@realsil.com.cn wrote:
> > > > From: rui_feng
> > > >
> > > > Add support for new chip rts5260.
> > > > In order to support rts5260，the definitions of some internal
> > > > registers and workflow have to b
Commit-ID: b9545e75894b4866c62b36682527f5df1394ac58
Gitweb: https://git.kernel.org/tip/b9545e75894b4866c62b36682527f5df1394ac58
Author: Josh Poimboeuf
AuthorDate: Thu, 28 Sep 2017 16:58:26 -0500
Committer: Ingo Molnar
CommitDate: Fri, 29 Sep 2017 09:59:17 +0200
x86/asm: Fix inline asm
This patch adds DMAMUX support for STM32H743 SoC.
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v2:
* Update DTS to be compliant with up-streamed bindings
v1:
* Initial
---
---
arch/arm/boot/dts/stm32h743.dtsi | 12
1 file changed, 12 insertions(+)
On 2017年09月29日 00:09, Willem de Bruijn wrote:
On Thu, Sep 28, 2017 at 3:23 AM, Jason Wang wrote:
On 2017年09月28日 07:25, Willem de Bruijn wrote:
In the future, both simple and sophisticated policy like RSS or other
guest
driven steering policies could be done on top.
IMHO there should be a m
Hi,
I have a general question.
How do we normally verify linux-next tree?
I wanted to work on linux-next but I am facing some issues.
I could able to build linux-next for both x86 and arm, but I could not
verify it on any machine.
Currently I don't have a real Linux PC to boot with linux-next ker
Brandon,
On Thu, Sep 28, 2017 at 10:25:32AM -0500, Brandon Streiff wrote:
> - Patch #2: We expose the switch time as a PTP clock but don't support
> adjustment (max_adj=0).
The driver should implement a cyclecounter/timecounter.
> Our platform adjusted a systemwide oscillator
> from userspac
** Re sending **
Hi,
I have a general question.
How do we normally verify linux-next tree?
I wanted to work on linux-next but I am facing some issues.
I could able to build linux-next for both x86 and arm, but I could not
verify it on any machine.
Currently I don't have a real Linux PC to boot w
When I executed numactl -H(which read /sys/devices/system/node/nodeX/cpumap
and display cpumask_of_node for each node), but I got different result on
X86 and arm64. For each numa node, the former only displayed online CPUs,
and the latter displayed all possible CPUs. Unfortunately, both Linux
docum
v1 -> v2:
Replace local variable "cpumask_var_t mask" with dynamic memory alloc:
alloc_cpumask_var,
to avoid possible stack overflow.
Zhen Lei (1):
mm: only dispaly online cpus of the numa node
drivers/base/node.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
--
2.5.0
Replace drm_dev_unref with drm_dev_put as it is more consistent
with kernel coding style. Done using the following semantic
patch by coccinelle.
@r@
expression e;
@@
-drm_dev_unref();
+drm_dev_put();
Signed-off-by: Srishti Sharma
---
drivers/gpu/drm/arm/hdlcd_drv.c | 4 ++--
drivers/gpu/drm/a
On 29/09/2017 11:30, Boqun Feng wrote:
> On Thu, Sep 28, 2017 at 04:05:14PM +, Paul E. McKenney wrote:
> [...]
>>> __schedule+0x201/0x2240 kernel/sched/core.c:3292
>>> schedule+0x113/0x460 kernel/sched/core.c:3421
>>> kvm_async_pf_task_wait+0x43f/0x940 arch/x86/kernel/kvm.c:158
>>
>> It is k
Replace reference/unreference with get/put as it is consistent
with the kernel coding style. Done using the following semantic
patch by coccinelle.
@r@
expression e;
@@
-drm_gem_object_unreference_unlocked(e);
+drm_gem_object_put_unlocked(e);
Signed-off-by: Srishti Sharma
---
drivers/gpu/drm/v
On Thu, Sep 28, 2017 at 07:01:35PM +0100, Will Deacon wrote:
> On Thu, Sep 28, 2017 at 03:37:04PM +0100, Dave Martin wrote:
> > On Thu, Sep 28, 2017 at 03:14:47PM +0100, Will Deacon wrote:
> > > On Thu, Sep 28, 2017 at 01:42:31PM +0100, Dave Martin wrote:
> > > > On Thu, Sep 28, 2017 at 11:55:47AM
A donation of 1 million British Pounds to you in good faith
From: Charles Keepax
To prepare for adding support for muxing individual pins rename the
group member of the pinctrl_map_mux and pinctrl_setting_mux structs to
group_or_pin.
Signed-off-by: Charles Keepax
---
drivers/pinctrl/bcm/pinctrl-bcm2835.c | 2 +-
drivers/pinctrl/core.h
Add a new helper function to be called for each pin rather than keeping
everything in the same function. Primarily this just reduces the code
indentation a bit.
Signed-off-by: Charles Keepax
---
drivers/pinctrl/pinmux.c | 100 +--
1 file changed, 53 in
From: Charles Keepax
So as to not break existing drivers that rely on pins properties being
treated as a group, leave functionality of the existing generic
parsing functions the same. Add a new parsing function
pinctrl_generic_dt_node_to_map_all that will map pin properties from DT
to the newly c
This series add support for muxing individual pins within
pin mux, rather than just whole groups. Mainly, I had two
motivations here, one to avoid the need to add loads of groups
containing individual pins and hardware that actually has some
internal concept of groups of pins, and disambiguating th
From: Charles Keepax
Currently pinmuxing can only be applied to groups, this has lead to
several drivers within the kernel adding many pin groups that just
contain a single pin to allow muxing of individual pins.
Add support to the core for muxing individual pins. Groups are still
used as a mech
Hi Yury,
On 29.09.17 01:14, Yury Norov wrote:
Hi Volodymyr,
On Thu, Sep 28, 2017 at 09:04:01PM +0300, Volodymyr Babchuk wrote:
From: Volodymyr Babchuk
In order to register a shared buffer in TEE, we need accessor
function that return list of pages for that buffer.
Signed-off-by: Volodymyr B
On Thu, Sep 28, 2017 at 03:38:59PM +, Icenowy Zheng wrote:
>
>
> 于 2017年9月28日 GMT+08:00 下午11:12:25, Maxime Ripard
> 写到:
> >On Thu, Sep 28, 2017 at 09:25:42AM +, Icenowy Zheng wrote:
> >> +&mmc2 {
> >> + vmmc-supply = <®_dcdc1>;
> >> + bus-width = <8>;
> >> + non-removable;
> >> + st
On Fri, Sep 29, 2017 at 08:22:55AM +, Chen-Yu Tsai wrote:
> static const struct sun4i_tcon_quirks sun5i_a13_quirks = {
> - .has_unknown_mux = true,
> - .has_channel_1 = true,
> + .has_unknown_mux= true,
> + .has_channel_1 = true,
> + .set_mux
On Fri, Sep 29, 2017 at 08:22:56AM +, Chen-Yu Tsai wrote:
> On systems with 2 TCONs such as the A31, it is possible to demux the
> output of the TCONs to one encoder.
>
> Add support for this for the A31.
>
> Signed-off-by: Chen-Yu Tsai
> ---
> drivers/gpu/drm/sun4i/sun4i_tcon.c | 38
> +++
Hi guys,
One handy aspect of Netlink is that it's backwards compatible. This
means that you can run old userspace utilities on new kernels, even if
the new kernel supports new features and netlink attributes. The wire
format is stable enough that the data marshaled can be extended
without breaking
On Fri, Sep 29, 2017 at 6:20 PM, Maxime Ripard
wrote:
> On Fri, Sep 29, 2017 at 08:22:56AM +, Chen-Yu Tsai wrote:
>> On systems with 2 TCONs such as the A31, it is possible to demux the
>> output of the TCONs to one encoder.
>>
>> Add support for this for the A31.
>>
>> Signed-off-by: Chen-Yu
On Fri, Sep 29, 2017 at 02:07:22PM +0800, Wei Hu (Xavier) wrote:
>
>
> On 2017/9/28 20:59, Leon Romanovsky wrote:
> > On Thu, Sep 28, 2017 at 07:56:59PM +0800, Wei Hu (Xavier) wrote:
> > >
> > > On 2017/9/28 17:13, Leon Romanovsky wrote:
> > > > On Thu, Sep 28, 2017 at 12:57:28PM +0800, Wei Hu (Xav
于 2017年9月28日 GMT+08:00 下午11:11:03, Maxime Ripard
写到:
>Hi,
>
>On Thu, Sep 28, 2017 at 09:25:41AM +, Icenowy Zheng wrote:
>> +/*
>> + * The max-frequency properties in all MMC controller nodes
>> + * are conservative values proven to work on Banana Pi M2
>>
On Fri, Sep 29, 2017 at 10:01:24AM +, Paolo Bonzini wrote:
> On 29/09/2017 11:30, Boqun Feng wrote:
> > On Thu, Sep 28, 2017 at 04:05:14PM +, Paul E. McKenney wrote:
> > [...]
> >>> __schedule+0x201/0x2240 kernel/sched/core.c:3292
> >>> schedule+0x113/0x460 kernel/sched/core.c:3421
> >>>
On 2017/8/29 20:46, Peter Zijlstra wrote:
On Tue, Aug 29, 2017 at 11:46:41AM +, Yang Zhang wrote:
In ttwu_do_wakeup, it will update avg_idle when wakeup from idle. Here
we just reuse this logic to update the poll time. It may be a little
late to update the poll in ttwu_do_wakeup, but the t
On Fri, Sep 29, 2017 at 02:27:57AM +1000, Nicholas Piggin wrote:
> The biggest power boxes are more tightly coupled than those big
> SGI systems, but even so just plodding along taking and releasing
> locks in turn would be fine on those SGI ones as well really. Not DoS
> level. This is not a sing
On Fri, Sep 29, 2017 at 6:25 PM, Icenowy Zheng wrote:
>
>
> 于 2017年9月28日 GMT+08:00 下午11:11:03, Maxime Ripard
> 写到:
>>Hi,
>>
>>On Thu, Sep 28, 2017 at 09:25:41AM +, Icenowy Zheng wrote:
>>> +/*
>>> + * The max-frequency properties in all MMC controller nodes
>>> +
On 09/29, Ingo Molnar wrote:
>
>* Josh Poimboeuf wrote:
>
>> On Thu, Sep 28, 2017 at 04:53:09PM -0700, Linus Torvalds wrote:
>> > On Thu, Sep 28, 2017 at 2:58 PM, Josh Poimboeuf
>> > wrote:
>> > >
>> > > Reported-by: kernel test robot
>> > > Fixes: f5caf621ee35 ("x86/asm: Fix inline asm call co
On Fri, Sep 29, 2017 at 12:01:24PM +0200, Paolo Bonzini wrote:
> > Does this mean whenever we get a page fault in a RCU read-side critical
> > section, we may hit this?
> >
> > Could we simply avoid to schedule() in kvm_async_pf_task_wait() if the
> > fault process is in a RCU read-side critical s
On 29.09.17 03:23, Yury Norov wrote:
On Thu, Sep 28, 2017 at 09:04:03PM +0300, Volodymyr Babchuk wrote:
From: Volodymyr Babchuk
These functions will be used to pass information about shared
buffers to OP-TEE.
Signed-off-by: Volodymyr Babchuk
---
drivers/tee/optee/call.c | 48 +++
Hi,
On Thu, Sep 28, 2017 at 09:03:57PM +0300, Volodymyr Babchuk wrote:
> From: Volodymyr Babchuk
>
> This patch series enables dynamic shared memory support in the TEE
> subsystem as a whole and in OP-TEE in particular.
>
> Global Platform TEE specification [1] allows client applications
> to r
Hi,
I have a general question.
How do we normally verify linux-next tree?
I wanted to work on linux-next but I am facing some issues.
I could able to build linux-next for both x86 and arm, but I could not
verify it on any machine.
Currently I don't have a real Linux PC to boot with linux-next ker
On 2017/9/1 14:49, Quan Xu wrote:
on 2017/8/29 22:39, Borislav Petkov wrote:
On Tue, Aug 29, 2017 at 11:46:37AM +, Yang Zhang wrote:
Add poll in do_idle. For UP VM, if there are running task, it will not
goes into idle path, so we only enable poll in SMP VM.
Signed-off-by: Yang Zhang
Si
1/2 : add NAND_WAIT_TWHR and nand_whr_delay().
You can set this new flag if you want nand_command(_lp)
to insert tWHR delay where needed.
2/2 : Fix Denali setup_data_interface.
Boris' suggestion in v1 was a good reminder that
made me realize tCCS was missing in the driver.
For commands such as Read Status, Read ID, etc. the controller needs
to wait for tWHR before it reads out the first data. If the controller
does not take care of it, the driver has to wait explicitly to make
sure to meet the spec.
Introduce NAND_WAIT_TWHR, which works like NAND_WAIT_TCCS. The
dr
The WE_2_RE register specifies the number of clock cycles inserted
between the rising edge of #WE and the falling edge of #RE.
The current setup_data_interface implementation takes care of tWHR,
but tCCS is missing. Wait max(tCSS, tWHR) to meet the spec.
With setup_data_interface() is properly p
Hello Mark,
On 29.09.17 13:31, Mark Rutland wrote:
Hi,
On Thu, Sep 28, 2017 at 09:03:57PM +0300, Volodymyr Babchuk wrote:
From: Volodymyr Babchuk
This patch series enables dynamic shared memory support in the TEE
subsystem as a whole and in OP-TEE in particular.
Global Platform TEE specific
On Thu, Sep 28, 2017 at 09:03:59PM +0300, Volodymyr Babchuk wrote:
> +static int
> +tee_ioctl_shm_register(struct tee_context *ctx,
> +struct tee_ioctl_shm_register_data __user *udata)
> +{
> + long ret;
> + struct tee_ioctl_shm_register_data data;
> + struct tee_shm
Sasha Levin reported a WARNING:
| WARNING: CPU: 0 PID: 6974 at kernel/rcu/tree_plugin.h:329
| rcu_preempt_note_context_switch kernel/rcu/tree_plugin.h:329 [inline]
| WARNING: CPU: 0 PID: 6974 at kernel/rcu/tree_plugin.h:329
| rcu_note_context_switch+0x16c/0x2210 kernel/rcu/tree.c:458
...
| CPU: 0
KASAN reported use-after-free bug when xhci host controller died:
[ 176.952537] BUG: KASAN: use-after-free in
xhci_handle_command_timeout+0x68/0x224
[ 176.960846] Write of size 4 at addr ffc0cbb01608 by task kworker/3:3/1680
...
[ 177.180644] Freed by task 0:
[ 177.183882] kasan_slab_free
On Thu, Sep 28, 2017 at 01:42:49PM +0200, Peter Zijlstra wrote:
> On Thu, Sep 28, 2017 at 11:03:10AM +, Levin, Alexander (Sasha Levin)
> wrote:
> > On Thu, Sep 28, 2017 at 12:35:41PM +0200, Peter Zijlstra wrote:
> > >On Thu, Sep 28, 2017 at 02:14:15AM -0700, Sasha Levin wrote:
>
> > >> [20355
On 09/22/2017 02:03 PM, Chaotian Jing wrote:
Change the comptiable for support of multi-platform
Add description for reg
Add description for source_cg
Add description for mediatek,latch-ck
Note that source_cg and mediatek,latch-ck are optional for some projects,
eg, MT2701 do not have source_cg
Commit-ID: 520a13c530aeb5f63e011d668c42db1af19ed349
Gitweb: https://git.kernel.org/tip/520a13c530aeb5f63e011d668c42db1af19ed349
Author: Josh Poimboeuf
AuthorDate: Thu, 28 Sep 2017 16:58:26 -0500
Committer: Ingo Molnar
CommitDate: Fri, 29 Sep 2017 13:15:44 +0200
x86/asm: Fix inline asm
From: Jan Kiszka
Seems like a copy&paste bug of the initial commit 7b0139ebb1cf.
Signed-off-by: Jan Kiszka
---
I didn't manage to test this so far, but this looked strange while
reading the code.
trace-view-store.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/trace-vie
On Tue, Sep 26, 2017 at 06:35:45PM +0200, Artem Savkov wrote:
> It is possible for ebt_in_hook to be triggered before ebt_table is assigned
> resulting in a NULL-pointer dereference. Make sure hooks are
> registered as the last step.
Applied, thanks.
On Thu, Sep 28, 2017 at 11:03:03AM +0100, Morten Rasmussen wrote:
> > +/*
> > + * All this does is approximate the hierarchical proportion which includes
> > that
> > + * global sum we all love to hate.
> > + *
> > + * That is, the weight of a group entity, is the proportional share of the
> > +
On Fri, Sep 29, 2017 at 10:37 AM, Greg Kroah-Hartman
wrote:
> On Thu, Sep 28, 2017 at 07:57:46PM +0200, Andrey Konovalov wrote:
>> Hi!
>>
>> I've got the following report while fuzzing the kernel with syzkaller.
>>
>> On commit dc972a67cc54585bd83ad811c4e9b6ab3dcd427e (4.14-rc2+).
>>
>> There's no
On Fri, Sep 29, 2017 at 10:04:34AM +0100, Morten Rasmussen wrote:
> > - load = scale_load_down(cfs_rq->load.weight);
> > + load = max(scale_load_down(cfs_rq->load.weight), cfs_rq->avg.load_avg);
>
> We use cfs_rq->tg_load_avg_contrib (the filtered version of
> cfs_rq->avg.load_avg) instead of
On Fri, 29 Sep 2017 12:31:31 +0200
Peter Zijlstra wrote:
> On Fri, Sep 29, 2017 at 02:27:57AM +1000, Nicholas Piggin wrote:
>
> > The biggest power boxes are more tightly coupled than those big
> > SGI systems, but even so just plodding along taking and releasing
> > locks in turn would be fine
On Thu, Sep 28, 2017 at 7:01 PM, Alan Stern wrote:
> On Thu, 28 Sep 2017, Andrey Konovalov wrote:
>
>> Hi!
>>
>> I've got the following report while fuzzing the kernel with syzkaller.
>>
>> On commit dc972a67cc54585bd83ad811c4e9b6ab3dcd427e (4.14-rc2+).
>>
>> It seems that out pointer ends up bein
On 29/09/2017 12:34, Peter Zijlstra wrote:
> On Fri, Sep 29, 2017 at 12:01:24PM +0200, Paolo Bonzini wrote:
>>> Does this mean whenever we get a page fault in a RCU read-side critical
>>> section, we may hit this?
>>>
>>> Could we simply avoid to schedule() in kvm_async_pf_task_wait() if the
>>> fa
On Fri, Sep 29, 2017 at 09:38:53PM +1000, Nicholas Piggin wrote:
> Not really. There is some ability to hold onto a line for a time, but
> there is no way to starve them, let alone starve hundreds of other
> CPUs. They will request the cacheline exclusive and eventually get it.
OK, hardware fairn
On 2017-09-29 13:29, Jan Kiszka wrote:
> From: Jan Kiszka
>
> Seems like a copy&paste bug of the initial commit 7b0139ebb1cf.
>
> Signed-off-by: Jan Kiszka
> ---
>
> I didn't manage to test this so far, but this looked strange while
> reading the code.
Now I found out how it is supposed to wo
On Mon, Sep 25, 2017 at 04:01:09PM -0400, Steven Rostedt wrote:
> On Mon, 25 Sep 2017 14:07:48 +0200
> Peter Zijlstra wrote:
>
> > +static inline char __task_state_to_char(unsigned int state)
> > +{
> > + static const char state_char[] = "RSDTtXZ";
> > +
> > + BUILD_BUG_ON(1 + ilog2(TASK_REPO
On Fri, 2017-09-29 at 13:11 +0200, Matthias Brugger wrote:
>
> On 09/22/2017 02:03 PM, Chaotian Jing wrote:
> > Change the comptiable for support of multi-platform
> > Add description for reg
> > Add description for source_cg
> > Add description for mediatek,latch-ck
> > Note that source_cg and me
Someone already sent this. Work against linux-next or staging-next.
regards,
dan carpenter
On Thu, Sep 28, 2017 at 11:06:42PM -0700, Ricardo Neri wrote:
> I agree. In fact, insn_get_seg_base() does not need insn at all. All it needs
> is
> a INAT_SEG_REG_* index. This would make things clear. UMIP (and callers that
> need to copy_from_user code can do insn_get_seg_base(regs, INAT_SEG_RE
On 09/27/2017 10:20 AM, Johannes Thumshirn wrote:
> We have kmalloc_array() and kcalloc() wrappers on top of kmalloc() which
> ensure us overflow free multiplication for the size of a memory
> allocation but these implementations are not NUMA-aware.
>
> Likewise we have kmalloc_node() which is a N
This is the per-I/O equivalent of O_APPEND to support atomic append
operations on any open file.
If a file is opened with O_APPEND, pwrite() ignores the offset and
always appends data to the end of the file. RWF_APPEND enables atomic
append and pwrite() with offset on a single file descriptor.
Si
On Fri, Sep 29, 2017 at 09:14:26AM +, David Laight wrote:
> From: Andrew Lunn
> > Sent: 28 September 2017 20:34
> ...
> > > There are 34 counters. In normal case using generic bus I/O or PCI to
> > > read them
> > > is very quick, but the switch is mostly accessed using SPI, or even I2C.
>
Hi Robin,
On 2017-09-21 13:58, Robin Murphy wrote:
[+Christoph and Marek]
On 21/09/17 09:59, Ganapatrao Kulkarni wrote:
Introduce smmu_alloc_coherent and smmu_free_coherent functions to
allocate/free dma coherent memory from NUMA node associated with SMMU.
Replace all calls of dmam_alloc_coher
This patch adds I2C support for STM32
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v1:
* Initial
---
---
arch/arm/configs/stm32_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/stm32_defconfig b/arch/arm/configs/stm32_defconfig
index 3ed3158.
nctrl features
Hi Quentin,
[auto build test WARNING on ]
url:
https://github.com/0day-ci/linux/commits/Quentin-Schulz/add-pinmuxing-support-for-pins-in-AXP209-and-AXP813-PMICs/20170929-162846
base:
:: branch date: 4 hours ago
:: commit date: 4 hours ago
>> drivers/pinctrl/pinct
On Tue, Sep 19, 2017 at 03:46:00PM -0500, Brijesh Singh wrote:
> From: Tom Lendacky
>
> Update the CPU features to include identifying and reporting on the
> Secure Encrypted Virtualization (SEV) feature. SEV is identified by
> CPUID 0x801f, but requires BIOS support to enable it (set bit 23
Hi Bjorn,
On Wed, Sep 27, 2017 at 02:18:54PM -0600, Alex Williamson wrote:
> On Wed, 27 Sep 2017 11:20:39 -0700
> Vadim Lomovtsev wrote:
>
> > This commit makes Cavium PCI ACS quirk applicable only to Cavium
> > ThunderX (CN8XXX) family PCIE Root Ports which has limited PCI capabilities
> > in t
kernel test robot writes:
> Greeting,
>
> FYI, we noticed a -16% regression of will-it-scale.per_thread_ops due to
> commit:
>
> commit: 9e52fc2b50de3a1c08b44f94c610fbe998c0031a ("x86/mm: Enable RCU based
> page table freeing (CONFIG_HAVE_RCU_TABLE_FREE=y)")
> https://git.kernel.org/cgit/linux/
On Fri, 29 Sep 2017 19:38:38 +0900
Masahiro Yamada wrote:
> 1/2 : add NAND_WAIT_TWHR and nand_whr_delay().
> You can set this new flag if you want nand_command(_lp)
> to insert tWHR delay where needed.
>
> 2/2 : Fix Denali setup_data_interface.
> Boris' suggestion in v1 was a g
On Armada 7K/8K we need to explicitly enable the bus clock. The bus clock
is optional because not all the SoCs need them but at least for Armada
7K/8K it is actually mandatory.
The binding documentation is updating accordingly.
Signed-off-by: Gregory CLEMENT
---
Changelog:
v1 -> v2:
- manage th
On 9/28/17 2:23 PM, Borislav Petkov wrote:
...
> So actually we need chicken bits to be able to *enable* both when
> CONFIG_AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT is not set.
>
> I.e.,
>
> * mem_encrypt=on - both SME and SEV enabled
>
> * mem_encrypt=smeonly - only SME, no SEV on the host. This option
PR_SET_PDEATHSIG sets a parent death signal that the calling process
will get when its parent thread dies, even when the result of getppid()
doesn't change because the calling process is reparented to a different
thread in the same parent process. When managing multiple processes, a
process-based p
com/0day-ci/linux/commits/Quentin-Schulz/add-pinmuxing-support-for-pins-in-AXP209-and-AXP813-PMICs/20170929-162846
> base:
> :: branch date: 4 hours ago
> :: commit date: 4 hours ago
>
>>> drivers/pinctrl/pinctrl-axp209.c:485:19-27: WARNING: invalid free of devm_
>
Hi!
> diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug
> index b19c491cbc4e..e21b0c002d0f 100644
> --- a/lib/Kconfig.debug
> +++ b/lib/Kconfig.debug
> @@ -8,12 +8,58 @@ config PRINTK_TIME
> messages to be added to the output of the syslog() system
> call and at the console.
>
>
> > julia
> >
> > -- Forwarded message --
> > Date: Fri, 29 Sep 2017 20:00:03 +0800
> > From: kbuild test robot
> > To: kbu...@01.org
> > Cc: Julia Lawall
> > Subject: Re: [PATCH v2 02/10] pinctrl: axp209: add pinctrl features
>
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