On 9/27/2017 5:42 PM, Govindarajulu Varadarajan wrote:
> CPU0 CPU1
> -
> __driver_attach()
> device_lock(&dev->mutex) <--- device mutex lock here
> driver_probe_device()
> pci_enable_sriov()
> pci_i
Hi Manu,
On Thu, Sep 28, 2017 at 09:30:38AM +0530, Manu Gautam wrote:
> On 9/28/2017 12:46 AM, Jack Pham wrote:
> > On Wed, Sep 27, 2017 at 10:57:41AM -0700, Jack Pham wrote:
> >> On Wed, Sep 27, 2017 at 02:29:10PM +0530, Manu Gautam wrote:
> >>> VBUS signal coming from PHY must be asserted in dev
On 09/28/2017 11:52 AM, David Woodhouse wrote:
On Thu, 2017-09-28 at 11:05 -0400, Don Dutile wrote:
ah, nickel summary: no in-kernel driver w/.sriov-configure method.
if so, now I'm up to speed with you
h
so, that would imply we need an in-kernel, pcie-common, .sriov-
configure metho
On Thu, Sep 28, 2017 at 10:25:34AM -0500, Brandon Streiff wrote:
> This patch adds basic support for exposing the 32-bit timestamp counter
> inside the mv88e6xxx switch code as a ptp_clock.
>
> Signed-off-by: Brandon Streiff
> ---
> drivers/net/dsa/mv88e6xxx/Kconfig | 10 +++
> drivers/net/dsa
On 28/09/17 14:29, Raj, Ashok wrote:
> Hi Casey
>
> On Thu, Sep 28, 2017 at 04:17:59PM +, Casey Leedom wrote:
>> Thanks Robin. Harsh can certainly test your latest patch as soon as he's
>> back in the office tomorrow morning India time. If your patch works and is
>> accepted, it sounds lik
Philipp Hahn writes:
> Hello Eric,
>
> we have observed the following OOPS with linux-4.9.33 on several
> occasions when starting a Docker container:
>
>> [ 531.801537] Oops: [#1] SMP
>> [ 531.801565] Modules linked in: xt_nat veth ipt_MASQUERADE
>> nf_nat_masquerade_ipv4 xfrm_user xfrm_a
On Thu, Sep 28, 2017 at 11:44:22AM -0500, Josh Poimboeuf wrote:
> Agreed, changing it to "unsigned long" and "rsp" will probably fix it.
>
> I had made it "unsigned int" because of a clang issue with "unsigned
> long":
>
> CC arch/x86/entry/vdso/vdso32/vclock_gettime.o
> In file includ
On Thu, 28 Sep 2017, Andrey Konovalov wrote:
> Hi!
>
> I've got the following report while fuzzing the kernel with syzkaller.
>
> On commit dc972a67cc54585bd83ad811c4e9b6ab3dcd427e (4.14-rc2+).
>
> It seems that out pointer ends up being NULL and kernel crashes on
> access to out->desc.bEndpoin
> +/* The 32-bit timestamp counter overflows every ~34.3 seconds; this task
> + * forces periodic reads so that we don't miss any wraparounds.
> + */
> +#define MV88E6XXX_TAI_OVERFLOW_PERIOD (34 * HZ / 2)
> +static void mv88e6xxx_ptp_overflow_check(struct work_struct *work)
> +{
> + struct dela
On 09/28/17 09:07, Peter Zijlstra wrote:
> On Thu, Sep 28, 2017 at 08:41:37AM -0700, Randy Dunlap wrote:
>
>> Please add that kernel parameter to
>> Documentation/admin-guide/kernel-parameters.txt.
>
> Something like so?
Yes, thanks. Ack.
> --- a/Documentation/admin-guide/kernel-parameters.txt
On x86 we historically used falling edge interrupts in the driver
because that's how first Chrome devices were configured. They also
did not use ACPI to enumerate I2C devices (because back then there
was no kernel support for that), so trigger was hard-coded in the
driver. However the controller be
On Wed, Sep 27, 2017 at 10:13:24AM -0500, Brijesh Singh wrote:
> From: Tom Lendacky
>
> Early in the boot process, add checks to determine if the kernel is
> running with Secure Encrypted Virtualization (SEV) active.
>
> Checking for SEV requires checking that the kernel is running under a
> hyp
From: Florian Fainelli
Date: Mon, 25 Sep 2017 15:55:53 -0700
> We cannot be registering the network device first, then setting its
> carrier off and finally connecting it to a PHY, doing that leaves a
> window during which the carrier is at best inconsistent, and at worse
> the device is not usab
tree: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git
timers/urgent
head: 686fef928bba6be13cabe639f154af7d72b63120
commit: 686fef928bba6be13cabe639f154af7d72b63120 [1/1] timer: Prepare to change
timer callback argument type
config: um-x86_64_defconfig (attached as .config)
compile
Thierry Reding writes:
> [ Unknown signature status ]
> On Wed, Sep 27, 2017 at 12:36:52PM -0700, Eric Anholt wrote:
>> We want the adjusted_mode->clock to be the actual clock we're
>> expecting to program, so that consumers see the right values for clock
>> and vrefresh.
>>
>> Signed-off-by: Er
From: Colin King
Date: Tue, 26 Sep 2017 16:14:09 +0100
> From: Colin Ian King
>
> The function ch_flower_stats_cb is local to the source and does not need
> to be in global scope, so make it static.
>
> Cleans up sparse warnings:
> symbol 'ch_flower_stats_cb' was not declared. Should it be sta
On 09/28/2017 08:25 AM, Brandon Streiff wrote:
> This patch adds support to the dsa slave network device so that
> switch drivers can implement the SIOC[GS]HWTSTAMP ioctls and the
> ethtool timestamp-info interface.
>
> Signed-off-by: Brandon Streiff
> ---
> struct dsa_switch_driver {
> diff --
From: Aviad Krawczyk
Date: Wed, 27 Sep 2017 01:57:50 +0800
> Set Rxq irq to specific cpu for allocating and receiving the skb from
> the same node.
>
> Signed-off-by: Aviad Krawczyk
Applied.
From: Aviad Krawczyk
Date: Wed, 27 Sep 2017 02:11:33 +0800
> Fix the following scenario:
> 1. tx_free_poll is running on cpu X
> 2. xmit function is running on cpu Y and fails to get sq wqe
> 3. tx_free_poll frees wqes on cpu X and checks the queue is not stopped
> 4. xmit function stops the queu
From: Vivien Didelot
Date: Tue, 26 Sep 2017 14:57:21 -0400
> mv88e6xxx_g2_irq_free locks the registers mutex, but not
> mv88e6xxx_g1_irq_free, which results in a stack trace from
> assert_reg_lock when unloading the mv88e6xxx module. Fix this.
>
> Fixes: 3460a5770ce9 ("net: dsa: mv88e6xxx: Mask
On 9/27/2017 9:49 AM, Will Deacon wrote:
> Hi,
>
> We recently had a crash report[1] on arm64 that involved a bad dereference
> in the page_vma_mapped code during ext4 writeback with THP active. I can
> reproduce this on -rc2:
>
> [ 254.032812] PC is at check_pte+0x20/0x170
> [ 254.032948] LR i
On 09/28/2017 08:22 AM, Colin King wrote:
From: Colin Ian King
The pointer bmc is being initialized and this initialized value is
never being read, so this is assignment redundant and can be removed.
Cleans up clang warning:
warning: Value stored to 'bmc' during its initialization is never rea
On 09/27/2017 11:45 PM, Stephen Rothwell wrote:
Hi Corey,
After merging the ipmi tree, today's linux-next build (powerpc
allyesconfig) failed like this:
drivers/char/ipmi/ipmi_si_platform.c:360:1: warning: data definition has no
type or storage class
MODULE_DEVICE_TABLE(of, of_ipmi_match);
From: Yunsheng Lin
Date: Wed, 27 Sep 2017 09:45:22 +0800
> The patchset contains some enhancement related to DCB before
> adding support for DCB feature.
Series applied, thanks.
> - Patch #3: The GPIO config support is handled in a very simple manner.
> I suspect a longer term goal would be to use pinctrl here.
I assume ptp already has the core code to use pinctrl and Linux
standard GPIOs? What does the device tree binding look like? How do
you specify the GPIOs to use?
On 09/28/2017 08:25 AM, Brandon Streiff wrote:
> Forward the rx/tx timestamp machinery from the dsa infrastructure to the
> switch driver.
>
> On the rx side, defer delivery of skbs until we have an rx timestamp.
> This mimicks the behavior of skb_defer_rx_timestamp. The implementation
> does have
On 09/28/2017 08:25 AM, Brandon Streiff wrote:
> The Scratch/Misc register is a windowed interface that provides access
> to the GPIO configuration. Provide a new method for configuration of
> GPIO functions.
>
> Signed-off-by: Brandon Streiff
> ---
> +/* Offset 0x1A: Scratch and Misc. Register
From: Haishuang Yan
Date: Wed, 27 Sep 2017 11:35:40 +0800
> Different namespace application might require enable TCP Fast Open
> feature independently of the host.
>
> This patch series continues making more of the TCP Fast Open related
> sysctl knobs be per net-namespace.
>
> Reported-by: Luca
From: Haishuang Yan
Date: Wed, 27 Sep 2017 11:35:41 +0800
> The 'publish' logic is not necessary after commit dfea2aa65424 ("tcp:
> Do not call tcp_fastopen_reset_cipher from interrupt context"), because
> in tcp_fastopen_cookie_gen，it wouldn't call tcp_fastopen_init_key_once.
>
> Signed-off-by:
From: Haishuang Yan
Date: Wed, 27 Sep 2017 11:35:42 +0800
> Different namespace application might require different tcp_fastopen_key
> independently of the host.
>
> David Miller pointed out there is a leak without releasing the context
> of tcp_fastopen_key during netns teardown. So add the rel
From: Haishuang Yan
Date: Wed, 27 Sep 2017 11:35:43 +0800
> Different namespace application might require different time period in
> second to disable Fastopen on active TCP sockets.
>
> Tested:
> Simulate following similar situation that the server's data gets dropped
> after 3WHS.
> C syn
On 9/27/17 9:36 PM, Tetsuo Handa wrote:
On 2017/09/28 6:46, Yang Shi wrote:
Changelog v7 —> v8:
* Adopted Michal’s suggestion to dump unreclaim slab info when unreclaimable slabs
amount > total user memory. Not only in oom panic path.
Holding slab_mutex inside dump_unreclaimable_slab() was
This patch series does the miscellaneous changes in QCOM Alpha PLL
operation and structure to support other types of Alpha PLL’s.
1. It adds the pll_type which will be used for determining all
the properties of Alpha PLL.
2. It adds the support for Brammo and Huayra PLL’s for which
the suppo
Alpha PLL is a generic name used for QCOM PLL’s which uses L
and Alpha values for configuring the integer and fractional part.
QCOM SoC’s use different types of Alpha PLL’s for which basic
software configuration part is common with following differences.
1. All These PLL’s will have same basic reg
Some of the Alpha PLL’s support dynamic update in which the
frequency can be changed dynamically without turning off the PLL.
This dynamic update requires the following sequence
1. Write the desired values to pll_l_val and pll_alpha_val
2. Toggle pll_latch_input from low to high
3. Wait for pll_a
On 09/28/2017 10:36 AM, Andrew Lunn wrote:
>> - Patch #3: The GPIO config support is handled in a very simple manner.
>> I suspect a longer term goal would be to use pinctrl here.
>
> I assume ptp already has the core code to use pinctrl and Linux
> standard GPIOs? What does the device tree bind
Following are the major differences in Huayra PLL
1. PLL Alpha Value is 16 bits
2. Depending on alpha_mode, the pll_alpha_val can be treated as
M/N value or as a two’s compliment number.
3. Huayra PLL supports PLL dynamic programming. User can change
L_VAL, without having to go through the p
Currently SUPPORTS_16BIT_ALPHA flag determines the PLL alpha
register width. If this flag is set then the alpha register width
is 16 bits otherwise it is 40 bits. The alpha width is always
fixed for PLL type so it can be added in PLL properties and clock
driver don’t have to specify explicitly.
Th
On Wed, Sep 27, 2017 at 10:13:25AM -0500, Brijesh Singh wrote:
> From: Tom Lendacky
>
> Secure Encrypted Virtualization (SEV) does not support string I/O, so
> unroll the string I/O operation into a loop operating on one element at
> a time.
>
> Cc: Thomas Gleixner
> Cc: Ingo Molnar
> Cc: "H.
Current PLL driver only supports 4 bit PLL post divider so
modified the PLL divider operations to support 2 bit PLL
post divider.
Signed-off-by: Abhishek Sahu
---
drivers/clk/qcom/clk-alpha-pll.c | 20
1 file changed, 16 insertions(+), 4 deletions(-)
diff --git a/drivers/cl
Some of the divider settings are preconfigured and should not
be changed by the clock framework during frequency change. This
patch adds the read-only divider operation for QCOM alpha pll
post divider which is equivalent to generic divider operations in
'commit 79c6ab509558 ("clk: divider: add CLK_
1. Brammo PLL does not allow configuration of VCO
2. Supports the dynamic update in which the frequency can
be changed dynamically without turning off the PLL
3. The register offsets are different from normal Alpha PLL
Signed-off-by: Abhishek Sahu
---
drivers/clk/qcom/clk-alpha-pll.c | 24 +++
On Thu, Sep 28, 2017 at 10:25:33AM +0100, Lorenzo Pieralisi wrote:
> On Wed, Sep 27, 2017 at 02:55:02PM -0500, Bjorn Helgaas wrote:
> > On Wed, Sep 27, 2017 at 11:30:34AM +0100, Lorenzo Pieralisi wrote:
> > > On Wed, Sep 20, 2017 at 12:31:04PM +0100, Lorenzo Pieralisi wrote:
> > > > On Tue, Sep 19,
The current configuration does not fully configure PLL alpha mode
and values so this patch
1. Configures PLL_ALPHA_VAL_U for PLL which supports 40 bit alpha.
2. Adds alpha enable and alpha mode configuration support.
Signed-off-by: Abhishek Sahu
---
drivers/clk/qcom/clk-alpha-pll.c | 6 ++
Some of the Alpha PLL’s does not have VCO configuration so this
patch adds the flag and does not perform VCO operation if this
flag is set.
Signed-off-by: Abhishek Sahu
---
drivers/clk/qcom/clk-alpha-pll.c | 29 +
1 file changed, 17 insertions(+), 12 deletions(-)
dif
Some of the Alpha PLL’s (like Spark, Brammo PLL) do not have
CONFIG_CTL_U register. This patch adds the flag in properties
for PLL’s which have CONFIG_CTL_U register and checks the same
while doing PLL initial configuration.
Signed-off-by: Abhishek Sahu
---
drivers/clk/qcom/clk-alpha-pll.c | 12
The alpha value calculation function has been written for 40 bit
alpha which is not coming properly for 16 bit
1. Alpha value is being calculated on the basis of
ALPHA_BITWIDTH to make the computation easy for 40 bit alpha.
After calculating the 32 bit alpha, It is being converted to 40
b
This patch does minor code reorganization related with offset
variable assignment. The offset variable can be directly defined
which will help in subsequent patches to support different PLL
offset registers.
Signed-off-by: Abhishek Sahu
---
drivers/clk/qcom/clk-alpha-pll.c | 26 +
The PLL_MODE offset macro is redundant which is defined as zero.
The offset in PLL structure is the address of PLL_MODE register
itself so the PLL_MODE can be removed. It will help in subsequent
patches to support different PLL offset registers to reduce the
code diff.
Signed-off-by: Abhishek Sahu
Hi!
I've got the following report while fuzzing the kernel with syzkaller.
On commit dc972a67cc54585bd83ad811c4e9b6ab3dcd427e (4.14-rc2+).
There's no check on the connection_info->num_ports value when
iterating over ports.
usb 1-1: Handspring Visor / Palm OS: port 162, is for unknown use
usb 1-
On Thu, Sep 28, 2017 at 10:45:03AM -0700, Florian Fainelli wrote:
> On 09/28/2017 08:25 AM, Brandon Streiff wrote:
> > The Scratch/Misc register is a windowed interface that provides access
> > to the GPIO configuration. Provide a new method for configuration of
> > GPIO functions.
> >
> > Signed-
On Thu, Sep 28, 2017 at 03:37:04PM +0100, Dave Martin wrote:
> On Thu, Sep 28, 2017 at 03:14:47PM +0100, Will Deacon wrote:
> > On Thu, Sep 28, 2017 at 01:42:31PM +0100, Dave Martin wrote:
> > > On Thu, Sep 28, 2017 at 11:55:47AM +0100, Will Deacon wrote:
> > > > There are a couple of problems with
Remove the requirement that the TSC ADJUST value for socket 0 must
be zero. This is the case when there are multiple chassis are being
reset asynchronously with each other and socket 0 may not necessarily
be starting first.
Signed-off-by: Mike Travis
Reviewed-by: Dimitri Sivanich
Reviewed-by: R
Insert a check early in UV system startup that checks whether BIOS was
able to obtain satisfactory TSC Sync stability. If not, it usually
is caused by an error in the external TSC clock generation source.
In this case the best fallback is to use the builtin hardware RTC
as the kernel will not be a
Prior to the TSC ADJUST MSR being available, the method to set TSC's in
sync with each other naturally caused a small skew between cpu threads.
This was NOT a firmware bug at the time so introducing a whole avalanche
of alarming warning messages might cause unnecessary concern and customer
complain
From: Jens Wiklander
Added new ioctl to allow users register own buffers as a shared memory.
Signed-off-by: Jens Wiklander
Signed-off-by: Volodymyr Babchuk
---
drivers/tee/tee_core.c | 41 -
drivers/tee/tee_shm.c| 210 +--
include/lin
From: Jens Wiklander
Makes creation of shm pools more flexible by adding new more primitive
functions to allocate a shm pool. This makes it easier to add driver
specific shm pool management.
Signed-off-by: Jens Wiklander
Signed-off-by: Volodymyr Babchuk
---
drivers/tee/tee_private.h | 57 +-
From: Volodymyr Babchuk
These two function will be needed for shared memory registration in OP-TEE
Signed-off-by: Volodymyr Babchuk
---
include/linux/tee_drv.h | 20
1 file changed, 20 insertions(+)
diff --git a/include/linux/tee_drv.h b/include/linux/tee_drv.h
index 49d6
From: Volodymyr Babchuk
This patch series enables dynamic shared memory support in the TEE
subsystem as a whole and in OP-TEE in particular.
Global Platform TEE specification [1] allows client applications
to register part of own memory as a shared buffer between
application and TEE. This allows
From: Volodymyr Babchuk
There were changes in REE<->OP-TEE ABI recently.
Now ABI allows us to pass non-contiguous memory buffers as list of
pages to OP-TEE. This can be achieved by using new parameter attribute
OPTEE_MSG_ATTR_NONCONTIG.
OP-TEE also is able to use all non-secure RAM for shared bu
From: Volodymyr Babchuk
These functions will be used to pass information about shared
buffers to OP-TEE.
Signed-off-by: Volodymyr Babchuk
---
drivers/tee/optee/call.c | 48 +++
drivers/tee/optee/optee_private.h | 4
2 files changed, 52 inserti
From: Volodymyr Babchuk
In order to register a shared buffer in TEE, we need accessor
function that return list of pages for that buffer.
Signed-off-by: Volodymyr Babchuk
---
include/linux/tee_drv.h | 14 ++
1 file changed, 14 insertions(+)
diff --git a/include/linux/tee_drv.h b/i
From: Volodymyr Babchuk
This change adds ops for shm_(un)register functions in tee interface.
Client application can use these functions to (un)register an own shared
buffer in OP-TEE address space. This allows zero copy data sharing between
Normal and Secure Worlds.
Please note that while those
From: Volodymyr Babchuk
With latest changes to OP-TEE we can use any buffers as a shared memory.
Thus, it is possible for supplicant to provide part of own memory
when OP-TEE asks to allocate a shared buffer.
This patch adds support for such feature into RPC handling code.
Now when OP-TEE asks s
From: Volodymyr Babchuk
Now, when client applications can register own shared buffers in OP-TEE,
we need to extend ABI for parameter passing to/from OP-TEE.
So, if OP-TEE core detects that parameter belongs to registered shared
memory, it will use corresponding parameter attribute.
Signed-off-b
From: Volodymyr Babchuk
Those capabilities will be used in subsequent patches.
Signed-off-by: Volodymyr Babchuk
---
drivers/tee/optee/core.c | 1 +
drivers/tee/optee/optee_private.h | 3 +++
2 files changed, 4 insertions(+)
diff --git a/drivers/tee/optee/core.c b/drivers/tee/optee/co
From: Volodymyr Babchuk
This is simple pool that uses kernel page allocator. This pool can be
used in case OP-TEE supports dynamic shared memory.
Signed-off-by: Volodymyr Babchuk
---
drivers/tee/optee/Makefile | 1 +
drivers/tee/optee/shm_pool.c | 75
From: Volodymyr Babchuk
Previous patches added various features that are needed for dynamic SHM.
Dynamic SHM allows Normal World to share any buffers with OP-TEE.
While original design suggested to use pre-allocated region (usually of
1M to 2M of size), this new approach allows to use all non-sec
From: Volodymyr Babchuk
Now, when struct tee_shm is defined in public header,
we can inline small getter functions.
Signed-off-by: Volodymyr Babchuk
---
drivers/tee/tee_shm.c | 17 -
include/linux/tee_drv.h | 10 --
2 files changed, 8 insertions(+), 19 deletions(-)
d
From: Volodymyr Babchuk
We need to ensure that tee_context is present until last
shared buffer will be freed.
Signed-off-by: Volodymyr Babchuk
---
drivers/tee/tee_core.c| 40 +++-
drivers/tee/tee_private.h | 3 +++
drivers/tee/tee_shm.c | 7 +++
On 09/25/2017 11:35 AM, Jan Kara wrote:
> On Thu 21-09-17 10:00:25, Jens Axboe wrote:
>> On 09/21/2017 09:36 AM, Jens Axboe wrote:
But more importantly once we are not guaranteed that we only have
a single global wb_writeback_work per bdi_writeback we should just
embedd that into str
The UV BIOS goes to considerable effort to get the TSC synchronization
accurate across the entire system. Included in that are multiple chassis
that can have 32+ sockets. The architecture does support an external
high resolution clock to aid in maintaining this synchronization.
The resulting TS
If the TSC has already been determined to be unstable, then checking
TSC ADJUST values is a waste of time and generates unnecessary error
messages.
Signed-off-by: Mike Travis
Reviewed-by: Dimitri Sivanich
Reviewed-by: Russ Anderson
---
arch/x86/kernel/tsc_sync.c |8
1 file changed
On Wed, Sep 27, 2017 at 7:54 PM, Pintu Kumar wrote:
> On Wed, Sep 27, 2017 at 12:52 AM, Laura Abbott wrote:
>> On 09/26/2017 11:08 AM, Pintu Agarwal wrote:
>>>
>>> This is a test utility to verify ION buffer sharing in user space
>>> between 2 independent processes.
>>> It uses unix domain socket
On 09/28/2017 04:11 PM, Nikolay Borisov wrote:
>
>
> On 27.09.2017 23:13, Jens Axboe wrote:
>> We currently it it for find_or_create_page(), which means that it
>
> nit: Perhaps you wanted to write "We currently use it for find_..."
>
> otherwise:
>
> Reviewed-by: Nikolay Borisov
Yeah, fixed
On Tue, Sep 19, 2017 at 2:35 PM, Rob Herring wrote:
> On Tue, Sep 19, 2017 at 1:11 PM, Alan Tull wrote:
>> On Mon, Sep 18, 2017 at 4:11 PM, Rob Herring wrote:
>>> On Mon, Sep 11, 2017 at 12:58:57PM -0700, Guenter Roeck wrote:
On Mon, Sep 11, 2017 at 02:16:49PM -0500, Alan Tull wrote:
>
On Thu, Sep 28, 2017 at 11:41 PM, Pintu Kumar wrote:
> On Wed, Sep 27, 2017 at 7:54 PM, Pintu Kumar wrote:
>> On Wed, Sep 27, 2017 at 12:52 AM, Laura Abbott wrote:
>>> On 09/26/2017 11:08 AM, Pintu Agarwal wrote:
This is a test utility to verify ION buffer sharing in user space
be
On 19/09/17 06:22, Damien Riegel wrote:
Definitely. I also noticed an issue with the first very detection
because the micbias will only be set the first time the driver gets a
mechanical insertion interrupt. Following snippet seems to solve the
problem:
Does that mean that you do not need the "
This reverts commit e85ec74ace29 ("net: dsa: bcm_sf2: Defer port
enabling to calling port_enable") because this now makes an unbind
followed by a bind to fail connecting to the ingrated PHY.
What this patch missed is that we need the PHY to be enabled with
bcm_sf2_gphy_enable_set() before probing
- On Sep 28, 2017, at 12:16 PM, Nicholas Piggin npig...@gmail.com wrote:
> On Thu, 28 Sep 2017 15:29:50 + (UTC)
> Mathieu Desnoyers wrote:
>
>> - On Sep 28, 2017, at 11:01 AM, Nicholas Piggin npig...@gmail.com wrote:
>>
>> > On Thu, 28 Sep 2017 13:31:36 + (UTC)
>> > Mathieu Desn
This linksys dongle by default comes up in cdc_ether mode.
This patch allows r8152 to claim the device:
Bus 002 Device 002: ID 13b1:0041 Linksys
Signed-off-by: Grant Grundler
---
drivers/net/usb/cdc_ether.c | 10 ++
drivers/net/usb/r8152.c | 2 ++
2 files changed, 12 insertions(+
On Thu, Sep 28, 2017 at 12:51 AM, Joel Stanley wrote:
> Now with an upstream i2c bus driver, we can add the 14 i2c buses that
> exist in ASPEED G4 and G5 generation SoCs.
>
> It also adds aliases for the 14 built-in I2C busses to ensure userspace
> sees the numbering staring from zero and countin
On Thu, Sep 28, 2017 at 12:51 AM, Joel Stanley wrote:
> Enable the buses that are in use and the devices that are attached.
> Currently that includes the battery backed RTC, temperature measurement
> and EEPROM.
>
> Some of these buses are for hotplugged cards, such as PCIe cards.
> Others do not
On Thu, Sep 28, 2017 at 12:51 AM, Joel Stanley wrote:
> Enable the buses that are in use and the devices that are attached.
> Currently that is just the battery backed RTC.
>
> Some of these buses are for hotplugged cards, such as PCIe cards. Others
> do not yet have upstream drivers, so there are
On Thu, Sep 28, 2017 at 12:51 AM, Joel Stanley wrote:
> Enable the buses that are in use and the devices that are attached.
> Currently that includes temperature measurement and EEPROM.
>
> Signed-off-by: Joel Stanley
Reviewed-by: Brendan Higgins
Hi Robin
thanks.. i have no idea.. i see all the other patches from you :-)
my email has decided to play games with me i suppose :-)
On Thu, Sep 28, 2017 at 05:59:11PM +0100, Robin Murphy wrote:
> I hope our email server hasn't got blacklisted again... Said patch is
> the top of this very thread
Hi!
On Mon 2017-09-18 20:27:13, tristram...@microchip.com wrote:
> > > +/**
> > > + * Some counters do not need to be read too often because they are less
> > likely
> > > + * to increase much.
> > > + */
> >
> > What does comment mean? Are you caching statistics, and updating
> > different value
On 09/28/2017 11:40 AM, Pavel Machek wrote:
> Hi!
>
> On Mon 2017-09-18 20:27:13, tristram...@microchip.com wrote:
+/**
+ * Some counters do not need to be read too often because they are less
>>> likely
+ * to increase much.
+ */
>>>
>>> What does comment mean? Are you caching
Hi Boris,
On 09/28/2017 04:02 AM, Borislav Petkov wrote:
...
+bool sev_active(void)
+{
+ return sme_me_mask && sev_enabled;
What I'm still missing is the chicken bit. I.e., to be able to boot with
"mem_encrypt=smeonly" or so, which disables the SEV side but can still
allow SME. For when
The patch
ASoC: Intel: Skylake: Fix jack name format substitution
has been applied to the asoc tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and
The patch
ASoC: codecs: msm8916-wcd-analog: use btn0 released detection
has been applied to the asoc tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hour
On Tue, 26 Sep 2017, Maxime Ripard wrote:
> On Tue, Sep 26, 2017 at 12:17:17PM +, Quentin Schulz wrote:
> > As pinctrl and GPIO driver now supports AXP813, add a cell for it.
> >
> > Signed-off-by: Quentin Schulz
> > ---
> > drivers/mfd/axp20x.c | 3 +++
> > 1 file changed, 3 insertions(+)
On Thu, Sep 28, 2017 at 11:49 AM, Russell King - ARM Linux
wrote:
> On Tue, Sep 26, 2017 at 11:37:40PM +0200, Rafael J. Wysocki wrote:
>> On Tue, Sep 26, 2017 at 11:28 PM, Russell King - ARM Linux
>> wrote:
>> > On Tue, Sep 26, 2017 at 10:47:10PM +0200, Rafael J. Wysocki wrote:
>> >> From: Rafael
On Thu, Sep 28, 2017 at 12:01:21PM -0500, Josh Poimboeuf wrote:
> On Thu, Sep 28, 2017 at 11:44:22AM -0500, Josh Poimboeuf wrote:
> > Agreed, changing it to "unsigned long" and "rsp" will probably fix it.
> >
> > I had made it "unsigned int" because of a clang issue with "unsigned
> > long":
> >
Mark,
I think Srinivas' Ack was only for the snippet quoted below, not for the
original patch of this thread. I don't know if you still want to take
that patch without his Ack or not.
On Thu, Sep 28, 2017 at 11:18:26AM -0700, Srinivas Kandagatla wrote:
>
>
> On 19/09/17 06:22, Damien Riegel wr
Hi Eugeniy,
FYI, the error/warning still remains.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 9cd6681cb1169e815c41af0265165dd1b872f228
commit: e0be864f14240cb1bd92247a672796239d6ef2fa ARC: reset: introduce HSDKv1
reset driver
date: 2 months ago
co
When an incoming module is considered for livepatching by
klp_module_coming(), it iterates over multiple patches and multiple
kernel objects in this order:
list_for_each_entry(patch, &klp_patches, list) {
klp_for_each_object(patch, obj) {
which means that if one of the ker
On Wed, Sep 27, 2017 at 10:49 AM, Will Deacon wrote:
> This patch consistently uses these macros in the arch
> code, as well as explicitly namespacing pointers to page table entries
> from the entries themselves by using adopting a 'p' suffix for the former
> (as is sometimes used elsewhere in the
On Wed, Sep 27, 2017 at 10:43 PM, Dmitry Torokhov
wrote:
>>One thing I noticed is that input_ff_create_memless() also does not
>>use high-resolution timer hence it also does not have the stop-time
>>precision that I'm looking for.
>
> I'll take patches for high resolution timers in ff memless, the
On Mon, 25 Sep 2017, Enric Balletbo i Serra wrote:
> The cros_ec_dev serves multiple purposes, one is register dinamically the
> MFD subdevices by checking the features available in a specific ChromeOS
> Embedded Controller, hence there are different calls to mfd_add_devices.
> The first time we u
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