The gather filter is a feature present on Tegra124 and newer where the
hardware prevents GATHERed command buffers from executing commands
normally reserved for the CDMA pushbuffer which is maintained by the
kernel driver.
This commit enables the gather filter on all supporting hardware.
Signed-of
This function actually doesn't sleep in the version that was merged.
Signed-off-by: Mikko Perttunen
Reviewed-by: Dmitry Osipenko
---
drivers/gpu/host1x/channel.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/host1x/channel.c b/drivers/gpu/host1x/channel.c
ind
On Thu, Sep 28, 2017 at 03:48:36PM +0300, Dan Carpenter wrote:
> On Wed, Sep 27, 2017 at 12:57:28PM -0500, Ioana Radulescu wrote:
> > diff --git a/drivers/staging/fsl-mc/bus/dpio/dpio-service.c
> > b/drivers/staging/fsl-mc/bus/dpio/dpio-service.c
> > index f809682..26922fc 100644
> > --- a/drivers
On Wed, Sep 27, 2017 at 12:36:52PM -0700, Eric Anholt wrote:
> We want the adjusted_mode->clock to be the actual clock we're
> expecting to program, so that consumers see the right values for clock
> and vrefresh.
>
> Signed-off-by: Eric Anholt
> ---
> drivers/gpu/drm/vc4/vc4_dsi.c | 12 ++--
On 04/09/2017 at 22:37:27 -0700, sathyanarayanan.kuppusw...@linux.intel.com
wrote:
> From: Kuppuswamy Sathyanarayanan
>
> Removed redundant IPC helper functions and refactored the driver to use
> generic IPC device driver APIs.
>
> This patch also cleans-up SCU IPC user drivers to use APIs prov
On Thu, Sep 28, 2017 at 07:56:59PM +0800, Wei Hu (Xavier) wrote:
>
>
> On 2017/9/28 17:13, Leon Romanovsky wrote:
> > On Thu, Sep 28, 2017 at 12:57:28PM +0800, Wei Hu (Xavier) wrote:
> > > From: Lijun Ou
> > >
> > > When lp_qp_work is NULL, it should be returned ENOMEM. This patch
> > > mainly fix
On Thu, Sep 28, 2017 at 07:56:40PM +0800, Wei Hu (Xavier) wrote:
>
>
> On 2017/9/28 17:02, Leon Romanovsky wrote:
> > On Thu, Sep 28, 2017 at 12:57:33PM +0800, Wei Hu (Xavier) wrote:
> > > From: Lijun Ou
> > >
> > > This patch mainly deletes some unused struct members for
> > > hns_roce_ib_create_
On 09/27/2017 04:26 PM, Arnd Bergmann wrote:
> On Tue, Sep 26, 2017 at 9:49 AM, Andrey Ryabinin
> wrote:
>>
>>
>> On 09/26/2017 09:47 AM, Arnd Bergmann wrote:
>>> On Mon, Sep 25, 2017 at 11:32 PM, Arnd Bergmann wrote:
>
>>> + ret = __builtin_strlen(q);
>>
>>
>> I think this is not correct.
Since USB connector bindings are available we can describe it on TM2(e).
Signed-off-by: Andrzej Hajda
---
.../boot/dts/exynos/exynos5433-tm2-common.dtsi | 47 --
1 file changed, 44 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2-commo
> -Original Message-
> From: Dan Carpenter [mailto:dan.carpen...@oracle.com]
> Sent: Thursday, September 28, 2017 3:49 PM
> To: Ruxandra Ioana Radulescu
> Cc: gre...@linuxfoundation.org; de...@driverdev.osuosl.org;
> a...@arndb.de; stuyo...@gmail.com; Roy Pledge ;
> linux-kernel@vger.kerne
These bindings allows to describe most known standard USB connectors
and it should be possible to extend it if necessary.
USB connectors, beside USB can be used to route other protocols,
for example UART, Audio, MHL. In such case every device passing data
through the connector should have appropria
Since extcon property is not allowed in DT, extcon subsystem requires
another way to get extcon device. Lets try the simplest approach - get
edev by of_node.
Signed-off-by: Andrzej Hajda
---
drivers/extcon/extcon.c | 44 ++--
include/linux/extcon.h | 6 +
Hi,
This patchset introduces USB connector bindings, together with working example.
I have added comments in relevant patches to describe possible issues.
Regards
Andrzej
Andrzej Hajda (3):
dt-bindings: add bindings for USB physical connector
arm64: dts: exynos: add micro-USB connector node
From: Maciej Purski
Currently MHL chip must be turned on permanently to detect MHL cable. It
duplicates micro-USB controller's (MUIC) functionality and consumes
unnecessary power. Lets use extcon attached to MUIC to enable MHL chip
only if it detects MHL cable.
Signed-off-by: Maciej Purski
Sign
Hello Eric,
we have observed the following OOPS with linux-4.9.33 on several
occasions when starting a Docker container:
> [ 531.801537] Oops: [#1] SMP
> [ 531.801565] Modules linked in: xt_nat veth ipt_MASQUERADE
> nf_nat_masquerade_ipv4 xfrm_user xfrm_algo xt_addrtype br_netfilter bridg
It will be best if we can support TSC sync capability in x86, but seems
is not easy.
Sure, your hardware achieving sync would be best, but even if it does
not, we can still use TSC. Using notsc simple because you fail to sync
TSCs is quite crazy.
The thing is, we need to support unsync'ed TSC i
Many users of the mailbox controllers depend on the shared memory
between the two end points to exchange the main data while using simple
doorbell mechanism to alert the end points of the presence of a message.
This patch defines device tree bindings to represent such shared memory
in a generic wa
This patch adds devicetree binding for System Control and Management
Interface (SCMI) Message Protocol used between the Application Cores(AP)
and the System Control Processor(SCP). The MHU peripheral provides a
mechanism for inter-processor communication between SCP's M3 processor
and AP.
SCP offe
In order to implement fast CPU DVFS switching, we need to perform all
DVFS operations atomically. Since SCMI transfer already provide option
to choose between pooling vs interrupt driven(default), we can opt for
polling based transfers for set,get performance domain operations.
This patch adds opt
The SCMI is intended to allow OSPM to manage various functions that are
provided by the hardware platform it is running on, including power and
performance functions. SCMI provides two levels of abstraction, protocols
and transports. Protocols define individual groups of system control and
manageme
On some ARM based systems, a separate Cortex-M based System Control
Processor(SCP) provides the overall power, clock, reset and system
control including CPU DVFS. SCMI Message Protocol is used to
communicate with the SCP.
This patch adds a cpufreq driver for such systems using SCMI interface
to dr
The cpufreq core provides option for drivers to implement fast_switch
callback which is invoked for frequency switching from interrupt context.
This patch adds support for fast_switch callback in SCMI cpufreq driver
by making use of polling based SCMI transfer. It also sets the flag
fast_switch_po
Create a driver to add support for SoC sensors exported by the System
Control Processor (SCP) via the System Control and Management Interface
(SCMI). The supported sensor types is one of voltage, temperature,
current, and power.
The sensor labels and values provided by the SCP are exported via the
On some ARM based systems, a separate Cortex-M based System Control
Processor(SCP) provides the overall power, clock, reset and system
control. System Control and Management Interface(SCMI) Message Protocol
is defined for the communication between the Application Cores(AP)
and the SCP.
This patch
It's useful to know the maximum types of sensor supported by hwmon
framework. It can be used to allocate some data structures when sorting
the monitors based on their type.
This will be used by scmi hwmon support.
Cc: Guenter Roeck
Cc: linux-hw...@vger.kernel.org
Signed-off-by: Sudeep Holla
---
This patch hooks up the support for device power domain provided by
SCMI using the Linux generic power domain infrastructure.
Cc: Kevin Hilman
Cc: Ulf Hansson
Signed-off-by: Sudeep Holla
---
drivers/firmware/Kconfig | 13 +++
drivers/firmware/arm_scmi/Makefile | 1
This patch adds ARM MHU specific mailbox interface for SCMI.
Cc: Arnd Bergmann
Signed-off-by: Sudeep Holla
---
drivers/firmware/arm_scmi/Makefile | 1 +
drivers/firmware/arm_scmi/arm_mhu_if.c | 106 +
drivers/firmware/arm_scmi/driver.c | 3 +
drivers/
In order to maintain the channel information per protocol, we need
some sort of list or hashtable to hold all this information. IDR
provides sparse array mapping of small integer ID numbers onto arbitrary
pointers. In this case the arbitrary pointers can be pointers to the
channel information.
Thi
In order to support per-protocol channels if available, we need to
factor out all the mailbox channel information(Tx/Rx payload and
channel handle) out of the main SCMI instance information structure.
This patch refactors the existing channel information into a separate
chan_info structure.
Cc: A
Now that we have basic support for all the protocols in the
specification, let's probe them individually and initialise them.
Cc: Arnd Bergmann
Signed-off-by: Sudeep Holla
---
drivers/firmware/arm_scmi/common.h | 5 +++
drivers/firmware/arm_scmi/driver.c | 82 ++
Some of the mailbox controller expects controller specific data in order
to implement simple doorbell mechanism as expected by SCMI specification.
This patch creates a shim layer to abstract the mailbox interface so
that it can support any mailbox controller. It also provides default
implementatio
It would be useful to have options to perform some SCMI transfers
atomically by polling for the completion flag instead of interrupt
driven. The SCMI specification has option to disable the interrupt and
poll for the completion flag in the shared memory.
This patch adds support for polling based S
The power protocol is intended for management of power states of various
power domains. The power domain management protocol provides commands to
describe the protocol version, discover the implementation specific
attributes, set and get the power state of a domain.
This patch adds support for the
The clock protocol is intended for management of clocks. It is used to
enable or disable clocks, and to set and get the clock rates. This
protocol provides commands to describe the protocol version, discover
various implementation specific attributes, describe a clock, enable
and disable a clock an
The sensor protocol provides functions to manage platform sensors, and
provides the commands to describe the protocol version and the various
attribute flags. It also provides commands to discover various sensors
implemented and managed by the platform, read any sensor synchronously
or asynchronous
On Thu, Sep 28, 2017 at 01:07:48PM +, Ruxandra Ioana Radulescu wrote:
> > -Original Message-
> > From: Dan Carpenter [mailto:dan.carpen...@oracle.com]
> > Sent: Thursday, September 28, 2017 3:49 PM
> > To: Ruxandra Ioana Radulescu
> > Cc: gre...@linuxfoundation.org; de...@driverdev.osu
The performance protocol is intended for the performance management of
group(s) of device(s) that run in the same performance domain. It
includes even the CPUs. A performance domain is defined by a set of
devices that always have to run at the same performance level.
For example, a set of CPUs that
The base protocol describes the properties of the implementation and
provide generic error management. The base protocol provides commands
to describe protocol version, discover implementation specific
attributes and vendor/sub-vendor identification, list of protocols
implemented and the various ag
This patch adds ARM MHU specific mailbox client bindings to support
SCMI. Since SCMI specification just requires doorbell mechanism from
mailbox controllers, we add mailbox data to specify the doorbell bit(s).
Cc: Rob Herring
Cc: Mark Rutland
Signed-off-by: Sudeep Holla
---
.../devicetree/bind
On Thu, Sep 28, 2017 at 10:29:55AM +0200, Ingo Molnar wrote:
>
> * Kirill A. Shutemov wrote:
>
> > For boot-time switching between paging modes, we need to be able to
> > change STACK_TOP_MAX at runtime.
> >
> > The change is trivial and it doesn't affect kernel image size.
> >
> > Signed-off-
Hi all,
Let me begin admitting that we are introducing yet another protocol to
achieve same things as many existing protocols like ARM SCPI, TI SCI,
QCOM RPM, Nvidia Tegra BPMP, and so on.
All I can say is that this new ARM System Control and Management
Interface(SCMI) is more flexible and easily
On Wed, Sep 27, 2017 at 02:13:47PM -0600, Jens Axboe wrote:
> We've had some issues with writeback in presence of memory reclaim
> at Facebook, and this patch set attempts to fix it up. The real
> functional change for that issue is patch 10. The rest are cleanups,
> as well as the removal of doing
On 09/28/2017 10:13 AM, Vinod Koul wrote:
> On Fri, Aug 25, 2017 at 04:31:04PM +0200, Pierre-Yves MORDRET wrote:
>> +static int stm32_mdma_probe(struct platform_device *pdev)
>> +{
>
> [snip]
>
>> +dmadev = devm_kzalloc(&pdev->dev, sizeof(*dmadev) + sizeof(u32) * count,
>> +
From: Colin Ian King
The pointer bmc is being initialized and this initialized value is
never being read, so this is assignment redundant and can be removed.
Cleans up clang warning:
warning: Value stored to 'bmc' during its initialization is never read
Signed-off-by: Colin Ian King
---
drive
> -Original Message-
> From: gre...@linuxfoundation.org [mailto:gre...@linuxfoundation.org]
> Sent: Thursday, September 28, 2017 4:18 PM
> To: Ruxandra Ioana Radulescu
> Cc: Dan Carpenter ;
> de...@driverdev.osuosl.org; a...@arndb.de; stuyo...@gmail.com; Roy
> Pledge ; linux-kernel@vger.ke
On Thu, Sep 28, 2017 at 10:31:55AM +0200, Ingo Molnar wrote:
>
> * Kirill A. Shutemov wrote:
>
> > We need to adjust virtual address space to support switching between
> > paging modes.
> >
> > The adjustment happens in __startup_64().
>
> > +#ifdef CONFIG_X86_5LEVEL
> > + if (__read_cr4() &
On Thu, 2017-09-28 at 15:50 +0300, Mikko Perttunen wrote:
> The host1x driver prints out "disassembly" dumps of the command FIFO
> and gather contents on submission timeouts. However, the output has
> been quite difficult to read with unnecessary newlines and occasional
> missing parentheses.
I th
- On Sep 27, 2017, at 9:04 AM, Nicholas Piggin npig...@gmail.com wrote:
> On Tue, 26 Sep 2017 20:43:28 + (UTC)
> Mathieu Desnoyers wrote:
>
>> - On Sep 26, 2017, at 1:51 PM, Mathieu Desnoyers
>> mathieu.desnoy...@efficios.com wrote:
>>
>> > Provide a new command allowing processes t
Several callers to epapr_hypercall() pass an uninitialized stack
allocated array for the input arguments, presumably because they
have no input arguments. However this can produce errors like
this one
arch/powerpc/include/asm/epapr_hcalls.h:470:42: error: 'in' may be used
uninitialized in this f
Currently sprintf is used, and while paths should never exceed
the size of the buffer it is theoretically possible since
dirent.d_name is 256 bytes. As a result this trips
-Wformat-overflow, and since the test is built with -Wall -Werror
the causes the build to fail. Switch to using snprintf and sk
On 09/28/2017 05:55 AM, Alexandre Belloni wrote:
On 04/09/2017 at 22:37:27 -0700, sathyanarayanan.kuppusw...@linux.intel.com
wrote:
From: Kuppuswamy Sathyanarayanan
Removed redundant IPC helper functions and refactored the driver to use
generic IPC device driver APIs.
This patch also cleans-
Modern kernel callback systems pass the structure associated with a
given callback to the callback function. The timer callback remains one
of the legacy cases where an arbitrary unsigned long argument continues
to be passed as the callback argument. This has several problems:
- This bloats the ti
* Kirill A. Shutemov wrote:
> On Thu, Sep 28, 2017 at 10:31:55AM +0200, Ingo Molnar wrote:
> >
> > * Kirill A. Shutemov wrote:
> >
> > > We need to adjust virtual address space to support switching between
> > > paging modes.
> > >
> > > The adjustment happens in __startup_64().
> >
> > > +
On 28-09-2017 02:59, Casey Leedom wrote:
> Hey Raj,
>
> Let us know if you need help in gathering more debugging information. For
> the time being we've decided to ERRATA the use of the Intel I/O MMU with
> IPsec till we Root Cause the issue. But this is still at the top of Harsh's
> bug list
On 09/28/2017 03:19 PM, John Stoffel wrote:
> On Wed, Sep 27, 2017 at 02:13:47PM -0600, Jens Axboe wrote:
>> We've had some issues with writeback in presence of memory reclaim
>> at Facebook, and this patch set attempts to fix it up. The real
>> functional change for that issue is patch 10. The res
On Thu, Sep 28, 2017 at 11:31:23AM +0100, Robin Murphy wrote:
> When devices with different DMA masks are using the same domain, or for
> PCI devices where we usually try a speculative 32-bit allocation first,
> there is a fair possibility that the top PFN of the rcache stack at any
> given time ma
From: Colin Ian King
The functions alloc_pasid and free_pasid are local to the
source and do not need to be in global scope, so make them static.
Cleans up sparse warnings:
warning: symbol 'alloc_pasid' was not declared. Should it be static?
warning: symbol 'free_pasid' was not declared. Should
On Thu, 2017-09-28 at 08:22 -0400, Don Dutile wrote:
>
> After reading Alex's response, I now understand Dave's question
> better and why the patch won't work in general.
UIO doesn't work "in general". It requires a very *specific* userspace
driver for the hardware in question, which needs to kno
Replace instances of drm_framebuffer_reference/unreference() with
*_get/put() suffixes and drm_dev_unref with *_put() suffix
because get/put is shorter and consistent with the
kernel use of *_get/put suffixes .
Signed-off-by: Harsha Sharma
---
drivers/gpu/drm/i915/i915_pci.c|
On Wed, Sep 27, 2017 at 01:31:45AM +, Byungchul Park wrote:
>
> Sometimes, it gives a wrong scenario. For example:
>
> lock target
> lock source
> lock parent
> lock target
> lock parent of parent
> lock paren
On Thu, Sep 28, 2017 at 12:57:27PM +0800, Wei Hu (Xavier) wrote:
> From: Lijun Ou
>
> It mainly places the lines for checking send doorbell status
> into a special functions. As a result, we can directly call it in
> check_qp_db_process_status function and keep consistent indenting
> style.
>
> It
On Thu, Sep 28, 2017 at 08:39:31AM -0400, Mimi Zohar wrote:
> Writing extended attributes requires exclusively taking the i_rwsem
> lock. To synchronize the file hash calculation and writing the file
> hash as security.ima xattr, IMA-appraisal takes the i_rwsem lock
> exclusively before calculatin
On Wed, Sep 27, 2017 at 04:31:06PM -0700, Andrew Morton wrote:
> On Wed, 20 Sep 2017 16:06:34 -0700 Roman Gushchin wrote:
>
> > Right now there is no convenient way to check if a process is being
> > coredumped at the moment.
> >
> > It might be necessary to recognize such state to prevent killi
On Thu, Sep 28, 2017 at 08:03:26AM +0200, Juergen Gross wrote:
> On 27/09/17 23:08, Josh Poimboeuf wrote:
> > On Tue, Aug 08, 2017 at 01:09:08PM -0700, Andy Lutomirski wrote:
> >> On Tue, Aug 8, 2017 at 12:13 PM, Josh Poimboeuf
> >> wrote:
> >>> On Tue, Aug 08, 2017 at 12:03:51PM -0700, Linus Tor
On 09/28/2017 03:33 AM, Mika Westerberg wrote:
> On Fri, Jul 21, 2017 at 11:49:00AM -0500, Grygorii Strashko wrote:
>> Now IRQ mappings are always created for all (allowed) GPIOs in gpiochip in
>> gpiochip_irqchip_add_key() which goes against the idea of SPARSE_IRQ and,
>> as result, leads to:
>>
On 28.09.2017 12:29, Vinod Koul wrote:
>> +default:
>> +return -EINVAL;
>> +}
>> +
>> +ahb_seq = burst << TEGRA_AHBDMA_CHANNEL_AHB_BURST_SHIFT;
>> +ahb_seq |= TEGRA_AHBDMA_CHANNEL_ADDR_WRAP;
>> +ahb_seq |= TEGRA_AHBDMA_CHANNEL_INTR_ENB;
>> +
>> +writel_relaxed(a
Any modular driver using cluster-affine PPIs needs to be able to call
irq_get_percpu_devid_partition so that it can enable the IRQ on the
correct subset of CPUs.
This patch exports the symbol so that it can be called from within a
module.
Acked-by: Marc Zyngier
Acked-by: Thomas Gleixner
Signed-
Hi all,
This is the seventh posting of the patches previously posted here:
rfcv1:
http://lists.infradead.org/pipermail/linux-arm-kernel/2017-January/476450.html
rfcv2:
http://lists.infradead.org/pipermail/linux-arm-kernel/2017-January/479387.html
v1:
http://lists.infradead.org/piperma
The ARM SPE architecture permits an implementation to ignore a sample
if the sample is due to be taken whilst another sample is already being
produced. In this case, it is desirable to report the collision to
userspace, as they may want to lower the sample period.
This patch adds a PERF_AUX_FLAG_C
Perf PMU drivers using AUX buffers cannot be built as modules unless
the AUX helpers are exported.
This patch exports perf_aux_output_{begin,end,skip} and perf_get_aux to
modules.
Cc: Peter Zijlstra
Signed-off-by: Will Deacon
---
kernel/events/ring_buffer.c | 4
1 file changed, 4 insertio
For some dpio functions, a cpu id parameter value of -1 is
valid and means "any". But when trying to validate this param
value against an upper limit, in this case num_possible_cpus(),
we risk obtaining the wrong result due to an implicit cast.
Avoid an incorrect check result by explicitly compari
The ARMv8.2 architecture introduces the optional Statistical Profiling
Extension (SPE).
SPE can be used to profile a population of operations in the CPU pipeline
after instruction decode. These are either architected instructions (i.e.
a dynamic instruction trace) or CPU-specific uops and the choi
On Thu, Sep 28, 2017 at 07:14:42PM +0530, Harsha Sharma wrote:
> Replace instances of drm_framebuffer_reference/unreference() with
> *_get/put() suffixes and drm_dev_unref with *_put() suffix
> because get/put is shorter and consistent with the
> kernel use of *_get/put suffixes .
Since this is do
When booting at EL2, ensure that we permit the EL1 host to sample
physical addresses and physical counter values using SPE.
Signed-off-by: Will Deacon
---
arch/arm64/kernel/head.S | 17 -
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/kernel/head.S b/ar
SPE is part of the v8.2 architecture, so move its system register and
field definitions into sysreg.h and the new PSB barrier into barrier.h
Finally, move KVM over to using the generic definitions so that it
doesn't have to open-code its own versions.
Signed-off-by: Will Deacon
---
arch/arm64/i
On 9/28/2017 2:01 AM, Ingo Molnar wrote:
* Baoquan He wrote:
Hi Ingo,
On 09/28/17 at 09:56am, Ingo Molnar wrote:
diff --git a/arch/x86/mm/kaslr.c b/arch/x86/mm/kaslr.c
index af599167fe3c..4d68c08df82d 100644
--- a/arch/x86/mm/kaslr.c
+++ b/arch/x86/mm/kaslr.c
@@ -27,6 +27,7 @@
#include
This patch documents the devicetree binding in use for ARM SPE.
Cc: Mark Rutland
Cc: Rob Herring
Signed-off-by: Will Deacon
---
Documentation/devicetree/bindings/arm/spe-pmu.txt | 20
1 file changed, 20 insertions(+)
create mode 100644 Documentation/devicetree/bindings/ar
The intel-iommu DMA ops fail to correctly handle scatterlists where
sg->offset is greater than PAGE_SIZE - the IOVA allocation is computed
appropriately based on the page-aligned portion of the offset, but the
mapping is set up relative to sg->page, which means it fails to actually
cover the whole
On Thu, Sep 28, 2017 at 01:42:31PM +0100, Dave Martin wrote:
> On Thu, Sep 28, 2017 at 11:55:47AM +0100, Will Deacon wrote:
> > There are a couple of problems with the decodecode script and arm64:
> >
> > 1. AArch64 objdump refuses to disassemble .4byte directives as instructions,
> >insisting
On Thu, Sep 28, 2017 at 10:42:39AM +, icen...@aosc.io wrote:
> > On Sat, Sep 23, 2017 at 12:15:29AM +, Icenowy Zheng wrote:
> > > The A64 PLL_CPU clock has the same instability if some factor changed
> > > without the PLL gated like other SoCs with sun6i-style CCU, e.g. A33,
> > > H3.
> > >
On 09/28/2017 04:56 AM, Thierry Reding wrote:
> From: Thierry Reding
>
> Hi Linus,
>
> here's the latest series of patches that implement the tighter IRQ chip
> integration as well as the banked GPIO infrastructure that we had
> discussed a couple of weeks/months back.
>
> The first couple of
On 09/28/2017 04:56 AM, Thierry Reding wrote:
> From: Thierry Reding
>
> Currently GPIO drivers are required to a GPIO chip and the corresponding
> IRQ chip separately, which can result in a lot of boilerplate. Introduce
> a new struct gpio_irq_chip, embedded in a struct gpio_chip, that drivers
在 2017-09-28 22:20，Maxime Ripard 写道：
On Thu, Sep 28, 2017 at 10:42:39AM +, icen...@aosc.io wrote:
> On Sat, Sep 23, 2017 at 12:15:29AM +, Icenowy Zheng wrote:
> > The A64 PLL_CPU clock has the same instability if some factor changed
> > without the PLL gated like other SoCs with sun6i-st
On Thu, Sep 28, 2017 at 03:38:38PM +0200, Ingo Molnar wrote:
>
> * Kirill A. Shutemov wrote:
>
> > On Thu, Sep 28, 2017 at 10:31:55AM +0200, Ingo Molnar wrote:
> > >
> > > * Kirill A. Shutemov wrote:
> > >
> > > > We need to adjust virtual address space to support switching between
> > > > pa
Hi all,
It may trigger hungtask in ENOSPC case with fsstress, please ignore this patch
before an update.
Thanks,
On 2017/9/26 19:22, Chao Yu wrote:
> Previously, there is no restrict order among free nid allocators, if
> there are no free nids being cached in memory, previous allocator will
> tr
On Thu, Sep 28, 2017 at 6:09 AM, Andrey Ryabinin
wrote:
> On 09/27/2017 04:26 PM, Arnd Bergmann wrote:
>> On Tue, Sep 26, 2017 at 9:49 AM, Andrey Ryabinin
>> wrote:
>> --- a/include/linux/string.h
>> +++ b/include/linux/string.h
>> @@ -227,7 +227,7 @@ static inline const char *kbasename(const ch
On Thu, Sep 28, 2017 at 02:24:18PM +, icen...@aosc.io wrote:
> 在 2017-09-28 22:20，Maxime Ripard 写道：
> > On Thu, Sep 28, 2017 at 10:42:39AM +, icen...@aosc.io wrote:
> > > > On Sat, Sep 23, 2017 at 12:15:29AM +, Icenowy Zheng wrote:
> > > > > The A64 PLL_CPU clock has the same instabilit
On Thu, Sep 28, 2017 at 09:02:12AM -0500, Grygorii Strashko wrote:
>
>
> On 09/28/2017 03:33 AM, Mika Westerberg wrote:
> > On Fri, Jul 21, 2017 at 11:49:00AM -0500, Grygorii Strashko wrote:
> >> Now IRQ mappings are always created for all (allowed) GPIOs in gpiochip in
> >> gpiochip_irqchip_add_
Currently if an uncorrectable error is reported by an EP the AER
driver walks over all the devices connected to the upstream port
bus and in turns call the report_error_detected() callback.
If any of the devices connected to the bus does not implement
dev->driver->err_handler->error_detected() do_r
Add temporary fix to HSDK platform code to setup CPU frequency
to 1GHz on early boot.
We can remove this fix when smart hsdk pll driver will be
introduced, see discussion:
https://www.mail-archive.com/linux-snps-arc@lists.infradead.org/msg02689.html
Signed-off-by: Eugeniy Paltsev
---
arch/arc/pl
On Thu, 2017-09-28 at 06:54 -0700, Matthew Wilcox wrote:
> On Thu, Sep 28, 2017 at 08:39:31AM -0400, Mimi Zohar wrote:
> > Writing extended attributes requires exclusively taking the i_rwsem
> > lock. To synchronize the file hash calculation and writing the file
> > hash as security.ima xattr, IMA
On 28.09.2017 17:06, Dmitry Osipenko wrote:
> On 28.09.2017 12:29, Vinod Koul wrote:
>>> + default:
>>> + return -EINVAL;
>>> + }
>>> +
>>> + ahb_seq = burst << TEGRA_AHBDMA_CHANNEL_AHB_BURST_SHIFT;
>>> + ahb_seq |= TEGRA_AHBDMA_CHANNEL_ADDR_WRAP;
>>> + ahb_seq |= TEGRA_AHBDMA_
Commit-ID: 686fef928bba6be13cabe639f154af7d72b63120
Gitweb: https://git.kernel.org/tip/686fef928bba6be13cabe639f154af7d72b63120
Author: Kees Cook
AuthorDate: Thu, 28 Sep 2017 06:38:17 -0700
Committer: Thomas Gleixner
CommitDate: Thu, 28 Sep 2017 16:30:36 +0200
timer: Prepare to change
On Thu, Sep 28, 2017 at 03:14:47PM +0100, Will Deacon wrote:
> On Thu, Sep 28, 2017 at 01:42:31PM +0100, Dave Martin wrote:
> > On Thu, Sep 28, 2017 at 11:55:47AM +0100, Will Deacon wrote:
> > > There are a couple of problems with the decodecode script and arm64:
> > >
> > > 1. AArch64 objdump ref
More and more SoCs use the pxa3xx_nand driver for their controller but
the list of them was not updated. This patch add the last SoCs using the
driver.
Signed-off-by: Gregory CLEMENT
---
drivers/mtd/nand/Kconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/na
On 09/28/2017 01:27 PM, Mark Rutland wrote:
Hi,
While fuzzing v4.14-rc2 with Syzkaller, I found it was possible to trigger the
warning at mm/percpu.c:1361, on both arm64 and x86_64. This appears to require
increasing RLIMIT_MEMLOCK, so to the best of my knowledge this cannot be
triggered by an u
On Wed, Sep 27, 2017 at 04:35:00PM -0500, Dennis Zhou wrote:
> The iterator functions pcpu_next_md_free_region and
> pcpu_next_fit_region use the block offset to determine if they have
> checked the area in the prior iteration. However, this causes an issue
> when the block offset is greater than s
pblk_line_gc_list seems to had a bug since the introduction of pblk in
getting GC list for a line. In b20ba1bc7 while redesigning GC
algorithm it was not fixed correctly. The problem is that even if
valid sector count (vsc) is less that mid_thrs (threshold for GC mid
list) it would always satisfy
On Thu, Sep 28, 2017 at 04:37:46PM +0200, Daniel Borkmann wrote:
> On 09/28/2017 01:27 PM, Mark Rutland wrote:
> >Hi,
> >
> >While fuzzing v4.14-rc2 with Syzkaller, I found it was possible to trigger
> >the
> >warning at mm/percpu.c:1361, on both arm64 and x86_64. This appears to
> >require
> >in
Hello,
On Thu, Sep 28, 2017 at 12:27:28PM +0100, Mark Rutland wrote:
> diff --git a/mm/percpu.c b/mm/percpu.c
> index 59d44d6..f731c45 100644
> --- a/mm/percpu.c
> +++ b/mm/percpu.c
> @@ -1355,8 +1355,13 @@ static void __percpu *pcpu_alloc(size_t size, size_t
> align, bool reserved,
> bit
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