jhash2 used for calculating checksum
for in memory pages, for detect fact of
changes in page.
xxhash much faster then jhash2, some tests:
x86_64 host:
CPU: Intel(R) Core(TM) i5-7200U CPU @ 2.50GHz
PAGE_SIZE: 4096, loop count: 1048576
jhash2: 0xacbc7a5btime: 1907 ms, th
ksm use jhash2 for hashing pages,
in 4.14 xxhash has been merged to mainline kernel.
xxhash much faster then jhash2 on big inputs (32 byte+)
xxhash has 2 versions, one with 32-bit hash and
one with 64-bit hash.
64-bit version works faster then 32-bit on 64-bit arch.
So lets get better from two
xxh32() - fast on both 32/64-bit platforms
xxh64() - fast only on 64-bit platform
Create xxhash() which will pickup fastest version
on compile time.
Add type xxhash_t to map correct hash size.
As result depends on cpu word size,
the main proporse of that - in memory hashing.
Signed-off-by: Timo
From: Randy Dunlap
When I2C is enabled, the comment string for "Altera FPGA firmware
download module" adds no new information or value. It is only useful
and interesting when I2C is not enabled. In that case, have it
show that I2C is needed for that module.
Signed-off-by: Randy Dunlap
Cc: Igo
On Tue, Sep 19, 2017 at 12:23:32AM -0700, Ismail Kose wrote:
> From: "Ismail H. Kose"
>
> This patch provides an iio device driver for DS4422/DS4424 chips that support
> two/four channel 7-bit Sink/Source Current DAC.
>
> Signed-off-by: Ismail Kose
> ---
> v5:
> * Removed unused variable
This is odd to call 'pci_disable_device()' in an error path before a
coresponding successful 'pci_enable_device()'.
Return directly instead.
Fixes: 77e0be12100a ("V4L/DVB (4176): Bug-fix: Fix memory overflow")
Signed-off-by: Christophe JAILLET
---
drivers/media/pci/bt8xx/bt878.c | 3 +--
1 file
On Tue, Sep 19, 2017 at 05:26:54PM +0800, Zhiqiang Hou wrote:
> From: Hou Zhiqiang
>
> The ls1012a implement only 1 msi controller, and it is the same as
> ls1043a.
>
> Signed-off-by: Hou Zhiqiang
> ---
> .../devicetree/bindings/interrupt-controller/fsl,ls-scfg-msi.txt | 1
> +
> driv
On Tue, Sep 19, 2017 at 05:26:56PM +0800, Zhiqiang Hou wrote:
> From: Hou Zhiqiang
>
> Signed-off-by: Hou Zhiqiang
> ---
> Documentation/devicetree/bindings/pci/layerscape-pci.txt | 1 +
> drivers/pci/dwc/pci-layerscape.c | 1 +
> 2 files changed, 2 insertions(+)
Acked-
On Tue, Sep 19, 2017 at 05:09:02PM +0100, David Howells wrote:
> Eric Biggers wrote:
>
> > + if (test_bit(KEY_FLAG_NEGATIVE, &key->flags)) {
> > + ret = -ENOKEY;
> > + goto error2;
> > + }
>
> It might be better to do this check in key_validate(). Also, it should
> perha
On Tue, Sep 19, 2017 at 04:04:46PM +0530, Tirupathi Reddy wrote:
> Clkdiv module provides a clock output on the PMIC with CXO as
> the source. This clock can be routed through PMIC GPIOs. Add
> a device driver to configure this clkdiv module.
>
> Signed-off-by: Tirupathi Reddy
> ---
> .../bindin
On Tue, Sep 19, 2017 at 01:44:06PM +0200, gabriel.fernan...@st.com wrote:
> From: Gabriel Fernandez
>
> The clock-cell size is 1 on stm32h7 plaform.
>
> Signed-off-by: Gabriel Fernandez
> Fixes: 3e4d618b0722 ("clk: stm32h7: Add stm32h743 clock driver")
> ---
> Documentation/devicetree/bindings
On Tue, Sep 19, 2017 at 02:05:48PM +0200, Neil Armstrong wrote:
> Cc: supp...@tronsmart.com
> Signed-off-by: Oleg
> Signed-off-by: Neil Armstrong
> ---
> Documentation/devicetree/bindings/arm/amlogic.txt | 1 +
> 1 file changed, 1 insertion(+)
Acked-by: Rob Herring
On Tue, Sep 19, 2017 at 04:53:40PM +0200, Neil Armstrong wrote:
> The Khadas VIM2 is a Single Board Computer, respin of the origin
> Khadas VIM board, using an Amlogic S912 SoC and more server oriented.
>
> It provides the same external connectors and header pinout, plus a SPI
> NOR Flash, a repro
+int pvcalls_front_accept(struct socket *sock, struct socket *newsock, int
flags)
+{
+ struct pvcalls_bedata *bedata;
+ struct sock_mapping *map;
+ struct sock_mapping *map2 = NULL;
+ struct xen_pvcalls_request *req;
+ int notify, req_id, ret, evtchn, nonblock;
+
+
Hi all,
Today's linux-next merge of the mips tree got a conflict in:
arch/mips/pci/pci-octeon.c
between commit:
19a8d6b7604d ("MIPS: PCI: Move map_irq() hooks out of initdata")
from the pci-current tree and commit:
8eba3651f1da ("MIPS: PCI: fix pcibios_map_irq section mismatch")
from t
Hi Borsodi,
[auto build test ERROR on gpio/for-next]
[also build test ERROR on v4.14-rc1 next-20170921]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Michal-Simek/gpio-Wakeup-gpio-controller
On 9/21/2017 11:21 PM, Jiri Olsa wrote:
> On Thu, Sep 21, 2017 at 05:18:42PM +0200, Jiri Olsa wrote:
>> On Wed, Sep 20, 2017 at 11:12:32PM +0800, Jin Yao wrote:
>>
>> SNIP
>>
>>> @@ -2647,11 +2681,22 @@ int perf_file_header__read(struct perf_file_header
>>> *header,
>>>
>>> if (header->siz
On Wed, 2017-09-20 at 16:05 -0700, David Miller wrote:
> From: Samuel Mendoza-Jonas
> Date: Wed, 20 Sep 2017 14:12:51 +1000
>
> > When handling new VLAN tags in NCSI we check the maximum allowed number
> > of filters on the last active ("hot") channel. However if the 'add'
> > callback is called
On Wed, 2017-09-20 at 21:02:51 UTC, Tyrel Datwyler wrote:
> Commit 215ee763f8cb ("powerpc: pseries: remove dlpar_attach_node dependency on
> full path") reworked dlpar_attach_node() to no longer look up the parent
> node "/cpus", but instead to have the parent node passed by the caller in the
> fun
Hi all,
After merging the net-next tree, today's linux-next build (arm
multi_v7_defconfig) failed like this:
net/ipv4/fib_frontend.c: In function 'fib_validate_source':
net/ipv4/fib_frontend.c:411:16: error: 'struct netns_ipv4' has no member named
'fib_has_custom_local_routes'
if (net->ipv4.f
On Thu, Sep 21, 2017 at 03:49:33PM +0200, Paolo Bonzini wrote:
> On 21/09/2017 15:32, Konrad Rzeszutek Wilk wrote:
> > So the guest can change the scheduling decisions at the host level?
> > And the host HAS to follow it? There is no policy override for the
> > host to say - nah, not going to do it
From: Samuel Mendoza-Jonas
Date: Fri, 22 Sep 2017 11:00:00 +1000
> If we haven't configured a channel yet (or are in the process of doing
> so) we won't have a hot_channel - does it make more sense to
> - check against the hot_channel as currently done,
> - only check the filter size at configure
On Thu, Sep 21, 2017 at 04:06:28PM +0200, Peter Zijlstra wrote:
> On Thu, Sep 21, 2017 at 09:36:53AM -0400, Konrad Rzeszutek Wilk wrote:
> > On Thu, Sep 21, 2017 at 08:38:38AM -0300, Marcelo Tosatti wrote:
> > > Add hypercalls to spinlock/unlock to set/unset FIFO priority
> > > for the vcpu, protec
On Thu, 2017-09-21 at 16:23 +0530, Kishon Vijay Abraham I wrote:
>
> On Thursday 21 September 2017 04:01 PM, Chunfeng Yun wrote:
> > Chip bank of version-1 is initialized as NULL, but it's used
> > by pcie_phy_instance_power_on/off(), so assign it a right
> > address.
>
> merged. How was this not
Hi Jeremy,
On 2017/9/22 2:48, Jeremy Linton wrote:
> Hi,
>
> On 09/20/2017 02:15 AM, Xiongfeng Wang wrote:
>> Hi Jeremy,
>>
>> On 2017/9/20 2:47, Jeremy Linton wrote:
>>> ACPI 6.2 adds a new table, which describes how processing units
>>> are related to each other in tree like fashion. Caches are
From: Stephen Rothwell
Date: Fri, 22 Sep 2017 11:03:55 +1000
> After merging the net-next tree, today's linux-next build (arm
> multi_v7_defconfig) failed like this:
>
> net/ipv4/fib_frontend.c: In function 'fib_validate_source':
> net/ipv4/fib_frontend.c:411:16: error: 'struct netns_ipv4' has n
From: Yunsheng Lin
Date: Thu, 21 Sep 2017 19:21:44 +0800
> @@ -1324,23 +1324,28 @@ static int hclge_alloc_vport(struct hclge_dev *hdev)
> return 0;
> }
>
> -static int hclge_cmd_alloc_tx_buff(struct hclge_dev *hdev, u16 buf_size)
> +static int hclge_cmd_alloc_tx_buff(struct hclge_dev *
On Thu, Sep 21, 2017 at 07:45:32PM +0200, Jan Kiszka wrote:
> On 2017-09-21 13:38, Marcelo Tosatti wrote:
> > When executing guest vcpu-0 with FIFO:1 priority, which is necessary to
> > deal with the following situation:
> >
> > VCPU-0 (housekeeping VCPU) VCPU-1 (realtime VCPU)
> >
>
These patches add trace events support for preempt and irq disable/enable
events.
Changes since v5:
- Use trace_*_rcuidle variants (thanks Steve!)
Here's an example of how Android's systrace will be using it to show critical
sections as a gantt chart: http://imgur.com/download/TZplEVp
Links to e
Preempt and irq trace events can be used for tracing the start and
end of an atomic section which can be used by a trace viewer like
systrace to graphically view the start and end of an atomic section and
correlate them with latencies and scheduling issues.
This also serves as a prelude to using s
In preparation of adding irqsoff and preemptsoff enable and disable trace
events, move required functions and code to make it easier to add these events
in a later patch. This patch is just code movement and no functional change.
Cc: Steven Rostedt
Cc: Peter Zijlstra
Cc: kernel-t...@android.com
Apply for a loan at 3% reply to this Email for more Info
Hi Arnd,
On 21 September 2017 at 20:56, Arnd Bergmann wrote:
> On Thu, Sep 21, 2017 at 8:18 AM, Baolin Wang wrote:
>
>> - case SNDRV_RAWMIDI_IOCTL_STATUS:
>> +#if __BITS_PER_LONG == 32
>> + case SNDRV_RAWMIDI_IOCTL_STATUS32:
>> + {
>> + int err = 0;
>> +
Hi Franklin,
On 2017/9/21 8:36, Franklin S Cooper Jr wrote:
On 08/24/2017 03:30 AM, Sekhar Nori wrote:
+ OMAP mailing list
On Tuesday 25 July 2017 04:21 AM, Franklin Cooper wrote:
Add support for PM Runtime which is the new way to handle managing clocks.
However, to avoid breaking SoCs not u
Hi, David
On 2017/9/22 9:41, David Miller wrote:
> From: Yunsheng Lin
> Date: Thu, 21 Sep 2017 19:21:44 +0800
>
>> @@ -1324,23 +1324,28 @@ static int hclge_alloc_vport(struct hclge_dev *hdev)
>> return 0;
>> }
>>
>> -static int hclge_cmd_alloc_tx_buff(struct hclge_dev *hdev, u16 buf_siz
On 21 September 2017 at 21:14, Arnd Bergmann wrote:
> On Thu, Sep 21, 2017 at 8:18 AM, Baolin Wang wrote:
>
>> static long snd_timer_user_ioctl_compat(struct file *file, unsigned int
>> cmd, unsigned long arg)
>> @@ -158,12 +151,10 @@ static long snd_timer_user_ioctl_compat(struct file
>> *fil
All armada-38x variants(380, 385, 388) SoCs have an issue
in i2c controller which violates the i2c repeated start timing.
This errata is fixed in the i2c-mv64xxx driver but enabled
only for devices with compatible string "marvell,mv78230-i2c".
This patch introduces a new compatible string
"marvel
Hi, Robin,
Before 2.6.36 dma_get_cache_alignment is arch-dependent, and it is unified in
commit 4565f0170dfc849b3629c27d7 ("dma-mapping: unify dma_get_cache_alignment
implementations"). Should we revert to the old implementation?
Huacai
-- Original --
From: "
With --call-graph option, perf report can display call chains using
type, min percent threshold, optional print limit and order. And the
default call-graph parameter is 'graph,0.5,caller,function,percent'.
Before this patch, 'perf report --call-graph' shows incorrect debug
messages as below:
[root
On Thu, Sep 21, 2017 at 02:50:07PM -0500, Alan Tull wrote:
> On Thu, Sep 21, 2017 at 2:11 PM, Moritz Fischer wrote:
>
> Hi Moritz,
>
> > Hi,
> >
> > On Mon, Jun 26, 2017 at 09:51:59AM +0800, Wu Hao wrote:
> >> This patch removes OF dependency of fpga-bridge, it allows drivers
> >> to use fpga-br
Hi all,
Today's linux-next merge of the drm-misc tree got a conflict in:
drivers/gpu/drm/i915/intel_display.c
between commit:
fd70075f82b7 ("drm/i915: Trim struct_mutex usage for kms")
from Linus' tree and commits:
21a01abbe32a ("drm/atomic: Fix freeing connector/plane state too early b
Acked-by: Dave Kleikamp
On 09/20/2017 03:45 PM, Kees Cook wrote:
> From: David Windsor
>
> The jfs symlink pathnames, stored in struct jfs_inode_info.i_inline and
> therefore contained in the jfs_ip slab cache, need to be copied to/from
> userspace.
>
> cache object allocation:
> fs/jfs/su
Hi rob,
在 2017/9/22 3:40, Rob Herring 写道:
On Tue, Sep 19, 2017 at 9:57 PM, Sandy Huang wrote:
在 2017/9/20 9:51, Sandy Huang 写道:
Hi rob,
thanks for you review.
在 2017/9/19 22:46, Rob Herring 写道:
On Thu, Sep 14, 2017 at 11:43:18AM +0800, Sandy Huang wrote:
This path add support rv
This patches add support rockchip RGB output, Some Rockchip CRTCs, like rv1108,
can directly output parallel and serial RGB data to panel or to conversion chip.
So we add this driver to probe encoder and connector to support this case.
Sandy Huang (3):
dt-bindings: Add document for rockchip RGB
This path add support rv1108 rgb output interface driver.
Signed-off-by: Sandy Huang
---
Changes in v2:
1. rename rockchip,rgb-mode to rgb-mode;
2. delete reg for signle endpoint;
.../bindings/display/rockchip/rockchip-rgb.txt | 78 ++
1 file changed, 78 insertions(+)
This patch add serial RGB output interface for rockchip vop, the
more info about serial RGB output interface described at the
following file:
Documentation/devicetree/bindings/display/rockchip/rockchip-rgb.txt
Signed-off-by: Sandy Huang
---
No changes in v2:
drivers/gpu/drm/rockchip/rockchip_d
Some Rockchip CRTCs, like rv1108, can directly output parallel and
serial RGB data to panel or conversion chip, so we add this driver to
probe encoder and connector.
Signed-off-by: Sandy Huang
---
Changes in v2:
1. add error log when probe failed;
2. update name_to_output_mode() according to
On 21 September 2017 at 21:09, Arnd Bergmann wrote:
> On Thu, Sep 21, 2017 at 8:18 AM, Baolin Wang wrote:
>
>> +static int snd_timer_user_tread(void __user *argp, struct snd_timer_user
>> *tu,
>> + unsigned int cmd)
>> +{
>> + int __user *p = argp;
>> +
Peter,
Do you have any qualms with this patch set?
-- Steve
On Thu, 21 Sep 2017 18:50:22 -0700
Joel Fernandes wrote:
> These patches add trace events support for preempt and irq disable/enable
> events.
>
> Changes since v5:
> - Use trace_*_rcuidle variants (thanks Steve!)
>
> Here's an ex
When CONFIG_CPU_SW_DOMAIN_PAN is enabled, there are 9 registers being
pushed into stack in save_regs, but in fixup it still consider there are
8 registers in stack, which is the case of CONFIG_CPU_SW_DOMAIN_PAN
disabled.
When fixup being executed, -EFAULT will be written to the text section.
In fi
Hi Mathieu,
On Tue, Sep 19, 2017 at 06:13:41PM -0400, Mathieu Desnoyers wrote:
> Provide a new command allowing processes to register their intent to use
> the private expedited command.
>
> This allows PowerPC to skip the full memory barrier in switch_mm(), and
> only issue the barrier when sche
On Fri, Sep 22, 2017 at 11:22:06AM +0800, Boqun Feng wrote:
> Hi Mathieu,
>
> On Tue, Sep 19, 2017 at 06:13:41PM -0400, Mathieu Desnoyers wrote:
> > Provide a new command allowing processes to register their intent to use
> > the private expedited command.
> >
> > This allows PowerPC to skip the
From: Sean Wang
I work for MediaTek on maintaining the MediaTek SoC based RTC driver for
the existing SoCs and keep adding support for the following SoCs in the
future.
Cc: Eddie Huang
Signed-off-by: Sean Wang
---
MAINTAINERS | 3 +++
1 file changed, 3 insertions(+)
diff --git a/MAINTAINERS
From: Sean Wang
This patchset introduces support for MediaTek SoC based real time clock
(RTC) Currently, the driver is already tested successfully with hwclock
and wakealarm on MT7622 SoC. And it should also be workable on other
similar MediaTek SoCs. And patch 3 is a distinct patch used to disti
From: Sean Wang
This patch introduces the driver for the RTC on MT7622 SoC.
Signed-off-by: Sean Wang
---
drivers/rtc/Kconfig| 10 ++
drivers/rtc/Makefile | 1 +
drivers/rtc/rtc-mediatek.c | 398 +
3 files changed, 409 insertions(+)
From: Sean Wang
Add device-tree binding for MediaTek SoC based RTC
Cc: devicet...@vger.kernel.org
Signed-off-by: Sean Wang
---
.../devicetree/bindings/rtc/rtc-mediatek.txt| 21 +
1 file changed, 21 insertions(+)
create mode 100644 Documentation/devicetree/bindings/
From: Sean Wang
Give a better description for original MediaTek RTC driver as PMIC based
RTC in order to distinguish SoC based RTC. Also turning all words with
Mediatek to MediaTek here.
Cc: Eddie Huang
Signed-off-by: Sean Wang
---
drivers/rtc/Kconfig | 8
1 file changed, 4 insertion
From: Geert Uytterhoeven
Date: Thu, 21 Sep 2017 13:27:02 +0200
> Given NR_IRQS is 2048 on sparc64, and even 32784 on alpha, 3 digits is
> not enough to represent interrupt numbers on all architectures. Hence
> PHY interrupt numbers may be truncated during printing.
>
> Increase the buffer size
From: Yunsheng Lin
Date: Fri, 22 Sep 2017 09:57:31 +0800
> Hi, David
>
> On 2017/9/22 9:41, David Miller wrote:
>> From: Yunsheng Lin
>> Date: Thu, 21 Sep 2017 19:21:44 +0800
>>
>>> @@ -1324,23 +1324,28 @@ static int hclge_alloc_vport(struct hclge_dev *hdev)
>>> return 0;
>>> }
>>>
>>>
This series make the Denali driver even cleaner and more correct.
Masahiro Yamada (12):
mtd: nand: denali: squash setup_ecc_for_xfer() helper into caller
mtd: nand: denali: prefix detect_max_banks() with denali_
mtd: nand: denali: consolidate include directives
mtd: nand: denali: squash
The ECC correction is properly enabled/disabled before the page
read/write. There is no need to set up this at the beginning of
the probe.
Signed-off-by: Masahiro Yamada
---
This patch may cause a conflict
unless http://patchwork.ozlabs.org/patch/813125/ is applied first.
Changes in v2:
-
This helper just sets/clears a flag of DMA_ENABLE register (with
register read-back, I do not know why it is necessary).
Move the register write code to the caller, and remove the helper.
It works for me without the register read-back.
Signed-off-by: Masahiro Yamada
---
Changes in v2: None
dr
Include necessary headers explicitly without relying on indirect
header inclusion. Also, sort them alphabetically.
, , turned out bogus,
so removed.
Signed-off-by: Masahiro Yamada
---
Changes in v2: None
drivers/mtd/nand/denali.c | 12 +++-
drivers/mtd/nand/denali.h | 3 +++
This function has a local variable "irq_mask" and its value is
the same as denali->irq_mask. Clean up the code a little.
Signed-off-by: Masahiro Yamada
---
Changes in v2: None
drivers/mtd/nand/denali.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/denali
The setup_ecc_for_xfer() is only called from denali_data_xfer().
This helper is small enough, so squash it into the caller.
This looks cleaner to me.
Signed-off-by: Masahiro Yamada
---
Changes in v2: None
drivers/mtd/nand/denali.c | 22 +++---
1 file changed, 3 insertions(+), 1
The Denali NAND IP core decodes the lower 28 bits of the slave address
to get the control information; bit[27:26]=mode, bit[25:24]=bank, etc.
This means 256MB address range must be allocated for this IP. (Direct
Addressing)
For systems with address space limitation, the Denali IP provides an
opti
This driver explains too much about what is apparent from the code.
Comments around basic APIs such as init_completion(), spin_lock_init(),
etc. seem unneeded lessons to kernel developers.
(With those comments dropped, denali_drv_init() is small enough,
so it has been merged into the probe functio
The previous commit added some hooks into struct denali_nand_info,
so here is one more for clean-up.
Signed-off-by: Masahiro Yamada
---
Changes in v2:
- Newly added
drivers/mtd/nand/denali.c | 15 +--
drivers/mtd/nand/denali.h | 2 ++
2 files changed, 7 insertions(+), 10 deletio
All the register offsets and bitfield masks are defined in denali.h,
but the driver code ended up with additional crappy macros such as
MAKE_ECC_CORRECTION(), ECC_SECTOR(), etc.
The reason is apparent - accessing a register field requires mask and
shift pair. The denali.h only provides mask. How
In several places in this driver, the register fields are retrieved
as follows:
val = reg & FOO_MASK;
Then, modified as follows:
reg &= ~FOO_MASK;
reg |= val;
This code relies on its shift is 0, which we will never know until
we check the definition of FOO_MASK. Use FIELD_PREP / FIELD_GE
I used (uint64_t) cast to avoid "right shift count >= width of type"
warning. provides nice helpers to cater to it.
The code will be cleaner, and easier to understand.
Signed-off-by: Masahiro Yamada
---
Changes in v2:
- Newly added
drivers/mtd/nand/denali.c | 4 ++--
1 file changed, 2 inse
All functions in this driver are prefixed with denali_
except detect_max_banks(). Rename it for consistency.
Signed-off-by: Masahiro Yamada
---
Changes in v2: None
drivers/mtd/nand/denali.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/denali.c b/dri
From: "K. Y. Srinivasan"
Add additional per-channel sysfs information to help debug performance
issues.
Greg, please apply this patch-set to 4.15-rc1.
Stephen Hemminger (2):
vmbus: add per-channel sysfs info
Drivers: hv: vmbus: Expose per-channel interrupts and events counters
Documentati
Hi, Masahiro
On Thu, 2017-09-21 at 11:09 +0900, Masahiro Yamada wrote:
> Hi Sean,
>
>
> 2017-09-21 1:32 GMT+09:00 Sean Wang :
> > Hi, Masahiro
> >
> > For maintainability, I felt it's better if we use the same way to
> > register nvmem as that most drivers does under nvmem usually using
> > stat
From: Stephen Hemminger
When investigating performance, it is useful to be able to look at
the number of host and guest events per-channel. This is equivalent
to per-device interrupt statistics.
Signed-off-by: Stephen Hemminger
Signed-off-by: K. Y. Srinivasan
---
Documentation/ABI/stable/sysf
From: Stephen Hemminger
This extends existing vmbus related sysfs structure to provide per-channel
state information. This is useful when diagnosing issues with multiple
queues in networking and storage.
The existing sysfs only displayed information about the primary
channel. The one place it re
On 2017年09月21日 06:02, John Fastabend wrote:
On 09/19/2017 02:42 AM, Jason Wang wrote:
This patch tries to add XDP_REDIRECT for virtio-net. The changes are
not complex as we could use exist XDP_TX helpers for most of the
work. The rest is passing the XDP_TX to NAPI handler for implementing
batc
Hi,
On Sep 21 2017 15:18, Baolin Wang wrote:
Since many structures will use timespec type variables to record time stamp
in uapi/asound.h, which are not year 2038 safe on 32bit system. This patchset
tries to introduce new structures removing timespec type to compatible native
mode and compat mod
The max value of rd_size parameter is ULONG_MAX from the following commit.
Commit 366f4aea649a65c3735d91b4409d84c771811290 ("brd: Switch rd_size
to unsigned long")
However, this parameter * 1024 will be set as inode->i_size corresponding
to brd devices and it's a signed value. To prevent overflow
Hi Dmitry,
thanks for your review!
[...]
> > +static void s6sy761_report_coordinates(struct s6sy761_data *sdata, u8
> > *event)
> > +{
> > + u8 tid = ((event[0] & S6SY761_MASK_TID) >> 2) - 1;
>
> Should we make sure that event[0] & S6SY761_MASK_TID is not 0?
I check event[0] already in s6sy
Changes since v3 [1]:
* rebase on 4.14-rc1
* rewrite the changelog of patch2 to drop broken references to the
"built-in portion of device-mapper" (Mike)
[1]: https://lists.01.org/pipermail/linux-nvdimm/2017-August/011545.html
---
Bart points out that the DAX core is unconditionally enabled if
In support of allowing device-mapper to compile out idle/dead code when
there are no dax providers in the system, introduce the DAX_DRIVER
symbol. This is selected by all leaf drivers that device-mapper might be
layered on top. This allows device-mapper to conditionally 'select DAX'
only when a pro
grub-reboot selects the submenu's first menuentry (title is "1>0") rather than
ktest's
menuentry (title is "2") by mistake.
===
$ sudo cat /boot/grub/grub.cfg | grep -E "^menuentry|^submenu"
...
menuentry 'Ubuntu' --class ubuntu --class gnu-linux --class gnu --class os
$menuentry_id_option '...
From: Suniel Mahesh
Fixes checkpatch warnings:
WARNING: else is not generally useful after a break or return
Signed-off-by: Suniel Mahesh
---
Note:
- Patch was tested and built(ARCH=arm) on next-20170921.
No build issues reported.
---
drivers/staging/ccree/ssi_request_mgr.c | 5 ++---
1
Hi all,
Changes since 20170921:
The mips tree gained a conflict against the pci-current tree.
The net-next tree gained a build failure for which I reverted a commit.
The drm-misc tree gained conflicts against Linus' tree.
Non-merge commits (relative to Linus' tree): 1601
1453 fil
On Wed, Aug 30, 2017 at 10:17:51PM +0530, Arvind Yadav wrote:
> platform_suspend_ops are not supposed to change at runtime.
> Functions suspend_set_ops working with const platform_suspend_ops.
> So mark the non-const structs as const.
>
> Signed-off-by: Arvind Yadav
Applied, thanks.
Peter Zijlstra writes:
> On Wed, Sep 20, 2017 at 06:13:50PM +, Mathieu Desnoyers wrote:
>
>> > Also, can you elaborate on the PPC issue? PPC appears to track
>> > mm_cpumask more or less just like x86. Is the issue just that this
>> > tracking has no implied barriers? If so, how does TLB f
bio_map_user_iov and bio_unmap_user do unbalanced pages refcounting if
IO vector has small consecutive buffers belonging to the same page.
bio_add_pc_page merges them into one, but the page reference is never
dropped.
Signed-off-by: Vitaly Mayatskikh
diff --git a/block/bio.c b/block/bio.c
index
- Free memory region, if gb_lights_channel_config is not successful.
- No need to add check for gb_lights_channel_flash_config().
Signed-off-by: Arvind Yadav
---
changes in v2:
- Subject line changed.
- add kfree in __gb_lights_led_unregister().
- No need to
- On Sep 21, 2017, at 11:30 PM, Boqun Feng boqun.f...@gmail.com wrote:
> On Fri, Sep 22, 2017 at 11:22:06AM +0800, Boqun Feng wrote:
>> Hi Mathieu,
>>
>> On Tue, Sep 19, 2017 at 06:13:41PM -0400, Mathieu Desnoyers wrote:
>> > Provide a new command allowing processes to register their intent t
Reproducer (needs SCSI disk):
#include
#include
#include
#include
#include
#include
#include
#include
#include
#define NR_IOS 1
#define NR_IOVECS 8
#define SG_IO 0x2285
int main(int argc, char *argv[])
{
int fd, i, j;
unsigned char *buf, *ptr, cdb[10];
sg_i
Hi Takashi,
On 22 September 2017 at 12:07, Takashi Sakamoto wrote:
> Hi,
>
>
> On Sep 21 2017 15:18, Baolin Wang wrote:
>>
>> Since many structures will use timespec type variables to record time
>> stamp
>> in uapi/asound.h, which are not year 2038 safe on 32bit system. This
>> patchset
>> tries
This script need not to create .version; it will be created by
scripts/link-vmlinux.sh later. Clean-up the code slightly.
Signed-off-by: Masahiro Yamada
---
scripts/mkcompile_h | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/scripts/mkcompile_h b/scripts/mkcompile_h
i
Since commit 1f2bfbd00e46 ("kbuild: link of vmlinux moved to a
script"), it is easy to increment .version without using a temporary
file .old_version.
I do not see anybody who creates .tmp_version any more. Probably
it is a left-over of commit 4e25d8bb9550fb ("[PATCH] kbuild: adjust
.version upda
* Eric Biggers wrote:
> From: Eric Biggers
>
> This series fixes the bug found by syzkaller where the ptrace syscall
> can be used to set invalid bits in a task's FPU state. I also found
> that an equivalent bug was reachable using the sigreturn syscall, so the
> first patch fixes the bug in
* Sergey Senozhatsky wrote (on 2017-09-20
16:29:02 +):
> Hello
>
> RFC
>
> On some arches C function pointers are indirect and point to
> a function descriptor, which contains the actual pointer to the code.
> This mostly doesn't matter, except for cases when people
On Sat, Sep 09, 2017 at 05:03:28AM +0530, Sumit Garg wrote:
> Add optee device tree node on ls1012a, ls1043a, ls1046a, ls1088a
> and ls208xa.
>
> Signed-off-by: Sumit Garg
Applied, thanks.
On Sat, Sep 09, 2017 at 08:54:21PM +0800, Wig C wrote:
> From: YuanCheng Cheng
>
> Working items:
>
> - 800MHz CPU
> - 2GB of RAM (DDR3)
> - 4GB of eMMC storage
> - 1T1R WiFi 2.4 GHz
> - Power management support
> - 1x 10/100/1000 Mbps Ethernet WAN port
> - 2x USB 2.0 Host
> - PCIe
> - HDMI/VGA/
On Thu, Sep 21, 2017 at 02:20:03PM -0500, Kyle Roeschley wrote:
> Powering off the system on Apollo Lake does not clear the interrupt
> enable registers for the GPIOs. To avoid an interrupt storm on driver
> probe, clear all interrupt enables before enabling our interrupt line.
It is up to the BIO
Original 20ms delay is a margin timing after a block writing
in FW update flow.
Sometimes it will cause fail during FW-updating if I2C timing delay.
We offten see this issue in rockchip's I2C host.
Extend the delay timing is the safest way to improve it.
Signed-off-by: KT Liao
---
drivers/inpu
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