Re: [PATCH 4/5] mmc: sdhci-omap: Add OMAP SDHCI driver

Hi, On Monday 28 August 2017 02:36 PM, Adrian Hunter wrote: > On 21/08/17 10:41, Kishon Vijay Abraham I wrote: >> Create a new sdhci-omap driver to configure the eMMC/SD/SDIO controller >> in TI's OMAP SoCs making use of the SDHCI core library. For OMAP specific >> configurations, populate sdhci_o

Re: [PATCH] RDS: constify rhashtable_params

On 8/30/17 4:49 AM, Arvind Yadav wrote: rhashtable_params are not supposed to change at runtime. All Functions rhashtable_* working with const rhashtable_params provided by . So mark the non-const structs as const. Signed-off-by: Arvind Yadav --- This is already addressed in net-next by [1] R

[PATCH] scsi: hpsa: make access_method const

Make these const as they are not modified anywhere. Signed-off-by: Bhumika Goyal --- To compile-test hpsa.h, I test-compiled scsi/hpsa.c which includes this file. drivers/scsi/hpsa.h | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/scsi/hpsa.h b/drivers/scsi/h

Re: [PATCH v3 05/11] staging: typec: fusb302: Use client->irq as irq if set

On 08/30/2017 02:48 AM, Hans de Goede wrote: The fusb302 is also used on x86 systems where the platform code sets the irq in client->irq and there is no gpio named fcs,int_n. Cc: "Yueyao (Nathan) Zhu" Signed-off-by: Hans de Goede Reviewed-by: Guenter Roeck --- drivers/staging/typec/fusb

Re: [PATCH v3 06/11] staging: typec: fusb302: Add support for USB2 charger detection through extcon

On 08/30/2017 02:48 AM, Hans de Goede wrote: The fusb302 port-controller relies on an external device doing USB2 charger-type detection. The Intel Whiskey Cove PMIC with which the fusb302 is combined on some X86/ACPI platforms already has a charger-type detection driver which uses extcon to comm

Re: [PATCH v1 6/6] device property: Switch to use new generic UUID API

On Wed, Aug 30, 2017 at 03:46:34PM +0200, Rafael J. Wysocki wrote: > 3689d3d69072 ACPI: device property: Switch to use new generic UUID API > > in my linux-next branch. Isn't it this one? Yes, that should be it. Somehow my linux-next tree seems to be a mess through or my git log skills aren't w

[PATCH] Workqueue lockup: Circular dependency in threads

Hi, While using Linux version 4.4 on my setup, I have observed a deadlock. 1) CPU3 is getting hot plugged from a worker thread(kworker/0:0) on CPU0. 2) Cpu hot plug flow needs to flush the work items on hot plugging CPU3, with a high priority worker from the corresponding CPU(cpu3) worker pool

Re: [PATCH] PCI: tegra: Use PTR_ERR_OR_ZERO

On Tue, Aug 29, 2017 at 03:55:17PM +0200, Thierry Reding wrote: > On Tue, Aug 29, 2017 at 07:09:00PM +0530, Himanshu Jha wrote: > > Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR > > > > Signed-off-by: Himanshu Jha > > --- > > drivers/pci/host/pci-tegra.c | 5 + > > 1 file changed

Re: [PATCH 1/3] thunderbolt: Remove superfluous check

On Mon, 2017-08-28 at 16:20 +0200, Greg Kroah-Hartman wrote: > On Sun, Aug 27, 2017 at 04:31:27PM +0300, Mika Westerberg wrote: > > > > On Tue, Aug 15, 2017 at 10:02:28AM +0300, Mika Westerberg wrote: > > > > > > On Tue, Aug 15, 2017 at 08:19:01AM +0300, Bernat, Yehezkel wrote: > > > > > > > > T

Re: [PATCH] fsnotify: make dnotify_fsnotify_ops const

On Wed 30-08-17 18:09:02, Bhumika Goyal wrote: > Make this const as it is never modified. > > Signed-off-by: Bhumika Goyal Thanks. Added to my tree. Honza > --- > fs/notify/dnotify/dnotify.c | 2 +- > 1 file changed, 1 insertion(

[PATCH v2] Kbuild: enable -Wunused-macros warning for "make W=2"

We have lots of dead defines and macros in drivers, lets offer users a way to detect and eventually remove them. Signed-off-by: Johannes Thumshirn --- Notes: Changes to v1: * Change from W=1 to W=2 scripts/Makefile.extrawarn | 1 + 1 file changed, 1 insertion(+) diff --git a/scripts/M

Re: [PATCH v3 07/11] staging: typec: fusb302: Export current-limit through a power_supply class dev

On 08/30/2017 02:48 AM, Hans de Goede wrote: The fusb302 Type-C port-controller cannot control the current-limit directly, so we need to exported the limit so that another driver (e.g. the charger driver) can pick the limit up and configure the system accordingly. The power-supply subsys already

[PATCH] regulator: da9063: Return an error code on probe failure

If "regl_pdata->n_regulators == 0" is true then we accidentally return PTR_ERR() instead of an error code. I've changed it to return -ENODEV instead. Fixes: 69ca3e58d178 ("regulator: da9063: Add Dialog DA9063 voltage regulators support.") Signed-off-by: Dan Carpenter diff --git a/drivers/regul

[PATCH] kernfs: checking for IS_ERR() instead of NULL

The kernfs_get_inode() returns NULL on error, it never returns error pointers. Fixes: aa8188253474 ("kernfs: add exportfs operations") Signed-off-by: Dan Carpenter diff --git a/fs/kernfs/mount.c b/fs/kernfs/mount.c index 7c452f4d83e9..95a7c88baed9 100644 --- a/fs/kernfs/mount.c +++ b/fs/kernfs/m

Re: [PATCH] acpi: apei: call into AER handling regardless of severity

On 8/30/2017 6:16 AM, Borislav Petkov wrote: > On Tue, Aug 29, 2017 at 06:34:49PM -0400, Sinan Kaya wrote: >> The do_recovery function needs to be called for both uncorrectable error >> categories. (#2 and #3 above) > > Care to share why exactly that needs to happen? Let me try below: > > Becau

Re: [PATCH v3 44/59] KVM: arm/arm64: GICv4: Handle MOVI applied to a VLPI

On 28/08/17 19:18, Christoffer Dall wrote: > On Mon, Jul 31, 2017 at 06:26:22PM +0100, Marc Zyngier wrote: >> When the guest issues a MOVI, we need to tell the physical ITS >> that we're now targetting a new vcpu. This is done by extracting >> the current mapping, updating the target, and reapplyin

[v5 00/14] mpt3sas driver NVMe support:

Ventura Series controller are Tri-mode. The controller and firmware are capable of supporting NVMe devices and PCIe switches to be connected with the controller. This patch set adds driver level support for NVMe devices and PCIe switches. mpt3sas v5 patset: 1) Removed the check to find data transf

[v5 01/14] Update MPI Header

Update MPI Files for NVMe support Signed-off-by: Chaitra P B Signed-off-by: Suganath Prabu S --- drivers/scsi/mpt3sas/mpi/mpi2.h | 43 ++- drivers/scsi/mpt3sas/mpi/mpi2_cnfg.h | 564 +-- drivers/scsi/mpt3sas/mpi/mpi2_init.h | 11 +- drivers/scsi/mpt3sas/mp

[v5 02/14] mpt3sas: Add nvme device support in slave alloc, target alloc and probe

1) Added support for probing pcie device and adding NVMe drives to SML and driver's internal list pcie_device_list. 2) Added support for determing NVMe as boot device. 3) Added nvme device support for call back functions scan_finished target_alloc,slave_alloc,target destroy and slave destroy. a

[v5 04/14] mpt3sas: Added support for nvme encapsulated request message.

* Mpt3sas driver uses the NVMe Encapsulated Request message to send an NVMe command to an NVMe device attached to the IOC. * Normal I/O commands like reads and writes are passed to the controller as SCSI commands and the controller has the ability to translate the commands to NVMe equivalent. * T

[v5 05/14] mpt3sas: API 's to support NVMe drive addition to SML

Below Functions are added in various paths to support NVMe drive addition. _scsih_pcie_add_device _scsih_pcie_device_add _scsih_pcie_device_init_add _scsih_check_pcie_access_status _scsih_pcie_check_device mpt3sas_get_pdev_by_handle mpt3sas_config_get_pcie_device_pg0 mpt3sas_config_get_pcie_devi

[v5 08/14] mpt3sas: Set NVMe device queue depth as 128

Sets nvme device queue depth, name and displays device capabilities Signed-off-by: Chaitra P B Signed-off-by: Suganath Prabu S --- drivers/scsi/mpt3sas/mpt3sas_base.h | 2 +- drivers/scsi/mpt3sas/mpt3sas_scsih.c | 50 2 files changed, 51 insertions(+), 1 d

[v5 12/14] mpt3sas: Fix nvme drives checking for tlr.

Check for NVMe drives before enabling or checking tlr. Signed-off-by: Chaitra P B Signed-off-by: Suganath Prabu S Reviewed-by: Hannes Reinecke --- drivers/scsi/mpt3sas/mpt3sas_scsih.c | 22 -- 1 file changed, 16 insertions(+), 6 deletions(-) diff --git a/drivers/scsi/mpt3s

[v5 14/14] mpt3sas: Fix sparse warnings

1) Used variable __le64/__le32 whichever required in building NVME PRP, which is passed to LE Controller. 2) Remove unused function, Declared functions which are used only in mpt3sas_scsih.c as static Signed-off-by: Chaitra P B Signed-off-by: Suganath Prabu S --- drivers/scsi/mpt3sas/mpt3sas_ba

[v5 13/14] mpt3sas: Update mpt3sas driver version.

Updated mpt3sas driver version to 15.101.00.00 Signed-off-by: Chaitra P B Signed-off-by: Suganath Prabu S Reviewed-by: Hannes Reinecke --- drivers/scsi/mpt3sas/mpt3sas_base.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/scsi/mpt3sas/mpt3sas_base.h b/drivers/

[v5 11/14] mpt3sas: NVMe drive support for BTDHMAPPING ioctl command and log info

* Added debug prints for pcie devices in ioctl debug path. Which will be helpful for debugging. * Added PCIe device support for ioctl BTDHMAPPING ioctl. Signed-off-by: Chaitra P B Signed-off-by: Suganath Prabu S Reviewed-by: Hannes Reinecke --- drivers/scsi/mpt3sas/mpt3sas_ctl.c | 88 +

[v5 10/14] mpt3as: Add-Task-management-debug-info-for-NVMe-drives.

Added debug information for NVMe/PCIe drives in target rest path. Signed-off-by: Chaitra P B Signed-off-by: Suganath Prabu S Reviewed-by: Hannes Reinecke --- drivers/scsi/mpt3sas/mpt3sas_scsih.c | 83 ++-- 1 file changed, 70 insertions(+), 13 deletions(-) diff

[v5 09/14] mpt3sas: scan and add nvme device after controller reset

After Controller reset, Scan and add nvme device back to the topology. Signed-off-by: Chaitra P B Signed-off-by: Suganath Prabu S Reviewed-by: Hannes Reinecke --- drivers/scsi/mpt3sas/mpt3sas_scsih.c | 194 ++- 1 file changed, 190 insertions(+), 4 deletions(-)

[v5 07/14] mpt3sas: Handle NVMe PCIe device related events generated from firmware.

* The controller firmware sends separate events for NVMe devices and PCIe switches similar to existing SAS events. * NVMe device detection, addition and removal are reported by the firmware through PCIe Topology Change list events. * The PCIe device state change events are sent when the firmware

[v5 06/14] mpt3sas: API's to remove nvme drive from sml

Below API's are included in nvme drive remove path. _scsih_pcie_device_remove_by_handle _scsih_pcie_device_remove_from_sml Signed-off-by: Chaitra P B Signed-off-by: Suganath Prabu S Reviewed-by: Hannes Reinecke --- drivers/scsi/mpt3sas/mpt3sas_scsih.c | 148 ++-

[v5 03/14] mpt3sas: SGL to PRP Translation for I/Os to NVMe devices

* Added support for translating the SGLs associated with incoming commands either to IEE SGL or NVMe PRPs for NVMe devices. * The hardware translation of IEEE SGL to NVMe PRPs has limitation and if a command cannot be translated by hardware then it will go to firmware and the firmware needs to tra

Re: [PATCH] pwm_bl: Fix overflow condition

On Tue, Aug 29, 2017 at 11:45:43AM -0700, dbasehore . wrote: > On Tue, Aug 29, 2017 at 7:05 AM, Thierry Reding > wrote: > > On Mon, Aug 28, 2017 at 01:00:33PM -0700, Derek Basehore wrote: > >> This fixes and overflow condition that happens with a high value of > >> brightness-levels-scale by using

Re: possible circular locking dependency mmap_sem/cpu_hotplug_lock.rw_sem

On Wed 16-08-17 16:07:21, Thomas Gleixner wrote: > On Mon, 7 Aug 2017, Artem Savkov wrote: > > +Cc mm folks ... Ups, this has fallen through cracks > > Hello, > > > > After commit fc8dffd "cpu/hotplug: Convert hotplug locking to percpu rwsem" > > the following lockdep splat started showing up o

Re: [PATCH v4 1/3] livepatch: add (un)patch callbacks

On Wed, Aug 30, 2017 at 09:27:16AM -0400, Joe Lawrence wrote: > > So instead of 'obj->pre_patch_callback_done', how about > > 'obj->callbacks_enabled'? > > > > It could be set in the following cases: > > > > a) if the object has a pre_patch callback, set obj->callbacks_enabled > > after th

[PATCH] rtlwifi: btcoex: 23b 1ant: fix duplicated code for different branches

Refactor code in order to avoid identical code for different branches. This issue was detected with the help of Coccinelle. Addresses-Coverity-ID: 1226788 Signed-off-by: Gustavo A. R. Silva --- This issue was reported by Coverity and it was tested by compilation only. I'm suspicious this may be

Re: [PATCH] mm: memcontrol: use per-cpu stocks for socket memory uncharging

On Wed 30-08-17 13:57:29, Roman Gushchin wrote: > On Wed, Aug 30, 2017 at 02:55:43PM +0200, Michal Hocko wrote: > > On Wed 30-08-17 13:44:59, Roman Gushchin wrote: > > > On Wed, Aug 30, 2017 at 02:36:55PM +0200, Michal Hocko wrote: > > > > On Tue 29-08-17 11:01:50, Roman Gushchin wrote: > > > > [..

Re: [PATCH 1/2] iommu/tegra: Add support for struct iommu_device

Hi Joerg, On 30/08/17 13:09, Joerg Roedel wrote: > Hi Jon, > > On Wed, Aug 30, 2017 at 12:04:38PM +0100, Jon Hunter wrote: >> With next-20170829 I am seeing several Tegra boards crashing [0][1] on >> boot in tegra_smmu_probe() and the bisect is point to this commit. Looks >> like there maybe a se

Re: [PATCH] mm: memcontrol: use per-cpu stocks for socket memory uncharging

On Tue 29-08-17 11:01:50, Roman Gushchin wrote: > We've noticed a quite sensible performance overhead on some hosts > with significant network traffic when socket memory accounting > is enabled. > > Perf top shows that socket memory uncharging path is hot: > 2.13% [kernel][k] pa

Re: [RFC] block: deprecate choosing elevator via boot param

On 08/14/2017 03:27 AM, Oleksandr Natalenko wrote: > Setting I/O scheduler via kernel command line is not flexible enough > anymore. Different schedulers might be desirable for different types > of devices (SSDs and HDDs, for instance). Moreover, setting elevator > while using blk-mq framework does

[PATCH v3 1/3] PCI: Allow PCI_DEV_FLAGS_NO_BUS_RESET to be used on bus device

From: David Daney When checking to see if a PCI bus can safely be reset, we check to see if any of the children have their PCI_DEV_FLAGS_NO_BUS_RESET flag set. As these devices are known not to behave well after a bus reset. Some PCIe root port bridges also do not behave well after a bus reset,

[PATCH v3 0/3] Workaround for bus/slot reset on Cavium cn8xxx root ports

Using vfio-pci on a combination of cn8xxx and some PCI devices results in a kernel panic. This is triggered by issuing a bus or a slot reset on the PCI device. The solution is to prevent the reset. I've dropped the vfio patch from the previous series as vfio-pci already checks in the reset path fo

[PATCH v3 3/3] PCI: Avoid slot reset for Cavium cn8xxx root ports

Root ports of cn8xxx do not function after a slot reset when used with some e1000e and LSI HBA devices. Add a quirk to prevent slot reset on these root ports. Signed-off-by: Jan Glauber --- drivers/pci/quirks.c | 16 1 file changed, 16 insertions(+) diff --git a/drivers/pci/qui

Re: [PATCH] PCI: tegra: Use PTR_ERR_OR_ZERO

On Wed, Aug 30, 2017 at 08:59:31AM -0500, Bjorn Helgaas wrote: > On Tue, Aug 29, 2017 at 03:55:17PM +0200, Thierry Reding wrote: > > On Tue, Aug 29, 2017 at 07:09:00PM +0530, Himanshu Jha wrote: > > > Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR > > > > > > Signed-off-by: Himanshu Jha

Re: [PATCH 1/3] thunderbolt: Remove superfluous check

On Wed, Aug 30, 2017 at 02:00:53PM +, Bernat, Yehezkel wrote: > On Mon, 2017-08-28 at 16:20 +0200, Greg Kroah-Hartman wrote: > > On Sun, Aug 27, 2017 at 04:31:27PM +0300, Mika Westerberg wrote: > > > > > > On Tue, Aug 15, 2017 at 10:02:28AM +0300, Mika Westerberg wrote: > > > > > > > > On Tue

[PATCH v3 2/3] PCI: Avoid bus reset for Cavium cn8xxx root ports

From: David Daney Root ports of cn8xxx do not function after bus reset when used with some e1000e and LSI HBA devices. Add a quirk to prevent bus reset on these root ports. Signed-off-by: David Daney [jglau...@cavium.com: fixed typo and whitespaces] Signed-off-by: Jan Glauber --- drivers/pci/

Re: [PATCH v2] pwm_bl: Fix overflow condition

On Tue, Aug 29, 2017 at 01:34:34PM -0700, Derek Basehore wrote: > This fixes an overflow condition that can happen with high max > brightness and period values in compute_duty_cycle. This fixes it by > using a 64 bit variable for computing the duty cycle. > > Signed-off-by: Derek Basehore > --- >

[PATCH] libnvdimm, label: fix index block size calculation

The old calculation assumed that the label space was 128k and the label size is 128. With v1.2 labels where the label size is 256 this calculation will return zero. We are saved by the fact that the nsindex_size is always pre-initialized from a previous 128 byte assumption and we are lucky that the

Re: [PATCH v2 1/2] ARM: dts: sun7i: Fix A20-OLinuXino-MICRO dts for LAN8710

Hi, On Mon, Aug 28, 2017 at 09:32:42AM +0300, Stefan Mavrodiev wrote: > From revision J the board uses new phy chip LAN8710. Compared > with RTL8201, RA17 pin is TXERR. It has pullup which causes phy > not to work. To fix this PA17 is muxed with GMAC function. This > makes the pin output-low. > >

Re: I/O hangs after resuming from suspend-to-ram

Hi, On Wed, Aug 30, 2017 at 12:58:21PM +0200, oleksa...@natalenko.name wrote: > Hi. > > So, current summary: > > 1) first patch + debug patch: I can reproduce the issue in wild, but not > with pm_test set; That is interesting, since I always test via pm_test. > 2) first patch + debug patch + s

Re: [PATCH v2 2/2] ARM: dts: sun7i: Add dts file for A20-OLinuXino-MICRO-eMMC

Hi, On Mon, Aug 28, 2017 at 09:32:43AM +0300, Stefan Mavrodiev wrote: > A20-OLinuXino-MICRO has option with onboard eMMC chip. For > now it's only shipped with 4BG chip, but in the future this > may change. > > Signed-off-by: Stefan Mavrodiev Queued for 4.15, thanks! Maxime -- Maxime Ripard,

Re: [PATCH v3 3/3] PCI: Avoid slot reset for Cavium cn8xxx root ports

On Wed, 30 Aug 2017 16:24:54 +0200 Jan Glauber wrote: > Root ports of cn8xxx do not function after a slot reset when used with > some e1000e and LSI HBA devices. Add a quirk to prevent slot reset on > these root ports. > > Signed-off-by: Jan Glauber > --- > drivers/pci/quirks.c | 16 ++

[PATCH 1/4] arm: topology: remove cpu_efficiency

Remove the 'cpu_efficiency/clock-frequency dt property' based solution to set cpu capacity which was only working for Cortex-A15/A7 arm big.LITTLE systems. I.e. the 'capacity-dmips-mhz' based solution is now the only one. It is shared between arm and arm64 and works for every big.LITTLE system no

[PATCH 4/4] arm: dts: r8a7790: add cpu capacity-dmips-mhz information

The following 'capacity-dmips-mhz' dt property values are used: Cortex-A15: 1024, Cortex-A7: 539 They have been derived form the cpu_efficiency values: Cortex-A15: 3891, Cortex-A7: 2048 by scaling them so that the Cortex-A15s (big cores) use 1024. The cpu_efficiency values were originally deri

[PATCH 3/4] arm: dts: exynos: add exynos5422 cpu capacity-dmips-mhz information

The following 'capacity-dmips-mhz' dt property values are used: Cortex-A15: 1024, Cortex-A7: 539 They have been derived form the cpu_efficiency values: Cortex-A15: 3891, Cortex-A7: 2048 by scaling them so that the Cortex-A15s (big cores) use 1024. The cpu_efficiency values were originally deri

[PATCH 2/4] arm: dts: exynos: add exynos5420 cpu capacity-dmips-mhz information

The following 'capacity-dmips-mhz' dt property values are used: Cortex-A15: 1024, Cortex-A7: 539 They have been derived from the cpu_efficiency values: Cortex-A15: 3891, Cortex-A7: 2048 by scaling them so that the Cortex-A15s (big cores) use 1024. The cpu_efficiency values were originally deri

[PATCH 0/4] arm: remove cpu_efficiency

For Cortex-A15/A7 arm big.LITTLE systems there are currently two ways to set the cpu capacity. The first one (commit 06073ee26775 "ARM: 8621/3: parse cpu capacity-dmips-mhz from DT") is based on dt 'cpu capacity-dmips-mhz' bindings and the appropriate dt parsing code in drivers/base/arch_topology.

Re: [RESEND PATCH 1/2] arm64: allwinner: a64: add SPI nodes

Hi Stefan, On Tue, Aug 29, 2017 at 10:26:51PM +0200, Stefan Brüns wrote: > The A64 SPI controllers are register compatible to the h3/h5 SPI > controllers. > > The A64 has two SPI controllers, each with a single chip select. > The handles for the DMA channels (23/24 for SPI0/SPI1) are omitted, > a

Re: [GIT] Networking

Pavel Machek writes: > Could we get this one in? > > wl1251 misses a spin_lock_init(). > > https://www.mail-archive.com/netdev@vger.kernel.org/msg177031.html > > It seems pretty trivial, yet getting the backtraces is not nice. It's in wireless-drivers-next and will be in 4.14-rc1: https://git.k

Re: [PATCH v3 46/59] KVM: arm/arm64: GICv4: Handle MOVALL applied to a vPE

On 28/08/17 19:18, Christoffer Dall wrote: > On Mon, Jul 31, 2017 at 06:26:24PM +0100, Marc Zyngier wrote: >> The current implementation of MOVALL doesn't allow us to call >> into the core ITS code as we hold a number of spinlocks. >> >> Let's try a method used in other parts of the code, were we c

Re: [PATCH v3 08/11] power: supply: bq24190_charger: Export 5V boost converter as regulator

* Hans de Goede [170830 02:49]: > Register the 5V boost converter as a regulator named "usb_otg_vbus". > > This commit also adds support for bq24190_platform_data, through which > non device-tree platforms can pass the regulator_init_data (containing > mappings for the consumer amongst other thin

Re: [PATCH v2] membarrier: provide register sync core cmd

On Tue, Aug 29, 2017 at 10:01:56PM -0700, Andy Lutomirski wrote: > > On Aug 27, 2017, at 8:05 PM, Mathieu Desnoyers > > wrote: > > > > - On Aug 27, 2017, at 3:53 PM, Andy Lutomirski l...@amacapital.net > > wrote: > > > >>> On Aug 27, 2017, at 1:50 PM, Mathieu Desnoyers > >>> > >>> wrote: >

Re: [PATCH v3 09/11] power: supply: bq24190_charger: Get input_current_limit from our supplier

* Hans de Goede [170830 02:49]: > On some devices the USB Type-C port power (USB PD 2.0) negotiation is > done by a separate port-controller IC, while the current limit is > controlled through another (charger) IC. > > It has been decided to model this by modelling the external Type-C > power bri

Re: [RESEND PATCH 2/2] arm64: allwinner: pine64: Enable spi0/spi1

Hi Stefan, On Tue, Aug 29, 2017 at 10:26:52PM +0200, Stefan Brüns wrote: > The two spi channels/controllers are available on the PI-2 resp. Euler > connector, enable both. Contrary to the Pi, the A64 SOC only supports > one chip select, so the second chipselect is not available (though > it can be

Re: [PATCH v4 1/3] livepatch: add (un)patch callbacks

On Fri, Aug 25, 2017 at 03:10:00PM -0400, Joe Lawrence wrote: > @@ -871,6 +882,13 @@ int klp_module_coming(struct module *mod) > pr_notice("applying patch '%s' to loading module > '%s'\n", > patch->mod->name, obj->mod->name); > > +

Re: [PATCH 1/7] ARM: dts: sun8i: h3: nanopi-m1: Enable IR controller

On Wed, Aug 30, 2017 at 05:01:04AM +0200, Philipp Rossak wrote: > From: Philipp Rossak > > The Nanopi M1 has an onboard IR receiver. > This enables the onboard IR receiver subnode. > > Signed-off-by: Philipp Rossak Queued for 4.15, thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Lin

Re: [PATCH 2/7] ARM: dts: sun8i: h3: nanopi-m1-plus: Enable IR controller

On Wed, Aug 30, 2017 at 05:01:05AM +0200, Philipp Rossak wrote: > From: Philipp Rossak > > The Nanopi M1 Plus has an onboard IR receiver. > This enables the onboard IR receiver subnode. > > Signed-off-by: Philipp Rossak Queued for 4.15, thanks! Maxime -- Maxime Ripard, Free Electrons Embedde

Re: RGB support prototype

Hi! > > We could even export (read-only) hue/saturation for single-color LEDs... > > Related patches from Heiner Kallweit are still sitting on devel branch > of linux-leds.git: > > https://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski/linux-leds.git/log/?h=devel > > Possibly it can serve

Re: [PATCH 4/7] ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on Nanopi M1 Plus

Hi, On Wed, Aug 30, 2017 at 05:01:07AM +0200, Philipp Rossak wrote: > From: Philipp Rossak > > The WiFi side of the AP6212 WiFi/BT combo module is connected to > mmc1. There are also GPIOs for enable and interrupts. > > Enable WiFi on this board by enabling mmc1 and adding the power > sequencin

[PATCH v3] eeprom: idt_89hpesx: Support both ACPI and OF probing

From: Huy Duong Allow the idt_89hpesx driver to get information from child nodes from both OF and ACPI by using more generic fwnode_property_read*() functions. Below is an example of instantiating idt_89hpesx driver via ACPI Table: Device(IDT0) { Name(_HID, "PRP0001") Name(_CID, "PRP0001") N

Re: [PATCH v3 49/59] KVM: arm/arm64: GICv4: Propagate VLPI properties at map time

On 28/08/17 19:18, Christoffer Dall wrote: > On Mon, Jul 31, 2017 at 06:26:27PM +0100, Marc Zyngier wrote: >> When the VLPI gets mapped, it must inherit the configuration of >> LPI configured at the vITS level. FOr that purpose, let's make > > *the LPI > *For that Will fix, thanks. > >> update_

Re: [PATCH v2] iwlwifi: pcie: move rx workqueue initialization to iwl_trans_pcie_alloc()

On Tue, Aug 22, 2017 at 10:37:29AM +0300, Luca Coelho wrote: > From: Luca Coelho > > Work queues cannot be allocated when a mutex is held because the mutex > may be in use and that would make it sleep. Doing so generates the > following splat with 4.13+: > > [ 19.513298] =

Re: [PATCH 00/13] mmu_notifier kill invalidate_page callback

On Tue, Aug 29, 2017 at 08:56:15PM -0400, Jerome Glisse wrote: > I will wait for people to test and for result of my own test before > reposting if need be, otherwise i will post as separate patch. > > > But from a _very_ quick read-through this looks fine. But it obviously > > needs testing. > >

[PATCH v4] ARM: dts: stm32: change pinctrl bindings definition

Initially each pin was declared in "include/dt-bindings/stm32-pinfunc.h" and each definition contained SOC names (ex: STM32F429_PA9_FUNC_USART1_TX). Since this approach was approved, the number of supported MCU has increased (STM32F429/STM32F469/STM32f746/STM32H743). To avoid to add a new file in "

switch in-kernel read/write calls to kernel_read/write

Hi all, this series moves almost all kernel callers of vfs_read/write and friends to the kernel_read/write family that includes the set_fs calls inside the called routines. The exceptions are the integrity code (Mimi has a pending series for that one) and the splice readv code which doesn't fit t

[PATCH 04/16] fs: move kernel_read to fs/read_write.c

Signed-off-by: Christoph Hellwig --- fs/exec.c | 17 - fs/read_write.c | 16 2 files changed, 16 insertions(+), 17 deletions(-) diff --git a/fs/exec.c b/fs/exec.c index 62175cbcc801..8adcc5eaa175 100644 --- a/fs/exec.c +++ b/fs/exec.c @@ -885,23 +885,6 @@ s

[PATCH 05/16] fs: fix kernel_read prototype

Use proper ssize_t and size_t types for the return value and count argument, move the offset last and make it an in/out argument like all other read/write helpers. Signed-off-by: Christoph Hellwig --- arch/mips/kernel/elf.c | 12 arch/x86/ia32/ia32_aout.

[PATCH 12/16] gadget/f_mass_storage: stop messing with the address limit

Instead use kernel_read/write consistently, which also makes sparse happy. Signed-off-by: Christoph Hellwig --- drivers/usb/gadget/function/f_mass_storage.c | 21 ++--- 1 file changed, 6 insertions(+), 15 deletions(-) diff --git a/drivers/usb/gadget/function/f_mass_storage.c b/

[PATCH 07/16] serial2002: switch serial2002_tty_write to kernel_{read/write}

Instead of playing games with the address limit. This also gains us proper usage of the write counter, time stamp updates and kvec validation. Signed-off-by: Christoph Hellwig --- drivers/staging/comedi/drivers/serial2002.c | 24 +--- 1 file changed, 5 insertions(+), 19 dele

[PATCH 01/16] ashmem: switch to ->read_iter

And use the proper VFS helper for using the backing file. Signed-off-by: Christoph Hellwig --- drivers/staging/android/ashmem.c | 23 ++- 1 file changed, 6 insertions(+), 17 deletions(-) diff --git a/drivers/staging/android/ashmem.c b/drivers/staging/android/ashmem.c index 6

[PATCH 10/16] btrfs: switch write_buf to kernel_write

Instead of playing with the addressing limits. Signed-off-by: Christoph Hellwig --- fs/btrfs/send.c | 18 -- 1 file changed, 4 insertions(+), 14 deletions(-) diff --git a/fs/btrfs/send.c b/fs/btrfs/send.c index b082210df9c8..24b989fd130c 100644 --- a/fs/btrfs/send.c +++ b/fs/btr

[PATCH 15/16] fs: unexport vfs_read and vfs_write

No modular users left. Given that they take user pointers there is no good reason to export it to drivers to start with. Signed-off-by: Christoph Hellwig --- fs/read_write.c | 4 1 file changed, 4 deletions(-) diff --git a/fs/read_write.c b/fs/read_write.c index 1a101619..d3ff440d7084

[PATCH 16/16] fs: unexport vfs_readv and vfs_writev

We've got no modular users left, and any potential modular user is better of with iov_iter based variants. Signed-off-by: Christoph Hellwig --- fs/read_write.c| 4 +--- include/linux/fs.h | 2 -- 2 files changed, 1 insertion(+), 5 deletions(-) diff --git a/fs/read_write.c b/fs/read_write.c

[PATCH 14/16] fs: unexport __vfs_read/__vfs_write

No modular users left, and any new ones should use kernel_read/write or iov_iter variants instead. Signed-off-by: Christoph Hellwig --- fs/read_write.c| 2 -- include/linux/fs.h | 1 - 2 files changed, 3 deletions(-) diff --git a/fs/read_write.c b/fs/read_write.c index 82f0111b98cf..1a10fff

[PATCH 13/16] lustre: switch to kernel_write

Signed-off-by: Christoph Hellwig --- drivers/staging/lustre/lnet/libcfs/tracefile.c | 10 ++ drivers/staging/lustre/lustre/obdclass/kernelcomm.c | 7 +-- 2 files changed, 3 insertions(+), 14 deletions(-) diff --git a/drivers/staging/lustre/lnet/libcfs/tracefile.c b/drivers/sta

[PATCH 11/16] mconsole: switch to kernel_read

Instead of playing with address limits. Signed-off-by: Christoph Hellwig --- arch/um/drivers/mconsole_kern.c | 7 +-- 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/arch/um/drivers/mconsole_kern.c b/arch/um/drivers/mconsole_kern.c index af326fb6510d..c4d162a94be9 100644 --- a/a

[PATCH 09/16] net/9p: switch p9_fd_read to kernel_write

Instead of playing with the addressing limits. Signed-off-by: Christoph Hellwig --- net/9p/trans_fd.c | 10 ++ 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/net/9p/trans_fd.c b/net/9p/trans_fd.c index f12815777beb..903a190319b9 100644 --- a/net/9p/trans_fd.c +++ b/net/9p/

[PATCH 08/16] mm/nommu: switch do_mmap_private to kernel_read

Instead of playing with the address limit. This also gains us validation of the kvec and proper atime updates. Signed-off-by: Christoph Hellwig --- mm/nommu.c | 13 ++--- 1 file changed, 2 insertions(+), 11 deletions(-) diff --git a/mm/nommu.c b/mm/nommu.c index fc184f597d59..379f1022b

Re: [RESEND PATCH 2/3] regulator: Add support for stm32-vrefbuf

On Wed, Aug 30, 2017 at 11:11:24AM +0200, Fabrice Gasnier wrote: > On 08/29/2017 08:57 PM, Mark Brown wrote: > > On Mon, Aug 28, 2017 at 02:58:52PM +0200, Fabrice Gasnier wrote: > >> +static int __init stm32_vrefbuf_init(void) > >> +{ > >> + return platform_driver_register(&stm32_vrefbuf_driver);

[PATCH 06/16] fs: fix kernel_write prototype

Make the position an in/out argument like all the other read/write helpers. Signed-off-by: Christoph Hellwig --- drivers/mtd/nand/nandsim.c| 2 +- drivers/target/target_core_alua.c | 3 ++- drivers/target/target_core_file.c | 3 +-- drivers/target/target_core_pr.c | 3 ++- fs/ecryptfs/

[PATCH 03/16] fs: move kernel_write to fs/read_write.c

Signed-off-by: Christoph Hellwig --- fs/read_write.c | 17 - fs/splice.c | 16 2 files changed, 16 insertions(+), 17 deletions(-) diff --git a/fs/read_write.c b/fs/read_write.c index 0cc7033aa413..417dbe199505 100644 --- a/fs/read_write.c +++ b/fs/read_write.

[PATCH 02/16] autofs4: switch autofs4_write to __kernel_write

Instead of playing games with the address limit.. Signed-off-by: Christoph Hellwig --- fs/autofs4/waitq.c | 9 + 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/fs/autofs4/waitq.c b/fs/autofs4/waitq.c index 24a58bf9ca72..4ac49d038bf3 100644 --- a/fs/autofs4/waitq.c +++ b/fs/

Re: [PATCH] storvsc: fix memory leak on ring buffer busy

On Tue, 29 Aug 2017 21:31:11 -0400 "Martin K. Petersen" wrote: > Long, > > > When storvsc is sending I/O to Hyper-v, it may allocate a bigger > > buffer descriptor for large data payload that can't fit into a > > pre-allocated buffer descriptor. This bigger buffer is freed on return > > path. >

Re: [PATCH V1] regulator: pv88090: Exception handling for out of bounds

On Wed, Aug 30, 2017 at 05:54:27PM +0900, Eric Jeong wrote: I've applied this but a few things to bear in mind for future submissions: > From: Eric Jeong Please try to ensure that your e-mail address matches the one you use for signoff, this avoids your mail looking like a non-author send that'

[PATCH v2 0/6] Add support for Hexagon q6v5-wcss integrated core

IPQ8074 has an integrated Hexagon dsp core Q6v5 and a wireless lan (Lithium) IP. This series adds the remoteproc driver to reset, load and boot Q6 firmware. The first patch is to make the mdt_loader authenticate the firmware only if required, so that the code can be reused for self-authenticating

[PATCH v2 1/6] remoteproc: qcom: mdt_loader: Make the firmware authentication optional

qcom_mdt_load function loads the mdt type firmware and initialises the secure memory as well. Make the initialisation only when requested by the caller, so that the function can be used by self-authenticating remoteproc as well. Signed-off-by: Sricharan R --- drivers/soc/qcom/mdt_loader.c

[PATCH v2 3/6] remoteproc: qcom: Push reset ops, fw ops, rproc ops in to of_match data

Instead of directly assigning reset, fw and rproc ops, put them in to of_match data and get from that. Currently same ops are used for all compatibles, but that will change when we add q6v5-wcss support. Signed-off-by: Sricharan R --- drivers/remoteproc/qcom_q6v5_pil.c | 38 +

[PATCH v2 6/6] remoteproc: qcom: Add q6v5-wcss rproc ops

q6v5-wcss core's start function is mostly common with the q6v5 of msm8996. So reuse that and add the stop function. Signed-off-by: Sricharan R --- drivers/remoteproc/qcom_q6v5_pil.c | 212 + 1 file changed, 212 insertions(+) diff --git a/drivers/remoteproc/qc

[PATCH v2 5/6] remoteproc: qcom: Add support for q6v5-wcss pil

IPQ8074 has an integrated Hexagon dsp core q6v5 and a wireless lan (Lithium) IP. An mdt type single image format is used for the firmware. So the mdt_load function can be directly used to load the firmware. Also add the relevant resets required for this core. Signed-off-by: Sricharan R --- .../d

[PATCH v2 4/6] remoteproc: qcom: Split the head and tail of the q6v5-pil rproc start function

Most of the q6v5-pil start function is same for the q6v5-wcss rproc that will be added later. So split and move out the common pieces so that the same code can be reused. Signed-off-by: Sricharan R --- drivers/remoteproc/qcom_q6v5_pil.c | 165 + 1 file changed

[PATCH v2 2/6] remoteproc: Export rproc_elf_get_boot_addr

Export rproc_elf_get_boot_addr so that it can be used by any remoteproc to get the bootaddr of the elf type firmware images. This is used in the subsequent patch by the q6v5 based remoteproc while loading its elf based mdt type image. Signed-off-by: Sricharan R --- drivers/remoteproc/remoteproc_

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