Adds zstd support to crypto and scompress. Only supports the default
level.
Signed-off-by: Nick Terrell
---
crypto/Kconfig | 9 ++
crypto/Makefile | 1 +
crypto/testmgr.c | 10 +++
crypto/testmgr.h | 71 +++
crypto/zstd.c| 265
2017-08-10 0:42 GMT+08:00 Peter Zijlstra :
> On Wed, Aug 09, 2017 at 05:26:14PM +0800, Yafang Shao wrote:
>> 2017-08-09 17:09 GMT+08:00 Peter Zijlstra :
>> > On Wed, Aug 09, 2017 at 04:01:49PM +0800, Yafang Shao wrote:
>> >> 2017-08-09 15:43 GMT+08:00 Peter Zijlstra :
>> >> > On Wed, Aug 09, 2017 a
On Wed, Aug 09, 2017 at 09:52:41AM -0600, Jason Gunthorpe wrote:
> On Wed, Aug 09, 2017 at 04:48:08PM +0300, Moni Shoua wrote:
> > >
> > > I'm not sure this is a good idea, linux/in.h should not be included in
> > > userspace users of this file, 'sockaddr_in' needs to come from glibc's
> > > 'netin
can this be merged/queued to next, if no further comments please?
On Wed, Jul 26, 2017 at 8:19 AM, Zhangshaokun
wrote:
>
> Hi Ganapat
>
> I have tested patch-v4 on Hisilicon's hip08 board for implementation defined
> PMU events,
> and it works, So
> Tested-by: Shaokun Zhang
>
> Thanks.
> Shaoku
We've found that while in host mode on HiKey using Android, if
one runs the command:
stop adbd
The existing usb devices being utilized in host mode are disconnected.
This is most visible with usb networking devices.
This seems to be due to adbd closing the file:
/dev/usb-ffs/adb/ep0
Which cal
On platforms with an arch timer erratum workaround, it's possible for
arch_timer_reg_read_stable() to recurse into itself when certain
tracing options are enabled, leading to stack overflows and related
problems.
For example, when PREEMPT_TRACER and FUNCTION_GRAPH_TRACER are
selected, it's possibl
Hi Greg,
On 9 August 2017 at 23:42, Greg Kroah-Hartman
wrote:
> This is the start of the stable review cycle for the 4.9.42 release.
> There are 93 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
>
On Wed, Aug 09, 2017 at 11:41:50AM +0900, Minchan Kim wrote:
> On Tue, Aug 08, 2017 at 07:31:22PM -0700, Matthew Wilcox wrote:
> > On Wed, Aug 09, 2017 at 10:51:13AM +0900, Minchan Kim wrote:
> > > On Tue, Aug 08, 2017 at 06:29:04AM -0700, Matthew Wilcox wrote:
> > > > On Tue, Aug 08, 2017 at 05:49
On Wed, Aug 9, 2017 at 8:04 PM, Matthew Wilcox wrote:
> On Wed, Aug 09, 2017 at 11:41:50AM +0900, Minchan Kim wrote:
>> On Tue, Aug 08, 2017 at 07:31:22PM -0700, Matthew Wilcox wrote:
>> > On Wed, Aug 09, 2017 at 10:51:13AM +0900, Minchan Kim wrote:
>> > > On Tue, Aug 08, 2017 at 06:29:04AM -0700,
Hi Yoshihiro,
On 08/09/2017 06:44 AM, Yoshihiro Shimoda wrote:
Hi Gustavo,
Thank you for the patch!
I'm glad to help :)
-Original Message-
From: Gustavo A. R. Silva
Sent: Wednesday, August 9, 2017 7:35 AM
platform_get_irq() returns an error code, but the renesas_usb3 driver
ignore
Hi,
On Aug 7 2017 21:22, Oleksandr Andrushchenko wrote:
From: Oleksandr Andrushchenko
This patch series adds support for Xen [1] para-virtualized
sound frontend driver. It implements the protocol from
include/xen/interface/io/sndif.h with the following limitations:
- mute/unmute is not support
On 2017/8/8 21:43, Yunlong Song wrote:
> In this patch, we add a new sysfs interface, we can use it to gradually
> achieve
> the reserved_blocks finally, even when reserved_blocks is initially set over
> user_block_count - total_valid_block_count. This is very useful, especially
> when
> we upgra
On Mon, 31 Jul 2017 07:17:38 -0400
Harinath Nampally wrote:
This driver supports multiple devices like mma8653, mma8652, mma8452, mma8453
and
fxls8471. Almost all these devices have more than one event. Current driver
design
hardcodes the event specific information, so only one event can be s
In P9, OCC (On-Chip-Controller) supports shared memory based
commad-response interface. Within the shared memory there is an OPAL
command buffer and OCC response buffer that can be used to send
inband commands to OCC. The following commands are supported:
1) Set system powercap
2) Set CPU-GPU powe
Adds support for clearing different sensor groups. OCC inband sensor
groups like CSM, Profiler, Job Scheduler can be cleared using this
driver. The min/max of all sensors belonging to these sensor groups
will be cleared.
Signed-off-by: Shilpasri G Bhat
---
.../bindings/powerpc/opal/sensor-groups
This patch adds support to set power-shifting-ratio which hints the
firmware how to distribute/throttle power between different entities
in a system (e.g CPU v/s GPU). This ratio is used by OCC for power
capping algorithm.
Signed-off-by: Shilpasri G Bhat
---
Documentation/ABI/testing/sysfs-firmw
Adds a generic powercap framework to change the system powercap
inband through OPAL-OCC command/response interface.
Signed-off-by: Shilpasri G Bhat
---
.../ABI/testing/sysfs-firmware-opal-powercap | 31 +++
arch/powerpc/include/asm/opal-api.h| 3 +
arch/powerpc/include/a
On Mon, 31 Jul 2017 07:17:38 -0400
Harinath Nampally wrote:
This driver supports multiple devices like mma8653, mma8652, mma8452, mma8453
and
fxls8471. Almost all these devices have more than one event. Current driver
design
hardcodes the event specific information, so only one event can be s
add Danial and Thomas.
On 2017/8/10 10:52, Ding Tianhong wrote:
> On platforms with an arch timer erratum workaround, it's possible for
> arch_timer_reg_read_stable() to recurse into itself when certain
> tracing options are enabled, leading to stack overflows and related
> problems.
>
> For exam
On Thu, Aug 10, 2017 at 09:55:56AM +0900, Byungchul Park wrote:
> On Wed, Aug 09, 2017 at 05:50:59PM +0200, Peter Zijlstra wrote:
> >
> >
> > Heh, look what it does...
>
> It does not happen in my machine..
>
> I tihink it happens because of "Simplify xhlock ring buffer invalidation"
> patch of
My only suggestion for adding all these chips' orientation features, is
to start the discussion independently from this driver. Are there other
device series that provide such an orientation interrupt? Is it worth
finding a representation in iio?
Given the number of accelerometers these days have
Hi,
On Sat, Jul 22, 2017 at 10:28 AM, Icenowy Zheng wrote:
> The Banana Pi M64 board uses the A64 chip's EMAC to provide Ethernet
> link.
>
> Add the ethernet0 alias in the device tree, in order to let U-Boot
> generate a MAC address from the chip's SID.
>
> Signed-off-by: Icenowy Zheng
As ment
On Thu, Aug 10, 2017 at 8:20 AM, Andrew Lunn wrote:
> On Wed, Aug 09, 2017 at 03:47:34PM -0700, Florian Fainelli wrote:
>> On August 9, 2017 5:10:30 AM PDT, David Wu wrote:
>> >Add the documentation for internal phy. A boolean property
>> >indicates that a internal phy will be used.
>> >
>> >Sign
I think the aim of reserved_blocks function is to leave space for f2fs
and FTL, so I change it to a
soft version so that it can be used to fit to the data image which does
not satisfy the hard version,
especially for backward compatibility when updated kernel with new
default reserved_blocks set
On Wed, Aug 09, 2017 at 08:04:33PM -0700, Matthew Wilcox wrote:
> On Wed, Aug 09, 2017 at 11:41:50AM +0900, Minchan Kim wrote:
> > On Tue, Aug 08, 2017 at 07:31:22PM -0700, Matthew Wilcox wrote:
> > > On Wed, Aug 09, 2017 at 10:51:13AM +0900, Minchan Kim wrote:
> > > > On Tue, Aug 08, 2017 at 06:29
On Wed, Aug 09, 2017 at 10:59:02AM +0800, Ye Xiaolong wrote:
> On 08/08, Minchan Kim wrote:
> >On Mon, Aug 07, 2017 at 10:51:00PM -0700, Nadav Amit wrote:
> >> Nadav Amit wrote:
> >>
> >> > Minchan Kim wrote:
> >> >
> >> >> Hi,
> >> >>
> >> >> On Tue, Aug 08, 2017 at 09:19:23AM +0800, kernel t
Minchan Kim wrote:
> On Wed, Aug 09, 2017 at 10:59:02AM +0800, Ye Xiaolong wrote:
>> On 08/08, Minchan Kim wrote:
>>> On Mon, Aug 07, 2017 at 10:51:00PM -0700, Nadav Amit wrote:
Nadav Amit wrote:
> Minchan Kim wrote:
>
>> Hi,
>>
>> On Tue, Aug 08, 2017 at 09:19:
On Wed, Aug 09, 2017 at 09:14:50PM -0700, Nadav Amit wrote:
Hi Nadav,
< snip >
> > According to the description it is "testcase:brk increase/decrease of
> > one
> > page”. According to the mode it spawns multiple processes, not threads.
> >
> > Since a single page is unmapp
The frequency update from the utilization update handlers can be divided
into two parts:
(A) Finding the next frequency
(B) Updating the frequency
While any CPU can do (A), (B) can be restricted to a group of CPUs only,
depending on the current platform.
For platforms where fast cpufreq switchin
Utilization update callbacks are now processed remotely, even on the
CPUs that don't share cpufreq policy with the target CPU (if
dvfs_possible_from_any_cpu flag is set).
But in non-fast switch paths, the frequency is changed only from one of
policy->related_cpus. This happens because the kthread
On Wed, Aug 09, 2017 at 05:15:57PM -0700, Daniel Colascione wrote:
> /proc/pid/smaps_rollup is a new proc file that improves the
> performance of user programs that determine aggregate memory
> statistics (e.g., total PSS) of a process.
>
> Android regularly "samples" the memory usage of various p
On Mon, Jul 31, 2017 at 10:54:50PM +0530, Prateek Sood wrote:
> Fix ordering of link creation between node->prev and prev->next in
> osq_lock(). A case in which the status of optimistic spin queue is
> CPU6->CPU2 in which CPU6 has acquired the lock.
>
> tail
> v
> ,-. <- ,-.
>
于 2017年8月10日 GMT+08:00 上午11:56:02, Chen-Yu Tsai 写到:
>Hi,
>
>On Sat, Jul 22, 2017 at 10:28 AM, Icenowy Zheng
>wrote:
>> The Banana Pi M64 board uses the A64 chip's EMAC to provide Ethernet
>> link.
>>
>> Add the ethernet0 alias in the device tree, in order to let U-Boot
>> generate a MAC address
From: Kuninori Morimoto
Now, we can use of_graph_get_remote_endpoint(). Let's use it.
Signed-off-by: Kuninori Morimoto
---
- Not tested
drivers/gpu/drm/sun4i/sun4i_backend.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c
b/drivers/g
From: Kuninori Morimoto
Now, we can use of_graph_get_remote_endpoint(). Let's use it.
Signed-off-by: Kuninori Morimoto
---
- not tested
drivers/of/property.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/of/property.c b/drivers/of/property.c
index 067f9fa..ad
Hi Chao,
I've fixed the below in f2fs.git.
On 08/02, Chao Yu wrote:
> From: Chao Yu
>
> This patch enables inner app/fs io stats and introduces below virtual fs
> nodes for exposing stats info:
> /sys/fs/f2fs//iostat_enable
> /proc/fs/f2fs//iostat_info
>
> Signed-off-by: Chao Yu
> ---
> v2:
>
previously burst length (BURST_LENGTH) is always set to equal
to bits_per_word, causes a 10us gap between each word in
transfer, which significantly affects performance.
This patch uses 32 bits transfer to simulate lower bits transfer,
and adjusts burst length runtimely to use biggeest burst lengt
Currently we are using a fixed list of dai links in the driver.
This serial of patches would let the driver parse dai links from
dts, so that we can disable some of them for future boards in the
dts.
Tested on my chromebook bob(with cros 4.4 kernel), it still works
after disabled rt5514 codec in
Refactor rockchip_sound_probe, parse dai links from dts instead of
hard coding them.
Signed-off-by: Jeffy Chen
---
Changes in v2:
Let rockchip,codec-names be a required property, because we plan to
add more supported codecs to the fixed dai link list in the driver.
sound/soc/rockchip/rk3399_gr
Add rockchip,codec-names property for codecs.
Signed-off-by: Jeffy Chen
---
Changes in v2: None
arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
index d4
Add a new rockchip,codec-names property, so that the driver can parse
the codecs by name.
Signed-off-by: Jeffy Chen
---
Changes in v2:
Let rockchip,codec-names be a required property.
Documentation/devicetree/bindings/sound/rockchip,rk3399-gru-sound.txt | 2 ++
1 file changed, 2 insertions(+)
thanks, Doug!
Rafael,
Reviewed-by: Len Brown
On Tue, Aug 8, 2017 at 5:12 PM, Doug Smythies wrote:
> According to Intel 64 and IA-32 Architectures SDM, Volume 3,
> Chapter 14.2, "Software needs to exercise care to avoid delays
> between the two RDMSRs (for example interrupts)".
>
> So, disable
On Thu, Aug 10, 2017 at 12:34:23AM +0200, Rafael J. Wysocki wrote:
> --- linux-pm.orig/drivers/acpi/scan.c
> +++ linux-pm/drivers/acpi/scan.c
> @@ -2139,6 +2139,10 @@ int __init acpi_scan_init(void)
> acpi_get_spcr_uart_addr();
> }
>
> + acpi_gpe_apply_masked_gpes(
clk_prepare_enable() can fail here and we must check its return value.
Signed-off-by: Arvind Yadav
---
changes in v2:
Rebase patch[1]https://lkml.org/lkml/2017/8/3/968
and apply this change. Otherwise will merge conflict.
drivers/memory/mtk-smi.c | 5 -
1 file chan
On Thursday 10 August 2017 05:35 AM, Rob Herring wrote:
> On Tue, Aug 01, 2017 at 10:24:28AM +0530, Vignesh R wrote:
>> As per 66AK2G02 TRM[1] SPRUHY8F section 11.15.5.3 Indirect Access
>> Controller programming sequence, a delay equal to couple QSPI master
>> clock(~5ns) is required after settin
On Thursday 10 August 2017 05:40 AM, Rob Herring wrote:
> On Tue, Aug 01, 2017 at 10:24:29AM +0530, Vignesh R wrote:
>> Cadence QSPI IP has a adapted loopback circuit which can be enabled by
>> setting BYPASS field to 0 in READCAPTURE register. It enables use of
>> QSPI return clock to latch the
Please pull to get these sparc changes:
1) Recognize M8 cpus, just basic chip ID matching, from Allen Pais.
2) Prevent crashes when bringing up sunvdc virtual block devices in
some environments. From Jim Quigley.
Thanks!
The following changes since commit 0a23ea65ce9f10ec2ea392571006b781b1
On Wed, Aug 9, 2017 at 7:26 PM, Corey Minyard wrote:
> On 08/09/2017 08:04 PM, Brendan Higgins wrote:
>>>
>>> Perhaps that is some level of abuse, but it's pretty common. I'm not
>>> against it.
>>>
>>> There is standard IPMI firmware NetFN (though no commands defined) that
>>> if
>>> you use
>>>
On Thursday 10 August 2017 05:38 AM, Rob Herring wrote:
> On Tue, Aug 01, 2017 at 10:24:28AM +0530, Vignesh R wrote:
>> As per 66AK2G02 TRM[1] SPRUHY8F section 11.15.5.3 Indirect Access
>> Controller programming sequence, a delay equal to couple QSPI master
>> clock(~5ns) is required after settin
On Wed, Aug 9, 2017 at 7:31 PM, Jeremy Kerr wrote:
> Hi Brendan,
>
>> The driver was handling interaction with userspace on its own. This
>> patch changes it to use the functionality of the ipmi_bmc framework
>> instead.
>>
>> Note that this removes the ability for the BMC to set SMS_ATN by making
Reported by syzkaller:
The kvm-intel.unrestricted_guest=0
WARNING: CPU: 5 PID: 1014 at /home/kernel/data/kvm/arch/x86/kvm//x86.c:7227
kvm_arch_vcpu_ioctl_run+0x38b/0x1be0 [kvm]
CPU: 5 PID: 1014 Comm: warn_test Tainted: GW OE 4.13.0-rc3+ #8
RIP: 0010:kvm_arch_vcpu_ioctl_run+0x
2017-08-10 1:07 GMT+08:00 Dmitry Vyukov :
> Hello,
>
> syzkaller fuzzer has hit the following WARNING in kvm_arch_vcpu_ioctl_run.
> This is easily reproducible and reproducer is attached at the bottom.
> The report is on upstream commit
> 26c5cebfdb6ca799186f1e56be7d6f2480c5012c. This requires sett
On Wednesday 09 August 2017 09:46 PM, Gustavo A. R. Silva wrote:
> platform_get_irq() returns an error code, but the pci-dra7xx driver
> ignores it and always returns -EINVAL. This is not correct and,
> prevents -EPROBE_DEFER from being propagated properly.
>
> Print and propagate the return val
Hi John,
Is it possible to try the attached patch?
I am not sure if it actually fixes the issue. But I think it is worth a try.
Also, could you get me all the ipv6 routes when you plug in the usb
using "ip -6 route show"? (If you have multiple routing tables
configured, could you dump them all?)
From: Bhumika Goyal
Date: Wed, 9 Aug 2017 10:34:15 +0530
> Make these structures const as they are only stored in the ops field of
> a dsa_switch structure, which is const.
> Done using Coccinelle.
>
> Signed-off-by: Bhumika Goyal
Applied, thank you.
From: Bhumika Goyal
Date: Wed, 9 Aug 2017 14:49:15 +0530
> Make these structures const as they are either passed to the function
> atm_dev_register having the corresponding argument as const or stored in
> the ops field of a atm_dev structure, which is also const.
> Done using Coccinelle.
>
> S
From: Bhumika Goyal
Date: Wed, 9 Aug 2017 15:02:08 +0530
> Make these const as they are only stored in the ops field of a atm_dev
> structure, which is const.
> Done using Coccinelle.
>
> Signed-off-by: Bhumika Goyal
Applied.
From: John Crispin
Date: Wed, 9 Aug 2017 12:09:30 +0200
> The MT7623 has several DMA rings. Inside the SW path, the core will use
> the PDMA when receiving traffic. While bringing up the HW path we noticed
> that the PPE requires the QDMA RX to also be brought up as it uses this
> ring internall
From: John Crispin
Date: Wed, 9 Aug 2017 14:41:15 +0200
> RPS and probably other kernel features are currently broken on some if not
> all DSA devices. The root cause of this is that skb_hash will call the
> flow_dissector. At this point the skb still contains the magic switch
> header and the s
On 08/10/2017 05:36 AM, Andrew Morton wrote:
On Thu, 3 Aug 2017 14:38:15 +0800 Wei Wang wrote:
From: Matthew Wilcox
The eXtensible Bitmap is a sparse bitmap representation which is
efficient for set bits which tend to cluster. It supports up to
'unsigned long' worth of bits, and this commi
On Wed, Aug 09, 2017 at 10:18:10AM +0530, Arvind Yadav wrote:
> clk_prepare_enable() can fail here and we must check its return value.
> we must call pm_runtime_disable() and pm_runtime_set_suspended(),
> If exynos_lpass_probe is not successful.
>
> Signed-off-by: Arvind Yadav
> ---
> changes in
Hi Jaegeuk,
On 2017/8/10 12:45, Jaegeuk Kim wrote:
> Hi Chao,
>
> I've fixed the below in f2fs.git.
Thank you fox fixing it. :)
Thanks,
On Wed, Aug 09, 2017 at 09:51:48AM -0700, Greg KH wrote:
> 4.12-stable review patch. If anyone has any objections, please let me know.
Yep I do, please don't use this one. It has a follow up/was superseded by:
f930c7043663 ("scsi: sg: only check for dxfer_len greater than 256M")
in Linus' tree
(
On Wed, Aug 9, 2017 at 10:07 PM, Daniel Vetter wrote:
> On Wed, Aug 09, 2017 at 04:02:45PM +0530, Archit Taneja wrote:
>>
>>
>> On 08/08/2017 04:58 PM, Bhumika Goyal wrote:
>> > Declare drm_connector_funcs structures as const.
>>
>> Could you rebase this series over the latest drm-misc-next? The
>
Hi All,
On 2017-08-10 08:01, Krzysztof Kozlowski wrote:
On Wed, Aug 09, 2017 at 10:18:10AM +0530, Arvind Yadav wrote:
clk_prepare_enable() can fail here and we must check its return value.
we must call pm_runtime_disable() and pm_runtime_set_suspended(),
If exynos_lpass_probe is not successful.
From: Sai Krishna Potthuri
This patch fix following checkpatch warnings in xadc driver
1. prefer 'unsigned int' to bare use of 'unsigned'.
2. else is not generally useful after a break or return.
3. fill all function definition arguments with identifier name
Signed-off-by: Sai Krishna Potthuri
Hi all,
Changes since 20170809:
The rpmsg tree gained a conflict against the qcom tree.
I again reverted a commit from the staging tree that was causing overnight
build failures.
Non-merge commits (relative to Linus' tree): 5133
5277 files changed, 207997 insertions(+), 107977 dele
On 8.8.2017 17:52, Joe Perches wrote:
> On Tue, 2017-08-08 at 14:04 +0200, Michal Simek wrote:
>> From: Sai Krishna Potthuri
> []
>> diff --git a/drivers/iio/adc/xilinx-xadc.h b/drivers/iio/adc/xilinx-xadc.h
> []
>> @@ -76,7 +76,7 @@ struct xadc_ops {
>> int (*setup)(struct platform_device *p
"mount -o remount" does not need to validate the target directory
for the same reasons that "umount" doesn't. It just needs to
find the mountpoint and verify it is a mountpount.
So change do_mount() to use user_path_mountpoint_at() in the
MS_REMOUNT case.
This means that mount(.., MS_REMOUNT|MS
From: Honghui Zhang
MediaTek's PCIe host controller has two generation HWs, MT2712 and MT7622
using the new generation HW, which has two root ports. They share most
probing flow with MT2701/MT7623. But the read/write config space logical
is different. The per-port registers must be touched for re
From: Honghui Zhang
Rename "port->index" to "port->slot" since the ports are hardwired at
PCI_SLOT. Also rename "mtk_pcie_parse_ports" to "mtk_pcie_parse_port"
since it parses one port each time.
No functional change in this patch.
Signed-off-by: Honghui Zhang
---
drivers/pci/host/pcie-mediat
From: Ryder Lee
MT2712 and MT7622 using a new IP block of Gen2 controller which has two
root ports and shares the same probing flow with MT2701/MT7623.
Both MT2712 and MT7622 have the same per-port control registers, but
there are slight differences between them:
MT7622 has more clocks than MT27
From: Ryder Lee
Add controller support for mt2712/mt7622 and update related
properities.
Signed-off-by: Ryder Lee
Signed-off-by: Honghui Zhang
Acked-by: Rob Herring
---
.../devicetree/bindings/pci/mediatek-pcie.txt | 168 -
1 file changed, 161 insertions(+), 7 deleti
From: Honghui Zhang
Introduce a structure "mtk_pcie_soc" to abstract the differences between
controller generations, and the .startup() hook is used to encapsulate
some SoC-dependent related setting. In doing so, the common code which
will be reused by future chips.
Signed-off-by: Ryder Lee
Sig
From: Ryder Lee
In order to accommodate other SoC generations, this patch updates filename
to make it more generic, regroups specific properties by SoCs, and removes
redundant descriptions.
Signed-off-by: Ryder Lee
Signed-off-by: Honghui Zhang
Acked-by: Rob Herring
---
...{mediatek,mt7623-pc
From: Ryder Lee
This is a transitional patch. We currently use platfarm_get_resource() for
retrieving the IOMEM resources, but there might be some chips don't have
subsys/shared registers part, which depends on platform design, and these
will be introduced in further patches.
Switch this functio
> >
> > Sorry for top posting (mobile...)
> > I have verified with system design and the data sheet that every wilink 6/7
> chip has a mac address in fuse so probably the board you have (pretty old,
> right?) has this mac address in fuse. Maybe it was from very early batches?
> Anyway I see no reas
From: Ryder Lee
Wait Gen2 training by using readl_poll_timeout() calls, and simplify
the hardware assert logical by merge it into the new interface
mtk_pcie_startup_port.
Signed-off-by: Ryder Lee
Signed-off-by: Honghui Zhang
---
drivers/pci/host/pcie-mediatek.c | 52 +-
This new clock driver set allows to have a fractional divided clock that
would generate a precise clock particularly suitable for audio
applications.
The main audio pll clock has two children clocks: one that is connected
to the PMC, the other that can directly drive a pad. As these two routes
hav
This patch series adds support for the audio PLLs and enables ClassD that
can be found in ATMEL Sama5d2 SoC.
There are two audio PLLs (PMC and PAD) that shares the same parent (FRAC).
FRAC can output between 620 and 700MHz and only multiply the rate of its
parent. The two audio PLLs then divide th
Since gclk (generated-clk) is now able to determine the rate of the
audio_pll, there is no need for classd to have a direct phandle to the
audio_pll while already having a phandle to gclk.
This binding is used by no board in mainline so it is safe to be
modified.
Signed-off-by: Quentin Schulz
Ac
The driver requests the current clk rate of each of its parent clocks to
decide whether a clock rate is suitable or not. It does not request
determine_rate from a parent clock which could request a rate change in
parent clock (i.e. there is no parent rate propagation).
We know the rate we want (pa
This allows gclk to determine audio_pll rate and set the parent rate
accordingly.
However, there are multiple children clocks that could technically
change the rate of audio_pll (via gck). With the rate locking, the first
consumer to enable the clock will be the one definitely setting the rate
of
This new clock driver set allows to have a fractional divided clock that
would generate a precise clock particularly suitable for audio
applications.
The main audio pll clock has two children clocks: one that is connected
to the PMC, the other that can directly drive a pad. As these two routes
hav
Since gclk (generated-clk) is now able to determine the rate of the
audio_pll, there is no need for classd to have a direct phandle to the
audio_pll while already having a phandle to gclk.
Thus, remove all mentions to aclk in classd driver and update macros and
variable names.
Signed-off-by: Quen
The way to find the best_diff and do the appropriate process afterwards
can be re-used.
This patch prepares the driver for an upcoming patch that will allow
clk_generated to determine the rate of the audio_pll.
Signed-off-by: Quentin Schulz
Acked-by: Boris Brezillon
Acked-by: Nicolas Ferre
---
On Wed, 2017-08-09 at 22:52 -0700, David Miller wrote:
> From: John Crispin
> Date: Wed, 9 Aug 2017 14:41:15 +0200
>
> > RPS and probably other kernel features are currently broken on some if not
> > all DSA devices. The root cause of this is that skb_hash will call the
> > flow_dissector. At th
> > Documentation/devicetree/bindings/i2c/trivial-devices.txt | 2 ++
trivial-devices.txt has been moved one directory up some months ago.
Rebasing to current top-of-tree probably makes sense.
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On Thu, Aug 10, 2017 at 9:50 AM, Viresh Kumar wrote:
> Utilization update callbacks are now processed remotely, even on the
> CPUs that don't share cpufreq policy with the target CPU (if
> dvfs_possible_from_any_cpu flag is set).
>
> But in non-fast switch paths, the frequency is changed only from
Hi Christoph,
On 2017-08-09 15:37, Christoph Hellwig wrote:
On Tue, Aug 08, 2017 at 11:15:35AM +0200, Michael Moese wrote:
All memory allocation functions have a pendant for allocating zeroed
memory, but dmam_alloc_coherent does not have such a pendant.
However, it is easier to read dmam_zalloc
On Mon, Aug 07, 2017 at 05:25:48PM +1000, Alexey Kardashevskiy wrote:
1;4803;0c> Some devices have a MSIX BAR not aligned to the system page size
> greater than 4K (like 64k for ppc64) which at the moment prevents
> such MMIO pages from being mapped to the userspace for the sake of
> the MSIX BAR c
On Mon, Aug 07, 2017 at 05:25:44PM +1000, Alexey Kardashevskiy wrote:
> This introduces capabilities to IOMMU groups. The first defined
> capability is IOMMU_GROUP_CAP_ISOLATE_MSIX which tells the IOMMU
> group users that a particular IOMMU group is capable of MSIX message
> filtering; this is usef
Hi Andrew,
在 2017/8/2 21:21, Andrew Lunn 写道:
+static struct phy_driver rockchip_phy_driver[] = {
+{
+ .phy_id = 0x1234d400,
+ .phy_id_mask= 0xfff0,
+ .name = "Rockchip internal EPHY",
+ .features = (PHY_BASIC
Hi all,
Changes since 20170808:
The rpmsg tree gained a conflict against the qcom tree.
I again reverted a commit from the staging tree that was causing overnight
build failures.
Non-merge commits (relative to Linus' tree): 4990
5110 files changed, 190078 insertions(+), 104959 deletions(-)
--
>
> From: Alexander Usyskin
>
> MEI device performs link reset during system suspend sequence.
> The link reset cannot be performed while device is in runtime suspend state.
> The resume sequence is bypassed with suspend direct complete
> optimization,so the optimization should be disabled for
Hi Dmitry and thanks for the comments.
I have only one question: why haven't your patches been applied yet?
-Mikko
>
> > Subject: Re: [v5] wlcore: add missing nvs file name info for wilink8
> >
> > * Reizer, Eyal [170807 00:47]:
> > > Hi Tony,
> > > >
> > > > * Reizer, Eyal [170807 00:32]:
> > > > > The following commits:
> > > > > c815fde wlcore: spi: Populate config firmware data
> > > > > d776fc8 wlcore:
Commit 65d8fc777f6d ("futex: Remove requirement for lock_page() in
get_futex_key()") removed an unnecessary lock_page() with the side-effect
that page->mapping needed to be treated very carefully. Two defensive
warnings were added in case any assumption was missed and the first warning
assumed a co
On 09/08/17 02:15, Jerome Glisse wrote:
> On Tue, Aug 08, 2017 at 03:59:36PM +0300, Igor Stoppa wrote:
[...]
>> I am tempted to add
>>
>> #define VM_PMALLOC 0x0100
[...]
> VM_PMALLOC sounds fine to me also adding a comment there pointing to
> pmalloc documentation would be a goo
ome drivers are briefly preparing+enabling the clock in their
->probe() hook and disable+unprepare them before leaving the function.
This can be problem if a clock is shared between different devices, and
one of these devices is critical to the system. If this clock is
enabled/disabled by a non-cr
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