On 07/25/2017 03:45 PM, Hans Verkuil wrote:
> On 07/25/17 14:34, Neil Armstrong wrote:
>> Hi Hans,
>
+static int meson_ao_cec_probe(struct platform_device *pdev)
+{
+ struct meson_ao_cec_device *ao_cec;
+ struct platform_device *hdmi_dev;
+ struct device_node *np;
On Thu, Jul 27, 2017 at 12:39:36PM +, Mathieu Desnoyers wrote:
> - On Jul 26, 2017, at 9:45 PM, Paul E. McKenney
> paul...@linux.vnet.ibm.com wrote:
>
> > On Wed, Jul 26, 2017 at 02:11:46PM -0700, Paul E. McKenney wrote:
> >> On Wed, Jul 26, 2017 at 08:37:23PM +, Mathieu Desnoyers wro
On Thu 27-07-17 23:01:05, Tetsuo Handa wrote:
> Michal Hocko wrote:
> > diff --git a/mm/memcontrol.c b/mm/memcontrol.c
> > index 544d47e5cbbd..86a48affb938 100644
> > --- a/mm/memcontrol.c
> > +++ b/mm/memcontrol.c
> > @@ -1896,7 +1896,7 @@ static int try_charge(struct mem_cgroup *memcg, gfp_t
> >
On Thu, Jul 27, 2017 at 04:36:24PM +0200, Peter Zijlstra wrote:
> On Thu, Jul 27, 2017 at 07:32:05AM -0700, Paul E. McKenney wrote:
> > > as per your proposed patch, will spray IPIs to all CPUs and at high
> > > rates.
> >
> > OK, I have updated my patch to do throttling.
>
> But not respect cpus
On Thu, Jul 27, 2017 at 07:36:58AM -0700, Paul E. McKenney wrote:
> > >
> > > The reporting of the quiescent state will acquire the leaf rcu_node
> > > structure's lock, with an smp_mb__after_unlock_lock(), which will
> > > one way or another be a full memory barrier. So the reorderings
> > > can
On 05/25/2017 06:02 AM, sean.w...@mediatek.com wrote:
From: Sean Wang
Add support for the Bananapi R2 (BPI-R2) development board from
BIPAI KEJI. Detailed hardware information for BPI-R2 which could be
found on http://www.banana-pi.org/r2.html
The patch currently only adds Mediatek GMAC, MT7
On Thu 27-07-17 14:04:27, Roman Gushchin wrote:
> A removed memory cgroup with a defined memory.low and some belonging
> pagecache has very low chances to be freed.
>
> If a cgroup has been removed, there is likely no memory pressure inside
> the cgroup, and the pagecache is protected from the ext
On Thu, 2017-07-27 at 08:02 -0600, Jens Axboe wrote:
> The bug looks like SCSI running the queue inline from IRQ
> context, that's not a good idea. Can you confirm the below works for
> you?
>
>
> diff --git a/drivers/scsi/scsi_lib.c b/drivers/scsi/scsi_lib.c
> index f6097b89d5d3..78740ebf966c 10
On 17 July 2017 at 18:31, Arvind Yadav wrote:
> pci_device_id are not supposed to change at runtime. All functions
> working with pci_device_id provided by work with
> const pci_device_id. So mark the non-const structs as const.
>
> File size before:
>textdata bss dec hex file
On 19 July 2017 at 17:25, Philipp Zabel wrote:
> Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting
> reset lines") started to transition the reset control request API calls
> to explicitly state whether the driver needs exclusive or shared reset
> control behavior. Convert a
On 19 July 2017 at 17:25, Philipp Zabel wrote:
> Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting
> reset lines") started to transition the reset control request API calls
> to explicitly state whether the driver needs exclusive or shared reset
> control behavior. Convert a
On 18 July 2017 at 23:43, Rob Herring wrote:
> Now that we have a custom printf format specifier, convert users of
> full_name to use %pOF instead. This is preparation to remove storing
> of the full path string for each node.
>
> Signed-off-by: Rob Herring
> Cc: Ulf Hansson
> Cc: Ludovic Desroc
On 19 July 2017 at 17:25, Philipp Zabel wrote:
> Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting
> reset lines") started to transition the reset control request API calls
> to explicitly state whether the driver needs exclusive or shared reset
> control behavior. Convert a
On 19 July 2017 at 17:25, Philipp Zabel wrote:
> Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting
> reset lines") started to transition the reset control request API calls
> to explicitly state whether the driver needs exclusive or shared reset
> control behavior. Convert a
On Thu, Jul 27, 2017 at 04:34:59PM +0200, Rafael J. Wysocki wrote:
> I can collect it, no problem.
>
> So from now on I will pick up APEI things with ACKs from you or Tony.
If you agree with that, that is. But we kinda do that already, more or
less. :-)
Then I guess we should add something like
When a lba either hits the cache or corresponds to an empty entry in the
L2P table, we need to advance the bio according to the position in which
the lba is located. Otherwise, we will copy data in the wrong page, thus
causing data corruption for the application.
In case of a cache hit, we assumed
Hi Jens,
Can you pick up this fix for 4.13? It is a fix to a read corruption in
pblk that has been there form the beginning. It is due to a bad bio
manipulation in the case that an I/O containing lbas that are invalid,
point to data in the host cache and point to data on the device, all
three in a
Linus,
please pull sound fixes for v4.13-rc3 from:
git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git
tags/sound-4.13-rc3
The topmost commit is ba92b1142879731f8030f4710e5f0a953aad
sound fixes for 4.13-rc3
This
On Thu, Jul 27, 2017 at 12:24:22PM +0200, Peter Zijlstra wrote:
> On Wed, Jul 26, 2017 at 11:30:32AM -0700, Paul E. McKenney wrote:
> > The patch I posted reverts to synchronize_sched() in kernels booted with
> > rcupdate.rcu_normal=1. ;-)
>
> So boot parameters are no solution and are only sligh
On 7/27/2017 2:39 AM, Ingo Molnar wrote:
* Tom Lendacky wrote:
The function arch_apei_get_mem_attributes() is used to set the page
protection type for ACPI physical addresses. When SME is active, the
associated protection type needs to not have the encryption mask set
since the ACPI tables li
On Wed, Jul 26, 2017 at 02:02:21PM -0700, Matthias Kaehlcke wrote:
> Remove trailing extra underscore in definition of _CCU_SUN8I_R_H
>
> Signed-off-by: Matthias Kaehlcke
Applied, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
If the IOMMU driver advertises 'real' reserved regions for MSIs, but
still includes the software-managed region as well, we are currently
blind to the former and will configure the IOMMU domain to map MSIs into
the latter, which is unlikely to work as expected.
Since it would take a ridiculous har
For ARM-based systems with a GICv3 ITS to provide interrupt isolation,
but hardware limitations which are worked around by having MSIs bypass
SMMU translation (e.g. HiSilicon Hip06/Hip07), VFIO neglects to check
for the IRQ_DOMAIN_FLAG_MSI_REMAP capability, (and thus erroneously
demands unsafe_inte
Ram Pai writes:
> --- a/arch/powerpc/include/asm/pkeys.h
> +++ b/arch/powerpc/include/asm/pkeys.h
> @@ -2,6 +2,18 @@
> #define _ASM_PPC64_PKEYS_H
>
> extern bool pkey_inited;
> +/* override any generic PKEY Permission defines */
> +#undef PKEY_DISABLE_ACCESS
> +#define PKEY_DISABLE_ACCESS
On Thu, Jul 27, 2017 at 10:47:03PM +0800, Boqun Feng wrote:
> On Thu, Jul 27, 2017 at 07:36:58AM -0700, Paul E. McKenney wrote:
> > > >
> > > > The reporting of the quiescent state will acquire the leaf rcu_node
> > > > structure's lock, with an smp_mb__after_unlock_lock(), which will
> > > > one
On Thu, Jul 27, 2017 at 04:45:44PM +0200, Michal Hocko wrote:
> On Thu 27-07-17 23:01:05, Tetsuo Handa wrote:
> > Michal Hocko wrote:
> > > diff --git a/mm/memcontrol.c b/mm/memcontrol.c
> > > index 544d47e5cbbd..86a48affb938 100644
> > > --- a/mm/memcontrol.c
> > > +++ b/mm/memcontrol.c
> > > @@ -
On Thu, Jul 27, 2017 at 08:50:24AM +0200, Michal Hocko wrote:
> Yes this will work and it won't depend on the oom_lock. But isn't it
> just more ugly than simply doing
>
> if (tsk_is_oom_victim) {
> down_write(&mm->mmap_sem);
> locked = true;
> }
> fre
On 7/27/2017 9:41 AM, Borislav Petkov wrote:
On Wed, Jul 26, 2017 at 01:04:34PM -0500, Tom Lendacky wrote:
The function arch_apei_get_mem_attributes() is used to set the page
protection type for ACPI physical addresses. When SME is active, the
associated protection type needs to not have the enc
On 07/26/2017 08:08 PM, Stefano Stabellini wrote:
> On Wed, 26 Jul 2017, Boris Ostrovsky wrote:
+ count++;
+ else
+ wait_event_interruptible(map->active.inflight_conn_req,
+ pvcalls_front_read_t
On Mon, Jul 24, 2017 at 02:07:47PM -0500, Brijesh Singh wrote:
> From: Tom Lendacky
>
> The current code checks only for sme_active() when determining whether
> to perform the encryption attribute change. Include sev_active() in this
> check so that memory attribute changes can occur under SME a
On Wed, Jun 28, 2017 at 07:36:15PM +0200, Geert Uytterhoeven wrote:
> Hi Linus,
>
> On Mon, Jun 26, 2017 at 10:45 AM, Geert Uytterhoeven
> wrote:
> > On Thu, Jun 22, 2017 at 4:54 PM, Jacopo Mondi
> > wrote:
> >>this is 6th round of RZ/A1 pin controller patch series.
> >>
> >> Where did we s
On Fri, Jul 21, 2017 at 04:59:00PM +0800, Baoquan He wrote:
> Move single iommu enabling codes into a wrapper function early_enable_iommu().
> This can make later kdump change easier.
>
> And also add iommu_disable_command_buffer and iommu_disable_event_buffer
> for later usage.
>
> Signed-off-by
On Fri, Jul 21, 2017 at 04:58:59PM +0800, Baoquan He wrote:
> diff --git a/drivers/iommu/amd_iommu_types.h b/drivers/iommu/amd_iommu_types.h
> index 294a409e283b..d15966b62b33 100644
> --- a/drivers/iommu/amd_iommu_types.h
> +++ b/drivers/iommu/amd_iommu_types.h
> @@ -417,6 +417,7 @@ extern struct
On Thu, Jul 27, 2017 at 12:45:50PM +0100, Richard Fitzgerald wrote:
> On Mon, 2017-06-05 at 12:10 -0500, Rob Herring wrote:
> > I already acked v2. Please add acks when posting new versions.
> Some maintainers have bitten my head off when I've carried forward their
> ack so I never know what peop
>>> static int pvcalls_front_probe(struct xenbus_device *dev,
>>> const struct xenbus_device_id *id)
>>> {
>>> + int ret = -EFAULT, evtchn, ref = -1, i;
>>> + unsigned int max_page_order, function_calls, len;
>>> + char *versions;
>>> + grant_ref_t gref_head = 0;
On Thu, Jul 27, 2017 at 4:49 PM, Borislav Petkov wrote:
> On Thu, Jul 27, 2017 at 04:34:59PM +0200, Rafael J. Wysocki wrote:
>> I can collect it, no problem.
>>
>> So from now on I will pick up APEI things with ACKs from you or Tony.
>
> If you agree with that, that is. But we kinda do that alread
This patch documents the devicetree bindings for ARM DSU PMU.
Cc: Mark Rutland
Cc: Will Deacon
Cc: Rob Herring
Signed-off-by: Suzuki K Poulose
---
.../devicetree/bindings/arm/arm-dsu-pmu.txt| 27 ++
1 file changed, 27 insertions(+)
create mode 100644 Documentation
From: Colin Ian King
Trivial fix to spelling mistakes in macros:
CA_APERATURE_SIZE -> CA_APERTURE_SIZE
CA_APERATURE_BASE -> CA_APERTURE_BASE
..and also join two literal strings together to clean up a
checkpatch warning.
Signed-off-by: Colin Ian King
---
arch/ia64/include/asm/sn/tioca.h | 4
Use the new generic helper of_device_node_get_cpu() instead
of using our own version to map a device node to logical CPU
number.
Acked-by: Marc Zyngier
Signed-off-by: Suzuki K Poulose
---
drivers/irqchip/irq-gic-v3.c | 30 +++---
1 file changed, 3 insertions(+), 27 delet
Add support for the Cluster PMU part of the ARM DynamIQ Shared Unit (DSU).
The DSU integrates one or more cores with an L3 memory system, control
logic, and external interfaces to form a multicore cluster. The PMU
allows counting the various events related to L3, SCU etc, along with
providing a cyc
Add a helper to map a device node to a logical CPU number to avoid
duplication. Currently this is open coded in different places (e.g
gic-v3, coresight). The helper tries to map device node to a "possible"
logical CPU id, which may not be online yet. It is the responsibility
of the user to make sur
Reuse the new generic helper, of_device_node_get_cpu() to map a
given CPU phandle to a logical CPU number.
Cc: Leo Yan
Acked-by: Mathieu Poirier
Signed-off-by: Suzuki K Poulose
---
drivers/hwtracing/coresight/of_coresight.c | 20 ++--
1 file changed, 6 insertions(+), 14 deletio
This series adds support for the PMU in ARM DynamIQ Shared Unit (DSU).
The DSU integrates one or more cores with an L3 memory system, control
logic, and external interfaces to form a multicore cluster. The PMU
allows counting the various events related to L3, SCU etc, using 32bit
independent counte
Export perf_event_update_userpage() so that PMU driver using them,
can be built as modules.
Cc: Peter Zilstra
Signed-off-by: Suzuki K Poulose
---
kernel/events/core.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/kernel/events/core.c b/kernel/events/core.c
index 426c2ff..21aad7a 100644
--
The macros for testing domain types are more complicated then they
need to. Simplify them.
Signed-off-by: Juergen Gross
---
include/xen/xen.h | 20 +---
1 file changed, 9 insertions(+), 11 deletions(-)
diff --git a/include/xen/xen.h b/include/xen/xen.h
index 6e8b7fc79801..28c59c
On Tue, 18 Jul 2017, Rob Herring wrote:
> Now that we have a custom printf format specifier, convert users of
> full_name to use %pOF instead. This is preparation to remove storing
> of the full path string for each node.
Acked-by: Paul Walmsley # for mach-omap2/omap-hwmod.c
- Paul
On Thu, Jul 27, 2017 at 09:29:20AM +0800, qiaozhou wrote:
> On 2017年07月26日 22:16, Thomas Gleixner wrote:
> >--- a/kernel/time/timer.c
> >+++ b/kernel/time/timer.c
> >@@ -1301,10 +1301,12 @@ static void expire_timers(struct timer_b
> > if (timer->flags & TIMER_IRQSAFE) {
> >
On Tue, 25 Jul 2017, Kees Cook wrote:
> +/*
> + * Returns freelist pointer (ptr). With hardening, this is obfuscated
> + * with an XOR of the address where the pointer is held and a per-cache
> + * random number.
> + */
> +static inline void *freelist_ptr(const struct kmem_cache *s, void *ptr,
> +
On 07/27/2017 04:43 PM, Neil Armstrong wrote:
> On 07/25/2017 03:45 PM, Hans Verkuil wrote:
>> On 07/25/17 14:34, Neil Armstrong wrote:
>>> Hi Hans,
>>
> +static int meson_ao_cec_probe(struct platform_device *pdev)
> +{
> + struct meson_ao_cec_device *ao_cec;
> + struct platform_dev
On 07/27/2017 05:17 AM, Arnaldo Carvalho de Melo wrote:
Em Wed, Jul 26, 2017 at 08:57:13PM +0900, Taeung Song escreveu:
On 07/26/2017 01:17 AM, Arnaldo Carvalho de Melo wrote:
Em Wed, Jul 26, 2017 at 12:53:28AM +0900, Taeung Song escreveu:
On 07/25/2017 11:42 PM, Arnaldo Carvalho de Melo wro
On Wed, 26 Jul 2017, Kees Cook wrote:
> > Although in either case we are adding code to the fastpath...
>
> While I'd like it unconditionally, I think Alexander's proposal was to
> put it behind CONFIG_SLAB_FREELIST_HARDENED.
Sounds good.
> BTW, while I've got your attention, can you Ack the oth
Sergey Senozhatsky wrote:
> Hello,
>
> 8c636138f497b36ae95f ("mm: prevent racy access to tlb_flush_pending") kills
> the build
>
> kernel/fork.c: In function ‘mm_init’:
> kernel/fork.c:810:18: error: ‘struct mm_struct’ has no member named
> ‘tlb_flush_pending’; did you mean ‘tlb_flush_batched’
On Thu, 27 Jul 2017, Will Deacon wrote:
> On Thu, Jul 27, 2017 at 09:29:20AM +0800, qiaozhou wrote:
> > On 2017年07月26日 22:16, Thomas Gleixner wrote:
> > >--- a/kernel/time/timer.c
> > >+++ b/kernel/time/timer.c
> > >@@ -1301,10 +1301,12 @@ static void expire_timers(struct timer_b
> > > if
Hi Nick,
See below,
On Thu, Jul 27, 2017 at 03:56:10PM +0200, Peter Zijlstra wrote:
> On Thu, Jul 27, 2017 at 06:08:16AM -0700, Paul E. McKenney wrote:
>
> > > So I think we need either switch_mm() or switch_to() to imply a full
> > > barrier for this to work, otherwise we get:
> > >
> > > C
The Amlogic SoC embeds a standalone CEC controller, this patch adds a driver
for such controller.
The controller does not need HPD to be active, and could support up to max
5 logical addresses, but only 1 is handled since the Suspend firmware can
make use of this unique logical address to wake up t
The Amlogic SoC embeds a standalone CEC controller, this patch adds a driver
for such controller.
The controller does not need HPD to be active, and could support up to max
5 logical addresses, but only 1 is handled since the Suspend firmware can
make use of this unique logical address to wake up t
The Amlogic SoCs embeds a standalone CEC Controller, this patch adds this
device bindings.
Acked-by: Rob Herring
Signed-off-by: Neil Armstrong
---
.../devicetree/bindings/media/meson-ao-cec.txt | 28 ++
1 file changed, 28 insertions(+)
create mode 100644 Documentation/d
Hi all,
I noticed that commit
2cb68e9b44f7 ("ARM: ep93xx: normalize clk API")
has no Signed-off-by from its committer.
--
Cheers,
Stephen Rothwell
Hi all,
I noticed that commit
f46a1bb0750a ("soc: qcom: mdt_loader: Use request_firmware_into_buf()")
has no Signed-off-by from its committer.
--
Cheers,
Stephen Rothwell
On Tue, Jul 18, 2017 at 04:43:29PM -0500, Rob Herring wrote:
> Now that we have a custom printf format specifier, convert users of
> full_name to use %pOF instead. This is preparation to remove storing
> of the full path string for each node.
>
> Signed-off-by: Rob Herring
> Cc: Scott Wood
> Cc:
On Fri, Jul 21, 2017 at 04:59:03PM +0800, Baoquan He wrote:
> Add function copy_dev_tables to copy the old DEV table entries of the panicked
Since there is only one (for now), you can name the function in
singular: copy_dev_table() or copy_device_table().
> kernel to the new allocated DEV table.
Linux doesn't have a useful metric to describe the memory health of a
system, a cgroup container, or individual tasks.
When workloads are bigger than available memory, they spend a certain
amount of their time inside page reclaim, waiting on thrashing cache,
and swapping in. This has impact on lat
This patch series implements a fine-grained metric for memory
health. It builds on top of the refault detection code to quantify the
time lost on VM events that occur exclusively due a lack of memory and
maps it into a percentage of lost walltime for the system and cgroups.
Rationale
When present
Hi Masami,
[auto build test WARNING on tip/auto-latest]
[also build test WARNING on v4.13-rc2 next-20170727]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Masami-Hiramatsu/kprobes-x86-Do-not
Refaults happen during transitions between workingsets as well as
in-place thrashing. Knowing the difference between the two has a range
of applications, including measuring the impact of memory shortage on
the system performance, as well as the ability to smarter balance
pressure between the files
There are several identical definitions of those macros in places that
mess with fixed-point load averages. Provide an official version.
Signed-off-by: Johannes Weiner
---
arch/powerpc/platforms/cell/spufs/sched.c | 3 ---
arch/s390/appldata/appldata_os.c | 4
drivers/cpuidle/gover
Thiago Jung Bauermann writes:
> diff --git a/arch/powerpc/include/asm/pkeys.h
> b/arch/powerpc/include/asm/pkeys.h
> index e31f5ee8e81f..67e6a3a343ae 100644
> --- a/arch/powerpc/include/asm/pkeys.h
> +++ b/arch/powerpc/include/asm/pkeys.h
> @@ -4,17 +4,6 @@
> #include
>
> extern bool pkey_i
On 07/27/2017 11:11 AM, Juergen Gross wrote:
> The macros for testing domain types are more complicated then they
> need to. Simplify them.
>
> Signed-off-by: Juergen Gross
> ---
> include/xen/xen.h | 20 +---
> 1 file changed, 9 insertions(+), 11 deletions(-)
>
> diff --git a/inc
On Mon, Jul 17, 2017 at 06:37:16PM +0200, Krzysztof Kozlowski wrote:
> On Mon, Jul 17, 2017 at 09:28:09AM +0200, Geert Uytterhoeven wrote:
> > Hi Krzysztof,
> >
> > On Mon, Jul 17, 2017 at 7:49 AM, Krzysztof Kozlowski
> > wrote:
> > > Remove options which do not exist anymore:
> >
> >
> >
> >
On Fri, Jul 21, 2017 at 04:59:04PM +0800, Baoquan He wrote:
> @@ -2128,9 +2131,43 @@ static void early_enable_iommu(struct amd_iommu *iommu)
> static void early_enable_iommus(void)
> {
> struct amd_iommu *iommu;
> + bool is_pre_enabled = false;
>
> - for_each_iommu(iommu)
> -
On 27/07/17 17:37, Boris Ostrovsky wrote:
> On 07/27/2017 11:11 AM, Juergen Gross wrote:
>> The macros for testing domain types are more complicated then they
>> need to. Simplify them.
>>
>> Signed-off-by: Juergen Gross
>> ---
>> include/xen/xen.h | 20 +---
>> 1 file changed, 9
On 07/26/2017 04:17 PM, Prateek Sood wrote:
> If a spinner is present, there is a chance that the load of
> rwsem_has_spinner() in rwsem_wake() can be reordered with
> respect to decrement of rwsem count in __up_write() leading
> to wakeup being missed.
>
> spinning writer up_writ
On 07/27/2017 04:01 AM, honghui.zh...@mediatek.com wrote:
From: Honghui Zhang
In the commit 3c8f4ad85c4b ("memory/mediatek: add support for mt2701"),
the larb->larbid was added but not initialized.
Mediatek's gen1 smi need this hardware larbid information to get the
register offset which cont
Please use get_maintainers and cc the right people/lists.
+Frank, DT list
On Thu, Jul 27, 2017 at 10:10 AM, Suzuki K Poulose
wrote:
> Add a helper to map a device node to a logical CPU number to avoid
> duplication. Currently this is open coded in different places (e.g
> gic-v3, coresight). The
+DT list
On Thu, Jul 27, 2017 at 10:10 AM, Suzuki K Poulose
wrote:
> This patch documents the devicetree bindings for ARM DSU PMU.
>
> Cc: Mark Rutland
> Cc: Will Deacon
> Cc: Rob Herring
> Signed-off-by: Suzuki K Poulose
> ---
> .../devicetree/bindings/arm/arm-dsu-pmu.txt| 27
> +++
On Fri, Jul 21, 2017 at 04:59:07PM +0800, Baoquan He wrote:
> +static bool amd_iommu_is_attach_deferred(struct iommu_domain *domain,
> + struct device *dev)
> +{
> + struct iommu_dev_data *dev_data = dev->archdata.iommu;
> + return dev_data->defer_attach
Hi Stephen,
> -Original Message-
> From: Stephen Hemminger [mailto:step...@networkplumber.org]
> Sent: Sunday, July 23, 2017 6:26 PM
> To: Salil Mehta
> Cc: da...@davemloft.net; Zhuangyuzeng (Yisen); huangdaode; lipeng (Y);
> mehta.salil@gmail.com; net...@vger.kernel.org; linux-
> ker.
On Fri, Jul 21, 2017 at 04:59:08PM +0800, Baoquan He wrote:
> AMD pointed out it's unsafe to update the device-table while iommu
> is enabled. It turns out that device-table pointer update is split
> up into two 32bit writes in the IOMMU hardware. So updating it while
> the IOMMU is enabled could h
On Thu, Jul 27, 2017 at 11:30:10AM -0400, Johannes Weiner wrote:
> + /*
> + * The domain is somewhat delayed when a number of tasks are
> + * delayed but there are still others running the workload.
> + *
> + * The domain is fully delayed when all non-idle tasks on the
> +
Hi Leon,
> -Original Message-
> From: linux-rdma-ow...@vger.kernel.org [mailto:linux-rdma-
> ow...@vger.kernel.org] On Behalf Of Leon Romanovsky
> Sent: Sunday, July 23, 2017 2:12 PM
> To: Salil Mehta
> Cc: da...@davemloft.net; Zhuangyuzeng (Yisen); huangdaode; lipeng (Y);
> mehta.salil...
On Fri, Jul 21, 2017 at 04:59:09PM +0800, Baoquan He wrote:
> When iommu is pre_enabled in kdump kernel, if a device is set up with
> guest translations (DTE.GV=1), then don't copy GCR3 table root pointer
> but move the device over to an empty guest-cr3 table and handle the
> faults in the PPR log
On Fri, Jul 21, 2017 at 04:59:11PM +0800, Baoquan He wrote:
> From: root
You probaly need to reset the author on this one.
>
> It's ok to disable iommu in normal kernel. While there's no need
> to disable it in kdump kernel after the on-flight dma issue has
> heen fixed.
>
> Signed-off-by: Bao
On 2017/7/27 0:43, Alex Williamson wrote:
> [cc +libvir-list]
>
> On Wed, 26 Jul 2017 21:16:59 +0800
> "Gao, Ping A" wrote:
>
>> The vfio-mdev provide the capability to let different guest share the
>> same physical device through mediate sharing, as result it bring a
>> requirement about how to
On 27/07/17 16:52, Rob Herring wrote:
+DT list
On Thu, Jul 27, 2017 at 10:10 AM, Suzuki K Poulose
wrote:
This patch documents the devicetree bindings for ARM DSU PMU.
Cc: Mark Rutland
Cc: Will Deacon
Cc: Rob Herring
Signed-off-by: Suzuki K Poulose
---
.../devicetree/bindings/arm/arm-dsu-
From: Lingfeng Yang
Register Goldfish Events device properly as a multitouch device,
and send SYN_REPORT events in appropriate cases only.
If SYN_REPORT event is sent on every single multitouch event, it
breaks the multitouch support. The multitouch interaction becomes
janky and user has to clic
Hi,
On Thu, Jul 20, 2017 at 4:37 PM, wrote:
> From: Suniel Mahesh
>
> kfree(NULL) is safe and their is no need for a NULL check. Pointed out
> by checkpatch.
>
> Signed-off-by: Suniel Mahesh
> ---
> Note:
> - Patch was compile tested and built(ARCH=arm) on next-20170719.
> No build issues re
From: Miodrag Dinic
Implement tty r/w operations using streaming DMA.
Goldfish tty for Ranchu platforms has been modified to use
streaming DMA mappings for read/write operations. This change
eliminates the need for snooping through the TLB in QEMU using
cpu_get_phys_page_debug() which does not g
From: Aleksandar Markovic
Fix the value returned by ., if both inputs
are zeros. The right behavior in such cases is stated in instruction
reference manual and is as follows:
fs ft MAX MIN MAXAMINA
-
0 00 0
From: Aleksandar Markovic
Fix the value returned by ., if the inputs are normal
fp numbers of the same absolute value, but opposite signs.
A relevant example:
MAXA.S fd,fs,ft:
If fs contains -3.0, and ft contains +3.0, fd is going to contain
+3.0 (without this patch, it used to contain -3.0
From: Aleksandar Markovic
Fix the value returned by . fd,fs,ft, if both inputs
are infinite. The previous implementation returned always the value
contained in ft in such cases. The correct behavior is specified
in Mips instruction set manual and is as follows:
fsftMAXA MINA
From: Aleksandar Markovic
Fix following special cases for MINA>.:
- if one of the inputs is zero, and the other is subnormal, normal,
or infinity, the value of the former should be returned (that is,
a zero).
- if one of the inputs is infinity, and the other input is normal,
or
From: Miodrag Dinic
Add early console functionality to the Goldfish tty driver.
When 'earlycon' kernel command line parameter is used with no options,
the early console is determined by the 'stdout-path' property in device
tree's 'chosen' node. This is illustrated in the following device tree
so
From: Douglas Leung
Implement fused multiply-add with correct accuracy.
Fused multiply-add operation has better accuracy than respective
sequential execution of multiply and add operations applied on the
same inputs. This is because accuracy errors accumulate in latter
case.
This patch implemen
From: Goran Ferenc
Extend clobber lists to include all GP registers.
Fixes: 0b523a85e134 ("MIPS: VDSO: Add implementation of gettimeofday()
fallback")
Signed-off-by: Miodrag Dinic
Signed-off-by: Goran Ferenc
Signed-off-by: Aleksandar Markovic
Reviewed-by: James Hogan
---
arch/mips/vdso/ge
From: Aleksandar Markovic
Fix the value returned by . fd,fs,ft, if both
inputs are quiet NaNs. The . specifications
state that the returned value in such cases should be the quiet NaN
contained in register fs.
A relevant example:
MAX.S fd,fs,ft:
If fs contains qNaN1, and ft contains qNaN2, fd
From: Aleksandar Markovic
Fix the value returned by ., if both inputs are negative
normal fp numbers. The previous logic did not take into account that
if both inputs have the same sign, there should be separate treatment
of the cases when both inputs are negative and when both inputs are
positiv
From: Aleksandar Markovic
Fix the cases of . when any of two multiplicands is
infinity. The correct behavior in such cases is affected by the nature
of third input. Cases of addition of infinities with opposite signs
and subtraction of infinities with same signs may arise and must be
handles sepa
From: Douglas Leung
Implement fused multiply-add with correct accuracy.
Fused multiply-add operation has better accuracy than respective
sequential execution of multiply and add operations applied on the
same inputs. This is because accuracy errors accumulate in latter
case.
This patch implemen
From: Aleksandar Markovic
Fix definition and usage of "maddf_flags" enumeration. Avoid duplicate
definition and apply more common capitalization.
This patch does not change any scenario. It just makes MADDF and
MSUBF emulation code more readable and easier to maintain, and
hopefully prevents fut
From: Aleksandar Markovic
Fix the cases of . when any of three inputs is any
NaN. Correct behavior of . fd, fs, ft is following:
- if any of inputs is sNaN, return a sNaN using following rules: if
only one input is sNaN, return that one; if more than one input is
sNaN, order of precede
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