Reviewed-by: Souvik K Chakravarty
> -Original Message-
> From: Bhardwaj, Rajneesh
> Sent: Thursday, July 20, 2017 7:51 PM
> To: platform-driver-...@vger.kernel.org
> Cc: dvh...@infradead.org; a...@infradead.org; linux-
> ker...@vger.kernel.org; Murthy, Shanth ;
> Chakravarty, Souvik K ; B
On Mon, Jun 26, 2017 at 05:49:20PM -0500, Tom Zanussi wrote:
> Add the necessary infrastructure to allow the variables defined on one
> event to be referenced in another. This allows variables set by a
> previous event to be referenced and used in expressions combining the
> variable values saved
On 7/20/2017 9:55 PM, David Miller wrote:
From: Vijay Kumar
Date: Thu, 20 Jul 2017 21:44:24 -0500
I had same thoughts initially but I had to go with this approach as
scheduler_ipi is wrapped with irq_enter() and irq_exit(). Whereas POKE
resumes the cpu in process context.
Comments in schedu
When ->freeze_fs is called from lvm for doing snapshot, it needs to
make sure there will be no more changes in filesystem's data, however,
previously, background GC wasn't aware of freezing, so in environment
with active background GC thread, data of snapshot becomes unstable.
This patch fixes thi
Please pull to get this gcc-7 warning fix from Arnd.
Thanks!
The following changes since commit 96080f697786e0a30006fcbcc5b53f350fcb3e9f:
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net (2017-07-20
16:33:39 -0700)
are available in the git repository at:
git://git.kernel.org
From: Vijay Kumar
Date: Thu, 20 Jul 2017 22:36:42 -0500
> I can give a try :). But looks to me one thing that will go wrong is
> irq accounting done in __irq_enter() and rcu_irq_enter().
Actually, the bigger problem is that scheduler_ipi() can raise a
software interrupt, and nothing will invoke
On Thu, Jul 20, 2017 at 6:41 PM, Jerome Glisse wrote:
> On Fri, Jul 21, 2017 at 09:15:29AM +0800, Bob Liu wrote:
>> On 2017/7/20 23:03, Jerome Glisse wrote:
>> > On Wed, Jul 19, 2017 at 05:09:04PM +0800, Bob Liu wrote:
>> >> On 2017/7/19 10:25, Jerome Glisse wrote:
>> >>> On Wed, Jul 19, 2017 at 0
On Friday 21 July 2017 03:04 AM, Grygorii Strashko wrote:
>
>
> On 07/20/2017 05:05 AM, Johan Hovold wrote:
>> On Thu, Jul 20, 2017 at 03:32:27PM +0530, Keerthy wrote:
>>> On Thursday 20 July 2017 03:20 PM, Johan Hovold wrote:
On Thu, Jul 20, 2017 at 02:40:37PM +0530, Keerthy wrote:
>
From: Sean Wang
There are four power domains on MediaTek MT7622 SoC which are respectively
ETHSYS for Ethernet including extra embedded switch, HIF0SYS for PCI-E and
SATA, HIF1SYS for USB and WBSYS for WIFI and Bluetooth.
Those functions could be selectively powered gated when the corresponding
From: Chen Zhong
Add SCPSYS power domain driver for MT7622 SoC having four power domains
which are respectively ETHSYS for Ethernet including embedded switch,
WBSYS for WIFI and Bluetooth, HIF0SYS for PCI-E and SATA, and HIF1SYS for
USB. Those functions could be selectively powered gated when the
From: Chen Zhong
Add relevant header files required for dt-bindings of SCPSYS power domain
control for all subsystems found on MT7622 SoC.
Signed-off-by: Chen Zhong
Signed-off-by: Sean Wang
---
include/dt-bindings/power/mt7622-power.h | 22 ++
1 file changed, 22 insertions
From: Sean Wang
Update the binding document for enabling SCPSYS on MediaTek MT7622 SoC.
Signed-off-by: Sean Wang
Signed-off-by: Chen Zhong
---
Documentation/devicetree/bindings/soc/mediatek/scpsys.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc
From: Patrick Bruenn
- add vendor prefix bhf for Beckhoff
- add new board binding bhf,cx9020
Signed-off-by: Patrick Bruenn
---
Documentation/devicetree/bindings/arm/bhf.txt | 6 ++
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
MAINTAINERS
From: Patrick Bruenn
The CX9020 differs from i.MX53 Quick Start Board by:
- use uart2 instead of uart1
- DVI-D connector instead of VGA
- no audio
- no SATA connector
- CCAT FPGA connected to emi
- enable rtc
Signed-off-by: Patrick Bruenn
---
v4:
- move alternative UART2 pinmux settings to im
On Thu, 2017-07-20 at 10:57 -0700, Mark Salyzyn wrote:
> It would probably need to take struct timespec64 as an argument. Pass by
> structure might be difficult to swallow, so pass by pointer?
Every %p extension is passed via a pointer.
Hi all,
Changes since 20170720:
The kbuild tree still produces a large number of build warnings so I
reverted a commit from it.
The drm tree gained a conflict against the drm-intel-fixes tree.
The userns tree lost its build failure.
Non-merge commits (relative to Linus' tree): 2018
On 20-07-17, 12:49, Joel Fernandes wrote:
> Yes I think that's fine, I thought about it some more and I think this
> can be an issue in a scenario where
>
> iowait_boost_max < policy->min but:
We will never have this case as boost-max is set to cpuinfo.max_freq.
--
viresh
On 7/20/2017 10:45 PM, David Miller wrote:
From: Vijay Kumar
Date: Thu, 20 Jul 2017 22:36:42 -0500
I can give a try :). But looks to me one thing that will go wrong is
irq accounting done in __irq_enter() and rcu_irq_enter().
Actually, the bigger problem is that scheduler_ipi() can raise a
s
On 20 July 2017 at 14:44, Linus Torvalds wrote:
> On Wed, Jul 19, 2017 at 9:28 PM, Andy Lutomirski wrote:
>>
>> It shouldn't be that hard to hack up efifb to allocate some actual RAM
>> as "framebuffer", unmap it from the direct map, and ioremap_wc() it as
>> usual. Then you could see if PCIe is
Hi Linus,
A bunch of fixes for rc2, two imx regressions, vc4 fix, dma-buf fix,
some displayport mst fixes, and an amdkfd fix.
Nothing too crazy, I assume we just haven't see much rc1 testing yet.
Dave.
The following changes since commit 5771a8c08880cdca3bfb4a3fc6d309d6bba20877:
Linux v4.13-r
On Friday 21 July 2017 04:14 AM, Grygorii Strashko wrote:
>
>
> On 07/20/2017 05:28 PM, David Miller wrote:
>> From: Grygorii Strashko
>> Date: Thu, 20 Jul 2017 11:08:09 -0500
>>
>>> In general patch looks good to me, but it's really unexpected to
>>> receive IRQs while CPSW is probing ;(
>>
>
Hi Hui,
On Thu, Jul 20, 2017 at 05:33:45PM +0800, Hui Zhu wrote:
< snip >
> >> >> +++ b/mm/zsmalloc.c
> >> >> @@ -1982,6 +1982,7 @@ int zs_page_migrate(struct address_space
> >> >> *mapping, struct page *newpage,
> >> >> unsigned long old_obj, new_obj;
> >> >> unsigned int obj_idx;
Fixes bug noted by Jiri in https://lkml.org/lkml/2017/6/13/755 and caused
by commit d49dadea7862 ("perf tools: Make 'trace' or 'trace_fields' sort
key default for tracepoint events")
not taking into account that evlist is empty in pipe-mode.
Before this commit, pipe mode will only show bogus "1
On Fri, Jul 21, 2017 at 08:39:04AM +0800, Tiezhu Yang wrote:
> According to Documentation/ABI/testing/sysfs-devices-online, in order to
> control CPU N's hotplug state, we should write one of 'Yy1Nn0' to the file
> /sys/devices/system/cpu/cpuN/online, other values should be invalid. so the
> buffer
attribute_groups are not supposed to change at runtime. All functions
working with attribute_groups provided by work
with const attribute_group. So mark the non-const structs as const.
Signed-off-by: Arvind Yadav
---
Changes in v2:
patch was sent to wrong group.
drivers/staging/l
attribute_groups are not supposed to change at runtime. All functions
working with attribute_groups provided by work
with const attribute_group. So mark the non-const structs as const.
File size before:
textdata bss dec hex filename
9489 992 40 105212919 lustr
ttribute_groups are not supposed to change at runtime. All functions
working with attribute_groups provided by work
with const attribute_group. So mark the non-const structs as const.
Arvind Yadav (3):
[PATCH v2 1/3] staging: lustre: constify attribute_group structures.
[PATCH v2 2/3] staging
attribute_groups are not supposed to change at runtime. All functions
working with attribute_groups provided by work
with const attribute_group. So mark the non-const structs as const.
Signed-off-by: Arvind Yadav
---
Changes in v2:
patch was sent to wrong group.
drivers/staging/l
Enhance code to generically support cases where DMA rings
are greater than or equal to number of SPU engines.
New hardware has underlying DMA engine-FlexRM with 32 rings
which can be used to communicate to any of the available
10 SPU engines.
Fixes: 9d12ba86f818 ("crypto: brcm - Add Broadcom SPU d
On Thu, Jul 20, 2017 at 6:59 PM, Ye Xiaolong wrote:
> On 07/19, Linus Torvalds wrote:
>>Hmm. I wonder why the kernel test robot ends up having that annoying
>>line doubling for the dmesg.
>>
>
> Hmm, this line doubling issue should be caused by we set both
> 'earlyprintk=ttyS0,115200' and 'console
On Thu, Jul 20, 2017 at 02:36:03PM -0700, Loc Ho wrote:
> This patch allows APEI generic error source table with external
"This patch" in a commit message is tautologically redundant.
> IRQ to share a single IRQ.
Because? More background please.
> Co-authored-by: Tuan Phan
I guess an invented
attribute_groups are not supposed to change at runtime. All functions
working with attribute_groups provided by work
with const attribute_group. So mark the non-const structs as const.
File size before:
textdata bss dec hex filename
9489 992 40 105212919 lustr
attribute_groups are not supposed to change at runtime. All functions
working with attribute_groups provided by work
with const attribute_group. So mark the non-const structs as const.
Arvind Yadav (3):
[PATCH v3 1/3] staging: lustre: constify attribute_group structures.
[PATCH v3 2/3] stagin
attribute_groups are not supposed to change at runtime. All functions
working with attribute_groups provided by work
with const attribute_group. So mark the non-const structs as const.
Signed-off-by: Arvind Yadav
---
Changes in v2:
patch was sent to wrong group.
Changes in v3:
attribute_groups are not supposed to change at runtime. All functions
working with attribute_groups provided by work
with const attribute_group. So mark the non-const structs as const.
Signed-off-by: Arvind Yadav
---
Changes in v2:
patch was sent to wrong group.
Changes in v3:
On Thu, Jul 20, 2017 at 9:09 PM, Viresh Kumar wrote:
> On 20-07-17, 12:49, Joel Fernandes wrote:
>> Yes I think that's fine, I thought about it some more and I think this
>> can be an issue in a scenario where
>>
>> iowait_boost_max < policy->min but:
Uhh I meant to say here iowait_boost < polic
I'm announcing the release of the 4.12.3 kernel.
All users of the 4.12 kernel series must upgrade.
The updated 4.12.y git tree can be found at:
git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git
linux-4.12.y
and can be browsed at the normal kernel.org git web browser:
diff --git a/Makefile b/Makefile
index 7c81bbba2943..f5bbee480317 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
VERSION = 4
PATCHLEVEL = 12
-SUBLEVEL = 2
+SUBLEVEL = 3
EXTRAVERSION =
NAME = Fearless Coyote
diff --git a/arch/arm/include/asm/elf.h b/arch/arm/include/asm/elf.h
index d2315
The RK3128 pinctrl is similar as the RK2928.
David Wu (2):
pinctrl: rockchip: Use common interface for recalced iomux
pinctrl: rockchip: Add rk3128 pinctrl support
.../bindings/pinctrl/rockchip,pinctrl.txt | 1 +
drivers/pinctrl/pinctrl-rockchip.c | 218 +++
The other Socs also need the feature of recalced iomux, so
make it as a common interface like iomux route feature.
Signed-off-by: David Wu
---
drivers/pinctrl/pinctrl-rockchip.c | 89 +-
1 file changed, 50 insertions(+), 39 deletions(-)
diff --git a/drivers/p
There are 3 IP blocks pin routes need to be switched, that are
emmc-cmd, spi, i2s. And there are some pins need to be recalced,
which are gpio2c4~gpio2c7 and gpio2d0.
Signed-off-by: David Wu
---
.../bindings/pinctrl/rockchip,pinctrl.txt | 1 +
drivers/pinctrl/pinctrl-rockchip.c
I'm announcing the release of the 4.11.12 kernel.
All users of the 4.11 kernel series must upgrade.
NOTE, this is the LAST 4.11.y kernel to be released. It is now
end-of-life, please use the 4.12.y kernel at this point in time.
The updated 4.11.y git tree can be found at:
git://git.kern
diff --git a/Makefile b/Makefile
index cf28e431b68a..a057ec583552 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
VERSION = 4
PATCHLEVEL = 11
-SUBLEVEL = 11
+SUBLEVEL = 12
EXTRAVERSION =
NAME = Fearless Coyote
diff --git a/arch/arm/include/asm/elf.h b/arch/arm/include/asm/elf.h
index d23
From: Simon
Add H265e/VEPU/VPU/VDEC/VOP iommu nodes
Signed-off-by: Simon
---
changes since V1:
- none
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 45
1 file changed, 45 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
b/arch/arm64/boot/dt
From: Simon
Add IEP/ISP/VOP/HEVC/VPU iommu nodes
Signed-off-by: Simon
---
changes since V1:
- add rk-iommu,disable-reset-quirk for isp mmu to ignore the isp mmu
reset operation
arch/arm64/boot/dts/rockchip/rk3368.dtsi | 49
1 file changed, 49 insertions(+)
From: Simon
Add VPU/VDEC/VOP/IEP iommu nodes
Signed-off-by: Simon
---
changes since V1:
- none
arch/arm/boot/dts/rk322x.dtsi | 36
1 file changed, 36 insertions(+)
diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index f3e4ffd..
From: Simon
Add VPU/VDEC/IEP/VOPL/VOPB/ISP0/ISP1 iommu nodes
Signed-off-by: Simon
---
changes since V1:
- add rk-iommu,disable-reset-quirk for isp mmus to ignore the isp
mmu reset operation
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 65
1 file changed, 65
On Wed, Jul 19, 2017 at 3:25 PM, Anup Patel wrote:
> This patchset does various improvments to Broadcom FlexRM
> mailbox controller driver and also adds FlexRM DT nodes
> for Stingray SOC.
>
> The patches are based on Linux-4.13-rc1 and can also be
> found at flexrm-imp-v1 branch of
> https://gith
From: Simon
RK3368 vpu mmu have two irqs, this patch support multi irqs
Signed-off-by: Simon
---
changes since V1:
- use devm_kcalloc instead of devm_kzalloc when alloc irq array
drivers/iommu/rockchip-iommu.c | 34 --
1 file changed, 24 insertions(+), 10 dele
On Wed, Jul 19, 2017 at 03:21:23PM -0700, Dave Jiang wrote:
>
>
> On 07/19/2017 03:16 PM, Christophe JAILLET wrote:
> > If the 'memcmp' fails, free allocated resources as done in all other
> > error handling paths.
> >
> > Signed-off-by: Christophe JAILLET
You meant acked right..?
>
> Good c
From: Simon
ISP mmu can't support reset operation, it won't get the
expected result when reset, but rest functions work normally.
Add this patch as a WA for this issue.
Signed-off-by: Simon
---
changes since V1:
- use '-' instead of '_' for DT property.
drivers/iommu/rockchip-iommu.c | 7 +++
From: Simon
Add rk-iommu,disable-reset-quirk property to ignore the isp mmu
reset operation
Signed-off-by: Simon
---
changes since V1:
- new added file
Documentation/devicetree/bindings/iommu/rockchip,iommu.txt | 5 +
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree
On Wed, Jul 19, 2017 at 02:56:28PM +0200, Greg KH wrote:
> From: Greg Kroah-Hartman
>
> It's better to be explicit and use the DRIVER_ATTR_RW() and
> DRIVER_ATTR_RO() macros when defining a driver's sysfs file.
>
> Bonus is this fixes up a checkpatch.pl warning.
Applied after fixing the subsyst
On Wed, 2017-07-19 at 11:26 +0200, Matthias Brugger wrote:
>
> On 07/19/2017 08:48 AM, YT Shen wrote:
> > On Tue, 2017-07-18 at 18:29 +0200, Matthias Brugger wrote:
> >>
> >> On 06/22/2017 11:32 AM, YT Shen wrote:
> >>> This adds basic chip support for Mediatek 2712
>
> [...]
>
> >>> +
> >>> + u
On Thu, Jul 20, 2017 at 09:37:48AM +, Pierre Yves MORDRET wrote:
>
>
> On 07/06/2017 02:25 PM, Pierre-Yves MORDRET wrote:
> > This patchset adds support for the STM32 MDMA controller.
> > The Master Direct memory access (MDMA) provides high-speed data transfer
> > between memory and memory or
On 20/07/17 14:33, Daniel Kiper wrote:
> On Thu, Jul 20, 2017 at 11:16:39AM +0200, Greg Kroah-Hartman wrote:
>> On Thu, Jul 20, 2017 at 10:39:10AM +0200, Ingo Molnar wrote:
>>>
>>> * Daniel Kiper wrote:
>>>
Hey Greg,
On Wed, Jul 19, 2017 at 11:43:32AM +0200, Greg Kroah-Hartman wrote
Zhao Qiang writes:
> Signed-off-by: Zhao Qiang
> ---
> drivers/soc/fsl/qe/qe.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/soc/fsl/qe/qe.c b/drivers/soc/fsl/qe/qe.c
> index 2ef6fc6..d48fa4a 100644
> --- a/drivers/soc/fsl/qe/qe.c
> +++ b/drivers/soc/fsl/qe/qe.c
> @@ -229,7
> On Jul 20, 2017, at 11:28 PM, Koul, Vinod wrote:
>
>> On Wed, Jul 19, 2017 at 03:21:23PM -0700, Dave Jiang wrote:
>>
>>
>>> On 07/19/2017 03:16 PM, Christophe JAILLET wrote:
>>> If the 'memcmp' fails, free allocated resources as done in all other
>>> error handling paths.
>>>
>>> Signed-of
Ram Pai writes:
> On Thu, Jul 20, 2017 at 12:12:47PM +0530, Aneesh Kumar K.V wrote:
>> Ram Pai writes:
>>
>> > helper function that checks if the read/write/execute is allowed
>> > on the pte.
>> >
>> > Signed-off-by: Ram Pai
>> > ---
>> > arch/powerpc/include/asm/book3s/64/pgtable.h |4 +
On Fri, 21 Jul 2017 02:27:30 +0200,
Masaki Ota wrote:
>
> From: Masaki Ota
>
> Fixed the issue that two finger scroll does not work correctly
> on V8 protocol. The cause is that V8 protocol X-coordinate decode
> is wrong at SS4 PLUS device. I added SS4 PLUS X decode definition.
>
> Signed-off-b
This patchset does various improvments to Broadcom FlexRM
mailbox controller driver and also adds FlexRM DT nodes
for Stingray SOC.
The patches are based on Linux-4.13-rc1 and can also be
found at flexrm-imp-v2 branch of
https://github.com/Broadcom/arm64-linux.git
Changes since v1:
- Add one mor
This patch set IRQ affinity hint for FlexRM ring IRQ at time of
enabling ring (i.e. flexrm_startup()). The IRQ affinity hint will
allow FlexRM driver to distribute FlexRM ring IRQs across online
CPUs so that all FlexRM ring IRQs don't land in CPU0 by default.
Signed-off-by: Anup Patel
Reviewed-by
This patch adds debugfs support to Broadcom FlexRM driver
so that we can see FlexRM ring state when any issue happens.
Signed-off-by: Anup Patel
Reviewed-by: Vikram Prakash
Reviewed-by: Scott Branden
---
drivers/mailbox/bcm-flexrm-mailbox.c | 136 ++-
1 file cha
Currently, the message send queue size in Linux mailbox framework
is hard-coded to MBOX_TX_QUEUE_LEN which is defined as 20.
This message send queue can easily overflow if mbox_send_message()
is called for same mailbox channel several times. The size of message
send queue should not be hard-coded
The mask used in CMPL_START_ADDR_VALUE() should be 27bits instead of
26bits. This incorrect mask was causing completion writes to 40bits
physical address fail.
This patch fixes mask used in CMPL_START_ADDR_VALUE() macro.
Fixes: dbc049eee730 ("mailbox: Add driver for Broadcom FlexRM
ring manager")
Currently, we are using IDA library for managing IDs
on a FlexRM ring. The IDA library dynamically allocates
memory for underlying data structures which can cause
potential locking issue when allocating/free IDs from
flexrm_new_request() and flexrm_process_completions().
To tackle this, we replace
We have two instances of FlexRM on Stingray. One for SBA RAID
offload engine and another for SPU2 Crypto offload engine.
This patch adds FlexRM mailbox controller DT nodes for Stingray.
Signed-off-by: Anup Patel
Signed-off-by: Raveendra Padasalagi
---
.../boot/dts/broadcom/stingray/stingray-fs
Hi Simon,
Am Freitag, 21. Juli 2017, 14:27:08 CEST schrieb Simon Xue:
> From: Simon
>
> Add rk-iommu,disable-reset-quirk property to ignore the isp mmu
> reset operation
>
> Signed-off-by: Simon
please use your full name in From and Signed-off.
Also, you need to include devicetree-people and
The Broadcom FlexRM ring (i.e. mailbox channel) can handle
larger number of messages queued in one FlexRM ring hence
this patch sets msg_queue_len for each mailbox channel to
be same as RING_MAX_REQ_COUNT.
Signed-off-by: Anup Patel
Reviewed-by: Scott Branden
---
drivers/mailbox/bcm-flexrm-mailb
901 - 969 of 969 matches
Mail list logo
