On Tue, Jul 11, 2017 at 5:41 AM, 'Kishon Vijay Abraham I' via
BCM-KERNEL-FEEDBACK-LIST,PDL
wrote:
>
> Hi,
>
> > diff --git a/drivers/phy/broadcom/phy-brcm-usb-init.h
> > b/drivers/phy/broadcom/phy-brcm-usb-init.h
> > new file mode 100644
> > index 000..2c5f10a
> > --- /dev/null
> > +++ b/driv
Currently the toggle total period view on the annotate TUI
shows the number of samples, not period like below.
$ perf annotate --show-total-period
Percent│
│
│
│Disassembly of section .text:
│
│00109a90 <_mcount@@GLIBC_2.2.5>:
│ sub
Cc: Namhyung Kim
Cc: Milian Wolff
Cc: Jiri Olsa
Signed-off-by: Taeung Song
---
tools/perf/ui/browsers/annotate.c | 17 -
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/tools/perf/ui/browsers/annotate.c
b/tools/perf/ui/browsers/annotate.c
index 0ddc3b2..237903d 1
Hello,
Currently the --show-total-period option of perf-annotate
is different from perf-report's.
It has two problem like below:
1) Wrong column i.e. 'Percent' (even though using --show-total-period)
2) Show number of samples, not period
So fix this option on both the annotate stdio and TUI
Add --show-nr-samples option to perf-annotate
so that it corresponds with perf-report.
Additionally h->sum is properly renamed h->nr_samples.
Cc: Namhyung Kim
Cc: Milian Wolff
Cc: Jiri Olsa
Signed-off-by: Taeung Song
---
tools/perf/builtin-annotate.c | 2 ++
tools/perf/ui/gtk/annotate.c |
Currently the --show-total-period option of perf-annotate
is different from perf-report's.
For example, perf-report ordinarily shows period and number of samples.
# Overhead SamplesPeriod Command Shared Object Symbol
# ... ...
On Tue, Jul 11, 2017 at 02:57:30PM -0700, Dave Hansen wrote:
> On 07/11/2017 02:51 PM, Ram Pai wrote:
> > On Wed, Jul 12, 2017 at 07:29:37AM +1000, Benjamin Herrenschmidt wrote:
> >> On Tue, 2017-07-11 at 11:11 -0700, Dave Hansen wrote:
> >>> On 07/05/2017 02:21 PM, Ram Pai wrote:
> Currently
This structure is only used to copy into another structure, so declare
it as const.
This issue was detected using Coccinelle and the following semantic patch:
@r disable optional_qualifier@
identifier i;
position p;
@@
static struct gpio_chip i@p = { ... };
@ok@
identifier r.i;
expression e;
pos
On 07/11/2017 03:14 PM, Ram Pai wrote:
> Now how many does the kernel use to reserve for itself is something
> the kernel knows too and hence can expose it, though the information
> may change dynamically as the kernel reserves and releases the key
> based on its internal needs.
>
> So i think we
On Wed, Jul 12, 2017 at 08:08:56AM +1000, Benjamin Herrenschmidt wrote:
> On Tue, 2017-07-11 at 14:51 -0700, Ram Pai wrote:
> > On Wed, Jul 12, 2017 at 07:29:37AM +1000, Benjamin Herrenschmidt wrote:
> > > On Tue, 2017-07-11 at 11:11 -0700, Dave Hansen wrote:
> > > > On 07/05/2017 02:21 PM, Ram Pai
On 6/29/2017 12:25 AM, Vignesh R wrote:
> commit f54edb539c116 ("usb: dwc3: core: initialize ULPI before trying to
> get the PHY") moved call to dwc3_core_get_phy() from dwc3_probe() to
> dwc3_core_init() after dwc3_core_soft_reset(). But
> dwc3_core_soft_reset() calls phy_init(), therefore dwc3_
if (strcmp(v9ses->aname, V9FS_DEFANAME) != 0)
> + seq_printf(m, ",aname=%s", v9ses->aname);
> + if (v9ses->nodev)
> + seq_puts(m, ",nodevmap");
> + if (v9ses->cache)
> + seq_printf(m, ",%s", v
The clock consumer usage description was erroneously referring to
couple of dt-binding headers that are no longer valid. The definition
and/or usage of these headers is incorrect and the only file present
at the moment, dt-bindings/soc/k2g.h is also being cleaned up. The
examples in this binding we
On 07/11/2017 02:48 PM, Meelis Roos wrote:
I tested yesterdayd 4.12+git on sparc64 to see if the sparc merge
works
fine, and on all of my sun4v machines (T1000, T2000, T5120) it crashed
on boot with DMA-related stacktrace (below). Allt he machines are
sun4v
physical machines, not VM-s. Older su
On Mon, Jul 3, 2017 at 2:03 PM, Andrea Adami wrote:
> On Mon, Jul 3, 2017 at 1:26 PM, Lee Jones wrote:
>> Please use the $SUBJECT line expected by the subsystem.
>>
>> `git log --oneline -- $SUBSYSTEM` can help with this.
>>
>> You also need a commit log.
>>
>
> Lee,
>
> thanks for spotting it.
>
On Tue, Jul 11, 2017 at 3:39 PM, tip-bot for Thomas Gleixner
wrote:
> Rightfully-ranted-at-by: Linux Torvalds
Insert .
I guess with all the other Linus'es around, I might as well go by "Linux".
Linux
Hi,
On Tue, Jul 11, 2017 at 11:41:52PM +0200, Thomas Gleixner wrote:
> [...]
>
> Here is a revised version of the previous patch with the conditional
> locking removed and a bunch of comments added.
That one also fixes Droid 4 boot.
Tested-by: Sebastian Reichel
-- Sebastian
> 8<--
On Mon, 10 Jul 2017 13:04:56 +0200
Arnd Bergmann wrote:
> When CONFIG_DYNAMIC_FTRACE is disabled, we get a harmless
> compile-time warning:
>
> kernel/trace/trace_stack.c: In function 'stack_trace_filter_open':
> kernel/trace/trace_stack.c:412:21: error: unused variable 'ops'
> [-Werror=unused-
On Tue, Jul 11, 2017 at 10:59:11PM +0200, Ladislav Michl wrote:
> On Tue, Jul 11, 2017 at 07:07:32PM +0300, Dragos Bogdan wrote:
> > The only difference between the already supported LTC2943 and LTC2944 is
> > the operating range (3.6V - 20V compared to 3.6V - 60V).
>
> Please wrap commit message
This driver calls irq_domain_hierarchy() and irq_chip_*_parent().
They are available only when CONFIG_IRQ_DOMAIN_HIERARCHY is enabled.
Signed-off-by: Masahiro Yamada
---
drivers/gpio/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index f2
1/2 touches pinctrl driver, but
I want both patches in GPIO tree
because 1/2 is a prerequisite for 2/2.
Otherwise, Kconfig reports recursive dependency.
I noticed this problem when I added "select IRQ_DOMAIN_HIERARCHY"
to my GPIO driver, which I will submit later.
Please apply 1/2 to GPIO tree,
Drivers that need IRQ_DOMAIN_HIERARCHY should "select" it, but
drivers/pinctrl/stm32/Kconfig is the only exception that uses
"depends on" syntax. This prevents GPIO drivers from select'ing
IRQ_DOMAIN_HIERARCHY.
For example, if I add "select IRQ_DOMAIN_HIERARCHY" to GPIO_XGENE_SB,
I get the follow
This patch copies commit b7f8a09f80:
"btrfs: Don't clear SGID when inheriting ACLs" written by Jan.
Fixes: 073931017b49d9458aa351605b43a7e34598caef
CC: sta...@vger.kernel.org
Signed-off-by: Jan Kara
Signed-off-by: Jaegeuk Kim
---
Change log from v1:
- fix for simple change
fs/f2fs/acl.c | 2
On Tue, Jul 11, 2017 at 02:57:38PM -0700, Mike Kravetz wrote:
> Well, the JVM has had a config option for the use of hugetlbfs for quite
> some time. I assume they have already had to deal with these issues.
Yes, the config tweak exists well before THP existed but in production
I know nobody who
Yury Norov wrote:
> It seems you forgot to wrap it with #ifdef CONFIG_9P_FSCACHE
Yeah. Arnd proposed a patch for this.
David
On Fri, 2017-07-07 at 22:24 +, Nicholas A. Bellinger wrote:
> From: Nicholas Bellinger
>
> This patch re-introduces part of a long standing login workaround that
> was recently dropped by:
>
> commit 1c99de981f30b3e7868b8d20ce5479fa1c0fea46
> Author: Nicholas Bellinger
> Date: Sun A
On Mon, 3 Jul 2017, Thomas Gleixner wrote:
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
Thinking a bit more about that limbo mechanics.
In case that a RMID was never used on a particular package, the state check
forces an IPI on all packages unconditionally. That's suboptimal at least.
We kno
In pipe-mode, we will operate over a buffer instead of a file descriptor
but write_pmu_mappings uses lseek to move over the perf.data file.
Refactor write_pmu_mappings to avoid the usage of lseek and allow
reusing the same logic in pipe-mode (next patch).
Signed-off-by: David Carrillo-Cisneros
-
v5: - Fix buffer leaking and size changes in
perf_event__synthesize_features.
- Remove unnecessary renaming.
- Remove extra tabs in do_write_string.
v4: - Limit write_* functions to page_size.
- Fixed bugs spotted by Jiri.
- Add information about pipe-mode to some error messag
Introduce struct feat_fd. This patch uses it as a wrapper
around fd in write_* functions for feature headers. Next
patches will extend its functionality to other feature
header functions.
This patch does not change behavior.
Signed-off-by: David Carrillo-Cisneros
---
tools/perf/util/build-id.c
As preparation for using header records in-pipe mode, replace
int fd with struct feat_fd ff in read functions for all header
record types.
This patch does not change behavior.
Signed-off-by: David Carrillo-Cisneros
---
tools/perf/util/header.c | 101 +++--
Do not proceed if write_padded error failed.
Also, add comments to remind that the return value of write_*
functions in util/header.c is an erro code and not the number
of bytes written.
Signed-off-by: David Carrillo-Cisneros
---
tools/perf/util/header.c | 6 +-
1 file changed, 5 insertions
struct perf_file_section is used in process_##_feat as container for
size and offset in the file descriptor. These attributes are meaninful
in pipe-mode but struct perf_file_section is not.
Add offset and size variables to struct feat_fd to store
perf_file_section's values in file-mode. Later on,
As preparation for using header records in pipe-mode, replace
int fd with struct feat_fd ff in process functions for all header
record types.
This patch does not change behavior.
Signed-off-by: David Carrillo-Cisneros
---
tools/perf/util/header.c | 164 +++---
Now that writen takes a const buffer, use it in do_write instead
of duplicating its functionality.
Export do_write to use it consistently in header.c and
build_id.c .
Signed-off-by: David Carrillo-Cisneros
---
tools/perf/util/build-id.c | 2 +-
tools/perf/util/header.c | 14 +-
t
As preparation for using header records in pipe mode, replace
int fd with struct feat_fd ff in print functions for all header
record types.
Signed-off-by: David Carrillo-Cisneros
---
tools/perf/util/header.c | 102 ++-
1 file changed, 47 insertions(+),
Simplify code by adding a macro to handle the common case
of processing header features that are a simple string.
Signed-off-by: David Carrillo-Cisneros
---
tools/perf/util/header.c | 65 +---
1 file changed, 17 insertions(+), 48 deletions(-)
diff --g
Make buf in helper function "writen" constant to simplify
the life of its callers.
This requires to hack a cast of buf prior to passing it to "ion"
which is simpler than the alternative of reworking the "ion"
function to provide a read and a write paths, the latter with
constant buf argument.
Sig
Most callers of readn in perf header read either a 32 or a 64 bits
number, error check it and swap it, if necessary.
Create do_read_u32 and do_read_u64 to simplify these use cases.
Signed-off-by: David Carrillo-Cisneros
---
tools/perf/util/header.c | 210 +---
On Tue, Jul 11, 2017 at 01:55:02AM -0700, Suganath Prabu S wrote:
> +/**
> + * _base_check_pcie_native_sgl - This function is called for PCIe end
> devices to
> + * determine if the driver needs to build a native SGL. If so, that native
> + * SGL is built in the special contiguous buffers allocat
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Hi Benjamin,
[auto build test ERROR on linus/master]
[also build test ERROR on v4.12 next-20170711]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Benjamin-Gaignard/fbdev-make
On 07/11/2017 01:12 PM, Serge E. Hallyn wrote:
Quoting Stefan Berger (Stefan bergerstef...@linux.vnet.ibm.com):
er.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org
Content-Length: 19839
Lines: 700
X-UID: 24770
Status: RO
From: Stefan Berger
This patch enables security.capability in us
On 2017年07月11日 20:45, Heiko Stübner wrote:
Hi Mark,
Am Dienstag, 11. Juli 2017, 20:42:38 CEST schrieb Mark Yao:
Signed-off-by: Mark Yao
---
Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt | 4
1 file changed, 4 insertions(+)
diff --git
a/Documentation/devicetree/bind
On Tue, 2017-07-11 at 12:13 -0400, J. Bruce Fields wrote:
> On Fri, Jul 07, 2017 at 10:05:30AM -0400, Jeff Layton wrote:
> > From: Jeff Layton
> >
> > The IMA assessment code tries to use the i_version counter to
> > detect
> > when changes to a file have occurred. Many filesystems don't
> > incr
On Tue, Jun 13, 2017 at 11:54 AM, Jiri Olsa wrote:
> On Mon, Jun 12, 2017 at 09:29:31PM -0700, David Carrillo-Cisneros wrote:
>
> SNIP
>
>>
>> void perf_event__print_totals(void);
>> diff --git a/tools/perf/util/header.c b/tools/perf/util/header.c
>> index ddfaf157913d..6f6a54c15cb0 100644
>> ---
On Tue, 2017-07-11 at 23:38 +, Bart Van Assche wrote:
> On Fri, 2017-07-07 at 22:24 +, Nicholas A. Bellinger wrote:
> > From: Nicholas Bellinger
> >
> > This patch re-introduces part of a long standing login workaround that
> > was recently dropped by:
> >
> > commit 1c99de981f30b3e786
From: Tushar Dave
Date: Tue, 11 Jul 2017 15:38:21 -0700
>
>
> On 07/11/2017 02:48 PM, Meelis Roos wrote:
>>> I tested yesterdayd 4.12+git on sparc64 to see if the sparc merge
>>> works
>>> fine, and on all of my sun4v machines (T1000, T2000, T5120) it crashed
>>> on boot with DM
From: Meelis Roos
Date: Wed, 12 Jul 2017 00:48:07 +0300 (EEST)
> Why sparc-next - it should go into 4.13 since 4.13 would break all
> niagara1 and niagara2 systems otherwise?
Absoultely, positively, correct.
On 07/11/2017 03:03 PM, Tom Levens wrote:
On Sat, 8 Jul 2017, Guenter Roeck wrote:
On Mon, Jul 03, 2017 at 06:28:58AM +0200, Tom Levens wrote:
Conversion from raw values to signed integers has been refactored using
bitops.h. This also fixes a bug where negative temperatures were
converted in
On Tue, 2017-07-11 at 06:40 -0700, Guenter Roeck wrote:
> On 07/10/2017 06:56 AM, Andrew Jeffery wrote:
> > Augment PMBus support to include control of fans via the
> > FAN_COMMAND_[1-4] registers, both in RPM and PWM modes. The behaviour
> > of FAN_CONFIG_{1_2,3_4} and FAN_COMMAND_[1-4] are tightl
Quoting Stefan Berger (stef...@linux.vnet.ibm.com):
> On 07/11/2017 01:12 PM, Serge E. Hallyn wrote:
> >>diff --git a/fs/xattr.c b/fs/xattr.c
> >>index 464c94b..eacad9e 100644
> >>--- a/fs/xattr.c
> >>+++ b/fs/xattr.c
> >>@@ -133,20 +133,440 @@ xattr_permission(struct inode *inode, const char
> >>
This patch replace a rwlock and raw notifier by atomic notifier which
protected by spin_lock and rcu.
The first to reason to have this replace is due to a 'scheduling while
atomic' bug of RT kernel on arm/arm64 platform. On arm/arm64, rwlock
cpu_pm_notifier_lock in cpu_pm cause a potential schedu
On 07/11/2017 11:16 PM, Sebastian Andrzej Siewior wrote:
> On 2017-07-11 17:01:09 [+0200], Rafael J. Wysocki wrote:
>>> As far as RT is concerned, I am taking this for the next v4.11 release.
>>> I would appreciate if upstream would apply this as well.
>>> Rafael do you feel responsible for this?
Hi Guenter,
Thank you for the patch and sorry for the late reply.
On Friday 30 Jun 2017 09:21:56 Guenter Roeck wrote:
> The size of uvc_control_mapping is user controlled leading to a
> potential heap overflow in the uvc driver. This adds a check to verify
> the user provided size fits within the
This patchset adds support for the TC7USB40MU usb mux found on
db410c 96boards platforms via the new multiplexer framework and
hooks that into the chipidea driver. This allows us to properly
control host or device mode on this board via the sysfs knob.
So far I've only tested this on db410c, and
We currently have three device nodes for the same USB hardware
block, as evident by the reuse of the same reg address multiple
times. Now that the chipidea driver fully supports OTG with the
MSM wrapper we can collapse all these nodes into one USB device
node, reflecting the true nature of the hard
On the db410c 96boards platform we have a TC7USB40MU[1] on the
board to mux the D+/D- lines from the SoC between a micro usb
"device" port and a USB hub for "host" roles. Upon a role switch,
we need to change this mux to forward the D+/D- lines to either
the port or the hub. Introduce a driver for
On the db410c 96boards platform we have a TC7USB40MU on the board
to mux the D+/D- lines coming from the controller between a micro
usb "device" port and a USB hub for "host" roles[1]. During a
role switch, we need to toggle this mux to forward the D+/D-
lines to either the port or the hub. Add the
Hi Claudio,
[auto build test ERROR on kvm/linux-next]
[also build test ERROR on v4.12 next-20170711]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Claudio-Imbrenda/KVM-trigger-uevents-when
Hi Qiuyang,
On 2017/6/27 15:43, sunqiuyang wrote:
> From: Qiuyang Sun
>
> This patch implements Direct Access (DAX) in F2FS, including:
> - a mount option to choose whether to enable DAX or not
> - read/write and mmap of regular files in the DAX way
> - zero-out of unaligned partial blocks in th
On 07/11, Suman Anna wrote:
> The clock consumer usage description was erroneously referring to
> couple of dt-binding headers that are no longer valid. The definition
> and/or usage of these headers is incorrect and the only file present
> at the moment, dt-bindings/soc/k2g.h is also being cleaned
From: Rafael J. Wysocki
Commit dc15e71eefc7 (PCI / PM: Restore PME Enable if skipping wakeup
setup) introduced a mechanism by which the PME Enable bit can be
restored by pci_enable_wake() if dev->wakeup_prepared is set in
case it has been overwritten by PCI config space restoration.
However, tha
On Mon, 2017-07-10 at 08:10 -0400, Mimi Zohar wrote:
> On Fri, 2017-07-07 at 16:35 -0400, Jeff Layton wrote:
> > On Fri, 2017-07-07 at 15:59 -0400, Mimi Zohar wrote:
> > > On Fri, 2017-07-07 at 13:49 -0400, Jeff Layton wrote:
> > > > On Fri, 2017-07-07 at 13:24 -0400, Mimi Zohar wrote:
> > > > > On
On Tue, 2017-07-11 at 06:31 -0700, Guenter Roeck wrote:
> On 07/10/2017 06:56 AM, Andrew Jeffery wrote:
> > Some PMBus chips, such as the MAX31785, use different coefficients for
> > FAN_COMMAND_[1-4] depending on whether the fan is in PWM (percent duty)
> > or RPM mode. Add a callback to allow the
On 07/11/2017 10:28 AM, Andrey Ryabinin wrote:
It gave me this:
[118648.825347] #1 quota too big 72 64 16
[118648.825351] #2 quota too big 72 64 16
[118648.825471] [ cut here ]
[118648.825484] WARNING: CPU: 0 PID: 0 at ../net/core/dev.c:5274
net_rx_action+0x258/0x360
S
While it's only been a day since the last patch set (which might be a bit
fast), I've generally been spinning new patch sets whenever I get through my
inbox. For my other patch sets I've managed to get buried in a week's worth of
email in a few hours, but for this one it appears there's been signi
Multiple architectures define this as an empty function, and I'm adding
another one as part of the RISC-V port. This adds a __weak version of
pci_fixup_bios and deletes the now obselete ones in a handful of ports.
The only functional change should be that microblaze used to export
pcibios_fixup_b
This contains all the code that directly interfaces with the RISC-V
memory model. While this code corforms to the current RISC-V ISA
specifications (user 2.2 and priv 1.10), the memory model is somewhat
underspecified in those documents. There is a working group that hopes
to produce a formal mem
This patch contains code that is in some way visible to the user:
including via system calls, the VDSO, module loading and signal
handling. It also contains some generic code that is ABI visible.
Signed-off-by: Palmer Dabbelt
---
arch/riscv/include/asm/mmu.h | 26 +++
arch/riscv/i
This patch contains the code that interfaces with ELF objects on RISC-V
systems, the vast majority of which is present to load kernel modules.
Signed-off-by: Palmer Dabbelt
---
arch/riscv/include/asm/compat.h | 29 ++
arch/riscv/include/asm/elf.h| 84 +
This patch contains the implementation of tasks on RISC-V, most of which
is involved in task switching.
Signed-off-by: Palmer Dabbelt
---
arch/riscv/include/asm/asm-offsets.h | 1 +
arch/riscv/include/asm/current.h | 45
arch/riscv/include/asm/kprobes.h | 22 ++
arch/riscv/inclu
The RISC-V ISA defines a per-hart real-time clock and timer, which is
present on all systems. The clock is accessed via the 'rdtime'
pseudo-instruction (which reads a CSR), and the timer is set via an SBI
call.
This driver attempts to split out the RISC-V ISA specific mechanisms of
accessing the
This patch contains all the build infastructure that actually enables
the RISC-V port. This includes Makefiles, linker scripts, and Kconfig
files. It also contains the only top-level change, which adds RISC-V to
the list of architectures that need a sed run to produce the ARCH
variable when build
This patch contains code to manage the RISC-V MMU, including definitions
of the page tables and the page walking code.
Signed-off-by: Palmer Dabbelt
---
arch/riscv/include/asm/mmu_context.h | 69 ++
arch/riscv/include/asm/page.h | 134 +++
arch/riscv/include/asm/pgalloc.h
This patch contains code that interfaces with devices that are mandated
by the RISC-V supervisor specification and that don't have explicit
drivers anywhere else in the tree. This includes the staticly defined
interrupts, the CSR-mapped timer, and virtualized SBI devices.
Signed-off-by: Palmer Da
This patch contains code that is more specific to the RISC-V ISA than it
is to Linux. It contains string and math operations, C wrappers for
various assembly instructions, stack walking code, and uaccess.
Signed-off-by: Palmer Dabbelt
---
arch/riscv/include/asm/asm.h| 76 +
arc
From: Jonathan Neuschäfer
RISC-V needs a MAINTAINERS entry. Let's add one.
Signed-off-by: Jonathan Neuschäfer
Signed-off-by: Palmer Dabbelt
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 2af3ab3f7702..3f39f16046dd 100644
--- a/MAINT
This contains the various __init C functions, the initial assembly
kernel entry point, and the code to reset the system. When a file was
init-related this patch contains the entire file.
Signed-off-by: Palmer Dabbelt
---
arch/riscv/include/asm/bug.h | 88 +++
arch/riscv/include/a
Multiple architectures define this as trivial function, and I'm adding
another one as part of the RISC-V port. This adds a __weak version of
pcibios_align_resource and deletes the now obselete ones in a handful of
ports.
The only functional change should be that a handful of ports used to
export
This patch adds a driver for the Platform Level Interrupt Controller
(PLIC) specified as part of the RISC-V supervisor level ISA manual.
The PLIC connocts global interrupt sources to the local interrupt
controller on each hart. A PLIC is present on all RISC-V systems.
Signed-off-by: Palmer Dabbel
The RISC-V ISA defines a simple console that is availiable via SBI calls
on all systems. This patch adds a driver for this console interface
that can act as both a target for early printk and as the system
console.
Signed-off-by: Palmer Dabbelt
---
drivers/tty/hvc/Kconfig | 11 +
drivers
This patch adds a driver that manages the local interrupts on each
RISC-V hart, as specifiec by the RISC-V supervisor level ISA manual.
The local interrupt controller manages software interrupts, timer
interrupts, and hardware interrupts (which are routed via the
platform level interrupt controller
Many ports (m32r, microblaze, mips, parisc, score, and sparc) use
functionally identical copies of various GCC library routine files,
which came up as we were submitting the RISC-V port (which also uses
some of these).
This patch adds a new copy of these library routine files, which are
functional
On 7/11/17 5:52 PM, David Carrillo-Cisneros wrote:
...
> (This is a rebased and updated version of Stephane Eranian's version
> in https://patchwork.kernel.org/patch/1499081/)
...
> With this series, it is possible to get:
> $ perf record -o - -e cycles sleep 1 | perf report --stdio --header
>
On Tue, Jul 11, 2017 at 01:31:14PM -0700, David Miller wrote:
>
> Acked-by: David S. Miller
>
> Looks good, is this going via my tree or your's?
I'll push it along. Thanks.
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey
On Tue, Jul 11, 2017 at 06:12:32PM +0200, Peter Zijlstra wrote:
>
> ARGH!!! please, if there are known holes in patches, put a comment in.
The fourth of the last change log is the comment, but it was not enough.
I will try to add more comment in that case.
> I now had to independently discover t
These patches try to make all current rockchip full framework vop works
on drm, The newer vop design always have some different to the old one,
So we add a register verify mechanism to distinguish those register, then
the registers table can be reused.
And people can easy to know the different for
Changes in v2:
- rename rk322x to rk3228(Heiko Stübner)
Signed-off-by: Mark Yao
---
Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt | 4
1 file changed, 4 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt
b/Documentation/de
Signed-off-by: Mark Yao
---
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 66 +
drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 18 ++--
drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 20 ++---
3 files changed, 77 insertions(+), 27 deletions(-)
diff --git a/drive
Register init table use un-document define, it is unreadable,
And sometimes we only want to update tiny bits, init table
method is not friendly, it's diffcult to reuse for difference
chips.
Signed-off-by: Mark Yao
---
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 6 ++--
drivers/gpu/drm/rockchi
Signed-off-by: Mark Yao
---
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 2 +-
drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 4 ++--
drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 8
3 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.
Vop Full framework now has following vops:
IP versionchipname
3.1 rk3288
3.2 rk3368
3.4 rk3366
3.5 rk3399 big
3.6 rk3399 lit
3.7 rk3228
3.8 rk3328
The above IP version is from H/W define, some of vop support ge
On 2017/7/12 1:58, Christoph Lameter wrote:
> On Tue, 11 Jul 2017, Frederic Weisbecker wrote:
>
>>> --- a/kernel/time/tick-sched.c
>>> +++ b/kernel/time/tick-sched.c
>>> @@ -787,6 +787,7 @@ static ktime_t tick_nohz_stop_sched_tick(struct
>>> tick_sched *ts,
>>> if (!ts->tick_stopped) {
>>>
>> -unsigned long port_events_pending;
>> -unsigned long phy_events_pending;
>> +struct asd_sas_event port_events[PORT_POOL_SIZE];
>> +struct asd_sas_event phy_events[PHY_POOL_SIZE];
>>
>> int error;
>
> Hi Yijing,
>
> So now we are creating a static pool of events per PH
Hi Arnaldo,
Please pull the JSON files for POWER9 PMU events.
The following changes since commit 07d306c838c5c30196619baae36107d0615e459b:
Merge git://www.linux-watchdog.org/linux-watchdog (2017-07-11 09:59:37 -0700)
are available in the git repository at:
https://github.com/sukadev/linux/
在 2017/7/11 23:54, John Garry 写道:
> On 10/07/2017 08:06, Yijing Wang wrote:
>> No one uses the port_gone_completion in struct asd_sas_port,
>> clean it out.
>
> This seems like a reasonable tidy-up patch which could be taken in isolation,
> having no dependency on the rest of the series.
Yes.
> -Original Message-
> From: Kirti Wankhede [mailto:kwankh...@nvidia.com]
> Sent: Thursday, July 6, 2017 10:02 PM
> To: Zhang, Tina ; alex.william...@redhat.com;
> kra...@redhat.com; ch...@chris-wilson.co.uk; zhen...@linux.intel.com; Lv,
> Zhiyuan ; Wang, Zhi A ; Tian,
> Kevin ; dan...@ff
Dave Hansen writes:
> On 06/29/2017 06:44 PM, Huang, Ying wrote:
>>
>> static atomic_t swapin_readahead_hits = ATOMIC_INIT(4);
>> +static atomic_long_t swapin_readahead_hits_total = ATOMIC_INIT(0);
>> +static atomic_long_t swapin_readahead_total = ATOMIC_INIT(0);
>>
>> void show_swap_cache_
On 12/07/2017 1:04 AM, Greg Kroah-Hartman wrote:
On Mon, Jul 10, 2017 at 04:57:31PM +0800, Rui Teng wrote:
This patch sets memory to zero directly to avoid unnecessary shift and
bitwise operations on bool type, which can fix a sparse warning and also
improve performance.
It does? How did you
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