The hi6421-regulator driver consumes a similarly named platform device.
Adding that to the module device table, allows modprobe to locate this
driver once the device is created.
Cc: Jeremy Linton
Cc: Mark Brown
Signed-off-by: Guodong Xu
---
drivers/regulator/hi6421-regulator.c | 7 +++
1 f
From: Colin Ian King
function mwifiex_ret_pkt_aggr_ctrl can be made static as it does not
need to be in global scope.
Cleans up sparse warning: "symbol 'mwifiex_ret_pkt_aggr_ctrl' was not
declared. Should it be static?"
Signed-off-by: Colin Ian King
---
drivers/net/wireless/marvell/mwifiex/st
On 23/05/2017 14:55, Daniel Lezcano wrote:
> On 16/05/2017 21:44, Daniel Lezcano wrote:
>> An interrupt behaves with a burst of activity with periodic interval of time
>> followed by one or two peaks of longer interval.
>>
>> As the time intervals are periodic, statistically speaking they follow a
On Thu, Jun 1, 2017 at 2:07 AM, Rob Herring wrote:
> On Fri, May 26, 2017 at 02:35:13PM +0800, Guodong Xu wrote:
>> DT bindings for hisilicon HI655x PMIC chip.
>>
>> Signed-off-by: Guodong Xu
>> ---
>> .../bindings/mfd/hisilicon,hi6421v530.txt | 25
>> ++
>> 1 file
On Thu, 1 Jun 2017 15:01:56 -0700
Brian Norris wrote:
> On Thu, Jun 01, 2017 at 10:47:12PM +0200, Boris Brezillon wrote:
> > Le Thu, 1 Jun 2017 11:43:40 -0700,
> > Brian Norris a écrit :
> > > On Wed, May 17, 2017 at 05:29:11PM +0200, Boris Brezillon wrote:
> > > > On Wed, 17 May 2017 17:39:
Hello,
RFC
This patch set adds a printk() SMP kernel threads which let us
to print kernel messages to the console from a non-atomic/schedule-able
context, avoiding different sort of lockups, stalls, etc.
A completely reworked version, for more details please
see 0003 comm
Do not keep `printk_pending' in per-CPU area. We set the following bits
of printk_pending:
a) PRINTK_PENDING_WAKEUP
when we need to wakeup klogd
b) PRINTK_PENDING_OUTPUT
when there is a pending output from deferred printk and we need
to call console_unlock().
So none of the
printk() is quite complex internally and, basically, it does two
slightly independent things:
a) adds a new message to a kernel log buffer (log_store())
b) prints kernel log messages to serial consoles (console_unlock())
while (a) is guaranteed to be executed by printk(), (b) is not, for a
varie
It's not always possible/safe to wake_up() printk kernel
thread. For example, late suspend/early resume may printk()
while timekeeping is not initialized yet, so calling into the
scheduler may result in recursive warnings.
Another thing to notice is the fact PM at some point
freezes user space and
This param permits user-space to forcibly on/off printk emergency
mode via /sys/module/printk/parameters/enforce_emergency node.
Signed-off-by: Sergey Senozhatsky
---
kernel/printk/printk.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/kernel/printk/printk.c b/kernel
Add `sysctl kernel.printk_cpumask' knob so user can enforce printk
kthread cpumask and control both the number of kthreads we wake up
during printk offloading and the CPUs those wake ups happen.
For example,
sysctl kernel.printk_cpumask = 0-3
will force printk to offload printing only to CPU
We need to switch to emergency printk mode in kernel_kexec(). One
kernel_kexec() branch calls kernel_restart_prepare(), which updates
`system_state', however, the other one, when user requested to
->preserve_context, does not and we are lacking the information
in printk about kexec being executed.
Initialize kernel printing thread and make printk offloading
possible. By default `atomic_print_limit' is set to 0, so no
offloading will take place, unless requested by user.
Signed-off-by: Sergey Senozhatsky
---
kernel/printk/printk.c | 54 ++
1
On Thu, Jun 01, 2017 at 03:45:22PM +0200, Andrea Arcangeli wrote:
> On Thu, Jun 01, 2017 at 10:09:09AM +0200, Michal Hocko wrote:
> > That is a bit surprising. I didn't think that the userfault syscall
> > (ioctl) can be faster than a regular #PF but considering that
> > __mcopy_atomic bypasses the
From: Colin Ian King
integer repool_pgnr and function punit_ddr_dvfs_enable can be made
static as they do not need to be in global scope.
Cleans up sparse warnings:
"symbol 'repool_pgnr' was not declared. Should it be static?"
"symbol 'punit_ddr_dvfs_enable' was not declared. Should it be stat
On Fri, Jun 02, 2017 at 08:37:52AM +0200, Maxime Ripard wrote:
> On Thu, Jun 01, 2017 at 02:58:19PM -0400, David Miller wrote:
> > From: Corentin Labbe
> > Date: Wed, 31 May 2017 09:18:31 +0200
> >
> > > This patch series add the driver for dwmac-sun8i which handle the
> > > Ethernet MAC
> > > p
This patch add the dt node for the syscon register present on the
Allwinner A83T
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi
b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 1dc4cfe81534
The dwmac-sun8i is an ethernet MAC hardware that support 10/100/1000 speed.
This patch enable the dwmac-sun8i on the Allwinner a83t SoC Device-tree.
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 28
1 file changed, 28 insertions(+)
diff --git
The dwmac-sun8i hardware is present on the bananapi m3
It uses an external PHY rtl8211e via RGMII.
This patch create the needed emac and phy nodes.
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 17 +
1 file changed, 17 insertions(+)
diff --git
From: Chen-Yu Tsai
The BPI-M3 is an Allwinner A83T based SBC in the Bananapi/Bpi family.
It is roughly the same form factor as the BPI-M1+, with roughly the
same peripherals and connectors:
- 2GB LPDDR3 DRAM
- 8GB eMMC
- Micro-SD card slot
- HDMI output
- Headset (stereo + mic) jack
Am Freitag, den 02.06.2017, 10:30 +0200 schrieb Richard Weinberger:
> Thomas,
>
> Am 02.06.2017 um 10:04 schrieb Thomas Meyer:
> > Am Donnerstag, den 01.06.2017, 22:49 -0700 schrieb Florian
> > Fainelli:
> > I see this in the kernel log:
> >
> > [0.00] [ cut here ]
On Wed, May 31, 2017 at 05:10:08PM -0400, David Miller wrote:
> A fix for this is in Linus's tree and was submitted to -stable last
> night:
What remains to be fixed though is that the gcc-7 testsuite
*reproducibly* kills the kernel on sparc64 when building with more than
around 20 jobs:
[617633.
On 01/06/17 12:39, Daniel Lezcano wrote:
> Some hardware have clusters with different idle states. The current code does
> not support this and fails as it expects all the idle states to be identical.
>
> Because of this, the Mediatek mtk8173 had to create the same idle state for a
> big.Little
dcdc3 supplies to DDR on AM43x series. When we set both
min and max values to the same value. The regulator framework
sets that particular voltage. This is bad as we are changing
the ddr voltage when executing from ddr. Hence remove the min and
max values. The ddr supply voltage shall be set from b
On Friday 02 June 2017 02:51 PM, Keerthy wrote:
> dcdc3 supplies to DDR on AM43x series. When we set both
> min and max values to the same value. The regulator framework
> sets that particular voltage. This is bad as we are changing
> the ddr voltage when executing from ddr. Hence remove the min
Hi Ralph,
On jeu., juin 01 2017, Ralph Sennhauser wrote:
> As it turns out more than just Armada 370 and XP support using GPIO
> lines as PWM lines. For example the Armada 38x family has the same
> hardware support. As such "marvell,armada-370-xp-gpio" for the
> compatible string is a misnomer
Am Freitag, 2. Juni 2017, 09:47:24 CEST schrieb Elaine Zhang:
> Add devicetree bindings for Rockchip cru which found on
> Rockchip SoCs.
>
> Signed-off-by: Elaine Zhang
the binding + binding header did receive an
Acked-by: Rob Herring
in v1 already. Please carry these over when sendin
On 02/06/2017 11:20, Sudeep Holla wrote:
>
>
> On 01/06/17 12:39, Daniel Lezcano wrote:
>> Some hardware have clusters with different idle states. The current code does
>> not support this and fails as it expects all the idle states to be identical.
>>
>> Because of this, the Mediatek mtk8173 had
dcdc3 supplies to DDR on AM43x series. When we set both
min and max values to the same value. The regulator framework
sets that particular voltage. This is bad as we are changing
the ddr voltage when executing from ddr. Hence remove the min and
max values. The ddr supply voltage shall be set from b
On Fri, Jun 02, 2017 at 10:34:26AM +0200, Boris Brezillon wrote:
> On Mon, 15 May 2017 18:23:59 +0100
> Liviu Dudau wrote:
>
> > Hi,
> >
> > This series introduces support for Mali DP's memory writeback engine
> > using the generic writeback connector support introduced in the
> > "[PATCH v5 0/2
Christophe Leroy writes:
> Only the get_user() in store_updates_sp() has to be done outside
> the mm semaphore. All the comparison can be done within the semaphore,
> so only when really needed.
>
> As we got a DSI exception, the address pointed by regs->nip is
> obviously valid, otherwise we wou
I addressed all of your comments in my next revision except the one below.
>> + time_left = wait_for_completion_timeout(&bus->cmd_complete,
>> + bus->adap.timeout);
>> +
>> + spin_lock_irqsave(&bus->lock, flags);
>> + bus->msgs = NULL;
>> +
>-Original Message-
>From: Alex Williamson [mailto:alex.william...@redhat.com]
>Sent: Friday, June 02, 2017 11:35 AM
>To: Chen, Xiaoguang
>Cc: kra...@redhat.com; ch...@chris-wilson.co.uk; intel-
>g...@lists.freedesktop.org; linux-kernel@vger.kernel.org;
>zhen...@linux.intel.com; Lv, Zhiy
On 02/06/17 06:45, Jassi Brar wrote:
> Hi Rob,
>
> On Wed, May 31, 2017 at 10:38 PM, Rob Herring wrote:
>> On Thu, May 25, 2017 at 02:23:44PM +0100, Sudeep Holla wrote:
>>>
> .../devicetree/bindings/mailbox/arm-mhu.txt| 46
> --
> 1 file changed, 43 ins
Hello!
On 6/2/2017 2:56 AM, Michael S. Tsirkin wrote:
commit d85b758f72b0 "virtio_net: fix support for small rings"
Commit d85b758f72b0 ("virtio_net: fix support for small rings")
was supposed to increase the buffer size for small rings
but had an unintentional side effect of decreasing
Hi,
Ruslan Bilovol writes:
> Abstract the peripheral side ALSA sound card code from
> the f_uac2 function into a component that can be called
> by various functions, so the various flavors can be split
> apart and selectively reused.
>
> Visible changes:
> - add uac_params structure to pass aud
On Thu, 25 May 2017 15:19:21 +0100
Jose Abreu wrote:
> Now that we have a callback to check if crtc supports a given mode
> we can use it in atmel-hlcdc so that we restrict the number of probbed
> modes to the ones we can actually display.
>
> Also, remove the mode_fixup() callback as this is no
On Tue, May 30, 2017 at 3:36 PM, Lee Jones wrote:
> On Fri, 26 May 2017, Guodong Xu wrote:
>
>> Add support for HiSilicon Hi6421v530 PMIC. Hi6421v530 communicates with
>> main SoC via memory-mapped I/O.
>>
>> Hi6421v530 and Hi6421 are PMIC chips from the same vendor, HiSilicon, but
>> at different
On 02/06/17 10:25, Daniel Lezcano wrote:
> On 02/06/2017 11:20, Sudeep Holla wrote:
>>
>>
>> On 01/06/17 12:39, Daniel Lezcano wrote:
>>> Some hardware have clusters with different idle states. The current code
>>> does
>>> not support this and fails as it expects all the idle states to be
>>>
Le 02/06/2017 à 11:26, Michael Ellerman a écrit :
Christophe Leroy writes:
Only the get_user() in store_updates_sp() has to be done outside
the mm semaphore. All the comparison can be done within the semaphore,
so only when really needed.
As we got a DSI exception, the address pointed by re
Save a bit of code by using the kernel extension.
$ size net/core/net-procfs.o*
textdata bss dec hex filename
3701 120 03821 eed net/core/net-procfs.o.new
3764 120 03884 f2c net/core/net-procfs.o.old
Signed-off-by: Joe Perches
---
net
Hi,
Ruslan Bilovol writes:
> I came to this patch series when wanted to do two things:
> - use UAC1 as virtual ALSA sound card on gadget side,
>just like UAC2 is used so it's possible to do rate
>resampling
> - have both playback/capture support in UAC1
>
> Since I wanted to have same
The uuid field in the nvme_ns structure represents the nguid field
from the identify namespace command. And as NVMe 1.3 introduced an
UUID in the NVMe Namespace Identification Descriptor this will
collide.
So rename the uuid to nguid to prevent any further
confusion. Unfortunately we export the ng
Signed-off-by: Johannes Thumshirn
Reviewed-by: Max Gurtovoy
---
include/linux/nvme.h | 19 +++
1 file changed, 19 insertions(+)
diff --git a/include/linux/nvme.h b/include/linux/nvme.h
index b625bacf37ef..afa6ef484e50 100644
--- a/include/linux/nvme.h
+++ b/include/linux/nvme.h
On Fri, Jun 2, 2017 at 4:09 AM, Yan, Zheng wrote:
> On Fri, Jun 2, 2017 at 8:57 AM, Deepa Dinamani wrote:
>> On Thu, Jun 1, 2017 at 5:36 PM, John Stultz wrote:
>>> On Thu, Jun 1, 2017 at 5:26 PM, Yan, Zheng wrote:
On Thu, Jun 1, 2017 at 6:22 PM, Arnd Bergmann wrote:
> On Thu, Jun 1, 2
Use NVME_IDENTIFY_DATA_SIZE define instead of hard coding the magic
4096 value.
Signed-off-by: Johannes Thumshirn
---
drivers/nvme/target/admin-cmd.c | 4 ++--
drivers/nvme/target/discovery.c | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/nvme/target/admin-cmd.c b
If a target identifies itself as NVMe 1.3 compliant, try to get the
list of Namespace Identification Descriptors and populate the UUID,
NGUID and EUI64 fileds in the NVMe namespace structure with these
values.
Signed-off-by: Johannes Thumshirn
---
drivers/nvme/host/core.c | 87 ++
Now that we have a way for getting the UUID from a target, provide it
to userspace as well.
Unfortunately there is already a sysfs attribute called UUID which is
a misnomer as it holds the NGUID value. So instead of creating yet
another wrong name, create a new 'nguid' sysfs attribute for the
NGUI
On Fri, 2 Jun 2017 09:02:10 +0200
Heiko Carstens wrote:
> On Thu, Jun 01, 2017 at 12:46:51PM +0200, Martin Schwidefsky wrote:
> > > Unfortunately, converting all page tables to 4k pgste page tables is
> > > not possible without provoking various race conditions.
> >
> > That is one approach we
Allow overriding the announced NVMe Version of a via configfs.
This is particularly helpful when debugging new features for the host
or target side without bumping the hard coded version (as the target
might not be fully compliant to the announced version yet).
Signed-off-by: Johannes Thumshirn
A NVMe Identify NS command with a CNS value of '3' is expecting a list
of Namespace Identification Descriptor structures to be returned to
the host for the namespace requested in the namespace identify
command.
This Namespace Identification Descriptor structure consists of the
type of the namespac
This patchset implemets NVMe Namespace Descriptor Identification as of
NVMe 1.3. The Namespace Descriptor Identification allows a NVMe host
to query several Namespace Identification mechanisms, such as EUI-64,
NGUID and UUID from the target. If more than one value is set by the
target, it can trans
Add the UUID field from the NVMe Namespace Identification Descriptor
to the nvmet_ns structure and allow it's population via configfs.
Signed-off-by: Johannes Thumshirn
---
drivers/nvme/target/configfs.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/drivers
On 02/06/17 09:46, Brendan Higgins wrote:
> The Aspeed 24XX/25XX chips share a single hardware interrupt across 14
> separate I2C busses. This adds a dummy irqchip which maps the single
> hardware interrupt to software interrupts for each of the busses.
>
> Signed-off-by: Brendan Higgins
> ---
>
On 06/01/2017 11:04 PM, Jiri Olsa wrote:
> On Thu, Jun 01, 2017 at 10:20:38AM -0300, Arnaldo Carvalho de Melo wrote:
>> Em Thu, Jun 01, 2017 at 02:34:41PM +0200, Thomas Richter escreveu:
>>> Command perf test -v 14 (Setup struct perf_event_attr test)
>>> always reports success even if the test case
On 02/06/17 09:20, Tobias Klauser wrote:
> Constify all remaining non-const instances of irq_domain_ops in the irqchip
> drivers. These can be made const as they are never modified.
>
> Tobias Klauser (7):
> irqchip/aspeed-vic: constify irq_domain_ops
> irqchip/i8259: constify irq_domain_ops
>
On Fri, Jun 2, 2017 at 10:48 AM, Aleksa Sarai wrote:
> When opening the slave end of a PTY, it is not possible for userspace to
> safely ensure that /dev/pts/$num is actually a slave (in cases where the
> mount namespace in which devpts was mounted is controlled by an
> untrusted process). In addi
On 02/06/2017 11:39, Sudeep Holla wrote:
>
>
> On 02/06/17 10:25, Daniel Lezcano wrote:
>> On 02/06/2017 11:20, Sudeep Holla wrote:
>>>
>>>
>>> On 01/06/17 12:39, Daniel Lezcano wrote:
Some hardware have clusters with different idle states. The current code
does
not support this a
On 16/05/17 08:57, Andrew Jeffery wrote:
> In addition to introducing the new compatible string the bindings
> description is reworked to be more generic.
>
> Signed-off-by: Andrew Jeffery
Queued for 4.13.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
Hello,
The Marvell Armada 7K/8K SoCs are composed of two parts: the AP (which
contains the CPU cores) and the CP (which contains most
peripherals). The 7K SoCs have one CP, while the 8K SoCs have two CPs,
doubling the number of available peripherals.
In terms of interrupt handling, all devices in
This commit modifies the Marvell EBU Armada 7K and 8K Device Tree files
to describe the ICU and GICP units, and use ICU interrupts for all
devices in the CP110 blocks.
Signed-off-by: Thomas Petazzoni
---
arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 6 +++
.../boot/dts/marvell/armada-cp1
This commit adds the Device Tree binding documentation for the Marvell
GICP, an extension to the GIC that allows to trigger GIC SPI interrupts
using memory transactions. It is used by the ICU unit in the Marvell
CP110 block to turn wired interrupts inside the CP into SPI interrupts
at the GIC level
On Thu, 2017-06-01 at 23:25 -0600, Ross Zwisler wrote:
> On Wed, May 31, 2017 at 08:45:23AM -0400, Jeff Layton wrote:
> > v5: don't retrofit old API over the new infrastructure
> > add fstype flag to indicate how wb errors are tracked within that fs
> > add more function variants that take
Hi,
Jerry Huang writes:
>> Jerry Huang writes:
>> >> >> --
>> >> >> 1.7.9.5
>> >> > Hi, Balbi and all guys,
>> >> > Any comment for these patches? Can they be accepted?
>> >>
>> >> Rob had comments which you didn't reply yet. I cannot take this
>> >> patchset yet ;-)
>> >>
>> > Balbi,
>> >
>> >
The rpmsg devices are allocated in the backends and as such must be
freed there as well.
Signed-off-by: Bjorn Andersson
---
drivers/rpmsg/qcom_smd.c | 11 +++
drivers/rpmsg/virtio_rpmsg_bus.c | 9 +
2 files changed, 20 insertions(+)
diff --git a/drivers/rpmsg/qcom_smd.
The Marvell ICU unit is found in the CP110 block of the Marvell Armada
7K and 8K SoCs. It collects the wired interrupts of the devices located
in the CP110 and turns them into SPI interrupts in the GIC located in
the AP806 side of the SoC, by using a memory transaction.
Until now, the ICU was conf
This commit enables the newly introduced Marvell GICP and ICUs driver
for the 64-bit Marvell EBU platforms.
Signed-off-by: Thomas Petazzoni
---
arch/arm64/Kconfig.platforms | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 4af
This commit adds the Device Tree binding documentation for the Marvell
ICU interrupt controller, which collects wired interrupts from the
devices located into the CP110 hardware block of Marvell Armada 7K/8K,
and converts them into SPI interrupts in the GIC located in the AP
hardware block, using t
This commit adds a simple driver for the Marvell GICP, a hardware unit
that converts memory writes into GIC SPI interrupts. The driver provides
a number of functions to the ICU driver to allocate GICP interrupts, and
get the physical addresses that the ICUs should write to to set/clear
interrupts.
Hi Greg,
Please find the updated pull request for 4.12 -rc below.
It includes only a couple of fixes in phy-qcom-qmp driver. The grouping of phy
drivers to vendor specific directories will be sent for the next merge window.
Consider merging it in this -rc cycle. Let me know If I have to make any
On Fri, Jun 2, 2017 at 5:45 PM, Arnd Bergmann wrote:
> On Fri, Jun 2, 2017 at 4:09 AM, Yan, Zheng wrote:
>> On Fri, Jun 2, 2017 at 8:57 AM, Deepa Dinamani
>> wrote:
>>> On Thu, Jun 1, 2017 at 5:36 PM, John Stultz wrote:
On Thu, Jun 1, 2017 at 5:26 PM, Yan, Zheng wrote:
> On Thu, Jun
On 02/06/2017 02:05, Olof Johansson wrote:
[ ... ]
>> For the story, this mmc/sdio is for the WiFi and this one was working for
>> some
>> version of the bootloader which initialized the clock and set the enable line
>> for the chip. That is bad because the WiFi is working as a side effect from
On 18/05/17 09:07, Thomas Petazzoni wrote:
> Hello,
>
> This is the third version of a patch series initially posted in
> October 2015, under the title:
>
> [PATCH 0/5] Fix regression introduced by set_irq_flags() removal
>
> at the time, the regression was worked around in commit
> 353d6d6c82
On 02/06/17 11:06, Daniel Lezcano wrote:
> On 02/06/2017 11:39, Sudeep Holla wrote:
>>
>>
>> On 02/06/17 10:25, Daniel Lezcano wrote:
>>> On 02/06/2017 11:20, Sudeep Holla wrote:
On 01/06/17 12:39, Daniel Lezcano wrote:
> Some hardware have clusters with different idle states.
Hi Al,
Here are some changes I've made, based on your comments plus a little more:
(*) Get rid of the old vfs_new_sb_config() and rename
__vfs_new_sb_config() to that. The callers then have to provide a
file_system_type pointer and all the args.
(*) Add a "struct net *s_net_ns" to s
Hi,
kbuild test robot writes:
> Hi Felipe,
>
> [auto build test ERROR on tip/perf/core]
> [also build test ERROR on v4.12-rc1 next-20170518]
> [if your patch is applied to the wrong git tree, please drop us a note to
> help improve the system]
>
> url:
> https://github.com/0day-ci/linux/com
On Thu, Jun 01, 2017 at 02:12:51AM -0700, Stephen Boyd wrote:
> On 04/13, Peter De Schrijver wrote:
> > On Wed, Apr 12, 2017 at 09:46:05AM -0700, Stephen Boyd wrote:
> > > On 03/21, Peter De Schrijver wrote:
> > > > Whenever a user change its min or max rate limit of a clock, we need to
> > > > re-
On Friday 02 June 2017 08:50 AM, Frank Wang wrote:
> These series of patches fix some issues for rockchip usb2-phy and amend
> usb2-phy framework to support one phy which comprises with two host-ports.
>
> In addition, this change also add rk3228 usb2-phy support.
merged, thanks!
-Kishon
>
>
On 06/02/2017 11:46 AM, Martin Schwidefsky wrote:
> On Fri, 2 Jun 2017 09:02:10 +0200
> Heiko Carstens wrote:
>
>> On Thu, Jun 01, 2017 at 12:46:51PM +0200, Martin Schwidefsky wrote:
Unfortunately, converting all page tables to 4k pgste page tables is
not possible without provoking vari
That way, users don't need to keep a global static pointer and can
rely on container_of() to fetch their own structure.
Acked-by: Steven Rostedt (VMware)
Reviewed-by: Chunyan Zhang
Signed-off-by: Felipe Balbi
---
Changes since v1:
- add missing & operator
drivers/hwtracing/stm/ftrace
Hi,
(sorry for the long delay, just back from vacations)
Chunyan Zhang writes:
> Hi Felipe,
>
> On 17 May 2017 at 16:08, Felipe Balbi wrote:
>>
>> Hi Chunyan,
>>
>> When you wrote your patchset to provide ftrace exports, why did you
>> choose to export only function trace? Why not tracepoints,
Add dt binding documentation details for Lattice MachXO2 FPGA configuration
over Slave SPI interface.
Signed-off-by: Paolo Pisati
Acked-by: Rob Herring
---
.../bindings/fpga/lattice-machxo2-spi.txt | 29 ++
1 file changed, 29 insertions(+)
create mode 100644
Docum
Hi all,
this series adds support for the Lattice MachXO2 FPGA chip, programmed
over Slave SPI.
Tested on my raspberry pi3 + bugblat's pif2 fpga hat.
Changes from v1:
* fixed all the warnings pointed out by 'checkpatch --strict' and
Alan Tull
Changes from v2:
* convert to BIT() macro and spi_m
This patch adds support to the FPGA manager for programming
MachXO2 device’s internal flash memory, via slave SPI.
Signed-off-by: Paolo Pisati
---
drivers/fpga/Kconfig | 7 ++
drivers/fpga/Makefile | 1 +
drivers/fpga/machxo2-spi.c | 277 +++
On Fri, Jun 02, 2017 at 11:46:47AM +0200, Martin Schwidefsky wrote:
> On Fri, 2 Jun 2017 09:02:10 +0200
> Heiko Carstens wrote:
> > Maybe this is a bit over-simplified, but might work.
> This is not over-simplified at all, that does work:
Good!
> +struct arch_elf_state {
> +};
> +
> +#define INI
Hi,
On Wednesday 31 May 2017 03:42 PM, Raviteja Garimella wrote:
> This is driver for USB DRD Phy used in Broadcom's Northstar2
> SoC. The phy can be configured to be in Device mode or Host
> mode based on the type of cable connected to the port. The
> driver registers to extcon framework to get
On Fri, Jun 2, 2017 at 10:28 AM, Jan Kiszka wrote:
> On the SIMATIC, IOT2040 only a single pin is exportable as GPIO, the
> rest is required to operate the UART. To allow modeling this case,
> expand the platform device data structure to specify a (consecutive) pin
> subset for exporting by the gp
On 02/06/2017 12:14, Sudeep Holla wrote:
>
>
> On 02/06/17 11:06, Daniel Lezcano wrote:
>> On 02/06/2017 11:39, Sudeep Holla wrote:
>>>
>>>
>>> On 02/06/17 10:25, Daniel Lezcano wrote:
On 02/06/2017 11:20, Sudeep Holla wrote:
>
>
> On 01/06/17 12:39, Daniel Lezcano wrote:
>>
On Thu, Jun 01, 2017 at 04:08:25PM +0200, Jiri Slaby wrote:
> Ccing Mel who did proper measurements and can hopefully comment on his
> results.
>
> On 06/01/2017, 03:50 PM, Ingo Molnar wrote:
> > That's not what I meant! The speedup comes from (hopefully) being able to
> > disable
> > CONFIG_FRA
On Fri, Jun 2, 2017 at 10:34 AM, Jan Kiszka wrote:
> Avoids reimplementation of DMI matching in stmmac_pci_find_phy_addr.
> +static const struct stmmac_pci_func_data galileo_stmmac_func_data[] = {
> {
> .func = 6,
> .phy_addr = 1,
> },
> + {
On Fri, Jun 2, 2017 at 10:34 AM, Jan Kiszka wrote:
> By now, stmmac_pci_info only contains a single entry. Register this
> directly with the PCI device table, removing one indirection.
Please, drop this patch from the next version.
We can discuss it after the first 5 will be in.
--
With Best
On Fri, 2 Jun 2017 12:28:48 +0200
Heiko Carstens wrote:
> On Fri, Jun 02, 2017 at 11:46:47AM +0200, Martin Schwidefsky wrote:
> > On Fri, 2 Jun 2017 09:02:10 +0200
> > Heiko Carstens wrote:
> > > Maybe this is a bit over-simplified, but might work.
> > This is not over-simplified at all, tha
On 1 June 2017 at 16:33, Kishon Vijay Abraham I wrote:
> There are the set of fixes that were sent initially as part
> of [1].
>
> These are mostly fixes w.r.t populating regulators in
> mmc dt node. It was working before because the regulators
> connecting to the IO lines are always on regulators
On Fri, Jun 2, 2017 at 12:10 PM, Yan, Zheng wrote:
> On Fri, Jun 2, 2017 at 5:45 PM, Arnd Bergmann wrote:
>> On Fri, Jun 2, 2017 at 4:09 AM, Yan, Zheng wrote:
>>> On Fri, Jun 2, 2017 at 8:57 AM, Deepa Dinamani
>>> wrote:
On Thu, Jun 1, 2017 at 5:36 PM, John Stultz wrote:
> On Thu, Ju
Hello Hugh,
Hugh Dickins - 01.06.17, 12:55:
> On Thu, 1 Jun 2017, Martin Steigerwald wrote:
> > Hello.
[…]
> > Since 4.11 I have it quite often that a hang like this even happens on
> > suspend to RAM (standby) as well. And even quite often about 1 time of of
> > 2-3 suspend attempts. The hang sym
From: Wang Xiaoyin
add the driver for hi6421v530 voltage regulator
Signed-off-by: Wang Xiaoyin
Signed-off-by: Guodong Xu
---
drivers/regulator/Kconfig| 10 ++
drivers/regulator/Makefile | 1 +
drivers/regulator/hi6421v530-regulator.c | 207
This patchset adds driver for HiSilicon Hi6421v530 PMIC.
Mainline kernel already has driver support to a similar chip, Hi6421.
Hi6421 and Hi6421v530 are both from the same vendor, HiSilicon, but
they are at different revisions. They both use the same Memory-mapped
I/O method to communicate with Ma
The hi6421-regulator driver consumes a similarly named platform device.
Adding that to the module device table, allows modprobe to locate this
driver once the device is created.
Cc: Jeremy Linton
Cc: Mark Brown
Signed-off-by: Guodong Xu
---
drivers/regulator/hi6421-regulator.c | 7 +++
1 f
Add compatible string for HiSilicon Hi6421v530 PMIC.
Signed-off-by: Guodong Xu
---
Documentation/devicetree/bindings/mfd/hi6421.txt | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/mfd/hi6421.txt
b/Documentation/devicetree/bindings/mfd/hi6
From: Wang Xiaoyin
add device node for hi6421 pmic core and hi6421v530
voltage regulator,include LDO(1,3,9,11,15,16)
Signed-off-by: Wang Xiaoyin
Signed-off-by: Guodong Xu
---
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 46 +++
1 file changed, 46 insertions(+)
diff
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