On Thu, Jun 01, 2017 at 10:50:42PM +0200, Thomas Gleixner wrote:
> On Wed, 31 May 2017, Christoph Hellwig wrote:
>
> > On Tue, May 30, 2017 at 11:15:46PM +0200, Thomas Gleixner wrote:
> > > That function is a misnomer. Rename it with a proper prefix to
> > > posixtimer_rearm().
> >
> > Please als
On Thu, Jun 01, 2017 at 12:46:51PM +0200, Martin Schwidefsky wrote:
> > Unfortunately, converting all page tables to 4k pgste page tables is
> > not possible without provoking various race conditions.
>
> That is one approach we tried and was found to be buggy. The point is that
> you are not allo
On Wed, May 31, 2017 at 4:36 PM, Johannes Berg
wrote:
> Hi,
>
>> > #include
>> > #include
>> > #include
>> > #include
>> > #include
>> >
>> > DEFINE_MUTEX(mtx);
>> > static struct workqueue_struct *wq;
>> > static struct work_struct w1, w2;
>> >
>> > static void w1_wk(struct work_struct *w)
>
This series adds support for usb on rk322x SoCs.
William Wu (2):
ARM: dts: rockchip: add usb nodes on rk322x
ARM: dts: rockchip: enable usb for rk3229 evb board
Tested on rk3229 evb board, and depended on the following
patches and config.
[1] https://patchwork.kernel.org/patch/9761507/
[2] ht
Rockchip's rk3229 evaluation board has one usb otg controller
and three usb host controllers. Each usb controller connect
with one usb2 phy port through UTMI+ interface. And the three
usb host interfaces use the same GPIO VBUS drive. Let's enable
them to support usb on rk3229 evb board.
Signed-off
This patch adds usb otg/host controllers and phys nodes on rk322x.
Signed-off-by: William Wu
---
arch/arm/boot/dts/rk322x.dtsi | 138 +-
1 file changed, 137 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x
Add support for battery monitor MAX1721x (power_supply class).
Maxim Semiconductor MAX1721x Standalone Fuel Gauge battery monitor.
MAX17211 used for singlecell, MAX17215 for multicell batteryes.
---
drivers/power/supply/Kconfig| 14 ++
drivers/power/supply/Makefile | 1 +
Codding style fix. Maillist message subject fix.
Soryy for all. It's hard to be stuppid :-(
Alex A. Mihaylov (3):
regmap: Add 1-Wire bus support
w1: MAX1721x Stanalone Fuel Gauge - add 1-Wire slave drivers
power: supply: Add support MAX1721x battery monitor
drivers/base/regmap/Kconfig
On Thu, Jun 01, 2017 at 01:27:28PM +0200, David Hildenbrand wrote:
> An alternative: Have some process that enables PGSTE for all of its
> future children. Fork+execv qemu. However, such a process in between
> will most likely confuse tooling like libvirt when it comes to process ids.
That would b
Call directly into acpica to load a table to obtain its index on return.
We choose the direct call of acpica internal functions to avoid having
to modify its API which is used outside of Linux as well.
Use that index to unload the table again when the corresponding
directory in configfs gets remov
Add basic support regmap (register map access) API for 1-Wire bus
---
drivers/base/regmap/Kconfig | 6 +-
drivers/base/regmap/Makefile| 1 +
drivers/base/regmap/regmap-w1.c | 245
include/linux/regmap.h | 34 ++
4 files changed, 28
Add support for Maxim Semiconductor MAX17211/MAX17215
Standlone Fuel Gauge chips (1-Wire family 0x26)
---
drivers/w1/slaves/Kconfig | 12 +
drivers/w1/slaves/Makefile | 1 +
drivers/w1/slaves/w1_max1721x.c | 73
drivers/w1/slaves/w1_max1721x.h | 102
On 04/25/2017 02:29 PM, Carlos O'Donell wrote:
> In glibc right now we support including linux or glibc header files first,
> and this has always been a requirement from the start. This requirement
> dictates
> that the kernel know which libc it's being used with so it can tailor
> coordination.
> /* Address of data segment in memory after it is loaded.
> Note that it is up to you to define SEGMENT_SIZE
> on machines not listed here. */
> -#if defined(vax) || defined(hp300) || defined(pyr)
> +#if defined(__vax__) || defined(__hp300__) || defined(__pyr__)
> #define SEGMENT_SIZE p
On 06/01/2017 02:59 PM, David Hildenbrand wrote:
>
>> diff --git a/arch/s390/mm/pgtable.c b/arch/s390/mm/pgtable.c
>> index d4d409b..b22c2b6 100644
>> --- a/arch/s390/mm/pgtable.c
>> +++ b/arch/s390/mm/pgtable.c
>> @@ -196,7 +196,7 @@ static inline pgste_t ptep_xchg_start(struct mm_struct
>> *mm,
On Mon, 15 May 2017 10:16:15 -0700
Eric Anholt wrote:
> Failing to do so meant that we got a resume() callback on first use of
> the device, so we would leak the bin BO that we allocated during
> probe.
>
> Signed-off-by: Eric Anholt
> Fixes: 553c942f8b2c ("drm/vc4: Allow using more than 256MB
On 2017-05-31 22:59, Stephen Boyd wrote:
On 05/30, Kiran Gunda wrote:
diff --git a/drivers/spmi/spmi-pmic-arb.c
b/drivers/spmi/spmi-pmic-arb.c
index 2afe359..412481d 100644
--- a/drivers/spmi/spmi-pmic-arb.c
+++ b/drivers/spmi/spmi-pmic-arb.c
@@ -1003,6 +1003,12 @@ static int spmi_pmic_arb_prob
On 06/02/2017 09:02 AM, Heiko Carstens wrote:
> On Thu, Jun 01, 2017 at 12:46:51PM +0200, Martin Schwidefsky wrote:
>>> Unfortunately, converting all page tables to 4k pgste page tables is
>>> not possible without provoking various race conditions.
>>
>> That is one approach we tried and was found
On Fri, 2 Jun 2017 09:13:03 +0200
Christian Borntraeger wrote:
> On 06/02/2017 09:02 AM, Heiko Carstens wrote:
> > On Thu, Jun 01, 2017 at 12:46:51PM +0200, Martin Schwidefsky wrote:
> >>> Unfortunately, converting all page tables to 4k pgste page tables is
> >>> not possible without provoking
On Mon, Mar 06, 2017 at 11:30:24AM +0100, Michal Hocko wrote:
> +void *kvmalloc_node(size_t size, gfp_t flags, int node)
> +{
> + gfp_t kmalloc_flags = flags;
> + void *ret;
> +
> + /*
> + * vmalloc uses GFP_KERNEL for some internal allocations (e.g page
> tables)
> + * so th
This series are based on 4.12-rc1 and provide 4 patches to support mt7622 IC.
Change in this series:
1. update document to add mt7622;
2. add adjust register define support;
3. add mt7622_compat.
Leilk Liu (3):
dt-bindings: spi: mediatek: Add bindings for mediatek MT7622 soc
platform
spi:
this patch add compatible support for mt7622 IC.
Signed-off-by: Leilk Liu
---
drivers/spi/spi-mt65xx.c |9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 3d7cd2d..ebc4b1a 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/sp
this patch adds support for adjust register design.
Signed-off-by: Leilk Liu
---
drivers/spi/spi-mt65xx.c | 45 ++
include/linux/platform_data/spi-mt65xx.h |2 ++
2 files changed, 42 insertions(+), 5 deletions(-)
diff --git a/drivers/spi/spi-mt6
This patch adds a DT binding documentation for the MT7622 soc.
Signed-off-by: Leilk Liu
---
.../devicetree/bindings/spi/spi-mt65xx.txt |1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
b/Documentation/devicetree/bindings/spi/spi-
On 06/02/2017 09:16 AM, Martin Schwidefsky wrote:
> On Fri, 2 Jun 2017 09:13:03 +0200
> Christian Borntraeger wrote:
>
>> On 06/02/2017 09:02 AM, Heiko Carstens wrote:
>>> On Thu, Jun 01, 2017 at 12:46:51PM +0200, Martin Schwidefsky wrote:
> Unfortunately, converting all page tables to 4k p
On Jun 01 2017 or thereabouts, Bastien Nocera wrote:
> On Thu, 2017-06-01 at 20:46 +0200, Benjamin Tissoires wrote:
> > Hi,
> >
> > Sending this as a WIP as it still need a few changes, but it mostly
> > works as
> > expected (still not fully compliant yet).
> >
> > So this is based on Lennart's
On 06/02/2017 09:18 AM, Christian Borntraeger wrote:
> On 06/02/2017 09:16 AM, Martin Schwidefsky wrote:
>> On Fri, 2 Jun 2017 09:13:03 +0200
>> Christian Borntraeger wrote:
>>
>>> On 06/02/2017 09:02 AM, Heiko Carstens wrote:
On Thu, Jun 01, 2017 at 12:46:51PM +0200, Martin Schwidefsky wrote
On 2017-05-31 23:23, Stephen Boyd wrote:
On 05/30, Kiran Gunda wrote:
From: Subbaraman Narayanamurthy
Currently, cleanup_irq() is invoked when a peripheral's interrupt
fires and there is no mapping present in the interrupt domain of
spmi interrupt controller.
The cleanup_irq clears the arbite
Hi,
在 2017/6/1 18:21, Arvind Yadav 写道:
clk_prepare_enable() can fail here and we must check its return value.
Signed-off-by: Arvind Yadav
Acked-by: Shawn Lin
---
drivers/pci/host/pcie-rockchip.c | 34 --
1 file changed, 28 insertions(+), 6 deletions(-)
Le 01/06/2017 à 22:05, Alexandre Belloni a écrit :
> This series adds initial support for Atmel armv7m SoCs.
Acked-by: Nicolas Ferre
To the whole series.
Thanks Szemző and Alexandre for having taken care of this support!
Best regards,
> Changes in v4:
> - rename the family samv7 as the intern
Commtech adapters apparently need the original setting as outputs, see
https://marc.info/?l=linux-gpio&m=149557425201323&w=2. Account for that.
Fixes: 7dea8165f1d6 ("serial: exar: Preconfigure xr17v35x MPIOs as output")
Signed-off-by: Jan Kiszka
Reviewed-by: Andy Shevchenko
---
drivers/tty/seri
On Fri 02-06-17 07:17:22, Sasha Levin wrote:
> On Mon, Mar 06, 2017 at 11:30:24AM +0100, Michal Hocko wrote:
> > +void *kvmalloc_node(size_t size, gfp_t flags, int node)
> > +{
> > + gfp_t kmalloc_flags = flags;
> > + void *ret;
> > +
> > + /*
> > +* vmalloc uses GFP_KERNEL for some inter
On Jun 01 2017 or thereabouts, Bastien Nocera wrote:
> On Thu, 2017-06-01 at 11:06 -0700, Dave Hansen wrote:
> > On 03/27/2017 07:59 AM, Benjamin Tissoires wrote:
> > > this is finally a rework of the series that provides kernel
> > > power_supply
> > > for hidpp devices.
> > >
> > > This will all
Do not allocate resources on behalf of the parent device but on our own.
Otherwise, cleanup does not properly work if gpio-exar is removed but
not the parent device.
Signed-off-by: Jan Kiszka
Reviewed-by: Andy Shevchenko
Acked-by: Linus Walleij
---
drivers/gpio/gpio-exar.c | 4 ++--
1 file cha
On the SIMATIC, IOT2040 only a single pin is exportable as GPIO, the
rest is required to operate the UART. To allow modeling this case,
expand the platform device data structure to specify a (consecutive) pin
subset for exporting by the gpio-exar driver.
Signed-off-by: Jan Kiszka
Reviewed-by: And
This makes the gpio-exar driver usable, which was prevented by a number
of fatal bugs, and adds support for the SIMATIC IOT2040 to the 8250-exar
driver and, indirectly, to gpio-exar as well. It's a cross-subsystem
series, so I'm also cross-posting to the serial and gpio lists.
Changes in v5:
- fa
Commtech adapters need the MPIOs for internal purposes, and the
gpio-exar driver already refused to pick them up. But there is actually
no point in even creating the underlying platform device.
Signed-off-by: Jan Kiszka
Reviewed-by: Andy Shevchenko
Acked-by: Linus Walleij
---
drivers/gpio/gpio
The UART driver already maps the resource for us. Trying to do this here
only fails and leaves us with a non-working device.
Signed-off-by: Jan Kiszka
Reviewed-by: Andy Shevchenko
Acked-by: Linus Walleij
---
drivers/gpio/gpio-exar.c | 10 +++---
1 file changed, 3 insertions(+), 7 deletions
Set the parent of the exar gpiochip to its platform device, like other
gpiochips are doing it. In order to keep the relationship discoverable
for ACPI systems, set the platform device companion to the PCI device.
Signed-off-by: Jan Kiszka
Reviewed-by: Andy Shevchenko
Acked-by: Linus Walleij
---
Aligns us with device_add_properties, the function we call.
Signed-off-by: Jan Kiszka
---
drivers/base/platform.c | 2 +-
include/linux/platform_device.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/base/platform.c b/drivers/base/platform.c
index a102152
On 04/07/2017 05:57 PM, Deepa Dinamani wrote:
> CURRENT_TIME macro is not y2038 safe on 32 bit systems.
>
> The patch replaces all the uses of CURRENT_TIME by
> current_time().
>
> This is also in preparation for the patch that transitions
> vfs timestamps to use 64 bit time and hence make them
>
This prepares the addition of IOT2040 platform support by preparing the
needed setup and rs485_config hooks.
Signed-off-by: Jan Kiszka
Reviewed-by: Andy Shevchenko
---
drivers/tty/serial/8250/8250_exar.c | 32 +++-
1 file changed, 27 insertions(+), 5 deletions(-)
di
Current code uses cpudl_maximum() to get the root node's cpu, while it
directly accesses the root node using 'cp->elements[0].dl' to get the
root node's dl. It would be better and more readible if a function to
get the dl is added. So add it.
Signed-off-by: Byungchul Park
---
kernel/sched/cpudea
On May 30 2017 or thereabouts, Carlo Caione wrote:
> From: Carlo Caione
>
> We are missing a call to hid_hw_stop() on the remove hook.
> Among other things this is causing an Oops when (re-)starting GNOME /
> upowerd / ... after the module has been already rmmod-ed.
Good catch:
Reviewed-by: Benj
When the heap tree is empty, cp->elements[0].cpu has meaningless value.
We need to consider the case.
Signed-off-by: Byungchul Park
---
kernel/sched/cpudeadline.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/kernel/sched/cpudeadline.c b/kernel/sched/cpudeadline.c
index d
This fixes reloading of the GPIO driver for the same platform device
instance as created by the exar UART driver: First of all, the driver
sets drvdata to its own value during probing and does not restore the
original value on exit. But this won't help anyway as the core clears
drvdata after the dr
First, the logic for translating a register bit to the return code of
exar_get_direction and exar_get_value were wrong. And second, there was
a flip regarding the register bank in exar_get_direction.
Signed-off-by: Jan Kiszka
Reviewed-by: Andy Shevchenko
Acked-by: Linus Walleij
---
drivers/gpi
On 2.06.2017 02:02, Yu Zhao wrote:
> mem_cgroup_resize_limit() and mem_cgroup_resize_memsw_limit() have
> identical logics. Refactor code so we don't need to keep two pieces
> of code that does same thing.
>
> Signed-off-by: Yu Zhao
> ---
> mm/memcontrol.c | 71
> +---
This implements the setup of RS232 and the switch-over to RS485 or RS422
for the Siemens IOT2040. That uses an EXAR XR17V352 with external logic
to switch between the different modes. The external logic is controlled
via MPIO pins of the EXAR controller.
Only pin 10 can be exported as GPIO on the
By removing the PCI device reference from the structure and passing it
as parameters to the interested functions, we can make quark_pci_info
const.
Signed-off-by: Jan Kiszka
Reviewed-by: Andy Shevchenko
---
drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c | 23 +++
1 file ch
Move the special case for the early Galileo firmware into
quark_default_setup. This allows to use stmmac_pci_find_phy_addr for
non-quark cases.
Signed-off-by: Jan Kiszka
Reviewed-by: Andy Shevchenko
---
drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c | 20 +---
1 file changed,
By now, stmmac_pci_info only contains a single entry. Register this
directly with the PCI device table, removing one indirection.
Signed-off-by: Jan Kiszka
---
drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c | 34 +---
1 file changed, 12 insertions(+), 22 deletions(-)
diff
Some cleanups of the way we probe DMI platforms in the driver. Reduces
a bit of open-coding and makes the logic easier reusable for any
potential DMI platform != Quark.
Tested on IOT2000 and Galileo Gen2.
Changes in v4:
- Refactor patch 5 according to feedback
Jan
Jan Kiszka (6):
stmmac: pci
Make stmmac_default_data compatible with stmmac_pci_info.setup and use
an info structure for all devices. This allows to make the probing more
regular.
Signed-off-by: Jan Kiszka
Reviewed-by: Andy Shevchenko
---
drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c | 36 +++-
1 fi
Avoids reimplementation of DMI matching in stmmac_pci_find_phy_addr.
Signed-off-by: Jan Kiszka
---
drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c | 99
1 file changed, 66 insertions(+), 33 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c
b/d
No need to carry this reference in stmmac_pci_info - the Quark-specific
setup handler knows that it needs to use the Quark-specific DMI table.
This also allows to drop the stmmac_pci_info reference from the setup
handler parameter list.
Signed-off-by: Jan Kiszka
Reviewed-by: Andy Shevchenko
---
Ls1088a is new introduced arm-based soc with sata support with
following features:
* Complies with the serial ATA 3.0 specification
and the AHCI 1.3.1 specification
* Contains a high-speed descriptor-based DMA controller
* Supports the following:
* Speeds of 1.5 Gb/s (first-generation SATA),
3
Thomas,
Am 02.06.2017 um 07:49 schrieb Florian Fainelli:
>> the put_fp_registers fails with errno 4 if I recall correctly.
>>
>> I didn't investigate yet further, why the the xstate ptrace call fails.
>
> Which of the branches is put_fp_registers() taking? The
> restore_fpx_registers() or restore
On Fri, Jun 02, 2017 at 09:28:56AM +0200, Michal Hocko wrote:
> On Fri 02-06-17 07:17:22, Sasha Levin wrote:
> > On Mon, Mar 06, 2017 at 11:30:24AM +0100, Michal Hocko wrote:
> > > +void *kvmalloc_node(size_t size, gfp_t flags, int node)
> > > +{
> > > + gfp_t kmalloc_flags = flags;
> > > + void *r
On Fri 02-06-17 07:40:12, Sasha Levin wrote:
> On Fri, Jun 02, 2017 at 09:28:56AM +0200, Michal Hocko wrote:
> > On Fri 02-06-17 07:17:22, Sasha Levin wrote:
> > > On Mon, Mar 06, 2017 at 11:30:24AM +0100, Michal Hocko wrote:
> > > > +void *kvmalloc_node(size_t size, gfp_t flags, int node)
> > > >
Hi maintainers,
Is this patch series (v6) OK for merging?
Thanks
Jin Yao
On 4/20/2017 5:36 PM, Jiri Olsa wrote:
On Thu, Apr 20, 2017 at 08:07:48PM +0800, Jin Yao wrote:
v6:
Update according to the review comments from
Jiri Olsa . Major modifications are:
1. Move that multiline
Am Donnerstag, den 01.06.2017, 22:49 -0700 schrieb Florian Fainelli:
>
> On 06/01/2017 02:25 PM, Thomas Meyer wrote:
> > Am Donnerstag, den 01.06.2017, 22:58 +0200 schrieb Richard
> > Weinberger:
> > >
> > > Sorry, I thought you are CC'ed.
> > > Thomas please speak up. AFAIR UML fails to boot on
On Thu, Jun 01, 2017 at 07:03:34PM -0700, Alexei Starovoitov wrote:
> diff --git a/kernel/bpf/arraymap.c b/kernel/bpf/arraymap.c
> index 172dc8ee0e3b..ab93490d1a00 100644
> --- a/kernel/bpf/arraymap.c
> +++ b/kernel/bpf/arraymap.c
> @@ -452,39 +452,18 @@ static void bpf_event_entry_free_rcu(struct
On Fri, 2 Jun 2017 09:25:54 +0200
Christian Borntraeger wrote:
> On 06/02/2017 09:18 AM, Christian Borntraeger wrote:
> > On 06/02/2017 09:16 AM, Martin Schwidefsky wrote:
> >> On Fri, 2 Jun 2017 09:13:03 +0200
> >> Christian Borntraeger wrote:
> >>
> >>> On 06/02/2017 09:02 AM, Heiko Carste
On Thu 01-06-17 19:41:13, Roman Gushchin wrote:
> On Wed, May 31, 2017 at 06:39:29PM +0200, Michal Hocko wrote:
> > On Tue 30-05-17 19:52:31, Roman Gushchin wrote:
> > > >From c57e3674efc609f8364f5e228a2c1309cfe99901 Mon Sep 17 00:00:00 2001
> > > From: Roman Gushchin
> > > Date: Tue, 23 May 2017
On Thu 01-06-17 12:56:35, Yu Zhao wrote:
> Saw need_resched() warnings when swapping on large swapfile (TBs)
> because page allocation in swap_cgroup_prepare() took too long.
Hmm, but the page allocator makes sure to cond_resched for sleeping
allocations. I guess what you mean is something differe
struct irq_domain_ops is not modified, so it can be made const.
Signed-off-by: Tobias Klauser
---
drivers/irqchip/irq-imx-gpcv2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-imx-gpcv2.c b/drivers/irqchip/irq-imx-gpcv2.c
index 9463f3557e82..bb36f572e322
struct irq_domain_ops is not modified, so it can be made const.
Signed-off-by: Tobias Klauser
---
drivers/irqchip/irq-mips-gic.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
index eb7fbe159963..65642a78b8a3 10
struct irq_domain_ops is not modified, so it can be made const.
Cc: Yoshinori Sato
Cc: uclinux-h8-de...@lists.sourceforge.jp
Signed-off-by: Tobias Klauser
---
drivers/irqchip/irq-renesas-h8300h.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-renesas-h83
Greg Kroah-Hartman writes:
> On Fri, Apr 28, 2017 at 12:56:42PM +0400, Sevak Arakelyan wrote:
>> From: John Youn
>>
>> Set 'lpm_capable' flag in the gadget structure so
>> indicating that LPM is supported.
>>
>> Signed-off-by: Sevak Arakelyan
>
> No signed-off-by from John?
right, I only too
Constify all remaining non-const instances of irq_domain_ops in the irqchip
drivers. These can be made const as they are never modified.
Tobias Klauser (7):
irqchip/aspeed-vic: constify irq_domain_ops
irqchip/i8259: constify irq_domain_ops
irqchip/irq-imx-gpcv2: constify irq_domain_ops
irq
struct irq_domain_ops is not modified, so it can be made const.
Cc: Yoshinori Sato
Cc: uclinux-h8-de...@lists.sourceforge.jp
Signed-off-by: Tobias Klauser
---
drivers/irqchip/irq-renesas-h8s.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-renesas-h8s.c
struct irq_domain_ops is not modified, so it can be made const.
Signed-off-by: Tobias Klauser
---
drivers/irqchip/irq-i8259.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-i8259.c b/drivers/irqchip/irq-i8259.c
index 1aec12c6d9ac..7aafbb091b67 100644
---
struct irq_domain_ops is not modified, so it can be made const.
Signed-off-by: Tobias Klauser
---
drivers/irqchip/irq-mbigen.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-mbigen.c b/drivers/irqchip/irq-mbigen.c
index 31d6b5a582d2..567b29c47608 100644
-
struct irq_domain_ops is not modified, so it can be made const.
Cc: Joel Stanley
Signed-off-by: Tobias Klauser
---
drivers/irqchip/irq-aspeed-vic.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-aspeed-vic.c b/drivers/irqchip/irq-aspeed-vic.c
index d2445
Hi,
Stefan Agner writes:
> Hi Felipe,
>
> On 2017-04-19 01:53, Krzysztof Opasiak wrote:
>> On 04/15/2017 03:35 AM, Stefan Agner wrote:
>>> Currently qw_sign requires UTF-8 character to set, but returns UTF-16
>>> when read. This isn't obvious when simply using cat since the null
>>> characters a
Thomas,
Am 02.06.2017 um 10:04 schrieb Thomas Meyer:
> Am Donnerstag, den 01.06.2017, 22:49 -0700 schrieb Florian Fainelli:
> I see this in the kernel log:
>
> [0.00] [ cut here ]
> [0.00] WARNING: CPU: 0 PID: 0 at arch/x86/kernel/fpu/xstate.c:595
> fpu__i
On 06/01/2017, 03:58 PM, Jiri Slaby wrote:
> On 06/01/2017, 03:50 PM, Ingo Molnar wrote:
>> That's not what I meant! The speedup comes from (hopefully) being able to
>> disable
>> CONFIG_FRAME_POINTER, which:
>
> BTW when you are mentioning this -- my measurements were with FP disabled.
>
> Is
On Mon, 15 May 2017 18:23:59 +0100
Liviu Dudau wrote:
> Hi,
>
> This series introduces support for Mali DP's memory writeback engine
> using the generic writeback connector support introduced in the
> "[PATCH v5 0/2] drm: Introduce writeback connectors" series [1]
>
> This version updates the M
Am Donnerstag, 1. Juni 2017, 15:51:45 CEST schrieb Arvind Yadav:
> clk_prepare_enable() can fail here and we must check its return value.
>
> Signed-off-by: Arvind Yadav
looks good, but you may want to include
Bjorn Helgaas
who is the maintainer of the pci subsystem and would be the one
to ap
> struct vfio_vgpu_surface_info {
> __u64 start;
> __u32 width;
> __u32 height;
> __u32 stride;
> __u32 size;
> __u32 x_pos;
> __u32 y_pos;
> __u32 padding;
> /* Only used when VFIO_VGPU_SURFACE_DMABUF_* flags set */
>
On 01/06/17 21:40, Auger Eric wrote:
> Hi Alex,
>
> On 31/05/2017 20:24, Alex Williamson wrote:
>> On Wed, 24 May 2017 22:13:18 +0200
>> Eric Auger wrote:
>>
>>> We add two new fields in vfio_pci_irq_ctx struct: deoi and handler.
>>> If deoi is set, this means the physical IRQ attached to the vir
On Wed 31-05-17 14:01:45, Johannes Weiner wrote:
> On Wed, May 31, 2017 at 06:25:04PM +0200, Michal Hocko wrote:
> > On Thu 25-05-17 13:08:05, Johannes Weiner wrote:
> > > Everything the user would want to dynamically program in the kernel,
> > > say with bpf, they could do in userspace and then up
Addressed comments from:
- Ben in: http://www.spinics.net/lists/devicetree/msg179006.html
Changes since previous update:
- Fairly minimal changes in master support patch, all else is the same
As before, tested on Aspeed 2500 evaluation board and a real platform with an
Aspeed 2520.
Added device tree binding documentation for Aspeed I2C busses.
Signed-off-by: Brendan Higgins
Acked-by: Rob Herring
---
Changes for v2:
- None
Changes for v3:
- Removed reference to "bus" device tree param
Changes for v4:
- None
Changes for v5:
- None
Changes for v6:
- Replaced the con
Added slave support for Aspeed I2C controller. Supports fourteen busses
present in AST24XX and AST25XX BMC SoCs by Aspeed.
Signed-off-by: Brendan Higgins
---
Added in v6:
- Pulled slave support out of initial driver commit into its own commit.
- No longer arbitrarily restrict bus to be slave
Added device tree binding documentation for Aspeed I2C Interrupt
Controller.
Signed-off-by: Brendan Higgins
Acked-by: Rob Herring
---
Added in v6:
- Pulled "aspeed_i2c_controller" out into a interrupt controller since that is
what it actually does.
Changes for v7:
- None
Changes for v8:
Added initial master support for Aspeed I2C controller. Supports
fourteen busses present in AST24XX and AST25XX BMC SoCs by Aspeed.
Signed-off-by: Brendan Higgins
---
Changes for v2:
- Added single module_init (multiple was breaking some builds).
Changes for v3:
- Removed "bus" device tree pa
The Aspeed 24XX/25XX chips share a single hardware interrupt across 14
separate I2C busses. This adds a dummy irqchip which maps the single
hardware interrupt to software interrupts for each of the busses.
Signed-off-by: Brendan Higgins
---
Added in v6:
- Pulled "aspeed_i2c_controller" out into
On 01/06/17 21:22, Bandan Das wrote:
> Jintack Lim writes:
>
>> From: Christoffer Dall
>>
>> Set up virutal EL2 context to hardware if the guest exception level is
>> EL2.
>>
>> Signed-off-by: Christoffer Dall
>> Signed-off-by: Jintack Lim
>> ---
>> arch/arm64/kvm/context.c | 32 +
When opening the slave end of a PTY, it is not possible for userspace to
safely ensure that /dev/pts/$num is actually a slave (in cases where the
mount namespace in which devpts was mounted is controlled by an
untrusted process). In addition, there are several unresolvable
race conditions if usersp
Changes in v2:
* Reordered addition to ioctls.h to follow correct hex ordering.
Aleksa Sarai (1):
tty: add TIOCGPTPEER ioctl
arch/alpha/include/uapi/asm/ioctls.h | 1 +
arch/mips/include/uapi/asm/ioctls.h| 1 +
arch/parisc/include/uapi/asm/ioctls.h | 1 +
arch/powerpc/include/uapi
On Fri, 2017-06-02 at 15:03 +0800, Lai Jiangshan wrote:
>
> the @w2 is not queued before flush_work(&w2), it is expected
> that @w2 is not associated with @wq, and the dependence
> mtx -> wq will not be recorded. And it is expected no warning.
Lockdep is symmetric. So then maybe it won't warn whe
Add compatible string for HiSilicon Hi6421v530 PMIC.
Signed-off-by: Guodong Xu
---
Documentation/devicetree/bindings/mfd/hi6421.txt | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/mfd/hi6421.txt
b/Documentation/devicetree/bindings/mfd/hi6
This patchset adds driver for HiSilicon Hi6421v530 PMIC.
Mainline kernel already has driver support to a similar chip, Hi6421.
Hi6421 and Hi6421v530 are both from the same vendor, HiSilicon, but
they are at different revisions. They both use the same Memory-mapped
I/O method to communicate with Ma
From: Wang Xiaoyin
add the driver for hi6421v530 voltage regulator
Signed-off-by: Wang Xiaoyin
Signed-off-by: Guodong Xu
---
drivers/regulator/Kconfig| 10 ++
drivers/regulator/Makefile | 1 +
drivers/regulator/hi6421v530-regulator.c | 209
Hi Linus,
Here is the dmaengine fixes request for 4.12. Fixes bunch of issues in the
driver, npthing exciting though..
The following changes since commit 2ea659a9ef488125eb46da6eb571de5eae5c43f6:
Linux 4.12-rc1 (2017-05-13 13:19:49 -0700)
are available in the git repository at:
git://git.i
From: Wang Xiaoyin
add device node for hi6421 pmic core and hi6421v530
voltage regulator,include LDO(1,3,9,11,15,16)
Signed-off-by: Wang Xiaoyin
Signed-off-by: Guodong Xu
---
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 46 +++
1 file changed, 46 insertions(+)
diff
Enable configs for hi6421v530 mfd and regulator driver
+ CONFIG_MFD_HI6421_PMIC=y
+ CONFIG_REGULATOR_HI6421V530=y
Signed-off-by: Guodong Xu
---
arch/arm64/configs/defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index c
Add support for HiSilicon Hi6421v530 PMIC. Hi6421v530 communicates with
main SoC via memory-mapped I/O.
Hi6421v530 and Hi6421 are PMIC chips from the same vendor, HiSilicon,
but at different revisions. They share the same memory-mapped I/O
design. They differ in integrated devices, such as regulat
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