On 31/05/17 01:13, Rob Herring wrote:
On Mon, May 22, 2017 at 11:40:18AM +0200, Matthias Brugger wrote:
All SoCs supported up to now rely on the fallback binding of mt6577.
Fix the binding description to reflect this.
Signed-off-by: Matthias Brugger
---
.../interrupt-controller/mediatek,sy
On Wed, May 31, 2017 at 12:27:44PM +0530, Arvind Yadav wrote:
> clk_prepare_enable() can fail here and we must check its return value.
>
> Signed-off-by: Arvind Yadav
I would split this patch in:
- add missing clk_disable_unprepare()
- check clk_prepare_enable() return value
Since there are triv
Fixed a comment coding style issue that generated a warning stating block
comments use * on subsequent lines.
Signed-off-by: srishti sharma
---
drivers/staging/ccree/cc_crypto_ctx.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/staging/ccree/cc_crypto_ctx.h
On Tue 30-05-17 17:43:26, Andrea Arcangeli wrote:
> On Tue, May 30, 2017 at 04:39:41PM +0200, Michal Hocko wrote:
> > I sysctl for the mapcount can be increased, right? I also assume that
> > those vmas will get merged after the post copy is done.
>
> Assuming you enlarge the sysctl to the worst p
Hi Tomasz,
On 2017-05-31 08:58, Tomasz Figa wrote:
There are multiple places where arrays or otherwise variable sized
buffer are allocated through V4L2 core code, including things like
controls, memory pages, staging buffers for ioctls and so on. Such
allocations can potentially require an order
On Tue, May 30, 2017 at 04:51:23PM -0500, Gustavo A. R. Silva wrote:
> NULL check at line 147: if (chip) {, implies chip might be NULL.
> Function dev_get_drvdata() dereference pointer chip.
> Move pointer priv assignment inside the IF block that checks
> pointer chip.
>
> Addresses-Coverity-ID: 1
On Wed, May 31, 2017 at 02:19:58AM -0700, jiada_w...@mentor.com wrote:
> From: Jiada Wang
>
> Previously i.MX SPI controller only works in Master mode.
> This patch adds support to i.MX51, i.MX53 and i.MX6 ECSPI
> controller to work also in Slave mode.
>
> Currently SPI Slave mode support patch
On 31-05-17 12:26, Kalle Valo wrote:
> Jia-Ju Bai writes:
>
>> The driver may sleep under a spin lock, and the function call path is:
>> b43legacy_op_bss_info_changed (acquire the lock by spin_lock_irqsave)
>> b43legacy_synchronize_irq
>> synchronize_irq --> may sleep
>>
>> To fix it, the l
On Wed, May 31, 2017 at 12:45:38PM +0530, Arvind Yadav wrote:
> Replace '%d' by '%zu' to fix the following compilation warning:-
>
> drivers/i2c/busses/i2c-at91.c:277:2: warning: format ‘%d’ expects argument of
> type ‘int’, but argument 5 has type ‘size_t’ [-Wformat=]
> dev_dbg(dev->dev, "wrot
Mark Rutland wrote:
> This patch uses refcount_inc_not_zero() to perform the peek and
> increment atomically.
I think the helper is unnecessary. Better to adjust the comment if you really
want to explain it. Anyone editing the code should be that this is inside a
critical section.
> A helper
Hi,
On 30-05-17 20:50, Andy Shevchenko wrote:
On Tue, May 30, 2017 at 9:21 PM, sathyanarayanan kuppuswamy
wrote:
On Tue, May 30, 2017 at 3:47 AM,
wrote:
+ tristate "Intel USB Mux"
It's indeed Intel's IP?
Register map to control this MUX comes from Intel vendor defined XHCI
extend
On May 31, 2017 3:05:56 PM GMT+03:00, Michal Hocko wrote:
>On Wed 31-05-17 12:08:45, Mike Rapoport wrote:
>> On Tue, May 30, 2017 at 12:39:30PM +0200, Michal Hocko wrote:
>[...]
>> > Also do you expect somebody else would use new madvise? What would
>be the
>> > usecase?
>>
>> I can think of an
On Tue, 30 May 2017 17:35:33 +0200
Richard Genoud wrote:
> Hi Ralph,
>
> I have the functional spec (no NDA needed, but it's not the full
> one) : A38x-Functional-Spec-PU0A.pdf
> https://marvellcorp.wufoo.com/forms/marvell-armada-38x-functional-specifications/
> (just an email needed, no blood
On Tue, 30 May 2017, Kees Cook wrote:
A new patch has been added at the start of this series to make the default
refcount_t implementation just use an unchecked atomic_t implementation,
since many kernel subsystems want to be able to opt out of the full
validation, since it includes a small perf
At some point I added the "Low" entry at the beginning of the array
without bumping the enumeration count from 9 to 10. Fix this. While at
it, fix the anti-pattern for the other enumeration (used by MUX{1,2}).
Fixes: aa43112445f0 ("ASoC: atmel: tse850: add ASoC driver for the Axentia
TSE-850")
Si
KMSAN reported a use of uninitialized memory in dev_set_alias(),
which was caused by calling strlcpy() (which in turn called strlen())
on the user-supplied non-terminated string.
Signed-off-by: Alexander Potapenko
---
For the record, here is the KMSAN report:
Hi Ralph,
On mer., mai 31 2017, Ralph Sennhauser wrote:
> On Tue, 30 May 2017 17:35:33 +0200
> Richard Genoud wrote:
>
>> Hi Ralph,
>>
>> I have the functional spec (no NDA needed, but it's not the full
>> one) : A38x-Functional-Spec-PU0A.pdf
>> https://marvellcorp.wufoo.com/forms/marvell
On 31/05/17 12:39, YT Shen wrote:
> This adds basic chip support for Mediatek 2712
>
> Signed-off-by: YT Shen
> ---
> arch/arm64/boot/dts/mediatek/Makefile | 1 +
> arch/arm64/boot/dts/mediatek/mt2712-evb.dts | 39 +++
> arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 166
> +
On May 31, 2017 3:08:22 PM GMT+03:00, Michal Hocko wrote:
>On Tue 30-05-17 17:43:26, Andrea Arcangeli wrote:
>> On Tue, May 30, 2017 at 04:39:41PM +0200, Michal Hocko wrote:
>> > I sysctl for the mapcount can be increased, right? I also assume
>that
>> > those vmas will get merged after the post
On Wed, May 31, 2017 at 01:20:44PM +0100, David Howells wrote:
> Mark Rutland wrote:
>
> > This patch uses refcount_inc_not_zero() to perform the peek and
> > increment atomically.
>
> I think the helper is unnecessary. Better to adjust the comment if you really
> want to explain it. Anyone ed
On 31/05/17 13:39, YT Shen wrote:
This adds basic chip support for Mediatek 2712
Signed-off-by: YT Shen
---
arch/arm64/boot/dts/mediatek/Makefile | 1 +
arch/arm64/boot/dts/mediatek/mt2712-evb.dts | 39 +++
arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 166 +++
On Wed, 31 May 2017 17:03:32 +0530
Geetha sowjanya wrote:
> Pci driver doesn't check if the device supports D3hot/D3cold power states
> while setting these power states. The device that doesn't support these
> states will fail when a driver like vfio try to do D0->D3 power transition.
That's
Hi Andrew,
Thanks for posting this, but please try to cc the maintainers in future -- I
almost missed it!
On Tue, May 30, 2017 at 05:34:19PM -0700, Andrew Pinski wrote:
> This allows the compiler to optimize the divide by 1000.
> And remove the other divide.
>
> On ThunderX, gettimeofday improve
On Tue, 2017-05-30 at 21:05 -0700, Arjan van de Ven wrote:
> On 5/27/2017 9:56 AM, Andy Lutomirski wrote:
> > On Sat, May 27, 2017 at 9:00 AM, Andy Lutomirski
> > wrote:
> > > On Sat, May 27, 2017 at 6:31 AM, kernel test robot
> > > wrote:
> > > >
> > > > FYI, we noticed the following commit:
>
On Tue, May 30, 2017 at 11:13:36PM -0700, Ray Jui wrote:
> I did a little more digging myself and I think I now understand what you
> meant by identity mapping, i.e., configuring the MMU-500 with 1:1 mapping
> between the DMA address and the IOVA address.
>
> I think that should work. In the end,
Fairly straightforward conversion. In fsync, just use the file->f_wb_err
value as a "since" value. At the end, call filemap_report_wb_err to
advance the cursor in it.
Signed-off-by: Jeff Layton
---
fs/block_dev.c | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/
Add new filemap_*wait* variants that take a "since" value and return an
error if one occurred since that sample point.
Signed-off-by: Jeff Layton
---
include/linux/fs.h | 9
mm/filemap.c | 67 ++
2 files changed, 76 insertions(+
Sample the wb_err before changing the directory, so that we can catch
errors that occur since that point.
Signed-off-by: Jeff Layton
---
fs/ext2/dir.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/fs/ext2/dir.c b/fs/ext2/dir.c
index 6e476c9929f8..073f096a
Set the flag to indicate that we want new-style data writeback error
handling.
This means that we need to override the open routines for files and
directories so that we can sample the bdev wb_err at open.
XXX: doesn't quite pass the xfstest for this currently, as ext2_error
resets the error
On Wed, May 31, 2017 at 9:09 PM, Marek Szyprowski
wrote:
> Hi Tomasz,
>
>
> On 2017-05-31 08:58, Tomasz Figa wrote:
>>
>> There are multiple places where arrays or otherwise variable sized
>> buffer are allocated through V4L2 core code, including things like
>> controls, memory pages, staging buff
Some filesystems (particularly local ones) keep a different mapping for
metadata writeback. Add a second errseq_t to struct file for tracking
metadata writeback errors. Also add a new function for checking a
mapping of the caller's choosing vs. the f_md_wb_err value.
Signed-off-by: Jeff Layton
--
Grab the current mapping->wb_err when linking a transaction to the list
and stash it in the journal inode. Then we can use that as a "since"
value when committing it to ensure that there were no writeback errors
since the transaction was started.
We do still need to perform old-style error handlin
Allow filesystems to pass in an errseq_t for a since value.
Signed-off-by: Jeff Layton
---
include/linux/mm.h | 2 ++
mm/page-writeback.c | 53 +
2 files changed, 43 insertions(+), 12 deletions(-)
diff --git a/include/linux/mm.h b/include/li
Sample the block device inode's errseq_t when opening a file, so we can
catch metadata writeback errors at fsync time. Change ext4_sync_file to
check for data errors first, and then check the blockdev for metadata
errors afterward.
There are also several internal callers of filemap_write_and_wait_
For now, we add a FS_WB_ERRSEQ check to know how to handle it.
Signed-off-by: Jeff Layton
---
fs/libfs.c | 26 +++---
1 file changed, 19 insertions(+), 7 deletions(-)
diff --git a/fs/libfs.c b/fs/libfs.c
index 1dec90819366..2ae58a252718 100644
--- a/fs/libfs.c
+++ b/fs/libfs
Since it returns errors in a way similar to fsync, have it use the same
method for returning previously-reported writeback errors.
Signed-off-by: Jeff Layton
---
fs/sync.c | 17 +
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/fs/sync.c b/fs/sync.c
index ec93aac4f
New variants of sync_filesystem and sync_blockdev.
Signed-off-by: Jeff Layton
---
fs/block_dev.c | 15 +++
fs/internal.h | 8
fs/sync.c | 45 +
include/linux/fs.h | 13 -
4 files changed, 80 insertion
To enable that, make __errseq_set return the value that it was set to
we exit the loop. Take heed that that value is not suitable as a later
"since" value, as it will not have been marked seen.
Signed-off-by: Jeff Layton
---
include/linux/errseq.h | 2 +-
include/linux/fs.h
Jan's description for this patch is much better than mine, so I'm
quoting it verbatim here:
-8<-
DAX currently doesn't set errors in the mapping when cache flushing
fails in dax_writeback_mapping_range(). Since this function can get
called only from fsync(2) or sync
I waxed a little loquacious here, but I figured that more detail was
better, and writeback error handling is so hard to get right.
Although I think we'll eventually remove it once the transition is
complete, I've gone ahead and documented the FS_WB_ERRSEQ flag as well.
Cc: Jan Kara
Signed-off-by
An errseq_t is a way of recording errors in one place, and allowing any
number of "subscribers" to tell whether an error has been set again
since a previous time.
It's implemented as an unsigned 32-bit value that is managed with atomic
operations. The low order bits are designated to hold an error
Now that we have new infrastructure for handling writeback errors using
errseq_t, we need to convert the existing code to use it. We could
attempt to retrofit the old interfaces on top of the new, but there is
a conceptual disconnect here in the case of internal callers that
invoke filemap_fdatawai
v5: don't retrofit old API over the new infrastructure
add fstype flag to indicate how wb errors are tracked within that fs
add more function variants that take a errseq_t "since" value
add second errseq_t to struct file to track metadata wb errors
convert ext4 and ext2 to use the n
Most filesystems currently use mapping_set_error and
filemap_check_errors for setting and reporting/clearing writeback errors
at the mapping level. filemap_check_errors is indirectly called from
most of the filemap_fdatawait_* functions and from
filemap_write_and_wait*. These functions are called f
KMSAN reported a use of uninitialized memory in dev_set_alias(),
which was caused by calling strlcpy() (which in turn called strlen())
on the user-supplied non-terminated string.
Signed-off-by: Alexander Potapenko
---
v2: fixed an off-by-one error spotted by Dmitry Vyukov
For the record, here is
Fixed a comment coding style issue that generated a warning stating that block
comments should align the * on each line.
Signed-off-by: srishti sharma
---
drivers/staging/ccree/cc_crypto_ctx.h | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/staging/ccree/cc_c
Commit 5995a68 "xen/privcmd: Add support for Linux 64KB page granularity" did
not go far enough to support 64KB in mmap_batch_fn.
The variable 'nr' is the number of 4KB chunk to map. However, when Linux
is using 64KB page granularity the array of pages (vma->vm_private_data)
contain one page per 6
On 10/05/17 13:02, Matthias Brugger wrote:
On 14/12/16 09:04, Rick Chang wrote:
Signed-off-by: Rick Chang
Signed-off-by: Minghsiu Tsai
---
This patch depends on:
CCF "Add clock support for Mediatek MT2701"[1]
iommu and smi "Add the dtsi node of iommu and smi for mt2701"[2]
[1]
http
On 2017-05-31 14:21, Hans de Goede wrote:
> actually this is the first time I hear about a mux framework
> at all. Is there a git tree with the patches for this somewhere ?
https://gitlab.com/peda-linux/mux.git in the "mux" branch.
Series posted here:
https://lkml.org/lkml/2017/5/14/160
Cheers,
Hi Tomasz,
On Wed, May 31, 2017 at 09:46:05PM +0900, Tomasz Figa wrote:
> On Wed, May 31, 2017 at 9:09 PM, Marek Szyprowski
> wrote:
> > Hi Tomasz,
> >
> >
> > On 2017-05-31 08:58, Tomasz Figa wrote:
> >>
> >> There are multiple places where arrays or otherwise variable sized
> >> buffer are allo
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Signed-off-by: Jeff Layton
---
common/rc | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/common/rc b/common/rc
index 391d36f373cd..83765aacfb06 100644
--- a/common/rc
+++ b/common/rc
@@ -832,7 +832,16 @@ _scratch_mkfs()
mkfs_cmd="$MKFS_BTRFS_PROG"
With btrfs, we can't really put the log on a separate device. What we
can do however is mirror the metadata across two devices and make the
data striped across all devices. When we turn on dmerror then the
metadata can fall back to using the other mirror while the data errors
out.
Note that the cu
This patchset is a companion to the Linux kernel patch series I recently
posted with the cover letter:
[PATCH v5 00/17] fs: introduce new writeback error reporting and convert
ext2 and ext4 to use it
That patchset adds a new userland-visible change to report errors on
all open file descripti
The writeback error handling test requires that you put the journal on a
separate device. This allows us to use dmerror to simulate data
writeback failure, without affecting the journal.
xfs already has infrastructure for this (a'la $SCRATCH_LOGDEV), so wire
up the ext4 code so that it can do the
Ensure that we get an error back on all fds when a block device is
open by multiple writers and writeback fails.
Signed-off-by: Jeff Layton
---
tests/generic/998 | 64 +++
tests/generic/998.out | 2 ++
tests/generic/group | 1 +
3 files cha
I'm working on a set of kernel patches to change how writeback errors
are handled and reported in the kernel. Instead of reporting a
writeback error to only the first fsync caller on the file, I aim
to make the kernel report them once on every file description.
This patch adds a test for the new b
Provide an implementation of the callback
rtc_class_ops.alarm_irq_enable for rtc-opal driver. This callback is
called when the wake alarm is disabled via the command:
'echo 0 > /sys/class/rtc/rtc0/wakealarm'
Without this the Timed-Power-On(TPO) config remains set even when its
disabled by the abo
On Wed, May 31, 2017 at 12:21:10PM +0200, Arnd Bergmann wrote:
> On Wed, May 31, 2017 at 11:43 AM, Arend van Spriel
> wrote:
> > On 5/30/2017 1:20 PM, Arnd Bergmann wrote:
> >>
> >> An unknown change in the kernel headers caused a build regression
> >> in an MTD partition driver:
> >>
> >> In file
On 5/31/2017 4:51 AM, Borislav Petkov wrote:
On Tue, May 30, 2017 at 11:39:07AM -0500, Tom Lendacky wrote:
Yes, it's from objtool:
arch/x86/mm/mem_encrypt_boot.o: warning: objtool: .text+0xd2: return
instruction outside of a callable function
Oh, well, let's make it a global symbol then. Who
On Wed, May 31, 2017 at 4:13 AM, Peter Zijlstra wrote:
> On Tue, May 30, 2017 at 02:39:51PM -0700, Kees Cook wrote:
>> The coming x86 refcount protection needs to be able to add trailing
>> instructions to the GEN_*_RMWcc() operations. This extracts the
>> difference between the goto/non-goto case
On Wed, May 31, 2017 at 5:27 AM, Davidlohr Bueso wrote:
> On Tue, 30 May 2017, Kees Cook wrote:
>
>> A new patch has been added at the start of this series to make the default
>> refcount_t implementation just use an unchecked atomic_t implementation,
>> since many kernel subsystems want to be abl
Hi Jaegeuk,
On 2017/5/27 7:59, Jaegeuk Kim wrote:
> If we got failure from both of create and evict_inode, we can hit this wrong
> bug_on.
>
> Signed-off-by: Jaegeuk Kim
> ---
> fs/f2fs/inode.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/fs/f2fs/inode.c b/fs/f2fs/inode.c
> index
If a target identifies itself as NVMe 1.3 compliant, try to get the
list of Namespace Identification Descriptors and populate the UUID,
NGUID and EUI64 fileds in the NVMe namespace structure with these
values.
Signed-off-by: Johannes Thumshirn
---
drivers/nvme/host/core.c | 88 ++
Allow overriding the announced NVMe Version of a via configfs.
This is particularly helpful when debugging new features for the host
or target side without bumping the hard coded version (as the target
might not be fully compliant to the announced version yet).
Signed-off-by: Johannes Thumshirn
The uuid field in the nvme_ns structure represents the nguid field
from the identify namespace command. And as NVMe 1.3 introduced an
UUID in the NVMe Namespace Identification Descriptor this will
collide.
So rename the uuid to nguid to prevent any further
confusion. Unfortunately we export the ng
This patchset implemets NVMe Namespace Descriptor Identification as of
NVMe 1.3. The Namespace Descriptor Identification allows a NVMe host
to query several Namespace Identification mechanisms, such as EUI-64,
NGUID and UUID from the target. If more than one value is set by the
target, it can trans
Change the magic 4096 or 0x1000 to SZ_4K so it's easier to spot typos.
The magic numbers in the BUILD_BUG_ON() calls are left in place as
there are no defines used for the other sizes as well.
Signed-off-by: Johannes Thumshirn
---
drivers/nvme/host/core.c| 4 ++--
drivers/nvme/host/pci.
Add the UUID field from the NVMe Namespace Identification Descriptor
to the nvmet_ns structure and allow it's population via configfs.
Signed-off-by: Johannes Thumshirn
---
drivers/nvme/target/configfs.c | 31 +++
drivers/nvme/target/nvmet.h| 1 +
2 files changed
Now that we have a way for getting the UUID from a target, provide it
to userspace as well.
Unfortunately there is already a sysfs attribute called UUID which is
a misnomer as it holds the NGUID value. So instead of creating yet
another wrong name, create a new 'nguid' sysfs attribute for the
NGUI
Ard Biesheuvel wrote:
> No, I am fine with keeping this as a single series. I don't want
> anything under drivers/efi to imply policy regarding lockdown. Kernel
> lockdown should be a feature that lives somewhere else, and which
> contains a CONFIG_ option that implies 'lockdown is enabled by def
A NVMe Identify NS command with a CNS value of '3' is expecting a list
of Namespace Identification Descriptor structures to be returned to
the host for the namespace requested in the namespace identify
command.
This Namespace Identification Descriptor structure consists of the
type of the namespac
On Wed, May 31, 2017 at 3:12 PM, Paul E. McKenney
wrote:
> On Wed, May 31, 2017 at 12:21:10PM +0200, Arnd Bergmann wrote:
>> On Wed, May 31, 2017 at 11:43 AM, Arend van Spriel
>> wrote:
>> > On 5/30/2017 1:20 PM, Arnd Bergmann wrote:
>> >>
>> >> An unknown change in the kernel headers caused a bu
Hello!
On May 31, 2017, at 3:57 AM, Jia-Ju Bai wrote:
> The driver may sleep under a spin lock, and the function call path is:
> cfs_wi_deschedule (acquire the lock by spin_lock)
> LASSERT
>lbug_with_loc
> libcfs_debug_dumplog
>schedule and kthread_run --> may sleep
>
> To fix
On 5/31/2017 3:49 AM, Borislav Petkov wrote:
On Tue, May 30, 2017 at 10:37:03AM -0500, Tom Lendacky wrote:
I can define the command line option and the "on" and "off" values as
character buffers in the function and initialize them on a per character
basis (using a static string causes the same i
Hello!
On May 31, 2017, at 4:00 AM, Jia-Ju Bai wrote:
> The driver may sleep under a spin lock, and the function call path is:
> cfs_wi_exit (acquire the lock by spin_lock)
> LASSERT
>lbug_with_loc
> libcfs_debug_dumplog
>schedule and kthread_run --> may sleep
>
> To fix it, al
From: Konstantin Porotchkin
This commit updates the CP110 system controller driver to add the
definition for a missing clock.
The SDIO clock is dedicated driving the SDHCI interface and its frequency
is 400MHz (2/5 of PLL source clock).
The SDIO interface should be bound to this clock and not t
The *-clock-output-names of the cp110-system-controller0 node are not
used anymore, so remove them.
Reviewed-by: Thomas Petazzoni
Signed-off-by: Gregory CLEMENT
---
arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 13 +-
arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 1
At present USB 2.0 cameras fail to play when run for 2nd time or greater.
This issue occurs only when previous endpoint cached ring is used instead
of allocating a new endpoint ring. The root cause of the problem narrows
down to the Toggle bit, which is not getting set on the last trb of the
cached
In preparation to the addition of a new clock, rename the goto labels
used to handle the failure cases using a name related to the failure
cause. This will allow to insert additional failing cases without
renaming all the labels.
Reviewed-by: Thomas Petazzoni
Signed-off-by: Gregory CLEMENT
---
This patch updates the documentation according to the change made in the
patch "clk: mvebu: cp110 fix name of the GOP gate clock": the GOP
clock (bit 18) is not at all used for emmc but only for GOP.
Acked-by: Rob Herring
Signed-off-by: Gregory CLEMENT
---
Documentation/devicetree/bindings/arm/
Actually the GOP clock (bit 18) is not at all used for emmc but only
for GOP: let's fix the name.
Changing the name in the device tree is not an issue because the name
itself is not used to reference the clock. Thanks to this the ABI remains
backward compatible.
Acked-by: Rob Herring
Signed-off-
The new binding for the system controller on cp110 moved the clock
controller into a subnode. This preliminary step will allow to add gpio
and pinctrl subnodes.
Reviewed-by: Thomas Petazzoni
Signed-off-by: Gregory CLEMENT
---
arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 41 ++-
Hi,
We got more information about the clock controllers and the clock tree
of the CP110 part that we find in the Marvell Armada 7K/8K SoCs.
The main change in this second version is about the binding
documentation: all the documentation related changes are now move in
their own patches. It allows
The initial intent when the binding of the cp110 system controller was to
have one flat node. The idea being that what is currently a clock-only
driver in drivers would become a MFD driver, exposing the clock, GPIO and
pinctrl functionality. However, after taking a step back, this would lead
to a m
This patch updates the documentation according to the change made in the
patch "clk: mvebu: cp110: add sdio clock to cp-110 system controller"
Acked-by: Rob Herring
Signed-off-by: Gregory CLEMENT
---
Documentation/devicetree/bindings/arm/marvell/cp110-system-controller0.txt | 1
+
1 file chang
Using the *-clock-output-names property was a convenient way to have a
unique name for each clock even when there are multiple cp110 blocks
as we can find on Armada 8K.
However it has some drawbacks: the main one being a stronger link than
necessary between the driver and the device tree. For exam
This patch updates the documentation according to the change made in the
patch "pinctrl: dt-bindings: cp110: introduce a new binding".
Acked-by: Rob Herring
Signed-off-by: Gregory CLEMENT
---
Documentation/devicetree/bindings/arm/marvell/cp110-system-controller0.txt |
18 ++
1
This patch updates the documentation according to the change made in the
patch "clk: mvebu: cp110: do not depend anymore of the
*-clock-output-names": the clock names are no more part of the binding.
Acked-by: Rob Herring
Signed-off-by: Gregory CLEMENT
---
Documentation/devicetree/bindings/arm/
On Tue, May 30, 2017 at 8:35 AM, Keith Busch wrote:
> On Wed, May 24, 2017 at 03:06:31PM -0700, Andy Lutomirski wrote:
>> They have known firmware bugs. A fix is apparently in the works --
>> once fixed firmware is available, someone from Intel (Hi, Keith!)
>> can adjust the quirk accordingly.
>
On 05/31/2017 09:03 AM, Julien Grall wrote:
> Commit 5995a68 "xen/privcmd: Add support for Linux 64KB page granularity" did
> not go far enough to support 64KB in mmap_batch_fn.
>
> The variable 'nr' is the number of 4KB chunk to map. However, when Linux
> is using 64KB page granularity the array o
The MSI controller in Tango supports 256 message-signaled interrupts,
and a single doorbell address.
Signed-off-by: Marc Gonzalez
---
drivers/pci/host/pcie-tango.c | 222
++
1 file changed, 222 insertions(+)
diff --git a/drivers/pci/h
Binding for the Sigma Designs SMP8759 SoC.
Signed-off-by: Marc Gonzalez
---
Documentation/devicetree/bindings/pci/tango-pcie.txt | 30
++
1 file changed, 30 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/tango-pcie.txt
b/Documentation/devicetree/b
Hi Thomas,
On 31/05/17 10:58, Thomas Gleixner wrote:
> If an interrupt is marked NOAUTOEN then request_irq() installs the action,
> but does not enable the interrupt via startup_irq(). The interrupt is
> enabled via enable_irq() later from the driver. enable_irq() calls
> irq_enable().
>
> That
On Wed, May 31, 2017 at 5:44 AM, Rik van Riel wrote:
> On Tue, 2017-05-30 at 21:05 -0700, Arjan van de Ven wrote:
>> On 5/27/2017 9:56 AM, Andy Lutomirski wrote:
>> > On Sat, May 27, 2017 at 9:00 AM, Andy Lutomirski
>> > wrote:
>> > > On Sat, May 27, 2017 at 6:31 AM, kernel test robot
>> > > wro
Hi Igor,
[auto build test ERROR on mmotm/master]
[also build test ERROR on v4.12-rc3 next-20170531]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Igor-Stoppa/Sealable-memory-support/20170522
Spin v5 to address comments from Marc and Bjorn.
Changes from v4 to v5
- Split the DT binding into a third patch
- Introduce host bridge support first
- Put all MSI stuff in the MSI patch
- Inline 2 single-use functions
- Fix tango_ack
- Allocate irq at probe start
- Print dire message in probe,
On Sat, May 27, 2017 at 2:30 PM, Yuhong Bao wrote:
> I don't like espfix of course, and would probably manually fix it to N in the
> kernel config unless I really had to run buggy DPMI apps.
> Win8 decided to just disable NTVDM by default instead.
>
> From
This driver is required to work around several hardware bugs
in the PCIe controller.
NB: Revision 1 does not support legacy interrupts, or IO space.
Signed-off-by: Marc Gonzalez
---
drivers/pci/host/Kconfig | 8 +++
drivers/pci/host/Makefile | 1 +
drivers/pci/host/pcie-tango.c | 1
On Tue, May 30, 2017, at 12:08 PM, David Howells wrote:
>
> KEY_SERVICE_NS_UTS
> KEY_SERVICE_NS_IPC
> KEY_SERVICE_NS_MNT
> KEY_SERVICE_NS_PID
> KEY_SERVICE_NS_NET
> KEY_SERVICE_NS_CGROUP
Any reasons not to reuse the CLONE_ flags?
> which select those namespaces
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