On Sun 2017-04-02 12:05:36, Pavel Machek wrote:
> Fix overlapping NAND partitions.
>
> Signed-off-by: Pavel Machek
Ping? Two partitions at same place are bad news...
Pavel
> diff --git a/arch/powerpc/boot/dts/sequoia.dts
>
On Tue 2017-05-16 13:48:06, Christoph Hellwig wrote:
> KTHREAD_DELAYED_WORK_INIT and DEFINE_KTHREAD_DELAYED_WORK are unused
> and are using a timer helper that's about to go away.
A patch using this API is flying around, see
https://lkml.kernel.org/r/1476715742-14924-1-git-send-email-pmla...@suse.
Declare snd_kcontrol_new structures as const as they are only passed an
argument to the function snd_ctl_new1. This argument is of type const,
so snd_kcontrol_new structures having this property can be made const.
Done using Coccinelle:
@r disable optional_qualifier@
identifier x;
position p;
@@
s
Declare snd_kcontrol_new structures as const as they are only passed an
argument to the function snd_ctl_new1. This argument is of type const,
so snd_kcontrol_new structures having this property can be made const.
Done using Coccinelle:
@r disable optional_qualifier@
identifier x;
position p;
@@
s
On 05/16/2017 04:16 AM, js1...@gmail.com wrote:
> From: Joonsoo Kim
>
> Hello, all.
>
> This is an attempt to recude memory consumption of KASAN. Please see
> following description to get the more information.
>
> 1. What is per-page shadow memory
>
> This patch introduces infrastructure to su
On Tue, May 16, 2017 at 10:30:42AM +0200, Ingo Molnar wrote:
>
> * Yury Norov wrote:
>
> > I collected about 700 results in dmesg, and took 600 fastest.
> > For the vanilla kernel, the average value is 368, and for patched
> > kernel it is 388. It's 5% slower. But the standard deviation is
> >
> + switch (chip){
Space please, between ) and {
Andrew
On Wed, 17 May 2017 13:38:56 +0200,
Bhumika Goyal wrote:
>
> Declare snd_kcontrol_new structures as const as they are only passed an
> argument to the function snd_ctl_new1. This argument is of type const,
> so snd_kcontrol_new structures having this property can be made const.
> Done using Coccin
If we see unrecoverable ECC error, we need to count number of bitflips
from all-ones and report correctable/uncorrectable according to
that. Otherwise we report ECC failed on erased flash with single bit error.
Signed-off-by: Pavel Machek
diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mt
As it turned out my allyesconfig on x86_64 wasn't sufficient and 0day
build machinery found a failure on arm architecture. It was clearly a
typo. Now I have pushed this to my build battery with cross arch
compilers and it passes so there shouldn't more surprises hopefully.
Here is the v2.
---
>From
Hi Lv
> > Yes, it's called a quirk. And the good practice is to register those
> > quirks and make them available to everybody. Being in hwdb in user space
> > or in acpi/button in kernel space doesn't matter, we need them.
>
> I have no objections but concerns related to the combination of "defa
On Wed, May 17, 2017 at 12:49 PM, John Garry wrote:
> From: Xiang Chen
>
> For ECC 1bit error, logic can recover it, so we only print a warning.
> For ECC multi-bit and AXI bus fatal error, we panic.
>
> Signed-off-by: John Garry
> Signed-off-by: Xiang Chen
This one is tricky as there are conf
On Wed, May 03, 2017 at 05:19:40PM +0200, Matthias Brugger wrote:
> From: Simon Xue
>
> This patch makes it possible to compile the rockchip-iommu driver on
> ARM64, so that it can be used with 64-bit SoCs equipped with this type
> of IOMMU.
>
> Signed-off-by: Simon Xue
> Signed-off-by: Shunqia
On Wed, 17 May 2017 14:22:24 +0200
Pavel Machek wrote:
> If we see unrecoverable ECC error, we need to count number of bitflips
> from all-ones and report correctable/uncorrectable according to
> that. Otherwise we report ECC failed on erased flash with single bit error.
>
> Signed-off-by: Pavel
On Wed, 2017-05-17 at 11:48 +1000, Stephen Rothwell wrote:
> Hi Jeff,
>
> On Tue, 16 May 2017 21:10:03 -0400 Jeff Layton
> wrote:
> >
> > I think this patch will probably fix it, but I don't have a 32-bit host
> > set up to build on just now. I'll go ahead and merge this into the
> > branch, an
When a transaction starts, start_this_handle() saves current
PF_MEMALLOC_NOFS value so that it can be restored at journal stop time.
Journal restart is a special case that calls start_this_handle() without
stopping the transaction. start_this_handle() isn't aware that the
original value is already
On Wed, May 17, 2017 at 12:49 PM, John Garry wrote:
> Add the code to initialise controller which is based on pci device
> in hisi_sas_pci_init.c
>
> The main functionality added is for probing and initialisation of
> the controller based on pci device.
>
> The core controller routines are still i
On Wed, May 17, 2017 at 5:50 PM, Takashi Iwai wrote:
> On Wed, 17 May 2017 13:38:56 +0200,
> Bhumika Goyal wrote:
>>
>> Declare snd_kcontrol_new structures as const as they are only passed an
>> argument to the function snd_ctl_new1. This argument is of type const,
>> so snd_kcontrol_new structure
score's asm/device.h is merely including asm-generic/device.h. Thus, the
arch specific header can be omitted and the generic header can be used
directly
Signed-off-by: Tobias Klauser
---
arch/score/include/asm/Kbuild | 1 +
arch/score/include/asm/device.h | 6 --
2 files changed, 1 inserti
Hi Jeff,
On Wed, 17 May 2017 08:32:46 -0400 Jeff Layton wrote:
>
> On Wed, 2017-05-17 at 11:48 +1000, Stephen Rothwell wrote:
> >
> > On Tue, 16 May 2017 21:10:03 -0400 Jeff Layton
> > wrote:
> > >
> > > I think this patch will probably fix it, but I don't have a 32-bit host
> > > set up to
On Wed, May 17, 2017 at 12:49 PM, John Garry wrote:
> For a pci-based controller, retrieve the SAS address from the
> ACPI tables.
>
> The retrieval is based on the ACPI device node name. Sample is
> as follows:
> Scope(_SB)
> {
> Device(SAS0) {
> Name(_HID, "HISI0163")
>
On Wed, May 17, 2017 at 12:49 PM, John Garry wrote:
> This patchset adds support for the HiSilicon SAS controller
> in the hip08 chipset.
>
> The key difference compared to earlier chipsets is that the
> controller is an integrated PCI endpoint in hip08.
> As such, the controller is a pci device (
Hi guys,
On Wed, May 17, 2017 at 02:36:44AM -0700, Guenter Roeck wrote:
> On 05/17/2017 12:34 AM, Oliver Neukum wrote:
> > Am Mittwoch, den 17.05.2017, 00:32 -0700 schrieb Badhri Jagan
> > Sridharan:
> >
> > Hi,
> >
> > > "Two independent set of mechanisms are defined to allow a USB Type-C
> > >
On 17/05/2017 13:27, Arnd Bergmann wrote:
On Wed, May 17, 2017 at 12:49 PM, John Garry wrote:
> From: Xiang Chen
>
> For ECC 1bit error, logic can recover it, so we only print a warning.
> For ECC multi-bit and AXI bus fatal error, we panic.
>
> Signed-off-by: John Garry
> Signed-off-by: Xian
On 2017-05-11 10:32, Martin Kepplinger wrote:
> On 2017-05-08 18:11, Rob Herring wrote:
>> On Tue, May 02, 2017 at 05:00:59PM +0200, Martin Kepplinger wrote:
>>> The datasheet and application note does not mention an allowed range for
>>> the M09_REGISTER_THRESHOLD parameter. One of our customers n
On Mon, Apr 24, 2017 at 01:50:33PM +0900, Masahiro Yamada wrote:
> Include instead of relative path from include/drm, then
> remove the -Iinclude/drm compiler flag.
>
> While we are here, use <...> instead of "..." for include/linux/*.h
> headers too.
>
> Signed-off-by: Masahiro Yamada
This on
> -Original Message-
> From: Arnd Bergmann [mailto:a...@arndb.de]
> Sent: Tuesday, May 16, 2017 2:30 PM
> To: Greg Kroah-Hartman ; Arnd Bergmann
>
> Cc: Ruxandra Ioana Radulescu ;
> de...@driverdev.osuosl.org; linux-kernel@vger.kernel.org
> Subject: [PATCH] staging: fsl-dpaa2/eth: add ETHE
xtensa's asm/device.h is a verbatim copy of asm-generic/device.h and
does not add any arch specific extensions. Thus, use the asm-generic
header directly.
Signed-off-by: Tobias Klauser
---
arch/xtensa/include/asm/Kbuild | 1 +
arch/xtensa/include/asm/device.h | 15 ---
2 files cha
Hi Felipe,
On 17 May 2017 at 16:08, Felipe Balbi wrote:
>
> Hi Chunyan,
>
> When you wrote your patchset to provide ftrace exports, why did you
> choose to export only function trace? Why not tracepoints,
In fact, I tried submitting patches[1] to do exporting tracepoint to
STM, but Ingo and Stev
On Wed, May 17, 2017 at 01:38:40PM +0200, Stefan Wahren wrote:
> Hi Greg,
>
> Am 08.05.2017 um 17:18 schrieb Johan Hovold:
> > On Thu, May 04, 2017 at 03:32:53PM -0500, Rob Herring wrote:
> >> On Thu, May 4, 2017 at 11:22 AM, Stefan Wahren
> >> wrote:
> >>> Am 02.05.2017 um 15:18 schrieb Johan H
On Wed, 17 May, at 12:53:50PM, Peter Zijlstra wrote:
> On Mon, May 15, 2017 at 02:03:11AM -0700, tip-bot for Peter Zijlstra wrote:
> > sched/fair, cpumask: Export for_each_cpu_wrap()
>
> > -static int cpumask_next_wrap(int n, const struct cpumask *mask, int start,
> > int *wrapped)
> > -{
>
> >
On Fri, May 05, 2017 at 11:39:59AM -0700, KarimAllah Ahmed wrote:
> Ever since commit 091d42e43d ("iommu/vt-d: Copy translation tables from
> old kernel")
Please put the commit-information into a Fixes: tag next time. I'll
added a Fixes tag to the commit this time.
> the kdump kernel copies the
Signed-off-by: Geert Uytterhoeven
Reviewed-by: Rob Herring
---
v4:
- Add Reviewed-by,
v3:
- In SPI slave mode, represent the (single) slave device again as a
child of the controller node, which is now optional, and must be
named "slave" if present,
- Split slave node properties in
Signed-off-by: Geert Uytterhoeven
---
v3, v4:
- No changes,
v2:
- New.
---
Documentation/spi/spi-summary | 27 ---
1 file changed, 20 insertions(+), 7 deletions(-)
diff --git a/Documentation/spi/spi-summary b/Documentation/spi/spi-summary
index d1824b399b2d1d79..1721
Add an example SPI slave handler to allow remote control of system
reboot, power off, halt, and suspend.
Signed-off-by: Geert Uytterhoeven
---
v3, v4:
- No changes,
v2:
- Use spi_async() instead of spi_read(),
- Submit the next transfer from the previous transfer's completion
callback,
From: Hisashi Nakamura
Add slave mode support to the MSIOF driver, in both PIO and DMA mode.
For now this only supports the transmission of messages with a size
that is known in advance.
Signed-off-by: Hisashi Nakamura
Signed-off-by: Hiromitsu Yamasaki
[geert: Timeout handling cleanup, spi co
frv's asm/device.h is merely including asm-generic/device.h. Thus, the
arch specific header can be omitted and the generic header can be used
directly.
Signed-off-by: Tobias Klauser
---
arch/frv/include/asm/Kbuild | 1 +
arch/frv/include/asm/device.h | 7 ---
2 files changed, 1 insertion(+
Add support for registering SPI slave controllers using the existing SPI
master framework:
- SPI slave controllers must use spi_alloc_slave() instead of
spi_alloc_master(), and should provide an additional callback
"slave_abort" to abort an ongoing SPI transfer request,
- SPI slave cont
Hi all,
This patch series adds support for SPI slave controllers to the Linux
SPI subsystem, including:
- DT binding updates for SPI slave support,
- Core support for SPI slave controllers,
- SPI slave support for the Renesas MSIOF device driver (thanks to
Nakamura-san for the in
Add an example SPI slave handler responding with the uptime at the time
of reception of the last SPI message.
This can be used by an external microcontroller as a dead man's switch.
Signed-off-by: Geert Uytterhoeven
---
v4:
- No changes,
v3:
- Add #include ,
v2:
- Resolve semantic differ
mn10300's asm/device.h is merely including asm-generic/device.h. Thus,
the arch specific header can be omitted and the generic header can be
used directly.
Signed-off-by: Tobias Klauser
---
arch/mn10300/include/asm/Kbuild | 1 +
arch/mn10300/include/asm/device.h | 1 -
2 files changed, 1 inser
On Thu, May 11, 2017 at 01:35:51PM +0200, Arnd Bergmann wrote:
> The mediatek iommu driver relied on an implicit include of dma-mapping.h,
> but for some reason that is no longer there in 4.12-rc1:
>
> drivers/iommu/mtk_iommu_v1.c: In function 'mtk_iommu_domain_finalise':
> drivers/iommu/mtk_iommu
From: Colin Ian King
Function get_pkg_num is leaking an open file, fix this with a fclose().
Detected with static analysis by cppcheck:
[tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c:1115]:
(error) Resource leak: fp
Fixes: 4beec1d7519691 ("tools/power x86_energy_perf_policy
On Wednesday 17 May 2017 14:06:06 Johannes Berg wrote:
> On Tue, 2017-05-16 at 01:13 +0200, Luis R. Rodriguez wrote:
> > > > Now for N900 case there is a similar scenario
> > > > alhtough it has additional requirement to go to user-space due to
> > > > need to use a proprietary library to obtain th
Hi all,
This patch series adds support for SPI slave controllers to the Linux
SPI subsystem, including:
- DT binding updates for SPI slave support,
- Core support for SPI slave controllers,
- SPI slave support for the Renesas MSIOF device driver (thanks to
Nakamura-san for the in
On Wed, May 10, 2017 at 11:39:03AM -0700, Ashok Raj wrote:
> From: CQ Tang
>
> A driver would need to know if there are any active references to a
> a PASID before cleaning up its resources. This function helps check
> if there are any active users of a PASID before it can perform any
> recovery
Hi!
> On Wed, 17 May 2017 14:22:24 +0200
> Pavel Machek wrote:
>
> > If we see unrecoverable ECC error, we need to count number of bitflips
> > from all-ones and report correctable/uncorrectable according to
> > that. Otherwise we report ECC failed on erased flash with single bit error.
> >
> >
+to linux-mm maintainer for any suggestions
Thanks
zhongjiang
On 2017/5/16 13:03, zhong jiang wrote:
> Hi
>
> I hit the following issue by runing /proc/vmallocinfo. The kernel is 4.1
> stable and
> 32 bit to be used. after I expand the vamlloc area, the issue is not occur
> again.
> it is re
subject s/vmallock/vmalloc/
On Wed, May 17, 2017 at 10:09:32AM +0200, Michal Hocko wrote:
> From: Michal Hocko
>
> While converting drm_[cm]alloc* helpers to kvmalloc* variants Chris
> Wilson has wondered why we want to try kmalloc before vmalloc fallback
> even for larger allocations requests.
On 05/17/2017 05:38 AM, Heikki Krogerus wrote:
Hi guys,
On Wed, May 17, 2017 at 02:36:44AM -0700, Guenter Roeck wrote:
On 05/17/2017 12:34 AM, Oliver Neukum wrote:
Am Mittwoch, den 17.05.2017, 00:32 -0700 schrieb Badhri Jagan
Sridharan:
Hi,
"Two independent set of mechanisms are defined to
On 17/05/2017 13:33, Arnd Bergmann wrote:
On Wed, May 17, 2017 at 12:49 PM, John Garry wrote:
> Add the code to initialise controller which is based on pci device
> in hisi_sas_pci_init.c
>
> The main functionality added is for probing and initialisation of
> the controller based on pci device.
On Wed, 2017-05-17 at 14:53 +0200, Pali Rohár wrote:
> > In fact, why should the *driver* care either? IOW - why should
> > "request_firmware_prefer_user()" even exist?
>
> There are default/example NVS data, which are stored in /lib/firmware
> and installed by linux-firmware package.
[...]
Oh,
On Wed, May 17, 2017 at 1:51 AM, Johan Hovold wrote:
> On Tue, May 16, 2017 at 02:28:28PM -0700, Andrey Smirnov wrote:
>> On Tue, May 16, 2017 at 6:44 AM, Johan Hovold wrote:
>> > Make sure to deregister and release the nvmem device and underlying
>> > memory on registration errors.
>> >
>> > Not
On 05/15/2017 03:46 PM, Gustavo A. R. Silva wrote:
The array field name in struct i2c_adapter is a fixed size array
so it can never be NULL.
This was already caught by Colin Ian King, a patch is already queued for
this.
Thanks,
-corey
Addresses-Coverity-ID: 1397986
Signed-off-by: Gustavo
On Mon 2017-05-08 15:37:41, Sergey Senozhatsky wrote:
> Hello,
>
> On (04/07/17 10:40), Steven Rostedt wrote:
> [..]
> > On Fri, 7 Apr 2017 14:44:55 +0200
> > Pavel Machek wrote:
> >
> > > Well, I have to agree here. This is 20 years worth of mess :-(.
> >
> > Maybe someone should propose a mic
Hi,
On Fri, Apr 14, 2017 at 02:43:27PM -0400, Damien Riegel wrote:
> This patchset adds a way for the MSM USB phy to notify a power supply
> when the charging state changes. It achieves that using the extcon
> subsystem.
>
> The first patch makes sure msm_otg_notify_charger is called after the
>
On Thu, 2017-05-04 at 13:13 +, Kalle Valo wrote:
>
> > > This code intentionally checked if TX status was requested, and
> > > if not then it doesn't go to the effort of building it.
> > >
> >
> > What I'm finding puzzling is the fact that the only caller of
> > ieee80211_led_tx() is ieee802
On Wed, May 17, 2017 at 5:39 AM, Johan Hovold wrote:
> On Tue, Apr 11, 2017 at 07:07:27PM +0200, Johan Hovold wrote:
>> This series fixes a number of issues with the new serdev code, which was
>> based on incorrect tty-port lifetime assumptions.
>>
>> The first patch disables serdev support by rev
On Wednesday 17 May 2017 15:04:50 Johannes Berg wrote:
> On Wed, 2017-05-17 at 14:53 +0200, Pali Rohár wrote:
>
> > > In fact, why should the *driver* care either? IOW - why should
> > > "request_firmware_prefer_user()" even exist?
> >
> > There are default/example NVS data, which are stored in /
On Wed, 2017-05-17 at 15:21 +0200, Pali Rohár wrote:
> On Wednesday 17 May 2017 15:04:50 Johannes Berg wrote:
> > On Wed, 2017-05-17 at 14:53 +0200, Pali Rohár wrote:
> >
> > > > In fact, why should the *driver* care either? IOW - why should
> > > > "request_firmware_prefer_user()" even exist?
> >
On 05/13/2017, 12:15 AM, Josh Poimboeuf wrote:
>> Similarly, I have OBJTOOL(START_FUNC) and OBJTOOL(END_FUNC) emitted with
>> each FUNC_START/FUNC_END. So far, when manually expanded for simplicity,
>> it looks like this:
>
> I like the idea of making objtool smart enough to read the entry code,
>
On Wed, 17 May 2017 15:00:59 +0200
Pavel Machek wrote:
>
> > > @@ -904,6 +922,21 @@ static int fsl_ifc_chip_init(struct fsl_ifc_mtd
> > > *priv)
> > > chip->ecc.algo = NAND_ECC_HAMMING;
> > > }
> > >
> > > + {
> > > + struct mtd_oob_region oobregion = { };
> > > +
> > > +
On Wed, May 17, 2017 at 07:06:16PM +0900, Magnus Damm wrote:
> iommu/ipmmu-vmsa: IPMMU multi-arch update V8
>
> [PATCH v8 01/08] iommu/ipmmu-vmsa: Remove platform data handling
> [PATCH v8 02/08] iommu/ipmmu-vmsa: Rework interrupt code and use bitmap for
> context
> [PATCH v8 03/08] iommu/ipmmu-v
From: Colin Ian King
Req is never null on at the point of the null check, so
remove this redundant check and just return &req->tx.
Detected by CoverityScan, CID#1436147 ("Logically dead code")
Signed-off-by: Colin Ian King
---
drivers/dma/bcm-sba-raid.c | 2 +-
1 file changed, 1 insertion(+),
> At the very least 3 attorneys have reviewed this by now. 2 at SUSE
> and
> one at Red Hat. At least.
In the big picture that's irrelevant. An attorney's job is to protect
their client or employer.
> "we rather avoid any attorneys burning any ink and we prefer to just
> always
> require this 'du
On 17/05/2017 13:37, Arnd Bergmann wrote:
On Wed, May 17, 2017 at 12:49 PM, John Garry wrote:
> For a pci-based controller, retrieve the SAS address from the
> ACPI tables.
>
> The retrieval is based on the ACPI device node name. Sample is
> as follows:
> Scope(_SB)
> {
> Device(SAS0) {
>
Hi,
On 15 May 2017 at 16:20, Fawad Lateef wrote:
> Hi Eric,
>
>
> On 15 May 2017 at 16:12, Eric Nelson wrote:
>> Hi Fawad,
>>
>>> 发自网易邮箱大师
>>> On 05/15/2017 20:44, Fawad Lateef wrote:
>>>
>>> Hi All,
>>>
>>> I am working on custom i.MX6 quad hardware and using RT patches for
>>> almost latest s
On Tue, May 16, 2017 at 09:37:48AM -0500, Rob Herring wrote:
> On Tue, May 16, 2017 at 8:38 AM, Jan Glauber
> wrote:
> > On Tue, May 16, 2017 at 08:07:50AM -0500, Rob Herring wrote:
> >> On Tue, May 16, 2017 at 4:36 AM, Jan Glauber wrote:
> >> > If the regulator probing is not yet finished this d
On Wed, 17 May 2017 11:05:54 +0300
Felipe Balbi wrote:
> That way, users don't need to keep a global static pointer and can
> rely on container_of() to fetch their own structure.
>
> Signed-off-by: Felipe Balbi
Acked-by: Steven Rostedt (VMware)
-- Steve
> ---
>
> I'm working on exposing th
On Wed 17-05-17 20:53:57, zhong jiang wrote:
> +to linux-mm maintainer for any suggestions
>
> Thanks
> zhongjiang
> On 2017/5/16 13:03, zhong jiang wrote:
> > Hi
> >
> > I hit the following issue by runing /proc/vmallocinfo. The kernel is 4.1
> > stable and
> > 32 bit to be used. after I expa
Hi All,
When the n_gsm line discipline is closed it wants to shutdown the line
discipline properly and asks the link partner to end the mux protocol. This is
done in gsm_cleanup_mux() around line 2050 in n_gsm.c:
if (dlci) {
gc = gsm_control_send(gsm, CMD_CLD, NULL, 0);
On Tue, May 16, 2017 at 07:02:00PM +0100, Lorenzo Pieralisi wrote:
> On Tue, May 16, 2017 at 05:15:29PM +0200, Robert Richter wrote:
> > On 15.05.17 14:22:05, Lorenzo Pieralisi wrote:
> > > The introduction of pci_bus_find_numa_node(pci_bus) allows at PCI
> > > host bridge registration to detect th
* Russell King - ARM Linux [170517 04:46]:
> On Wed, May 17, 2017 at 11:13:17AM +0200, Greg Kroah-Hartman wrote:
> > On Tue, May 16, 2017 at 09:01:27AM -0700, Tony Lindgren wrote:
> > > * Russell King - ARM Linux [170503 11:58]:
> > > > On Mon, Apr 10, 2017 at 09:52:47AM -0500, Dave Gerlach wrote
On Wed, May 17, 2017 at 06:02:47AM -0700, Guenter Roeck wrote:
> On 05/17/2017 05:38 AM, Heikki Krogerus wrote:
> > Hi guys,
> >
> > On Wed, May 17, 2017 at 02:36:44AM -0700, Guenter Roeck wrote:
> > > On 05/17/2017 12:34 AM, Oliver Neukum wrote:
> > > > Am Mittwoch, den 17.05.2017, 00:32 -0700 sc
Allwinner V3s SoC has a SPI controller, muxed with the MMC2 controller
at PC bank. The controller itself is identical to the one in H3 SoC.
Add device tree node and the only pinmux node for it.
Tested with a Winbond W25Q128FV SPI NOR soldered on the Lichee Pi
early sample.
Signed-off-by: Icenowy
2017-05-16 2:04 GMT+09:00 Olof Johansson :
> On Mon, May 15, 2017 at 8:48 AM, Russell King - ARM Linux
> wrote:
>> On Mon, May 15, 2017 at 08:27:54AM -0700, Olof Johansson wrote:
>>> On Mon, May 15, 2017 at 7:47 AM, Rob Herring wrote:
>>> > On Mon, May 15, 2017 at 9:26 AM, Russell King - ARM Linu
On Wed, 17 May 2017, Michal Hocko wrote:
> > We certainly can do that. The failure of the page faults are due to the
> > admin trying to move an application that is not aware of this and is using
> > mempols. That could be an error. Trying to move an application that
> > contains both absolute and
On Wed 17-05-17 05:33:01, Tahsin Erdogan wrote:
> When a transaction starts, start_this_handle() saves current
> PF_MEMALLOC_NOFS value so that it can be restored at journal stop time.
> Journal restart is a special case that calls start_this_handle() without
> stopping the transaction. start_this_
Hahahahahaha :)
--
Computer Architect | Sent from my 64-bit #ARM Powered phone
> On May 17, 2017, at 03:08, Joe Perches wrote:
>
>> On Tue, 2017-05-16 at 13:29 -0700, David Daney wrote:
>> We really need to improve the
>> grammatical analysis capabilities of checkpatch.pl, I think I will lay
On Wed 17-05-17 08:56:34, Cristopher Lameter wrote:
> On Wed, 17 May 2017, Michal Hocko wrote:
>
> > > We certainly can do that. The failure of the page faults are due to the
> > > admin trying to move an application that is not aware of this and is using
> > > mempols. That could be an error. Try
On Tuesday 16 May 2017 03:23 AM, David Lechner wrote:
> This enables the power supply module for the LEGO MINDSTORMS EV3 battery.
>
> Signed-off-by: David Lechner
> ---
>
> Goes along with https://patchwork.kernel.org/patch/9676087/ (which I don't see
> in linux-davinci yet).
I just pushed that
It turns out that the Moxa is using a Faraday IP timer named
FTTMR010. This is also what Aspeed's derivative is based on.
This series attempts to merge these two drivers into one to
get lesser code to maintain. Also it incidentally adds a
sched_clock() implementation to the Moxa and Aspeed, which
This merges the Moxa and FTTMR010 device tree bindings into the
Faraday binding document to avoid confusion.
The FTTMR010 is the IP block used by these SoCs, in vanilla
or modified variant.
The Aspeed variant is modified such that it is no longer fully
register-compatible with FTTMR010 so for thi
We need to also prepare and enable the clock we are using to get
the right reference count and avoid it being shut off.
Signed-off-by: Linus Walleij
---
drivers/clocksource/timer-fttmr010.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/clocksource/timer-fttmr
The Gemini now has a proper clock driver and a proper PCLK
assigned in its device tree. Drop the Gemini-specific hacks
to look up the system speed and rely on the clock framework
like everyone else.
Cc: Joel Stanley
Cc: Jonas Jensen
Signed-off-by: Linus Walleij
---
drivers/clocksource/timer-ft
This converts the Faraday FTTMR010 to use the state container
design pattern. Take some care to handle the state container
and free:ing of resources as has been done in the Moxa driver.
Cc: Joel Stanley
Cc: Jonas Jensen
Signed-off-by: Linus Walleij
---
drivers/clocksource/timer-fttmr010.c | 19
This switches the clocksource to TIMER2 like the Moxart driver
does. Mainly to make it more similar to the Moxart/Aspeed driver
but also because it seems more neat to use the timers in order:
use timer 1, then timer 2.
Cc: Joel Stanley
Cc: Jonas Jensen
Signed-off-by: Linus Walleij
---
drivers/
This merges the Moxa Art timer driver into the Faraday FTTMR010
driver and replaces all Kconfig symbols to use the Faraday
driver instead. We are now so similar that the drivers can
be merged by just adding a few lines to the Faraday timer.
Differences:
- The Faraday driver explicitly sets the co
On Tue, May 16, 2017 at 12:26:48PM +0100, Robin Murphy wrote:
> When walking the rbtree, the fact that iovad->start_pfn and limit_pfn
> are both inclusive limits creates an ambiguity once limit_pfn reaches
> the bottom of the address space and they overlap. Commit 5016bdb796b3
> ("iommu/iova: Fix u
This switches the drivers to use the bitops BIT() macro
to define bits.
Cc: Joel Stanley
Cc: Jonas Jensen
Signed-off-by: Linus Walleij
---
drivers/clocksource/timer-fttmr010.c | 43 ++--
1 file changed, 22 insertions(+), 21 deletions(-)
diff --git a/drivers/clo
This augments the Moxa Art and Aspeed device trees to:
- Explicitly name the clock "PCLK" as the Faraday FTTMR010
names it.
- List the Moxa timer as compatible with the Faradat FTTMR010
vanilla version.
- Add a comment that the Aspeed driver is a Faraday
FTTMR010 derivative.
- Pass all IRQs
This patch serial could be divided into two parts.
First three patches refine and adds slab sysfs.
Second three patches rename slab sysfs.
1. Refine slab sysfs
There are four level slabs:
CPU
CPU_PARTIAL
PARTIAL
FULL
And in sysfs, it use show_slab_objects() and cpu_partial_slab
For partial slabs, show_slab_objects could display its total objects.
This patch just adds an entry to display it.
Signed-off-by: Wei Yang
---
mm/slub.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/mm/slub.c b/mm/slub.c
index a7a109247730..1100d2e75870 100644
--- a/mm/slub.c
+++ b
Apply the sysfs pattern
xxx_slabs
to CPU_PARTIAL slabs.
Signed-off-by: Wei Yang
---
mm/slub.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/mm/slub.c b/mm/slub.c
index eb0eaa0239fd..93ff334b725e 100644
--- a/mm/slub.c
+++ b/mm/slub.c
@@ -4988,7 +4988,7 @@ static
Apply the sysfs pattern
xxx_slabs[[_total]_objects]
to PARTIAL slabs.
Signed-off-by: Wei Yang
---
mm/slub.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/mm/slub.c b/mm/slub.c
index 443dacbf214e..eb0eaa0239fd 100644
--- a/mm/slub.c
+++ b/mm/slub.c
@
For cpu slabs, show_slab_objects could display statistics for objects.
This patch just adds an entry to reflect it.
Signed-off-by: Wei Yang
---
mm/slub.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/mm/slub.c b/mm/slub.c
index c7dddf22829d..f2f751e6cb96 100644
--- a/mm/sl
On Wed, May 17, 2017 at 3:37 PM, John Garry wrote:
> On 17/05/2017 13:37, Arnd Bergmann wrote:
>> Since this uses the _DSD information that was introduced for compatibility
>> between device tree and ACPI based data, why not write the code so that
>> it can work for both?
>>
>> Ideally this shoul
Apply the sysfs pattern
xxx_slabs[[_total]_objects]
to ALL slabs.
Signed-off-by: Wei Yang
---
mm/slub.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/mm/slub.c b/mm/slub.c
index f2f751e6cb96..443dacbf214e 100644
--- a/mm/slub.c
+++ b/mm/slub.c
@@ -4970,11
There are four level slabs:
CPU
CPU_PARTIAL
PARTIAL
FULL
In current implementation, cpu_slabs sysfs would give statistics including
the first two levels. While there is another sysfs entry cpu_partial_slabs
gives details on the second level slab statistics. Since each cpu has one
On Wed 17-05-17 05:33:01, Tahsin Erdogan wrote:
> When a transaction starts, start_this_handle() saves current
> PF_MEMALLOC_NOFS value so that it can be restored at journal stop time.
> Journal restart is a special case that calls start_this_handle() without
> stopping the transaction. start_this_
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