From: Markus Elfring
Date: Tue, 25 Apr 2017 11:35:11 +0200
Add a missing character in this description for a function call.
Signed-off-by: Markus Elfring
---
drivers/hsi/controllers/omap_ssi_core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/hsi/controllers/omap
From: Markus Elfring
Date: Tue, 25 Apr 2017 12:42:14 +0200
The script "checkpatch.pl" pointed information out like the following.
WARNING: Possible unnecessary 'out of memory' message
Thus remove such a statement here.
Link:
http://events.linuxfoundation.org/sites/events/files/slides/LCJ16-Re
On Tue 25-04-17 06:35:13, Jeff Layton wrote:
> On Tue, 2017-04-25 at 10:17 +0200, Jan Kara wrote:
> > On Mon 24-04-17 13:14:36, Jeff Layton wrote:
> > > On Mon, 2017-04-24 at 18:04 +0200, Jan Kara wrote:
> > > > On Mon 24-04-17 09:22:49, Jeff Layton wrote:
> > > > > This ensures that we see errors
Hi!
> > Umm, and it looks like libv4l can not automatically convert from
> > GRBG10.. and if it could, going through RGB24 would probably be too
> > slow on this device :-(.
>
> I suspect it shouldn't be hard to add support for GRBG10. It already
> supports 8 and 16 bits Bayer formats, at lib/lib
Hi!
On Tue 2017-04-25 10:08:15, Pali Rohár wrote:
> On Tuesday 25 April 2017 10:05:38 Pavel Machek wrote:
> > > > It would be nice if more than one application could be accessing the
> > > > camera at the same time... (I.e. something graphical running preview
> > > > then using command line tool to
On Tue, 2017-04-25 at 11:32 +0200, Jan Kiszka wrote:
> On 2017-04-25 09:31, Peter Meerwald-Stadler wrote:
+Cc: Mika.
> > I think board-specific stuff should not go into the driver -> DT?
>
> Unfortunately, we only have half-baked ACPI on those boards.
That's the main problem and still no excuse
On Tue, 2017-04-25 at 12:53 +0200, Jan Kiszka wrote:
> On 2017-04-25 11:42, Andy Shevchenko wrote:
> > > Where is a good example? Sorry,
> > > I still don't see how to make code out of your comments.
> >
> > Mostly remove those ugly hacks and start over.
>
> Still not a constructive answer.
Yo
On 25 Apr 2017 at 0:01, Peter Zijlstra wrote:
> On Mon, Apr 24, 2017 at 01:40:56PM -0700, Kees Cook wrote:
> > I think we're way off in the weeds here. The "cannot inc from 0" check
> > is about general sanity checks on refcounts.
>
> I disagree, although sanity check are good too.
exactly, an a
On 25 Apr 2017 at 12:23, Peter Zijlstra wrote:
> So what avoids this:
simple, you noted it yourself in your previous mail:
> Well, your setup (panic_on_warn et al) would have it panic the box. That
> will effectively stop the exploit by virtue of stopping everything.
with that in mind the actua
On 24 Apr 2017 at 13:33, Kees Cook wrote:
> On Mon, Apr 24, 2017 at 4:00 AM, PaX Team wrote:
> > On 24 Apr 2017 at 10:32, Peter Zijlstra wrote:
> >
> >> On Fri, Apr 21, 2017 at 03:09:39PM -0700, Kees Cook wrote:
> >> > This patch ports the x86-specific atomic overflow handling from PaX's
> >> > P
On Tuesday 25 April 2017 13:23:30 Pavel Machek wrote:
> Hi!
> On Tue 2017-04-25 10:08:15, Pali Rohár wrote:
> > On Tuesday 25 April 2017 10:05:38 Pavel Machek wrote:
> > > > > It would be nice if more than one application could be accessing the
> > > > > camera at the same time... (I.e. something g
On Tue, Apr 25, 2017 at 02:27:10PM +0300, Andy Shevchenko wrote:
> > Shipping own DSDTs is no long-term path: we would be forced to provide
> > separate images due to a single parameter being different in the DSDTs
> > of the 2020 and 2040. And you cannot provide any overlay to adjust the
> > table
On Tue, Apr 25, 2017 at 1:07 PM, Jan Kiszka wrote:
> On 2017-04-25 11:46, Andy Shevchenko wrote:
>> On Tue, Apr 25, 2017 at 12:00 PM, Jan Kiszka wrote:
>>> On 2017-04-25 09:30, Andy Shevchenko wrote:
On Tue, Apr 25, 2017 at 8:44 AM, Jan Kiszka wrote:
> On 2017-04-24 23:27, Andy Shevchen
On Tue, Apr 25, 2017 at 04:43:33PM +0800, we...@codeaurora.org wrote:
> Hi Greg K-H,
>
> On 2017-04-24 16:46, Greg Kroah-Hartman wrote:
>
> > And does it really reduce boot time? What are the numbers?
> Yes, it really reduce boot time. After making most time-consuming platform
> driver using as
On Tue, Apr 25, 2017 at 1:09 PM, Jan Kiszka wrote:
> On 2017-04-25 12:07, Jan Kiszka wrote:
>> On 2017-04-25 11:46, Andy Shevchenko wrote:
>>> On Tue, Apr 25, 2017 at 12:00 PM, Jan Kiszka wrote:
On 2017-04-25 09:30, Andy Shevchenko wrote:
> On Tue, Apr 25, 2017 at 8:44 AM, Jan Kiszka
>
On Tue, Apr 25, 2017 at 2:14 PM, Or Gerlitz wrote:
> On Tue, Apr 25, 2017 at 2:11 PM, Erez Shitrit
> wrote:
>> On Tue, Apr 25, 2017 at 1:32 PM, Or Gerlitz wrote:
>>> On Tue, Apr 25, 2017 at 12:55 PM, Honggang LI wrote:
From: Honggang Li
Minimal hard_header_len set by bond_compu
Before this patch, we have a define for MSR 0xc0011021: MSR_F15H_IC_CFG.
But it exists starting from K8, so it's not really a Fam15h MSR only.
Lat's call it MSR_AMD64_IC_CFG.
In fact, there is a whole bunch of similar "CFG" registers in this range,
and they are rather sparsely documented by AMD.
On Thu, Jul 24, 2014 at 1:16 AM, Martin K. Petersen
wrote:
>> "Sreekanth" == Sreekanth Reddy writes:
>
> Sreekanth,
>
> Sreekanth> 2. As per MPI Spec, each set of 8 reply descriptor post
> Sreekanth> queues must have the same value for the upper 32-bits of
> Sreekanth> their memory address. S
On Tue 2017-04-25 13:18:31, SF Markus Elfring wrote:
> From: Markus Elfring
> Date: Tue, 25 Apr 2017 12:42:14 +0200
>
> The script "checkpatch.pl" pointed information out like the following.
>
> WARNING: Possible unnecessary 'out of memory' message
>
> Thus remove such a statement here.
Any re
On Tue, Apr 25, 2017 at 01:35:33PM +0300, Maksim Salau wrote:
> > + } else if (object_is_on_stack(urb->transfer_buffer)) {
> > + WARN_ONCE(1, "transfer buffer is on stack\n");
> > + ret = -EAGAIN;
> > } else {
On Tue, Apr 25, 2017 at 01:45:41PM +0200, Denys Vlasenko wrote:
> Before this patch, we have a define for MSR 0xc0011021: MSR_F15H_IC_CFG.
> But it exists starting from K8, so it's not really a Fam15h MSR only.
>
> Lat's call it MSR_AMD64_IC_CFG.
Except that we name only those MSRs with "AMD64" w
On Tue, 25 Apr 2017 13:26:41 +0800
kbuild test robot wrote:
> Hi Nate,
>
> [auto build test ERROR on usb/usb-testing]
> [also build test ERROR on v4.11-rc8 next-20170424]
> [if your patch is applied to the wrong git tree, please drop us a note to
> help improve the system]
Hi Fengguang,
You m
> On 02/04/17 03:03 PM, Sinan Kaya wrote:
>> Push the decision all the way to the user. Let them decide whether they
>> want this feature to work on a root port connected port or under the
>> switch.
>
> Yes, I prefer this too. If other folks agree with that I'd be very happy
> to go back to user
On 04/25/2017 02:37 AM, Hauke Mehrtens wrote:
>
>
> On 03/08/2017 01:46 PM, David Woodhouse wrote:
>> On Fri, 2016-11-11 at 07:08 -0500, Felix Janda wrote:
>>> Currently, libc-compat.h detects inclusion of specific glibc headers,
>>> and defines corresponding _UAPI_DEF_* macros, which in turn are
On Mon, Apr 24, 2017 at 12:13:45PM -0700, Matthias Kaehlcke wrote:
> El Mon, Apr 24, 2017 at 06:34:14PM +0100 Will Deacon ha dit:
> > On Mon, Apr 24, 2017 at 06:22:51PM +0100, Ard Biesheuvel wrote:
> > > AIUI, Clang now always complains for missing register width modifiers,
> > > not just for place
On Tue, Apr 25, 2017 at 12:35 AM, Maarten Maathuis wrote:
> Tested on HP Elite X2 1012 G1.
> Matches event report of Lenovo Helix 2
> (https://www.spinics.net/lists/ibm-acpi-devel/msg03982.html).
>
> V2: Fix indent and add sign-off
> V3: Missing whitespace correction
Slightly modified (*) version
On 2017-04-25 13:42, Andy Shevchenko wrote:
> On Tue, Apr 25, 2017 at 1:09 PM, Jan Kiszka wrote:
>> On 2017-04-25 12:07, Jan Kiszka wrote:
>>> On 2017-04-25 11:46, Andy Shevchenko wrote:
On Tue, Apr 25, 2017 at 12:00 PM, Jan Kiszka
wrote:
> On 2017-04-25 09:30, Andy Shevchenko wrot
On 04/25/2017 01:59 PM, Borislav Petkov wrote:
On Tue, Apr 25, 2017 at 01:45:41PM +0200, Denys Vlasenko wrote:
Before this patch, we have a define for MSR 0xc0011021: MSR_F15H_IC_CFG.
But it exists starting from K8, so it's not really a Fam15h MSR only.
Lat's call it MSR_AMD64_IC_CFG.
Except
On Mon, Apr 24, 2017 at 12:11:59PM -0300, Lauro Venancio wrote:
> On 04/24/2017 10:03 AM, Peter Zijlstra wrote:
> > On Thu, Apr 20, 2017 at 04:51:43PM -0300, Lauro Ramos Venancio wrote:
> >
> >> diff --git a/kernel/sched/topology.c b/kernel/sched/topology.c
> >> index e77c93a..694e799 100644
> >> -
On 2017-04-25 13:35, Mika Westerberg wrote:
> On Tue, Apr 25, 2017 at 02:27:10PM +0300, Andy Shevchenko wrote:
>>> Shipping own DSDTs is no long-term path: we would be forced to provide
>>> separate images due to a single parameter being different in the DSDTs
>>> of the 2020 and 2040. And you cann
On Sun, Apr 23, 2017 at 10:19 AM, Ryder Lee wrote:
> Add documentation for PCIe host driver available in MT7623
> series SoCs.
>
> Signed-off-by: Ryder Lee
> ---
> .../bindings/pci/mediatek,mt7623-pcie.txt | 153
> +
> 1 file changed, 153 insertions(+)
> create mod
On Friday 21 April 2017 10:36 PM, Mark Brown wrote:
> On Tue, Apr 11, 2017 at 05:22:25PM +0530, Vignesh R wrote:
>> Flash filesystems like JFFS2, UBIFS and MTD block layer can provide
>> vmalloc'd or kmap'd buffers that cannot be mapped using dma_map_sg() and
>> can potentially be in memory regio
On Tue, Apr 25, 2017 at 02:23:48PM +0300, Andy Shevchenko wrote:
> > Needed to make it work. If there is a better file to keep that, I'll
> > move it.
>
> Ideally you need BIOS fixed for that.
>
> Otherwise you may do a separate code which would provide CS GPIO look up
> table.
>
> Mika, what do
Just cleanup, no logic change.
Signed-off-by: Chao Yu
---
fs/f2fs/segment.c | 63 ++-
1 file changed, 30 insertions(+), 33 deletions(-)
diff --git a/fs/f2fs/segment.c b/fs/f2fs/segment.c
index 68a9f8d4d628..57989c2c3a6a 100644
--- a/fs/f2fs/se
Just cleanup, no logic change.
Signed-off-by: Chao Yu
---
fs/f2fs/segment.c | 40 ++--
1 file changed, 18 insertions(+), 22 deletions(-)
diff --git a/fs/f2fs/segment.c b/fs/f2fs/segment.c
index 57989c2c3a6a..c88e7535aede 100644
--- a/fs/f2fs/segment.c
+++ b/f
Hi,
This is RFC v2 to modernize procfs and make it able to support multiple
private instances per the same pid namespace. RFC v1 is here [1]
This RFC v2 can be applied on top of next-20170424
Historically procfs was tied to pid namespaces, and mount options were
propagated to all other procfs in
This is a preparation patch that moves /proc/{self|thread-self} dentries
to be stored inside procfs fs_info struct instead of making them per pid
namespace. Since we want to support multiple procfs instances we need to
make sure that these dentries are also per-superblock instead of
per-pidns, unmo
This is a preparation patch that adds proc_fs_info to be able to store
different procfs options and informations. Right now some mount options
are stored inside the pid namespace which makes it hard to change or
modernize procfs without affecting pid namespaces. Plus we do want to
treat proc as mor
If "limit_pids=1" mount option is set then do not instantiate pids that
we can not ptrace. "limit_pids=1" means that procfs should only contain
pids that the caller can ptrace.
Cc: Kees Cook
Cc: Andy Lutomirski
Signed-off-by: Djalal Harouni
---
fs/proc/base.c | 9 +
1 file changed, 9 i
This patch allows to have multiple private procfs instances inside the
same pid namespace. Lot of other areas in the kernel and filesystems
have been updated to be able to support private instances, devpts is one
major example. The aim here is lightweight sandboxes, and to allow that we
have to mod
This is a cleaning patch to add helpers to set and get proc mount
options instead of directly using them. This make it easy to track
what's happening and easy to update in future.
Cc: Kees Cook
Cc: Andy Lutomirski
Signed-off-by: Djalal Harouni
---
fs/proc/base.c | 16 +---
Hello
When resizing ring buffer on qemu/pcnet32 with linux-next and
CONFIG_DMA_API_DEBUG=y, I got the following trace:
[8862.793779] [ cut here ]
[ 8862.793784] WARNING: CPU: 0 PID: 26592 at
/linux-next/include/linux/dma-mapping.h:505 pcnet32_set_ringparam+0xd55/0xda0
[ 8
On Tue, 25 Apr 2017, 冯伟linux wrote:
> Hi Lee Jones:
> I send this email mainly for the fllowing two things;
> 1.Is there anything unclear about the patch "mfd:rtsx: do retry when
> dma transfer error"
> 2.Whether the pach I submitted in email "[PATCH v4] mfd:rtsx: do
> retry when DMA t
This allows to flush dcache entries of a task on multiple procfs mounts
per pid namespace.
Cc: Kees Cook
Cc: Andy Lutomirski
Signed-off-by: Djalal Harouni
---
fs/proc/base.c| 27 ++-
fs/proc/inode.c | 9 -
fs/proc/root.c
On Mon, Apr 24, 2017 at 04:54:54PM +0100, Will Deacon wrote:
> On Fri, Apr 21, 2017 at 05:03:36PM +0800, Peng Fan wrote:
> > - sid, smmu->smr_mask_mask);
> > + mask, smmu->smr_mask_mask);
> > goto out_free;
>
> Looks like a co
On Mon, Apr 24, 2017 at 6:31 PM, Jérémy Lefaure
wrote:
> On Mon, 24 Apr 2017 12:14:14 +0300
> Andy Shevchenko wrote:
>
>> On Sat, Apr 22, 2017 at 5:19 AM, Jérémy Lefaure
>> wrote:
>> > The cpufv sysfs file is defined as readable by anyone even if the
>> > attribute does not have a show function.
On Tue 2017-04-25 13:30:09, Pali Rohár wrote:
> On Tuesday 25 April 2017 13:23:30 Pavel Machek wrote:
> > Hi!
> > On Tue 2017-04-25 10:08:15, Pali Rohár wrote:
> > > On Tuesday 25 April 2017 10:05:38 Pavel Machek wrote:
> > > > > > It would be nice if more than one application could be accessing th
On 04/25/2017 02:45 AM, Hauke Mehrtens wrote:
> On 03/08/2017 05:39 PM, Carlos O'Donell wrote:
>> Any header needing compat with a libc includes libc-compat.h (per the
>> documented way the model works). With this patch any included linux kernel
>> header that also includes libc-compat.h would imm
On Tue, Apr 25, 2017 at 7:04 AM, Cong Wang wrote:
> On Mon, Apr 24, 2017 at 9:47 AM, Cong Wang wrote:
>>
>> We use ipv4 dst in ip6_tunnel and cast an IPv4 neigh key as an
>> IPv6 address...
>>
>>
>> neigh = dst_neigh_lookup(skb_dst(skb),
>>
1) That allocation will never fail in real life so it's dead code.
2) kmalloc and friends already have much better builtin in error
messages so it's useless.
3) There is a small memory savings from removing it.
I'm not saying you should apply the patch, I'm just saying that these
messages are p
On Tue, Apr 25, 2017 at 02:17:23PM +0200, Jan Kiszka wrote:
> I'm not ACPI guru: How do we come from a SSDT to information that is
> carried in the DSDT so far? How can we overload wrong information in the
> built in DSDT this way? I'm all ears if we could fix our (and also the
> Galileo) quirks li
On Sun, Apr 23, 2017 at 10:40 PM, Pali Rohár wrote:
> When changing keyboard backlight state on new Dell laptops, firmware
> expects a new timeout AC value filled in Set New State SMBIOS call.
>
> Without it any change of keyboard backlight state on new Dell laptops
> fails. And user can see follo
On Sun, Apr 23, 2017 at 10:19 AM, Ryder Lee wrote:
> +static inline bool mtk_pcie_link_is_up(struct mtk_pcie_port *port)
> +{
> + return !!(readl_relaxed(port->base + PCIE_LINK_STATUS) &
> + PCIE_PORT_LINKUP);
> +}
If this is not performance critical, please use the regular
On 25 April 2017 at 13:05, Dietmar Eggemann wrote:
> On 19/04/17 17:54, Vincent Guittot wrote:
>> In the current implementation of load/util_avg, we assume that the ongoing
>> time segment has fully elapsed, and util/load_sum is divided by LOAD_AVG_MAX,
>> even if part of the time segment still re
From: Markus Elfring
Date: Tue, 25 Apr 2017 14:32:10 +0200
Two update suggestions were taken into account
from static source code analysis.
Markus Elfring (2):
Use kcalloc() in hsi_register_board_info()
core: Use kcalloc() in two functions
drivers/hsi/hsi_boardinfo.c | 2 +-
drivers/hsi/hs
Hi Florian,
On Thu, Apr 20, 2017 at 12:05:46PM -0700, Florian Fainelli wrote:
> The ARMv8 PMUv3 cache map did not include the L2 cache events, add
> them.
>
> Signed-off-by: Florian Fainelli
> ---
> arch/arm64/kernel/perf_event.c | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/ar
From: Markus Elfring
Date: Tue, 25 Apr 2017 13:56:08 +0200
A multiplication for the size determination of a memory allocation
indicated that an array data structure should be processed.
Thus use the corresponding function "kcalloc".
This issue was detected by using the Coccinelle software.
Sign
From: Markus Elfring
Date: Tue, 25 Apr 2017 14:17:50 +0200
Multiplications for the size determination of memory allocations
indicated that array data structures should be processed.
Thus use the corresponding function "kcalloc".
This issue was detected by using the Coccinelle software.
Signed-o
Hi Stefano,
On 24/04/17 20:16, Stefano Stabellini wrote:
Given the outstanding regression we need to fix as soon as possible,
I'll queue these patches on the xentip tree for 4.12.
It looks like there is another rc for 4.11. I am wondering whether you
could try to send a pull request to Linus
On Tuesday 25 April 2017 14:28:20 Pavel Machek wrote:
> On Tue 2017-04-25 13:30:09, Pali Rohár wrote:
> > On Tuesday 25 April 2017 13:23:30 Pavel Machek wrote:
> > > Hi!
> > > On Tue 2017-04-25 10:08:15, Pali Rohár wrote:
> > > > On Tuesday 25 April 2017 10:05:38 Pavel Machek wrote:
> > > > > > > I
On Tue, Apr 25, 2017 at 11:21:21AM +0100, Marc Zyngier wrote:
> On 25/04/17 10:49, Daniel Lezcano wrote:
> > On Tue, Apr 25, 2017 at 10:10:12AM +0100, Marc Zyngier wrote:
>
> [...]
>
> >>> +static inline void setup_timings(struct irq_desc *desc, struct irqaction
> >>> *act)
> >>> +{
> >>> + /*
>
On Tue, Apr 25, 2017 at 12:22:30PM +0200, Christoffer Dall wrote:
> On Tue, Apr 25, 2017 at 11:49:27AM +0200, Daniel Lezcano wrote:
>
> [...]
>
> > >
> > > The idle code is very much *not* aware of anything concerning that guest
> > > timer.
> >
> > Just for my own curiosity, if there are two V
On Tuesday 25 April 2017 15:36:56 Andy Shevchenko wrote:
> On Sun, Apr 23, 2017 at 10:40 PM, Pali Rohár wrote:
> > When changing keyboard backlight state on new Dell laptops, firmware
> > expects a new timeout AC value filled in Set New State SMBIOS call.
> >
> > Without it any change of keyboard
From: Huang Ying
This patchset is to optimize the performance of Transparent Huge Page
(THP) swap.
Recently, the performance of the storage devices improved so fast that
we cannot saturate the disk bandwidth with single logical CPU when do
page swap out even on a high-end server machine. Becaus
From: Huang Ying
In this patch, splitting huge page is delayed from almost the first
step of swapping out to after allocating the swap space for the
THP (Transparent Huge Page) and adding the THP into the swap cache.
This will batch the corresponding operation, thus improve THP swap out
throughpu
From: Huang Ying
To swap out THP (Transparent Huage Page), before splitting the THP,
the swap cluster will be allocated and the THP will be added into the
swap cache. But it is possible that the THP cannot be split, so that
we must delete the THP from the swap cache and free the swap cluster.
To
From: Huang Ying
If there is no compound map for a THP (Transparent Huge Page), it is
possible that the map count of some sub-pages of the THP is 0. So it
is better to split the THP before swapping out. In this way, the
sub-pages not mapped will be freed, and we can avoid the unnecessary
swap ou
Gar... No. The 3.6+ from a9ae4692eda4 ("[media] vb2: fix plane index
sanity check in vb2_plane_cookie()") feels totally arbitrary to me. No
need to be consistent.
Just do:
Cc: sta...@vger.kernel.org
Fixes: e23ccc0ad925 ("[media] v4l: add videobuf2 Video for Linux 2 driver
framework")
Fixes ta
On Tue, Apr 25, 2017 at 02:16:55PM +0200, Denys Vlasenko wrote:
> However, all IBS registers are in this range.
I knew you were gonna say that. But IBS registers are architectural too
in the sense that they are behind a CPUID bit.
> DRi_ADDR_MASK are in this range - and these are very useful, lik
On Fri, Apr 21, 2017 at 10:51:00AM +0200, Juergen Gross wrote:
> Today disconnecting xen-blkback is broken in case there are still
> I/Os in flight: xen_blkif_disconnect() will bail out early without
> releasing all resources in the hope it will be called again when
> the last request has terminate
On 25 April 2017 at 11:05, Vincent Guittot wrote:
> On 25 April 2017 at 10:46, Vincent Guittot wrote:
>> On 24 April 2017 at 22:14, Tejun Heo wrote:
>>> We noticed that with cgroup CPU controller in use, the scheduling
>>> latency gets wonky regardless of nesting level or weight
>>> configuratio
On Mon, Apr 24, 2017 at 04:06:37PM -0700, John Hubbard wrote:
> First, a tiny nit about the patch: it would be good to add "Fixing a problem
> that was introduced with commit <4a9b0933bdfc>", in the patch commit
> message.
>
Please use the Fixes tag.
Fixes: 123456789012 ("blah blah blah")
regar
Am 12.04.2017 um 18:55 schrieb Bjorn Helgaas:
[SNIP]
I think the specs would envision this being done via an ACPI _SRS
method on the PNP0A03 host bridge device. That would be a more
generic path that would work on any host bridge. Did you explore that
possibility? I would prefer to avoid addi
On Tue, Apr 25, 2017 at 08:01:54AM -0400, Steven Rostedt wrote:
> On Tue, 25 Apr 2017 13:26:41 +0800
> kbuild test robot wrote:
>
> > Hi Nate,
> >
> > [auto build test ERROR on usb/usb-testing]
> > [also build test ERROR on v4.11-rc8 next-20170424]
> > [if your patch is applied to the wrong git
On 04/25/2017 02:59 PM, Borislav Petkov wrote:
On Tue, Apr 25, 2017 at 02:16:55PM +0200, Denys Vlasenko wrote:
However, all IBS registers are in this range.
I knew you were gonna say that. But IBS registers are architectural too
in the sense that they are behind a CPUID bit.
DRi_ADDR_MASK ar
Hi John,
please fix your quoting of the previous mails, thanks!
What ACPI defines does not matter at all. Linux uses 32-bit domains
IDs, and on x86 specifily uses those for non-ACPI enumarated domains
(e.g. VMD).
You've also not demontrated any issue with any Linux driver yet.
> Also...it wou
The ARM Mali Midgard GPU kernel driver is only available
out-of-tree and is not going to be merged in its current form.
However, it would be useful to have its device tree bindings
merged. In particular, this would enable distributions to create
working driver packages (dkms...) without having to
Add reference to the Mali GPU device tree node on the
rk3288-rock2-som platform. Tested on a Radxa Rock2 Square board.
Signed-off-by: Guillaume Tucker
---
arch/arm/boot/dts/rk3288-rock2-som.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-rock2-som.dtsi
b/
Add Mali GPU device tree node for the rk3288 SoC, with devfreq
opp table.
Tested-by: Enric Balletbo i Serra
Signed-off-by: Guillaume Tucker
---
arch/arm/boot/dts/rk3288.dtsi | 43 +++
1 file changed, 43 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288
From: Enric Balletbo i Serra
Add reference to the Mali GPU device tree node on rk3288-veyron.
Tested on Minnie and Jerry boards.
Signed-off-by: Enric Balletbo i Serra
Signed-off-by: Guillaume Tucker
---
arch/arm/boot/dts/rk3288-veyron.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --gi
The ARM Mali Midgard GPU family is present in a number of SoCs
from many different vendors such as Samsung Exynos and Rockchip.
Import the device tree bindings documentation from the r16p0
release of the Mali Midgard GPU kernel driver:
https://developer.arm.com/-/media/Files/downloads/mali-dri
Add reference to the Mali GPU device tree node on rk3288-firefly.
Tested on Firefly board.
Signed-off-by: Guillaume Tucker
---
arch/arm/boot/dts/rk3288-firefly.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-firefly.dtsi
b/arch/arm/boot/dts/rk3288-firefly.
On Tue, Apr 25, 2017 at 10:36:28AM +0200, Waldemar Rymarkiewicz wrote:
> Hi,
>
> I am not much aware of linux networking architecture so I'd like to
> ask first before will start to dig into the code. Appreciate any
> feedback.
>
> I am looking on Linux thermal framework and on how to cool down t
rawv6_send_hdrinc() expects that the buffer copied from the userspace
contains the IPv6 header, so if too few bytes are copied parts of the
header may remain uninitialized.
This bug has been detected with KMSAN.
Signed-off-by: Alexander Potapenko
---
For the record, the KMSAN report:
==
On Mon, Apr 24, 2017 at 9:36 AM, Colin King wrote:
> From: Colin Ian King
>
> The "or" condition (clk_freq != TRF7970A_27MHZ_CLOCK_FREQUENCY) ||
> (clk_freq != TRF7970A_13MHZ_CLOCK_FREQUE) will always be true because
> clk_freq cannot be equal to two different values at the same time. Use
> the
On Tue, Apr 25, 2017 at 03:05:41PM +0200, Denys Vlasenko wrote:
> Okay. Propose a naming scheme for these which looks god to you.
MSR_AMD64_LS_CFG -> MSR_F16H_LS_CFG
MSR_AMD64_DC_CFG -> MSR_F10H_DC_CFG
MSR_AMD64_BU_CFG2 -> MSR_F10H_BU_CFG2
MSR_AMD64_DE_CFG -> MSR_F12H_DE_CFG
and please move th
Hi Peter,
> Peter Chen hat am 25. April 2017 um 10:14 geschrieben:
>
> Since you unplug the cable first, and plug in again. The driver will
> treat it as connection but not resume event. You may use
> /sys/class/udc/ci_hdrc.0/state to get udc's connection, eg "not attached"
> or other states to
On Mon, Apr 24, 2017 at 11:41:51AM -0700, Dan Williams wrote:
> On Mon, Apr 24, 2017 at 11:25 AM, Kirill A. Shutemov
> wrote:
> > On Mon, Apr 24, 2017 at 09:01:58PM +0300, Kirill A. Shutemov wrote:
> >> On Mon, Apr 24, 2017 at 10:47:43AM -0700, Dan Williams wrote:
> >> I think it's still better to
From: Christian König
Try to resize BAR0 to let CPU access all of VRAM.
v2: rebased, style cleanups, disable mem decode before resize,
handle gmc_v9 as well, round size up to power of two.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/dr
Hi everyone,
This is the fourth incarnation of this set of patches. It enables device
drivers to resize and most likely also relocate the PCI BAR of devices
they manage to allow the CPU to access all of the device local memory at once.
This is very useful for GFX device drivers where the default
From: Christian König
This allows device drivers to request resizing their BARs.
The function only tries to reprogram the windows of the bridge directly above
the requesting device and only the BAR of the same type (usually mem, 64bit,
prefetchable). This is done to make sure not to disturb othe
From: Christian König
Most BIOS don't enable this because of compatibility reasons.
Manually enable a 64bit BAR of 64GB size so that we have
enough room for PCI devices.
v2: style cleanups, increase size, add resource name, set correct flags,
print message that windows was added
Signed-off
From: Christian König
Just the defines and helper functions to read the possible sizes of a BAR and
update it's size.
See
https://pcisig.com/sites/default/files/specification_documents/ECN_Resizable-BAR_24Apr2008.pdf
and PCIe r3.1, sec 7.22.
This is useful for hardware with large local storage
Hi Bjorn,
On 4/22/2017 11:05 PM, Bjorn Andersson wrote:
> The rfsa driver is used for allocating and exposing regions of shared
> memory with remote processors for the purpose of exchanging sector-data
> between the remote filesystem service and its clients.
>
> It provides accessors for the prop
On 03/09/2017 01:14 AM, Szabolcs Nagy wrote:
the other way (linux header included first) is
problematic because linux headers don't follow
all the standards the libc follows, they violate
namespace rules in their struct definitions, so
the libc definitions are necessarily incompatible
with them a
On 25/04/17 13:51, Daniel Lezcano wrote:
> On Tue, Apr 25, 2017 at 11:21:21AM +0100, Marc Zyngier wrote:
>> On 25/04/17 10:49, Daniel Lezcano wrote:
>>> On Tue, Apr 25, 2017 at 10:10:12AM +0100, Marc Zyngier wrote:
>>
>> [...]
>>
> +static inline void setup_timings(struct irq_desc *desc, struct
From: "Steven Rostedt (VMware)"
An tracing instance has several of the same capabilities as the top level
instance, but may be implemented slightly different. Instead of just writing
tests that duplicat the same test cases of the top level instance, allow a
test to be written for both the top lev
git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace.git
for-next
Head SHA1: d6322f6cc483bd512efd3360fa76d0286a5b528b
Steven Rostedt (VMware) (5):
selftests: ftrace: Allow some tests to be run in a tracing instance
selftests: ftrace: Make func_event_triggers and func_t
From: "Steven Rostedt (VMware)"
Some of the basic ftrace selftests should also be run in an instance. These
test a quick case of running all tracers in the available_tracers file
within the instance. The other is testing the clock used for the instance.
Signed-off-by: Steven Rostedt (VMware)
--
From: "Steven Rostedt (VMware)"
Some of the event triggers can run fine in an instance. Have them tested in
one as well. The ones that still need work are the snapshot, stacktrace and
traceon/off triggers, as they don't currently pass a handle to the
trace_array they are attached to. But that can
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