Dear Steven, dear Ingo,
Hopefully, I am contacting the right people for my issue.
Suspending a system with Linux 4.9.13 with tracing enabled, it fails
with the screen still enabled, and the LED blinking. Attaching a serial
console to the dock, shows the messages below.
> […]
[ 59.063238]
On Wed, Mar 08, 2017 at 06:18:32PM +0800, zhangshuxia...@gmail.com wrote:
> From: zhangshuxiao
>
> vfs_llseek will check whether the file mode has
> FMODE_LSEEK, no return failure. But ashmem can be
> lseek, so add FMODE_LSEEK to ashmem file.
Really? What is causing this failure? I haven't hea
On Thu, 2017-03-09 at 12:02 +0100, Jan Kara wrote:
> On Thu 09-03-17 05:47:51, Jeff Layton wrote:
> > On Thu, 2017-03-09 at 10:04 +0100, Jan Kara wrote:
> > > On Wed 08-03-17 21:57:25, Ted Tso wrote:
> > > > On Tue, Mar 07, 2017 at 11:26:22AM +0100, Jan Kara wrote:
> > > > > On a more general note
On Thu, Mar 09, 2017 at 11:00:07AM +0100, Michal Hocko wrote:
> On Thu 09-03-17 10:30:28, Greg KH wrote:
> > On Thu, Mar 09, 2017 at 10:15:13AM +0100, Michal Hocko wrote:
> > > Greg, do you see any obstacle to have this merged. The discussion so far
> > > shown that a) vendors are not using the cod
On Wed 08-02-17 17:27:58, Vivek Trivedi wrote:
> It has been observed that apps may block in sys_sync for long time if there
> is parallel mount request for large size storage block device in a loaded
> environment.
>
> For example, sys_sync is reported to be hunged when a large size disk
> (e.g.
The Mali is clocked by two identical clock paths behind a glitch free mux
to safely change frequency while running.
The two "mali_0" and "mali_1" clocks are composed of a mux, divider and gate.
Expose these two clocks trees using generic clocks.
Finally the glitch free mux is added as "mali" clock
On Tue 07-03-17 13:40:04, Igor Mammedov wrote:
> On Mon, 6 Mar 2017 15:54:17 +0100
> Michal Hocko wrote:
>
> > On Fri 03-03-17 18:34:22, Igor Mammedov wrote:
[...]
> > > in current mainline kernel it triggers following code path:
> > >
> > > online_pages()
> > > ...
> > >if (online_typ
The same MALI-450 MP3 GPU is present in the GXBB and GXL SoCs.
The node is simply added in the meson-gxbb.dtsi file.
For GXL, since a lot is shared with the GXM that has a MALI-T820 IP, this
patch adds a new meson-gxl-mali.dtsi and is included in the SoC specific
dtsi files.
Signed-off-by: Neil
Add missing MALI clock IDs and expose the muxes and gates in the dt-bindings.
Signed-off-by: Neil Armstrong
---
drivers/clk/meson/gxbb.h | 9 -
include/dt-bindings/clock/gxbb-clkc.h | 5 +
2 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/meson/g
Since the merge of the Mali dt bindings at [1], add support for Mali clocks
and DT node.
The Mali is clocked by two identical clock paths behind a glitch free mux
to safely change frequency while running.
So these clocks must be added to the meson-gxbb clock controller.
Changes since v2 at [5] :
On 03/06/2017 08:16 PM, Andrey Konovalov wrote:
>>
>> What about
>>
>> Object at 880068388540 belongs to cache kmalloc-128 of size 128
>> Accessed address is 123 bytes inside of [880068388540, 8800683885c0)
>>
>> ?
>
> Another alternative:
>
> Accessed address is 123 bytes inside of
cc linux-block
On Thu, Mar 09, 2017 at 04:20:06PM +0530, Abdul Haleem wrote:
> On Wed, 2017-03-08 at 08:17 -0500, Brian Foster wrote:
> > On Tue, Mar 07, 2017 at 10:01:04PM +0530, Abdul Haleem wrote:
> > >
> > > Hi,
> > >
> > > Today's mainline (4.11.0-rc1) booted with warnings on Power7 LPAR.
>
The reboot quirk for ASUS EeeBook X205TA contains a typo in
DMI_PRODUCT_NAME, improperly referring to X205TAW instead of
X205TA, which prevents the quirk from being triggered. The
model X205TAW already has a reboot quirk of its own.
This fix simply removes the inappropriate final letter W.
Signed
Tomas Winkler writes:
> On Mon, Mar 6, 2017 at 2:31 AM, Måns Rullgård wrote:
>> Henrique de Moraes Holschuh writes:
>>
>>> On Sun, 05 Mar 2017, Måns Rullgård wrote:
Tomas Winkler writes:
> Sparse complains for arrays declared with variable length
>
> 'warning: Variable leng
Hi,
The 1st patch fixes one race between timeout and dying queue.
The 2nd patch improves handling for dying queue.
thanks,
Ming
Ming Lei (2):
blk-mq: don't complete un-started request in timeout handler
blk-mq: start to freeze queue just after setting dying
block/blk-core.c | 7 +--
On 03/09/2017 06:36 AM, Kees Cook wrote:
On Wed, Mar 8, 2017 at 3:55 PM, Laura Abbott wrote:
On 03/08/2017 02:36 PM, Kees Cook wrote:
On Wed, Mar 8, 2017 at 2:27 PM, Daniel Borkmann wrote:
[ 28.474232] rodata_test: test data was not read only
[...]
In my tests so far, I've never been abl
On Thu, Mar 09, 2017 at 12:04:21PM +0100, Gregory CLEMENT wrote:
> Hi,
>
> The EHCI controller in the Armada 37xx SoCs is the one used on many
> other mvebu SoCs such as the orion5x, the kirkwood, or the
> armada. However, for Armada 37xx an extra initialization step is
> needed: this is the purpo
Hi,
This patchset adds Palmchip BK3710 IDE controller driver to
libata and switches ARM/DaVinci to use it instead of the old
IDE driver.
Sekhar, please check that it still works after changes, thanks.
Changes since v0.1 draft patch version
(https://www.spinics.net/lists/arm-kernel/msg566932.html
From: Sekhar Nori
Signed-off-by: Sekhar Nori
[b.zolnierkie: split from bigger patch + preserved old driver support]
Signed-off-by: Bartlomiej Zolnierkiewicz
---
arch/arm/mach-davinci/board-dm644x-evm.c | 3 ++-
arch/arm/mach-davinci/board-dm646x-evm.c | 3 ++-
arch/arm/mach-davinci/board-neu
From: Sekhar Nori
IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively. However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subs
On Thu, Mar 09, 2017 at 05:19:15PM +0530, Shilpasri G Bhat wrote:
> Add support to read power and temperature sensors from OCC inband
> sensors which are copied to main memory by OCC.
>
Is this supposed to be an alternative to the submission from
Eddie James ? If so, is there a reason to consider
Add Palmchip BK3710 PATA controller driver.
Signed-off-by: Bartlomiej Zolnierkiewicz
---
drivers/ata/Kconfig | 9 ++
drivers/ata/Makefile | 1 +
drivers/ata/pata_bk3710.c | 395 ++
3 files changed, 405 insertions(+)
create mode 100644 d
These two patches are supposed to hopefully fix a memory hotplug
problem reported by Sebastian Ott.
Heiko Carstens (2):
mm: add private lock to serialize memory hotplug operations
drivers core: remove assert_held_device_hotplug()
drivers/base/core.c| 5 -
include/linux/device.h | 1 -
On Wed, 8 Mar 2017, Paul E. McKenney wrote:
> [ 30.694013] lockdep_rcu_suspicious+0xe7/0x120
> [ 30.694013] get_work_pool+0x82/0x90
> [ 30.694013] __queue_work+0x70/0x5f0
> [ 30.694013] queue_work_on+0x33/0x70
> [ 30.694013] clear_sched_clock_stable+0x33/0x40
> [ 30.694013] early_
Commit bfc8c90139eb ("mem-hotplug: implement get/put_online_mems")
introduced new functions get/put_online_mems() and
mem_hotplug_begin/end() in order to allow similar semantics for memory
hotplug like for cpu hotplug.
The corresponding functions for cpu hotplug are get/put_online_cpus()
and cpu_h
The last caller of assert_held_device_hotplug() is gone, so remove it again.
Cc: Dan Williams
Cc: Michal Hocko
Cc: "Rafael J. Wysocki"
Cc: Vladimir Davydov
Cc: Ben Hutchings
Cc: Gerald Schaefer
Cc: Martin Schwidefsky
Cc: Sebastian Ott
Signed-off-by: Heiko Carstens
---
drivers/base/core.c
On Thu, 9 Mar 2017, Daniel Borkmann wrote:
> With regard to CPA_FLUSHTLB that Linus mentioned, when I investigated
> code paths in change_page_attr_set_clr(), I did see that CPA_FLUSHTLB
> was set each time we switched attrs and a cpa_flush_range() was
> performed (with the correct number of pages
Am 09.03.2017 um 13:33 schrieb Paolo Bonzini:
>
>
> On 09/03/2017 13:16, Wanpeng Li wrote:
>> From: Wanpeng Li
>>
>> Commit b95234c84 (kvm: x86: do not use KVM_REQ_EVENT for APICv interrupt
>> injection) disables interrupts before setting vcpu->mode to fix an race:
>>
>> | The IPI for posted in
When iterating busy request in timeout handler,
if the STARTED flag of one request isn't set, that means
the request is being processed in block layer, and not
dispatched to low level driver yet.
In current implementation of blk_mq_check_expired(),
in case that the request queue becomes dying, un-
Before commit 780db2071a(blk-mq: decouble blk-mq freezing
from generic bypassing), the dying flag is checked before
entering queue, and Tejun converts the checking into .mq_freeze_depth,
and assumes the counter is increased just after dying flag
is set. Unfortunately we doesn't do that in blk_set_q
On Thu, Mar 09, 2017 at 05:52:07PM +0530, Pushkar Jambhlekar wrote:
> Replacing 'unsigned' with 'unsigned int' in vvp_pgcache_id.
> Checkpath.pl passed.
>
> Signed-off-by: Pushkar Jambhlekar
> ---
> drivers/staging/lustre/lustre/llite/vvp_dev.c | 9 -
> 1 file changed, 4 insertions(+),
On 03/07/2017 04:46 AM, Tobias Klauser wrote:
[ ... ]
Linux version 4.11.0-rc1-dirty (tobiask@ziws08) (gcc version 7.0.1 20170226
(experimental) (GCC) ) #46 Tue Mar 7 13:40:53 CET 2017
bootconsole [early0] enabled
Early console on uart16650 initialized at 0xf8001600
OF: fdt: Error -11 processi
On Thu, Mar 09, 2017 at 07:43:12AM -0500, Jeff Layton wrote:
> On Thu, 2017-03-09 at 12:02 +0100, Jan Kara wrote:
> > On Thu 09-03-17 05:47:51, Jeff Layton wrote:
> > > On Thu, 2017-03-09 at 10:04 +0100, Jan Kara wrote:
> > > > On Wed 08-03-17 21:57:25, Ted Tso wrote:
> > > > > On Tue, Mar 07, 2017
* Andrew Banman wrote:
> Hi Ingo and Thomas,
>
> Are these patches acceptable to you? We want to get these upstream as soon
> as possible, so please send along any more comments you have. If you're
> annoyed by the format of the emails just let me know and I'll resubmit.
>
> Thank you,
It's n
Hi Marc,
On 2017/3/7 22:43, Lorenzo Pieralisi wrote:
On Tue, Mar 07, 2017 at 08:39:55PM +0800, Hanjun Guo wrote:
From: Hanjun Guo
With platform msi support landed in the kernel, and the introduction
of IORT for GICv3 ITS (PCI MSI) and SMMU, the framework for platform msi
is ready, this patch
On 03/08/2017 06:22 PM, Anand Moon wrote:
> Hi All,
>
> On 8 March 2017 at 02:06, Anand Moon wrote:
>> From: Anand Moon
>>
>> update the regulator supply nodes for usb host to
>> enable usb host on odroid-c2
>>
>> Signed-off-by: Anand Moon
>> ---
>> root@odroid64:/usr/src/odroidxu3-4.y-devel# l
On Friday, March 3, 2017 4:14:54 PM EST Richard Guy Briggs wrote:
> > > > 1 - In __audit_inode_child, return immedialy upon detecting TRACEFS
> > > > and
> > > >
> > > > DEBUGFS (and potentially other filesystems identified, via s_magic).
> >
> > XFS creates them too. Who knows what else.
>
> Wh
On Monday, March 6, 2017 4:49:21 PM EST Richard Guy Briggs wrote:
> > Blocking PATH record on creation based on syscall *really* seems like
> > a bad/dangerous idea. If we want to block all these tracefs/debugfs
> > records, let's just block the fs. Although as of right now I'm not a
> > fan of b
On Sat, Mar 04, 2017 at 01:47:04AM +0530, Arushi Singhal wrote:
> This patch fixes the warnings reported by checkpatch.pl
> for please use a blank line after function/struct/union/enum
> declarations.
>
> Signed-off-by: Arushi Singhal
> ---
> drivers/staging/speakup/main.c | 1 +
> drive
To be honest, coresight-debug sounds too generic and could be confusing with lot
of the other components. To be precise, the area is for External Debug to a CPU.
So "arm,coresight-cpu-debug" or even "arm,coresight-cpu-external-debug" sounds
more appropriate to me.
Suzuki
On Tuesday, March 7, 2017 11:00:27 AM EST Richard Guy Briggs wrote:
> On 2017-03-07 10:41, Steven Rostedt wrote:
> > On Mon, 6 Mar 2017 22:39:54 -0500
> >
> > Richard Guy Briggs wrote:
> > > >From the output I've seen, it doesn't look particularly useful, but it
> > >
> > > was useful to finally
On 08.03.2017 20:19, Guenter Roeck wrote:
If usb_get_bos_descriptor() returns an error, usb->bos will be NULL.
Nevertheless, it is dereferenced unconditionally in
hub_set_initial_usb2_lpm_policy() if usb2_hw_lpm_capable is set.
This results in a crash.
usb 5-1: unable to get BOS descriptor
...
U
On Thu 09-03-17 13:15:07, Jan Kara wrote:
> On Thu 09-03-17 08:58:45, Vlastimil Babka wrote:
> > On 03/09/2017 12:55 AM, a...@linux-foundation.org wrote:
> > >
> > > The patch titled
> > > Subject: compaction: add def_blk_aops migrate function for memory
> > > compaction
> > > has been added
On Thu, Mar 09, 2017 at 12:55:35PM +0100, Hans Verkuil wrote:
> > + dbg_buf_cnt++;
>
> Left-over from debugging? This variable doesn't exist in the mainline code, so
> this patch doesn't compile.
>
> Regards,
>
> Hans
Exactly, left-over from debugging, thank you. Going to resubm
On Wed, 8 Mar 2017, Linus Torvalds wrote:
> Adding x86 people too, since this seems to be something off about
> ARCH_HAS_SET_MEMORY for x86-32.
>
> The code seems to be shared between x86-32 and 64, I'm not seeing why
> set_memory_r[ow]() should fail on one but not the other.
Indeed.
> Consider
On Thursday, March 09, 2017 02:06:15 PM Heiko Carstens wrote:
> Commit bfc8c90139eb ("mem-hotplug: implement get/put_online_mems")
> introduced new functions get/put_online_mems() and
> mem_hotplug_begin/end() in order to allow similar semantics for memory
> hotplug like for cpu hotplug.
>
> The c
v2: removed var dbg_buf_cnt, left-over from debugging
Fixes warning that appears in dmesg after closing V4L2 userspace
application that plays video from the display device
(first device from V4L2 device nodes provided by solo, usually /dev/video0
when no other V4L2 devices are present). Encoder de
On Thu, Mar 9, 2017 at 3:02 PM, Måns Rullgård wrote:
> Tomas Winkler writes:
>
>> On Mon, Mar 6, 2017 at 2:31 AM, Måns Rullgård wrote:
>>> Henrique de Moraes Holschuh writes:
>>>
On Sun, 05 Mar 2017, Måns Rullgård wrote:
> Tomas Winkler writes:
> > Sparse complains for arrays decl
From: Gabriel Fernandez
This patch lists STM32F7's RCC numeric constants.
It will be used by clock and reset drivers, and DT bindings.
Signed-off-by: Gabriel Fernandez
---
arch/arm/boot/dts/stm32f746.dtsi | 51
include/dt-bindings/mfd/stm32f7-rcc.h | 112
On Thu, Mar 09, 2017 at 01:20:30PM +0100, Michal Hocko wrote:
> On Thu 09-03-17 14:47:16, Kirill A. Shutemov wrote:
> > On Thu, Mar 09, 2017 at 10:54:15AM +0100, Michal Hocko wrote:
> > > On Wed 08-03-17 18:21:30, Kirill A. Shutemov wrote:
> [...]
> > > > We can drop the hack once all architectures
Hi,
The 1st patch fixes one race between timeout and dying queue.
The 2nd patch improves handling for dying queue.
thanks,
Ming
Ming Lei (2):
blk-mq: don't complete un-started request in timeout handler
blk-mq: start to freeze queue just after setting dying
block/blk-core.c | 7 +--
On 03/09/2017 02:10 PM, Thomas Gleixner wrote:
On Thu, 9 Mar 2017, Daniel Borkmann wrote:
With regard to CPA_FLUSHTLB that Linus mentioned, when I investigated
code paths in change_page_attr_set_clr(), I did see that CPA_FLUSHTLB
was set each time we switched attrs and a cpa_flush_range() was
pe
After commit 7999eecb7e56 ("i2c: exynos5: fix arbitration lost handling"),
some I2C transactions are failing because the TRANSFER_DONE_AUTO field is
not set in the I2C_TRANS_STATUS register so the i2c->status value is left
to -EINVAL causing the i2c->msg_complete completion to never be signaled.
F
/commits/Vladimir-Murzin/ARM-Fix-dma_alloc_coherent-and-friends-for-NOMMU/20170309-193212
config: arm-allnoconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
wget
https://raw.githubusercontent.com/01org/lkp-tests/master/sbin/make.cross -O
On Thu, Mar 09, 2017 at 03:24:56PM +0300, Sergei Shtylyov wrote:
> On 03/09/2017 03:20 PM, Sekhar Nori wrote:
>
> >[...]
>
> >>>diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c
> >>>b/arch/arm/mach-davinci/board-dm644x-evm.c
> >>>index 023480b75244..60a1f23890cd 100644
> >>>--- a/arch/arm/ma
Greetings,
I bisected kdump breakage to $subject, and verified the identified
culprit via revert. Seems kexec needs those variables as they were.
-Mike
With commit "usb: gadget: don't couple configfs to legacy gadgets"
it is possible to build a modular kernel with both built-in configfs
support and modular legacy gadget drivers.
But when building a kernel without modules, it is also necessary to be
able to build with configfs but without any lega
On Wed, Mar 8, 2017 at 5:40 PM, Diego Viola wrote:
> Hi Greg,
>
> On Wed, Mar 8, 2017 at 5:15 PM, Greg KH wrote:
>> On Wed, Mar 08, 2017 at 03:49:19PM -0300, Diego Viola wrote:
>>> It hangs on resume from suspend if I have USB 3.0 enabled on the BIOS,
>>> it works fine with ehci_hcd or USB 2.0.
>
On Thu, Mar 02, 2017 at 10:14:48AM -0500, Brijesh Singh wrote:
> From: Tom Lendacky
>
> Early in the boot process, add checks to determine if the kernel is
> running with Secure Encrypted Virtualization (SEV) active by issuing
> a CPUID instruction.
>
> During early compressed kernel booting, if
On Fri, Mar 03, 2017 at 01:40:28PM +0800, Wei Wang wrote:
> From: Liang Li
> 1) allocating pages (6.5%)
> 2) sending PFNs to host (68.3%)
> 3) address translation (6.1%)
> 4) madvise (19%)
>
> This patch optimizes step 2) by transfering pages to the host in
> chunks. A chunk consists of guest phy
On Wed, 8 Mar 2017 15:29:59 -0600
Josh Poimboeuf wrote:
> [adding Steven Rostedt to CC as an FYI]
>
> On Wed, Mar 08, 2017 at 10:25:01AM -0800, Linus Torvalds wrote:
> > On Wed, Mar 8, 2017 at 9:37 AM, Josh Poimboeuf wrote:
> >
> > > - CONFIG_FUNCTION_GRAPH_TRACER sets it on x86-32 because o
Add support for PF0200 coin cell/super capacitor charger which works as
a current limited voltage source via the LICELL pin. When VIN goes below
a certain threshold LICELL is used to provide power for VSNVS which is
usually used to hold up secure non-volatile storage and the real-time
clock on the
On Thu, 2017-03-09 at 10:12 +0100, Michal Hocko wrote:
> On Wed 08-03-17 10:54:57, Rik van Riel wrote:
> > In fact, false OOM kills with that kind of workload is
> > how we ended up getting the "too many isolated" logic
> > in the first place.
> Right, but the retry logic was considerably differen
On 17/01/2017 03:18, Li, Liang Z wrote:
>> On 29/12/2016 10:25, Liang Li wrote:
>>> x86-64 is currently limited physical address width to 46 bits, which
>>> can support 64 TiB of memory. Some vendors require to support more for
>>> some use case. Intel plans to extend the physical address width t
Tomas Winkler writes:
> On Thu, Mar 9, 2017 at 3:02 PM, Måns Rullgård wrote:
>> Tomas Winkler writes:
>>
>>> On Mon, Mar 6, 2017 at 2:31 AM, Måns Rullgård wrote:
Henrique de Moraes Holschuh writes:
> On Sun, 05 Mar 2017, Måns Rullgård wrote:
>> Tomas Winkler writes:
>>
On Thu, Mar 9, 2017 at 4:16 PM, Måns Rullgård wrote:
> Tomas Winkler writes:
>
>> On Thu, Mar 9, 2017 at 3:02 PM, Måns Rullgård wrote:
>>> Tomas Winkler writes:
>>>
On Mon, Mar 6, 2017 at 2:31 AM, Måns Rullgård wrote:
> Henrique de Moraes Holschuh writes:
>
>> On Sun, 05 Mar
We are going to switch core MM to 5-level paging abstraction.
This is preparation step which adds
As with 4level-fixup.h, the new header allows quickly make all
architectures compatible with 5-level paging in core MM.
In long run we would like to switch architectures to properly folded p4d
level
For full 5-level paging we need a helper to allocate p4d page table.
Signed-off-by: Kirill A. Shutemov
Acked-by: Michal Hocko
---
mm/memory.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/mm/memory.c b/mm/memory.c
index 7f1c2163b3ce..235ba51b2fbf 100644
--- a/mm/m
Look for 'la57' in /proc/cpuinfo to see if your machine supports 5-level
paging.
Signed-off-by: Kirill A. Shutemov
Acked-by: Michal Hocko
---
arch/x86/include/asm/cpufeatures.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/cpufeatures.h
b/arch/x86/i
Convert all non-architecture-specific code to 5-level paging.
It's mostly mechanical adding handling one more page table level in
places where we deal with pud_t.
Signed-off-by: Kirill A. Shutemov
Acked-by: Michal Hocko
---
drivers/misc/sgi-gru/grufault.c | 9 +-
fs/userfaultfd.c
Here's relatively low-risk part of 5-level paging patchset.
Merging it now would make x86 5-level paging enabling in v4.12 easier.
Linus, please consider applying.
The first patch is actually x86-specific: detect 5-level paging support.
It boils down to single define.
The rest of patchset conve
Like with pgtable-nopud.h for 4-level paging, this new header is base
for converting an architectures to properly folded p4d_t level.
Signed-off-by: Kirill A. Shutemov
Acked-by: Michal Hocko
---
include/asm-generic/pgtable-nop4d.h | 56 +
include/asm-generic/
On 03/08/2017 04:31 AM, David Daney wrote:
> The proper idiom for aligning linker sections in modules is different
> than for built-in sections. ". = ALIGN();" followed by a forced
> output address of 0 does nothing, as forcing the address changes the
> value of ".".
>
> Use output section alignm
If an architecture uses 4level-fixup.h we don't need to do anything as
it includes 5level-fixup.h.
If an architecture uses pgtable-nop*d.h, define __ARCH_USE_5LEVEL_HACK
before inclusion of the header. It makes asm-generic code to use
5level-fixup.h.
If an architecture has 4-level paging or folds
We are going to introduce to provide
abstraction for properly (in opposite to 5level-fixup.h hack) folded
p4d level. The new header will be included from pgtable-nopud.h.
If an architecture uses , we cannot use
5level-fixup.h directly to quickly convert the architecture to 5-level
paging as it wo
Hi Romain,
On 08-03-2017 08:15, Romain Perier wrote:
> Currently, the irq handler that monitores changes for HPD anx RX_SENSE
> relies on the status of the bridge for updating the status of the HPD.
> The update is done only when the bridge is enabled.
>
> However, on Rockchip platforms we have f
On Thu, Mar 09, 2017 at 08:36:24AM +0800, Icenowy Zheng wrote:
>
>
> 02.03.2017, 22:11, "Maxime Ripard" :
> > On Thu, Mar 02, 2017 at 12:02:13AM +0800, Icenowy Zheng wrote:
> >> 2017年3月1日 23:56于 Maxime Ripard 写道：
> >> >
> >> > On Wed, Mar 01, 2017 at 06:20:51PM +0800, Icenowy Zheng wrote:
> >>
On Tue, Mar 07, 2017 at 11:56:31AM -0500, Johannes Weiner wrote:
> On Tue, Mar 07, 2017 at 11:17:02AM +0100, Michal Hocko wrote:
> > On Mon 06-03-17 11:24:10, Johannes Weiner wrote:
> > > @@ -3271,7 +3271,8 @@ static int balance_pgdat(pg_data_t *pgdat, int
> > > order, int classzone_idx)
> > >
Record the module name of a delete_module call.
See: https://github.com/linux-audit/audit-kernel/issues/37
Signed-off-by: Richard Guy Briggs
---
kernel/module.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/kernel/module.c b/kernel/module.c
index 5432dbe..633f6da 100
Hi Neil,
On 08-03-2017 12:12, Neil Armstrong wrote:
>
> Hi Jose,
>
> It seems here that we only have the RGB444<->YUV444 8bit tables, from the
> Amlogic
> source I have the following for 10bit, 12bit and 16bit for itu601 :
>
> static const u16 csc_coeff_rgb_out_eitu601_10b[3][4] = {
> { 0x
On Thu, Mar 9, 2017 at 4:26 PM, Måns Rullgård wrote:
> Tomas Winkler writes:
>
>> On Thu, Mar 9, 2017 at 4:16 PM, Måns Rullgård wrote:
>>> Tomas Winkler writes:
>>>
On Thu, Mar 9, 2017 at 3:02 PM, Måns Rullgård wrote:
> Tomas Winkler writes:
>
>> On Mon, Mar 6, 2017 at 2:31 A
On Tue, Mar 07, 2017 at 02:30:57PM +0100, Michal Hocko wrote:
> From: Michal Hocko
>
> Tetsuo Handa has reported [1][2] that direct reclaimers might get stuck
> in too_many_isolated loop basically for ever because the last few pages
> on the LRU lists are isolated by the kswapd which is stuck on
Hi Davidlohr,
[auto build test WARNING on staging/staging-testing]
[also build test WARNING on v4.11-rc1 next-20170309]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Davidlohr-Bueso/locking
Hi,
On Wednesday 08 March 2017 06:04 PM, Greg Kroah-Hartman wrote:
> On Wed, Mar 08, 2017 at 05:49:43PM +0530, Vignesh R wrote:
>> Passing "serial" as name during request_irq() results in all serial port
>> irqs have same name. This does not help much to easily identify which
>> irq belongs to whi
On Thu, Mar 09, 2017 at 07:20:30PM +0800, Chen-Yu Tsai wrote:
> On Thu, Mar 9, 2017 at 6:36 PM, Maxime Ripard
> wrote:
> > Hi,
> >
> > On Thu, Mar 09, 2017 at 06:05:32PM +0800, Chen-Yu Tsai wrote:
> >> Some Allwinner SoCs have two display pipelines (frontend -> backend ->
> >> tcon).
> >>
> >> Pre
Tomas Winkler writes:
> On Thu, Mar 9, 2017 at 4:16 PM, Måns Rullgård wrote:
>> Tomas Winkler writes:
>>
>>> On Thu, Mar 9, 2017 at 3:02 PM, Måns Rullgård wrote:
Tomas Winkler writes:
> On Mon, Mar 6, 2017 at 2:31 AM, Måns Rullgård wrote:
>> Henrique de Moraes Holschuh wri
On Tue, Mar 07, 2017 at 02:17:51PM +0100, Michal Hocko wrote:
> From: Michal Hocko
>
> We currently have 2 specific WQ_RECLAIM workqueues in the mm code.
> vmstat_wq for updating pcp stats and lru_add_drain_wq dedicated to drain
> per cpu lru caches. This seems more than necessary because both ca
On 2017-03-09 at 14:20:51 +0100, Guenter Roeck wrote:
> On 03/07/2017 04:46 AM, Tobias Klauser wrote:
> [ ... ]
>
> >
> >Linux version 4.11.0-rc1-dirty (tobiask@ziws08) (gcc version 7.0.1 20170226
> >(experimental) (GCC) ) #46 Tue Mar 7 13:40:53 CET 2017
> >bootconsole [early0] enabled
> >Early
Hi,
On Thursday, March 09, 2017 01:57:15 PM Russell King - ARM Linux wrote:
> On Thu, Mar 09, 2017 at 03:24:56PM +0300, Sergei Shtylyov wrote:
> > On 03/09/2017 03:20 PM, Sekhar Nori wrote:
> >
> > >[...]
> >
> > >>>diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c
> > >>>b/arch/arm/mach-da
On Thu 09-03-17 14:26:02, Mel Gorman wrote:
> On Tue, Mar 07, 2017 at 02:17:51PM +0100, Michal Hocko wrote:
> > From: Michal Hocko
> >
> > We currently have 2 specific WQ_RECLAIM workqueues in the mm code.
> > vmstat_wq for updating pcp stats and lru_add_drain_wq dedicated to drain
> > per cpu lr
Hello Akshay,
Am 09.03.2017 um 13:34 schrieb Akshay Bhat:
On 03/09/2017 04:59 AM, Wolfgang Grandegger wrote:
Hello Akshay,
unfortunately there are not many CAN controllers for the SPI bus. I just
know the MPC251x, which behaves badly (message losses) under Linux,
especially at hight bit-rate
Tomas Winkler writes:
> On Thu, Mar 9, 2017 at 4:26 PM, Måns Rullgård wrote:
>> Tomas Winkler writes:
>>
>>> On Thu, Mar 9, 2017 at 4:16 PM, Måns Rullgård wrote:
Tomas Winkler writes:
> On Thu, Mar 9, 2017 at 3:02 PM, Måns Rullgård wrote:
>> Tomas Winkler writes:
>>
>>
On Wed, Mar 08, 2017 at 04:27:26AM -0800, Raj, Ashok wrote:
> On Mon, Mar 06, 2017 at 06:24:17PM -0600, Bjorn Helgaas wrote:
> > On Fri, Feb 03, 2017 at 10:51:04AM -0600, Bjorn Helgaas wrote:
> >
> > Hi Ashok,
> >
> > Just a ping to make sure we're not deadlocked. I'm waiting for you,
> > so I h
On Thu, 9 Mar 2017 13:12:28 +0100
Paul Menzel wrote:
> Dear Steven, dear Ingo,
>
>
> Hopefully, I am contacting the right people for my issue.
>
> Suspending a system with Linux 4.9.13 with tracing enabled, it fails
> with the screen still enabled, and the LED blinking. Attaching a serial
>
On 29/12/2016 10:26, Liang Li wrote:
> Now we have 4 level page table and 5 level page table in 64 bits
> long mode, let's rename the PT64_ROOT_LEVEL to PT64_ROOT_4LEVEL,
> then we can use PT64_ROOT_5LEVEL for 5 level page table, it's
> helpful to make the code more clear.
>
> Signed-off-by: Lia
On Wed, Mar 08, 2017 at 10:41:01AM -0800, Dmitry Torokhov wrote:
> We should not leave i2c_register_board_info() early, without unlocking the
> __i2c_board_lock.
>
> Fixes: b0c1e95ab44f ("i2c: copy device properties when using ...")
> Signed-off-by: Dmitry Torokhov
So, it seems that patches 1+2
On Wed, Mar 08, 2017 at 09:15:24AM +0100, Romain Perier wrote:
> - dw_hdmi_update_power() will be called. As hdmi->force will be equal to
> DRM_FORCE_UNSPECIFIED the function will rely on hdmi->rxsense. This
> field has not been updated by the irq handler, so it will be false and
> DRM_FORCE_ON won
On 03/09/2017 07:39 AM, Kishon Vijay Abraham I wrote:
> Previously dbi accessors can be used to access data of size 4
> bytes. But there might be situations (like accessing
> MSI_MESSAGE_CONTROL in order to set/get the number of required
> MSI interrupts in EP mode) where dbi accessors must
> be us
On Thu, 9 Mar 2017, Daniel Borkmann wrote:
> On 03/09/2017 02:10 PM, Thomas Gleixner wrote:
> > On Thu, 9 Mar 2017, Daniel Borkmann wrote:
> > > With regard to CPA_FLUSHTLB that Linus mentioned, when I investigated
> > > code paths in change_page_attr_set_clr(), I did see that CPA_FLUSHTLB
> > > w
On 03/09/2017 07:39 AM, Kishon Vijay Abraham I wrote:
> dwc has 2 dbi address space labeled dbics and dbics2. The existing
> helper to access dbi address space can access only dbics. However
> dbics2 has to be accessed for programming the BAR registers in the
> case of EP mode. This is in preparati
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