Commit-ID: 612f0c0b859ee99f800dc88ad470d938d90ad111
Gitweb: http://git.kernel.org/tip/612f0c0b859ee99f800dc88ad470d938d90ad111
Author: Borislav Petkov
AuthorDate: Thu, 26 Jan 2017 09:08:19 +0100
Committer: Ingo Molnar
CommitDate: Mon, 30 Jan 2017 12:01:19 +0100
perf/x86/events: Add an
Commit-ID: da6adaea2b7ef658c61a557c28508668eac29fe1
Gitweb: http://git.kernel.org/tip/da6adaea2b7ef658c61a557c28508668eac29fe1
Author: Janakarajan Natarajan
AuthorDate: Mon, 16 Jan 2017 17:36:23 -0600
Committer: Ingo Molnar
CommitDate: Mon, 30 Jan 2017 12:01:18 +0100
perf/x86/amd/uncor
On Mon, Jan 30, 2017 at 09:02:49AM +, Benjamin GAIGNARD wrote:
>
>
> On 01/28/2017 01:19 PM, Jens Wiklander wrote:
[...]
> > +/**
> > + * tee_shm_alloc() - Allocate shared memory
> > + * @ctx: Context that allocates the shared memory
> > + * @size: Requested size of shared memory
> > + * @
On 01/30/2017 03:51 PM, Oleg Nesterov wrote:
On 01/27, Pavel Tikhomirov wrote:
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -1725,6 +1725,8 @@ struct task_struct {
struct signal_struct *signal;
struct sighand_struct *sighand;
+ struct list_head csr_descend
Hi Jens/Omar,
I used git.kernel.dk/linux-block branch - blk-mq-sched (commit
0efe27068ecf37ece2728a99b863763286049ab5) and confirm that issue reported in
this thread is resolved.
Now I am seeing MQ and SQ mode both are resulting in sequential IO pattern
while IO is getting re-queued in block lay
On Tue, Jan 24, 2017 at 03:16:43PM +0300, Alexander Kochetkov wrote:
> The clock supplying the arm-global-timer on the rk3188 is coming from the
> the cpu clock itself and thus changes its rate everytime cpufreq adjusts
> the cpu frequency making this timer unsuitable as a stable clocksource
> and
> 30 янв. 2017 г., в 16:12, Daniel Lezcano
> написал(а):
>
> I don't get the point of these changes. The patch does not explain why they
> are
> needed.
I’d like to extract timer API from current implementation.
And to make code more readable I’d like to introduce 'struct rk_timer’ what can
On Mon, 30 Jan, at 12:10:29PM, David Howells wrote:
>
> Matt argues, however, that boot_params->secure_boot should be propagated from
> the bootloader and if the bootloader wants to set it, then we should skip the
> check in efi_main() and go with the bootloader's opinion. This is something
> we
On Sat, Jan 28, 2017 at 04:28:13PM +0100, Frederic Weisbecker wrote:
> On Sat, Jan 28, 2017 at 12:57:40PM +0100, Stanislaw Gruszka wrote:
> > On 32 bit architectures 64bit store/load is not atomic and if not
> > protected - 64bit variables can be mangled. I do not see any protection
> > (lock) betw
On Mon, Jan 30, 2017 at 12:20 AM, Chris Packham
wrote:
> From: Kalyan Kinthada
>
> This pinctrl driver supports the 98DX3236, 98DX3336 and 98DX4251 SoCs
> from Marvell.
>
> Signed-off-by: Kalyan Kinthada
> Signed-off-by: Chris Packham
> Acked-by: Rob Herring
> Acked-by: Sebastian Hesselbarth
On Fri, Jan 20, 2017 at 01:04:03PM -0800, Bart Van Assche wrote:
> Now that all set_dma_ops() implementations are identical (ignoring
> BUG_ON() statements), remove the architecture specific definitions
> and add a definition in .
>
> Signed-off-by: Bart Van Assche
> Cc: Benjamin Herrenschmidt
>
On 01/25, Kees Cook wrote:
>
> On Mon, Jan 23, 2017 at 4:52 AM, Oleg Nesterov wrote:
> > On 01/23, Oleg Nesterov wrote:
> >>
> >> Btw task_is_descendant() looks wrong at first glance.
> >
> > No, I missed the 2nd ->group_leader dereference. Still this function looks
> > overcomplicated and the usa
The stx104_dev structure was used to hold private data for use in the
stx104_remove function. Now that the stx104_remove function is gone, the
stx104_dev structure and relevant code is no longer needed. This patch
removes the unnecessary code.
Signed-off-by: William Breathitt Gray
---
drivers/ii
Matt Fleming wrote:
> > Matt argues, however, that boot_params->secure_boot should be propagated
> > from
> > the bootloader and if the bootloader wants to set it, then we should skip
> > the
> > check in efi_main() and go with the bootloader's opinion. This is something
> > we probably want t
On 01/30/2017 10:49 AM, Michal Hocko wrote:
From: Michal Hocko
alloc_bucket_locks allocation pattern is quite unusual. We are
preferring vmalloc when CONFIG_NUMA is enabled. The rationale is that
vmalloc will respect the memory policy of the current process and so the
backing memory will get di
EXTi[0..15] gpio signal can be routed internally as trigger source for
ADC or DAC conversions. Configure them as interrupts to configure
trigger path in HW.
Note: interrupt handler isn't required here, and corresponding interrupt
can be kept masked at exti controller level.
Signed-off-by: Fabrice
Em Sun, Jan 29, 2017 at 02:35:20PM -0500, Tejun Heo escreveu:
> perf_event is a utility controller whose primary role is identifying
> cgroup membership to filter perf events; however, because it also
> tracks some per-css state, it can't be replaced by pure cgroup
> membership test. Mark the cont
On Fri, Jan 27, 2017 at 11:07 AM, Mika Westerberg
wrote:
> The next generation Intel GPIO hardware supports additional 1k pull-down
> per-pad. Add support for this to the Intel core pinctrl driver.
>
> Signed-off-by: Mika Westerberg
> Reviewed-by: Andy Shevchenko
Patch applied.
And if you one
On Mon, 2017-01-30 at 12:30 +, Mark Brown wrote:
> On Mon, Jan 30, 2017 at 12:41:16PM +0100, Philipp Zabel wrote:
> > As of commit bb475230b8e5 ("reset: make optional functions really
> > optional"), the reset framework API calls use NULL pointers to describe
> > optional, non-present reset con
On Fri, Jan 27, 2017 at 11:07 AM, Mika Westerberg
wrote:
> The next generation Intel GPIO hardware has two additional registers
> PADCFG2 and PADCFG3. The latter is marked as reserved but the former
> includes configuration for per-pad hardware debouncer.
>
> This patch adds support for that in t
Hi all,
Please discard this series. I'll send a V2.
Sorry for the noise.
Best regards,
Fabrice
On 01/30/2017 02:57 PM, Fabrice Gasnier wrote:
STM32 ADC, can use GPIOs configured as EXTI line (external interrupt)
as trigger source for conversions.
This patchset is based on latest IIO testing br
STM32 ADC trigger polarity can be set to either rising, falling
or both edges. Allow to configure it from dt.
Signed-off-by: Fabrice Gasnier
---
Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/iio
On Sun, Jan 22, 2017 at 08:52:12AM +0530, afzal mohammed wrote:
> The exception base address is now dynamically estimated for no-MMU,
> display it. As it is the case, now limit VECTORS_BASE usage to MMU
> scenario.
>
> Signed-off-by: afzal mohammed
As I wrote elsewhere...
> diff --git a/arch/ar
On 01/30, Pavel Tikhomirov wrote:
>
> On 01/30/2017 03:51 PM, Oleg Nesterov wrote:
> >>+ /*
> >>+* Inherit has_child_subreaper flag under the same
> >>+* tasklist_lock with adding child to the process tree
> >>+* for prop
On Fri, Jan 27, 2017 at 11:07 AM, Mika Westerberg
wrote:
> This driver adds pinctrl/GPIO support for Intel Gemini Lake SoC. The
> GPIO controller is based on the next generation GPIO hardware but still
> compatible with the one supported by the Intel core pinctrl/GPIO driver.
>
> This commit incl
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STM32F4 ADC can use exti11 (gpio) signal as trigger source for
conversions.
Signed-off-by: Fabrice Gasnier
---
drivers/iio/adc/stm32-adc.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/iio/adc/stm32-adc.c b/drivers/iio/adc/stm32-adc.c
index be0e457..0118c9c 100644
--- a/driv
From: Bjorn Andersson
When regulator_get() tries to resolve a regulator supply but fail to
find a matching property in DeviceTree it returns a dummy regulator, if
a matching supply is specified but unavailable the regulator core will
return an error.
Based on this we should not ignore errors upo
From: Stephen Boyd
The high-speed phy on qcom SoCs is controlled via the ULPI
viewport.
Cc: Kishon Vijay Abraham I
Cc:
Acked-by: Rob Herring
Signed-off-by: Stephen Boyd
Signed-off-by: Kishon Vijay Abraham I
---
.../devicetree/bindings/phy/qcom,usb-hs-phy.txt| 84 ++
drivers/phy/K
From: Stephen Boyd
The HSIC USB controller on qcom SoCs has an integrated all
digital phy controlled via the ULPI viewport.
Cc: Kishon Vijay Abraham I
Acked-by: Rob Herring
Cc:
Signed-off-by: Stephen Boyd
Signed-off-by: Kishon Vijay Abraham I
---
.../devicetree/bindings/phy/qcom,usb-hsic-p
From: Stephen Boyd
The high-speed phy on qcom SoCs is controlled via the ULPI
viewport.
Cc: Kishon Vijay Abraham I
Cc:
Acked-by: Rob Herring
Signed-off-by: Stephen Boyd
Signed-off-by: Kishon Vijay Abraham I
---
.../devicetree/bindings/phy/qcom,usb-hs-phy.txt| 84 ++
drivers/phy/K
On Mon, Jan 30, 2017 at 04:55:33PM +0300, Alexander Kochetkov wrote:
>
> > 30 янв. 2017 г., в 16:12, Daniel Lezcano
> > написал(а):
> >
> > I don't get the point of these changes. The patch does not explain why they
> > are
> > needed.
>
> I’d like to extract timer API from current implementa
Hi Chris,
On lun., janv. 30 2017, Chris Packham
wrote:
> Compared to the armada-xp the 98DX3336 uses different registers to set
> the boot address for the secondary CPU so a new enable-method is needed.
> This will only work if the machine definition doesn't define an overall
> smp_ops becaus
STM32 ADC, can use GPIOs configured as EXTI line (external interrupt)
as trigger source for conversions.
This patchset is based on latest IIO testing branch, and adds support
for EXTi GPIO triggers in IIO.
It also adds a dt option to configure default trigger polarity in
STM32 ADC driver.
Fabrice
Hi Chris,
On lun., janv. 30 2017, Chris Packham
wrote:
> The Marvell 98DX3236, 98DX3336, 98DX4521 and variants are switch ASICs
> with integrated CPUs. They are similar to the Armada XP SoCs but have
> different I/O interfaces.
>
> Signed-off-by: Chris Packham
> Acked-by: Rob Herring
Appli
This fixes the following smatch and coccinelle warnings:
drivers/net/ethernet/cavium/thunder/thunder_xcv.c:119 xcv_setup_link() error:
we previously assumed 'xcv' could be null (see line 118) [smatch]
drivers/net/ethernet/cavium/thunder/thunder_xcv.c:119:16-20: ERROR: xcv is
NULL but derefer
Hi Chris,
On lun., janv. 30 2017, Chris Packham
wrote:
> These boards are Marvell's evaluation boards for the 98DX4251 and
> 98DX3336 SoCs.
>
> Signed-off-by: Chris Packham
Applied on mvebu/dt
Thanks,
Gregory
> ---
>
> Notes:
> Changes in v5:
> - update license text
> - use n
Hi Lee,
On Fri, 27 Jan 2017, Lee Jones wrote:
> On Wed, 25 Jan 2017, Peter Griffin wrote:
>
> > Hi Lee,
> >
> > On Tue, 24 Jan 2017, Lee Jones wrote:
> >
> > > There are now 2 possible separate/different Pinctrl states which can
> > > be provided from platform data. One which encompasses the
On Mon, Jan 30, 2017 at 05:46:43AM +0100, Frederic Weisbecker wrote:
> Now lets admit one drawback: s390 and powerpc with
> CONFIG_VIRT_CPU_ACCOUNTING_NATIVE have new cputime_t to nsecs conversion
> on cputime accounting path. But this should be leveraged by the recent
> changes which delay the cpu
EXTi[0..15] gpio signal can be routed internally as trigger source for
ADC or DAC conversions. Configure them as interrupts to configure
trigger path in HW.
Note: interrupt handler isn't required here, and corresponding interrupt
can be kept masked at exti controller level.
Signed-off-by: Fabrice
STM32 ADC, can use GPIOs configured as EXTI line (external interrupt)
as trigger source for conversions.
This patchset is based on latest IIO testing branch, and adds support
for EXTi GPIO triggers in IIO.
It also adds a dt option to configure default trigger polarity in
STM32 ADC driver.
---
Chan
Add dt documentation for st,stm32-exti-trigger.
EXTi gpio signal can be routed internally as trigger source for various
IPs (e.g. for ADC or DAC conversions).
Signed-off-by: Fabrice Gasnier
---
.../bindings/iio/trigger/st,stm32-exti-trigger.txt | 17 +
1 file changed, 17 ins
STM32 ADC trigger polarity can be set to either rising, falling
or both edges. Add dt option to configure it.
Note: default value may be overridden later via trigger_polarity
sysfs attribute.
Signed-off-by: Fabrice Gasnier
---
drivers/iio/adc/stm32-adc.c | 7 +++
1 file changed, 7 insertions
STM32 ADC trigger polarity can be set to either rising, falling
or both edges. Allow to configure it from dt.
Signed-off-by: Fabrice Gasnier
---
Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/iio
In a previous patchset ("gpio: Utilize devm_ functions in driver probe
callbacks") the device remove functions for several drivers were removed
as no longer necessary due to the patchset changes within. Setting
driver_data had been necessary in these drivers in order to access
private data in the r
Setting driver_data was necessary to access private data in the
dio48e_remove function. Now that the dio48e_remove function is gone,
driver_data is no longer used. This patch removes the relevant code.
Signed-off-by: William Breathitt Gray
---
drivers/gpio/gpio-104-dio-48e.c | 2 --
1 file chang
Setting driver_data was necessary to access private data in the
idi_48_remove function. Now that the idi_48_remove function is gone,
driver_data is no longer used. This patch removes the relevant code.
Signed-off-by: William Breathitt Gray
---
drivers/gpio/gpio-104-idi-48.c | 2 --
1 file change
Setting driver_data was necessary to access private data in the
idio_16_remove function. Now that the idio_16_remove function is gone,
driver_data is no longer used. This patch removes the relevant code.
Signed-off-by: William Breathitt Gray
---
drivers/gpio/gpio-104-idio-16.c | 2 --
1 file cha
Add dt documentation for st,stm32-exti-trigger.
EXTi gpio signal can be routed internally as trigger source for various
IPs (e.g. for ADC or DAC conversions).
Signed-off-by: Fabrice Gasnier
---
.../bindings/iio/trigger/st,stm32-exti-trigger.txt | 17 +
1 file changed, 17 ins
From: Tyrel Datwyler
> Sent: 27 January 2017 18:03
> On 01/26/2017 05:50 PM, Benjamin Herrenschmidt wrote:
> > On Thu, 2017-01-26 at 17:42 -0800, Tyrel Datwyler wrote:
> >> On 01/26/2017 12:22 PM, Michal Suchnek wrote:
> >>> Hello,
> >>>
> >>> building ibmvtpm I noticed gcc warning complaining that
Commit-ID: 08d85f3ea99f1eeafc4e8507936190e86a16ee8c
Gitweb: http://git.kernel.org/tip/08d85f3ea99f1eeafc4e8507936190e86a16ee8c
Author: Marc Zyngier
AuthorDate: Tue, 17 Jan 2017 16:00:48 +
Committer: Thomas Gleixner
CommitDate: Mon, 30 Jan 2017 15:18:56 +0100
irqdomain: Avoid activa
Signed-off-by: Madalin Bucur
---
arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi | 37
arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts | 2 +
arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts | 62
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 66 +
Add DPAA 1 nodes for LS1043A/LS1046A and networking support for RDB
and QDS boards with these SoCs.
Madalin Bucur (2):
dts: arm64: add LS1043A DPAA support
dts: arm64: add LS1046A DPAA support
arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi | 33 +++
arch/arm64/boot/dts/freescale/fsl
Signed-off-by: Madalin Bucur
---
arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi | 33 +++
arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts | 2 +
arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 75 +++
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 73 +++
On Sun, Jan 29, 2017 at 11:54:05AM +, Marc Zyngier wrote:
> On Fri, Jan 27 2017 at 01:04:52 AM, Jintack Lim
> wrote:
> > Make cntvoff per each timer context. This is helpful to abstract kvm
> > timer functions to work with timer context without considering timer
> > types (e.g. physical timer
Hi Chris,
On dim., janv. 29 2017, Chris Packham
wrote:
> On 28/01/17 07:47, Stephen Boyd wrote:
>> On 01/27, Gregory CLEMENT wrote:
>>> Hi all,
>>>
>>> On ven., janv. 27 2017, Chris Packham
>>> wrote:
>>>
The 98DX3236, 98DX3336 and 98DX4251 are a set of switch ASICs with
integrat
Setting driver_data was necessary to access private data in the
gpiomm_remove function. Now that the gpiomm_remove function is gone,
driver_data is no longer used. This patch removes the relevant code.
Signed-off-by: William Breathitt Gray
---
drivers/gpio/gpio-gpio-mm.c | 2 --
1 file changed,
Setting driver_data was necessary to access private data in the
ws16c48_remove function. Now that the ws16c48_remove function is gone,
driver_data is no longer used. This patch removes the relevant code.
Signed-off-by: William Breathitt Gray
---
drivers/gpio/gpio-ws16c48.c | 2 --
1 file changed
Hi Bjorn,
On Sat, Jan 28, 2017 at 03:17:28PM -0600, Bjorn Helgaas wrote:
> On Wed, Jan 11, 2017 at 12:30:55PM -0600, Bjorn Helgaas wrote:
> > On Mon, Dec 12, 2016 at 11:30:20AM -0700, Jason Gunthorpe wrote:
> > > The PCI core will write to the bridge window config multiple times
> > > while they a
On 30/01/17 14:45, Christoffer Dall wrote:
> On Sun, Jan 29, 2017 at 11:54:05AM +, Marc Zyngier wrote:
>> On Fri, Jan 27 2017 at 01:04:52 AM, Jintack Lim
>> wrote:
>>> Make cntvoff per each timer context. This is helpful to abstract kvm
>>> timer functions to work with timer context without c
On Fri, Jan 27, 2017 at 3:47 PM, Sebastian Reichel wrote:
> Use regmap API to save some lines of codes and have
> debugfs support for all of the MCP's registers.
>
> Signed-off-by: Sebastian Reichel
Patch applied. Irresistible cleanup!
Yours,
Linus Walleij
On Sun, Jan 29, 2017 at 12:07:48PM +, Marc Zyngier wrote:
> On Fri, Jan 27 2017 at 01:04:55 AM, Jintack Lim
> wrote:
> > Initialize the emulated EL1 physical timer with the default irq number.
> >
> > Signed-off-by: Jintack Lim
> > ---
> > arch/arm/kvm/reset.c | 9 -
> > arc
please drop it, errors in commit message
On 01/30/2017 05:48 PM, Pavel Tikhomirov wrote:
Oleg Nesterov (1):
introduce the walk_process_tree() helper
Pavel Tikhomirov (1):
prctl: propagate has_child_subreaper flag to every descendant
include/linux/sched.h | 3 +++
kernel/fork.c |
On Mon, Jan 23, 2017 at 10:52:08AM -0600, Rob Herring wrote:
> On Fri, Jan 20, 2017 at 11:21:10PM +0100, Andreas Färber wrote:
> > Sort nodes referenced by label alphabetically.
>
> Seems to be pointless churn.
Depends - if, as the author of a dts file, I order the nodes
alphabetically, and then
On Mon, Jan 23, 2017 at 05:52:45PM +0100, Borislav Petkov wrote:
> On Mon, Jan 23, 2017 at 03:58:37PM +0100, Nicolas Dichtel wrote:
> > This header file is exported, thus move it to uapi.
>
> Why? Why is this damn thing exported in the first place?
>
> The moment we decide to change an MSR name o
Hi， Michal，
Sorry for late reply.
On 01/26/2017 05:18 PM, Michal Hocko wrote:
> On Wed 25-01-17 23:05:37, ys...@foxmail.com wrote:
>> From: Yisheng Xie
>>
>> Define isolate_movable_page as a static inline function when
>> CONFIG_MIGRATION is not enable. It should return false
>> here which means
On Sun, Jan 29, 2017 at 03:21:06PM +, Marc Zyngier wrote:
> On Fri, Jan 27 2017 at 01:04:56 AM, Jintack Lim
> wrote:
> > Now that we maintain the EL1 physical timer register states of VMs,
> > update the physical timer interrupt level along with the virtual one.
> >
> > Note that the emulated
On 01/25/2017 06:06 PM, Takashi Iwai wrote:
The code path is related with the runtime PM, so it's likely depending
on the device state, e.g. long-time pause or such. I don't think Win
10 plays a role, but who knows.
In anyway, let me know if this helps. Basically I can merge it even
for now, a
On Mon, Jan 30, 2017 at 03:32:24PM +0100, Stanislaw Gruszka wrote:
> On Mon, Jan 30, 2017 at 05:46:43AM +0100, Frederic Weisbecker wrote:
> > Now lets admit one drawback: s390 and powerpc with
> > CONFIG_VIRT_CPU_ACCOUNTING_NATIVE have new cputime_t to nsecs conversion
> > on cputime accounting pat
This patch add additional clock and regulator resource which are
initialized based on compatible and has no impact on existing driver
working. This resourse addition enable the existing driver to handle.
low pass sensor processor device also.
Signed-off-by: Avaneesh Kumar Dwivedi
---
drivers/rem
This patch add slpi remoteproc support in existing adsp rproc driver.
Signed-off-by: Avaneesh Kumar Dwivedi
---
.../devicetree/bindings/remoteproc/qcom,adsp.txt | 28 ++
drivers/remoteproc/qcom_adsp_pil.c | 10 +++-
2 files changed, 37 insertions(+), 1 d
Hi,
On 01/27/2017 05:15 PM, Alexandre TORGUE wrote:
This series adds support of a dedicated driver for STM32F469 MCU pinctroller.
This add generates some changes inside STM32 pinctrl driver and inside STM32
device tree.
Changes in STM32 pinctrl driver:
---
This patch initialize certain driver related data based on compatible
string. This enable driver to handle more than one similar device in
by differentiating in probe their private data.
Signed-off-by: Avaneesh Kumar Dwivedi
---
drivers/remoteproc/qcom_adsp_pil.c | 47 ++-
This patchset has changed from last patchset in below respect
1- Generic regulator and clock resource handling is dropped.
2- Introdused additional px supply and aggre2 clock initialization.
3- Add SLPI boot support in existing ADSP driver.
4- Address other minor com
Add smp2p support to communicate with slpi processor.
Signed-off-by: Avaneesh Kumar Dwivedi
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi
b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index
Em Mon, Jan 30, 2017 at 09:11:31AM +0100, Ingo Molnar escreveu:
>
> The following upstream headers were updated:
>
> - The x86 cpufeatures.h file picked up a couple of new feature entries
> - The PowerPC and ARM KVM headers picked up new features
>
> None of which requires changes to perf tool
Den 30.01.2017 09.44, skrev Daniel Vetter:
Hi Noralf,
On Fri, Jan 27, 2017 at 08:56:29PM +0100, Noralf Trønnes wrote:
This is an attempt at providing a DRM version of drivers/staging/fbtft.
The tinydrm library provides a very simplified view of DRM in particular
for tiny displays that has onb
ping
On 14.01.2017 17:15, Kirill Tkhai wrote:
> For correct checkpointing/restoring of a task from userspace
> it's need to know the task's pid_ns_for_children. Currently,
> there is no a sane way to do that (the only possible trick
> is to force the task create a new child and to analize the
> ch
Instead of using the default resolution of 800*600 for the pointing
device of xen-kbdfront try to read the resolution of the (virtual)
framebuffer device. Use the default as fallback only.
Signed-off-by: Juergen Gross
---
V3: add case of late framebuffer registration (Oleksandr Andrushchenko)
V2:
From: Pavel Belous
Date: Sat, 28 Jan 2017 22:53:28 +0300
> This patch introduce support for 2500BaseT and 5000BaseT link modes.
> These modes are included in the new IEEE 802.3bz standard.
>
> Signed-off-by: Pavel Belous
Applied.
Hello James,
Your commit
a317178 2016-12-06 parser: add u64 number parser
was merged into v4.10-rc1. Good.
I have a very similar function and used for a long time. Here I'd
suggest you a tiny optimization based on my version.
If you think another value is more apropriate as the size of an
On Fri, Jan 27, 2017 at 5:15 PM, Alexandre TORGUE
wrote:
> Move gpio lock as irq from "domain alloc" callback to "domain activate"
> callback. It will allow to use gpiolib sysfs correctly.
>
> Signed-off-by: Alexandre TORGUE
Patch applied.
Yours,
Linus Walleij
Hi, Michal,
Sorry for late reply.
On 01/26/2017 05:27 PM, Michal Hocko wrote:
> On Wed 25-01-17 23:05:38, ys...@foxmail.com wrote:
>> From: Yisheng Xie
>>
>> This patch is to extends soft offlining framework to support
>> non-lru page, which already support migration after
>> commit bda807d44454
On Thu, Jan 26, 2017 at 4:48 PM, Icenowy Zheng wrote:
> Based on the Allwinner H5 datasheet and the pinctrl driver of the
> backward-compatible H3 this introduces the pin multiplex assignments for
> the H5 SoC.
>
> H5 introduced some more pin functions (e.g. three more groups of TS
> pins, and on
Hello,
On Mon, Jan 30, 2017 at 11:05:41AM -0300, Arnaldo Carvalho de Melo wrote:
> > This was posted months ago and acked by Peter. I thought it was
> > applied but apparently wasn't. Peter asked Arnaldo whether the
> > userspace part looked which didn't get replied and that probably was
> > how
On Fri, Jan 27, 2017 at 5:15 PM, Alexandre TORGUE
wrote:
> Use device tree entries to declare gpio range. It will allow to use
> no contiguous gpio bank and holes inside a bank.
>
> Signed-off-by: Alexandre TORGUE
(...)
> + of_property_read_string(np, "st,bank-name", &bank->gpio_chip.labe
Hi Neil,
Apologies for the delay in getting to this.
This is largely looking good now.
I have a couple of concerns with the hotplug logic, but I think we can
solve those without too much pain. More on that below.
On Mon, Jan 16, 2017 at 01:52:47PM -0500, Neil Leeder wrote:
> +#define L2PMRESR_
Hi Ashok,
On Fri, Jan 27, 2017 at 08:32:39AM -0800, Ashok Raj wrote:
> From: CQ Tang
>
> Some of the macros are incorrect with wrong bit-shifts resulting in picking
> the incorrect invalidation granularity. Incorrect Source-ID in extended
> devtlb invalidation caused device side errors.
>
> To:
On 01/30/2017 10:49 AM, Michal Hocko wrote:
From: Michal Hocko
alloc_ila_locks seemed to c&p from alloc_bucket_locks allocation
pattern which is quite unusual. The default allocation size is 320 *
sizeof(spinlock_t) which is sub page unless lockdep is enabled when the
performance benefit is rea
Oleg Nesterov (1):
introduce the walk_process_tree() helper
Pavel Tikhomirov (1):
prctl: propagate has_child_subreaper flag to every descendant
include/linux/sched.h | 3 +++
kernel/fork.c | 42 +++---
kernel/sys.c | 22 ++
In a struct pcie_link_state, link->root points to the pcie_link_state of
the root of the PCIe hierarchy. For the topmost link, this points to
itself (link->root = link). For others, we copy the pointer from the
parent (link->root = link->parent->root).
Previously we recognized that Root Ports or
Oleg Nesterov (1):
introduce the walk_process_tree() helper
Pavel Tikhomirov (1):
prctl: propagate has_child_subreaper flag to every descendant
include/linux/sched.h | 3 +++
kernel/fork.c | 42 +++---
kernel/sys.c | 22 ++
hi Michal,
Thank you for reviewing and sorry for late reply.
On 01/26/2017 05:43 PM, Michal Hocko wrote:
> On Wed 25-01-17 14:59:45, Yisheng Xie wrote:
>
> static unsigned long scan_movable_pages(unsigned long start, unsigned long
> end)
> {
> @@ -1531,6 +1531,16 @@ static unsigned long scan_m
From: Oleg Nesterov
Add the new helper to walk the process tree, the next patch adds a user.
Note that it visits the group leaders only, proc_visitor can do
for_each_thread itself or we can trivially extend walk_process_tree() to
do this.
Signed-off-by: Oleg Nesterov
Signed-off-by: Pavel Tikhom
If process forks some children when it has is_child_subreaper
flag enabled they will inherit has_child_subreaper flag - first
group, when is_child_subreaper is disabled forked children will
not inherit it - second group. So child-subreaper does not reparent
all his descendants when their parents di
From: Oleg Nesterov
Add the new helper to walk the process tree, the next patch adds a user.
Note that it visits the group leaders only, proc_visitor can do
for_each_thread itself or we can trivially extend walk_process_tree() to
do this.
Signed-off-by: Oleg Nesterov
Signed-off-by: Pavel Tikhom
On Mon, Jan 30, 2017 at 02:51:51PM +, Russell King - ARM Linux wrote:
> Like it or not, it is _already_ exported to userspace, so it forms
Well, I did try to stop it then too:
b72e7464e4cf ("x86/uapi: Do not export as part of the user
API headers")
And yet this wankery trickled out to us
On Mon, Jan 23, 2017 at 12:13:26PM +0100, Philipp Zabel wrote:
> Hi Steve,
>
> On Sun, 2017-01-22 at 18:31 -0800, Steve Longerbeam wrote:
> > Second, ignoring the above locking issue for a moment,
> > v4l2_pipeline_pm_use()
> > will call s_power on the sensor _first_, then the mipi csi-2 s_power,
On Sun, Jan 29, 2017 at 3:33 AM, Icenowy Zheng wrote:
> Based on the Allwinner H5 datasheet and the pinctrl driver of the
> backward-compatible H3 this introduces the pin multiplex assignments for
> the H5 SoC.
>
> H5 introduced some more pin functions (e.g. three more groups of TS
> pins, and on
On Mon, 30 Jan 2017, Peter Griffin wrote:
> Hi Lee,
>
> On Fri, 27 Jan 2017, Lee Jones wrote:
>
> > On Wed, 25 Jan 2017, Peter Griffin wrote:
> >
> > > Hi Lee,
> > >
> > > On Tue, 24 Jan 2017, Lee Jones wrote:
> > >
> > > > There are now 2 possible separate/different Pinctrl states which can
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