On 27/01/17 08:21, Oleksandr Andrushchenko wrote:
> On 01/27/2017 09:12 AM, Juergen Gross wrote:
>> Instead of using the default resolution of 800*600 for the pointing
>> device of xen-kbdfront try to read the resolution of the (virtual)
>> framebuffer device. Use the default as fallback only.
>>
>
On Do, 2017-01-26 at 15:51 -0800, Florian Fainelli wrote:
> On 01/26/2017 03:37 PM, Gerd Hoffmann wrote:
> > Signed-off-by: Gerd Hoffmann
>
> Few things with your submission:
>
> - if you send more than one patch, a cover letter is a welcome to
> explain your changes
There actually is a cover l
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We want to skip only tx/rx_iface clocks and not ref_clk_src
as well. Fix the jump label accordingly.
Fixes: 300f96771d78 ("phy: qcom-ufs: Skip obtaining rx/tx_iface_clk for msm8996
based phy")
Cc: Subhash Jadavani
Cc: Martin K. Petersen
Cc: Kishon Vijay Abraham I
Cc: sta...@vger.kernel.org
Si
>
> Thanks for the explain. However, such case can happen with THP page
> as well as slab. In case of THP page, nr_scanned is 1 but nr_reclaimed
> could be 512 so I think vmpressure should have a logic to prevent undeflow
> regardless of slab shrinking.
>
I see. Going to send a vmpressure fix. But,
It is noticed that during a global reclaim the memory
reclaimed via shrinking the slabs can sometimes result
in reclaimed pages being greater than the scanned pages
in shrink_node. When this is passed to vmpressure, the
unsigned arithmetic results in the pressure value to be
huge, thus resulting in
On 27/01/17 08:53, Oleksandr Andrushchenko wrote:
> On 01/27/2017 09:46 AM, Juergen Gross wrote:
>> On 27/01/17 08:21, Oleksandr Andrushchenko wrote:
>>> On 01/27/2017 09:12 AM, Juergen Gross wrote:
Instead of using the default resolution of 800*600 for the pointing
device of xen-kbdfront
On Thu, Jan 26, 2017 at 05:16:26PM +0200, Tomas Winkler wrote:
> Use devm_ and pcim_ functions to make error handling
> simpler and code smaller and tidier.
>
> Based on original patch by
> mei: me: use managed functions pcim_* and devm_*
> https://lkml.org/lkml/2016/2/1/339
>
> Signed-off-by: To
On Thu, Jan 26, 2017 at 06:30:47PM +0200, Sagi Grimberg wrote:
>
> > static void __exit nvme_fc_exit_module(void)
> >diff --git a/drivers/nvme/host/rdma.c b/drivers/nvme/host/rdma.c
> >index 557f29b..80f3695 100644
> >--- a/drivers/nvme/host/rdma.c
> >+++ b/drivers/nvme/host/rdma.c
> >@@ -2063,8 +
On 01/26/2017 07:58 PM, Borislav Petkov wrote:
> On Wed, Jan 25, 2017 at 08:23:36PM +0100, Borislav Petkov wrote:
>> On Wed, Jan 25, 2017 at 10:14:50PM +0300, Andrey Ryabinin wrote:
Does that help?
>>>
>>> Yup.
>>> Tested-by: Andrey Ryabinin
>>
>> Thanks, I'll run it through the test boxes
At the end of a window period, if the reclaimed pages
is greater than scanned, an unsigned underflow can
result in a huge pressure value and thus a critical event.
Reclaimed pages is found to go higher than scanned because
of the addition of reclaimed slab pages to reclaimed in
shrink_node without
On Di, 2017-01-24 at 14:12 +0100, Laurent Vivier wrote:
> VIRTIO_GPU_F_VIRGL is added in features list only
> for LE kernel, so we must check for it only on LE kernel,
> otherwise virtio_has_feature() calls BUG() and
> crashes the kernel.
>
> Suggested-by: Gerd Hoffmann
> Signed-off-by: Laurent V
Try to grab the MSI-X vectors early and fall back to the shared one
before doing lots of allocations.
Signed-off-by: Christoph Hellwig
---
drivers/virtio/virtio_pci_common.c | 58 +++---
1 file changed, 29 insertions(+), 29 deletions(-)
diff --git a/drivers/virti
Hi Michael, hi Jason,
This patches applies a few cleanups to the virtio PCI interrupt handling
code, and then converts the virtio PCI code to use the automatic MSI-X
vectors spreading, as well as using the information in virtio-blk
and virtio-scsi to automatically align the blk-mq queues to the MS
Signed-off-by: Christoph Hellwig
---
drivers/virtio/virtio_pci_common.c | 5 ++---
drivers/virtio/virtio_pci_common.h | 2 --
drivers/virtio/virtio_pci_legacy.c | 2 +-
drivers/virtio/virtio_pci_modern.c | 2 +-
include/uapi/linux/virtio_pci.h| 2 +-
5 files changed, 5 insertions(+), 8 deleti
This lets IRQ layer handle dispatching IRQs to separate handlers for the
case where we don't have per-VQ MSI-X vectors, and allows us to greatly
simplify the code based on the assumption that we always have interrupt
vector 0 (legacy INTx or config interrupt for MSI-X) available, and
any other inte
We don't really need struct virtio_pci_vq_info, as most field in there
are redundant:
- the vq backpointer is not strictly neede to start with
- the entry in the vqs list is not needed - the generic virtqueue already
has list, we only need to check if it has a callback to get the same
sema
* Dave Hansen wrote:
> Kirill is chugging right along getting his 5-level paging[1] patch set
> ready to be merged. I figured I'd share an early draft of the MPX
> support that will to go along with it.
>
> Background: there is a lot more detail about what bounds tables are in
> the changelog
* Dave Hansen wrote:
> Larger address spaces mean larger MPX bounds table sizes. This
> tracks which size tables we are using.
>
> "MAWA" is what the hardware documentation calls this feature:
> MPX Address-Width Adjust. We will carry that nomenclature throughout
> this series.
>
> The new f
Hi,
On Thu, Jan 26, 2017 at 07:33:44PM +0800, Icenowy Zheng wrote:
> H3 and A64 SoCs have a bigger SID controller, which has its direct read
> address at 0x200 position in the SID block, not 0x0.
>
> Also, H3 SID controller has some silicon bug that makes the direct read
> value wrong at first, a
* Dave Hansen wrote:
> + * The MPX tables change sizes based on the size of the virtual
> + * (aka. linear) address space. There is an MSR to tell the CPU
> + * whether we want the legacy-style ones or the larger ones when
> + * we are running with an eXtended virtual address space.
> + */
> +s
On 27/01/17 09:26, Oleksandr Andrushchenko wrote:
> On 01/27/2017 10:14 AM, Juergen Gross wrote:
>> On 27/01/17 08:53, Oleksandr Andrushchenko wrote:
>>> On 01/27/2017 09:46 AM, Juergen Gross wrote:
On 27/01/17 08:21, Oleksandr Andrushchenko wrote:
> On 01/27/2017 09:12 AM, Juergen Gross w
On Thu, Jan 26, 2017 at 11:09:52AM +0100, Paul Kocialkowski wrote:
> On 25/01/17 13:20, Peter Rosin wrote:
> > On 2017-01-24 17:24, Paul Kocialkowski wrote:
> > > Le jeudi 15 décembre 2016 à 18:50 +0100, Peter Rosin a écrit :
> > > > The bindings are fine.
> > > >
> > > > The Tegra dts files are b
On Friday 27 January 2017 11:39:42 Zhang Rui wrote:
> On Thu, 2017-01-26 at 18:03 -0800, Guenter Roeck wrote:
> > On 01/26/2017 05:37 PM, Zhang Rui wrote:
> > >
> > > On Wed, 2017-01-25 at 13:09 +0100, Pali Rohár wrote:
> > > >
> > > > On Wednesday 25 January 2017 12:12:33 Pavel Machek wrote:
> >
On Thu, Jan 26, 2017 at 02:32:21PM +0100, Quentin Schulz wrote:
> I've come with this solution:
>
>
> diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c
> index 012c064..117eacb 100644
> --- a/drivers/mfd/axp20x.c
> +++
Am 27.01.2017 um 08:30 schrieb Daniel Vetter:
On Fri, Jan 27, 2017 at 07:23:58AM +0100, Thomas Hellstrom wrote:
On 01/27/2017 03:29 AM, Michel Dänzer wrote:
On 26/01/17 09:46 AM, Sinclair Yeh wrote:
On Wed, Jan 25, 2017 at 10:49:33AM +0100, Christian König wrote:
Am 25.01.2017 um 10:25 schrie
Similar to the PCI version, just calling into virtio instead.
Signed-off-by: Christoph Hellwig
---
block/Kconfig | 5
block/Makefile| 1 +
block/blk-mq-virtio.c | 54 +++
include/linux/blk-mq-virtio.h | 10 +++
This basically passed up the pci_irq_get_affinity information through
virtio through an optional get_vq_affinity method. It is only implemented
by the PCI backend for now, and only when we use per-virtqueue IRQs.
Signed-off-by: Christoph Hellwig
---
drivers/virtio/virtio_pci_common.c | 11 +
On Thu, Jan 26, 2017 at 07:12:44PM +0800, Chen-Yu Tsai wrote:
> On Thu, Jan 26, 2017 at 6:14 PM, Maxime Ripard
> wrote:
> > Hi,
> >
> > On Tue, Jan 24, 2017 at 10:32:25AM +0800, Chen-Yu Tsai wrote:
> >> Add support for the USB clock controls found on the A80.
> >>
> >> Signed-off-by: Chen-Yu Tsai
Add a struct irq_affinity pointer to the find_vqs methods, which if set
is used to tell the PCI layer to create the MSI-X vectors for our I/O
virtqueues with the proper affinity from the start. Compared to after
the fact affinity hints this gives us an instantly working setup and
allows to allocat
nvmf_create_ctrl() relys on the presence of a create_crtl callback in the
registered nvmf_transport_ops, so make nvmf_register_transport require one.
Update the available call-sites as well to reflect these changes.
Signed-off-by: Johannes Thumshirn
---
drivers/nvme/host/fabrics.c | 7 ++-
Use automatic IRQ affinity assignment in the virtio layer if available,
and build the blk-mq queues based on it.
Signed-off-by: Christoph Hellwig
---
drivers/scsi/virtio_scsi.c | 126 +
include/linux/cpuhotplug.h | 1 -
2 files changed, 12 insertions
On Thu, 2017-01-26 at 15:57 -0800, Stephen Boyd wrote:
> On 01/25, Jerome Brunet wrote:
> >
> > During meson8b clock probe, clk81 register address is fixed twice.
> > First using the meson8b_clk_gates array, then by directly changing
> > meson8b_clk81 register.
> >
> > As a result meson8b_clk81.r
Use automatic IRQ affinity assignment in the virtio layer if available,
and build the blk-mq queues based on it.
Signed-off-by: Christoph Hellwig
---
drivers/block/virtio_blk.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/block/virtio_blk.c b/drivers/
- Original Message -
> From: "Michael S. Tsirkin"
> To: "Fam Zheng"
> Cc: linux-kernel@vger.kernel.org, "Paolo Bonzini" ,
> linux-s...@vger.kernel.org, "James E.J.
> Bottomley" , "Jason Wang" ,
> "Martin K. Petersen"
> , stefa...@redhat.com,
> virtualizat...@lists.linux-foundation.or
Hi Linus,
Here's one mmc fix intended for v4.10 rc6. Based on v4.10-rc5.
Details are as usual found in the signed tag. Please pull this in!
Kind regards
Ulf Hansson
The following changes since commit 7a308bb3016f57e5be11a677d15b821536419d36:
Linux 4.10-rc5 (2017-01-22 12:54:15 -0800)
are a
> diff --git a/include/linux/stacktrace.h b/include/linux/stacktrace.h
> index 0a34489..8e8b67b 100644
> --- a/include/linux/stacktrace.h
> +++ b/include/linux/stacktrace.h
> @@ -18,6 +18,8 @@ extern void save_stack_trace_regs(struct pt_regs *regs,
> struct stack_tr
* Wei Yang wrote:
> e820_all_mapped() iterates the e820 table to check whether a region is
> mapped or not. Since the e820 table is sorted, when the region is less than
> the current region, no need to continue the iteration.
>
> The patch breaks the loop accordingly.
>
> Signed-off-by: Wei Ya
Hi Maxime,
On Fri, Jan 27, 2017 at 7:17 PM, Maxime Ripard
wrote:
> Hi,
>
> On Thu, Jan 26, 2017 at 07:33:44PM +0800, Icenowy Zheng wrote:
>> H3 and A64 SoCs have a bigger SID controller, which has its direct read
>> address at 0x200 position in the SID block, not 0x0.
>>
>> Also, H3 SID controlle
On Thu, 19 Jan 2017, Josh Poimboeuf wrote:
> Create temporary stubs for klp_update_patch_state() so we can add
> TIF_PATCH_PENDING to different architectures in separate patches without
> breaking build bisectability.
>
> Signed-off-by: Josh Poimboeuf
> Reviewed-by: Petr Mladek
Acked-by: Miros
On Fri, Jan 27, 2017 at 09:53:17AM +0100, Jean Delvare wrote:
> On Wed, 25 Jan 2017 15:15:45 +, Sudeep Holla wrote:
> > > (...)
> > > As a side note, there's no finger-pointing implied by Fixes: tags. They
> > > are only meant to help people backporting patches, so that they know if
> > > somet
The CHRG_CTRL1 and CHRG_CTRL2 registers are made for controlling
different battery charging settings such as the constant current charge
value.
The AXP22X also have a third register CHRG_CTRL3 which has settings for
battery charging too.
This adds the CHRG_CTRL1, CHRG_CTRL2 and CHRG_CTRL3 registe
The registers 0x56 and 0x57 of AXP22X PMIC store the value of the
internal temperature of the PMIC.
This patch modifies the name of these registers from AXP22X_PMIC_ADC_H/L
to AXP22X_PMIC_TEMP_H/L so their purpose is clearer.
Signed-off-by: Quentin Schulz
---
added in v2
drivers/mfd/axp20x.c
On Fri, Jan 27, 2017 at 11:14:06AM +0300, Andrey Ryabinin wrote:
> Works for me as well.
> Tested-by: Andrey Ryabinin
Thanks!
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
Hello,
Here are 2 simple EBI fixes to prepare landing of the Atmel NAND
controller driver and bindings rework.
No need to backport them since no one is using the EBI right now.
Nicolas, Alexandre, that'd be great if you could queue it for 4.11
since I plan to take the NAND driver rework for 4.12
We should test the apply value and not the ret one here.
Signed-off-by: Boris Brezillon
Fixes: 6a4ec4cd0888 ("memory: add Atmel EBI (External Bus Interface) driver")
---
drivers/memory/atmel-ebi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/memory/atmel-ebi.c b/dr
Some devices are defining several sub-ranges within the same CS iomem
range. In this case, we should not duplicate the EBI device config.
Signed-off-by: Boris Brezillon
---
drivers/memory/atmel-ebi.c | 46 +++---
1 file changed, 27 insertions(+), 19 deleti
The Sinlinx SinA33 has an AXP223 PMIC and an ACIN connector, thus, we
enable the ACIN power supply in its Device Tree.
Signed-off-by: Quentin Schulz
---
arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina
On Thu, 26 Jan 2017 11:29:11 +0200, Mika Westerberg wrote:
> On Thu, Jan 26, 2017 at 10:05:06AM +0100, Jean Delvare wrote:
> > I have not, as I do not have access to any Baytrail hardware. This is
> > the very reason why I'd like this code to be buildable as a module: I'm
> > not happy with a usele
Hi Sudeep,
On Wed, 25 Jan 2017 15:15:45 +, Sudeep Holla wrote:
> Also different maintainer have different opinion on how to use
> COMPILE_TEST. I don't have any strong opinion on that.
There's not much to discuss or disagree about COMPILE_TEST. It was
introduced for one purpose and should be
On 01/27/2017 01:45 PM, Kishon Vijay Abraham I wrote:
On Friday 27 January 2017 01:40 PM, Vivek Gautam wrote:
We want to skip only tx/rx_iface clocks and not ref_clk_src
as well. Fix the jump label accordingly.
Fixes: 300f96771d78 ("phy: qcom-ufs: Skip obtaining rx/tx_iface_clk for msm8996
On 27/01/2017 at 10:10:35 +0100, Boris Brezillon wrote:
> Hello,
>
> Here are 2 simple EBI fixes to prepare landing of the Atmel NAND
> controller driver and bindings rework.
>
> No need to backport them since no one is using the EBI right now.
>
> Nicolas, Alexandre, that'd be great if you coul
Newer versions of the SMC block requires the SMC clock to be enabled
before the SMC logic can be used.
Signed-off-by: Boris Brezillon
---
drivers/memory/atmel-ebi.c | 51 +-
1 file changed, 37 insertions(+), 14 deletions(-)
diff --git a/drivers/memory
On Fri, Jan 27, 2017 at 09:54:33AM +0100, Quentin Schulz wrote:
> The X-Powers AXP20X and AXP22X PMICs have multiple ADCs. They expose
> information and data of the various power supplies they support such as
> ACIN, battery and VBUS. For example, they expose the current battery
> voltage, charge o
On Fri, Jan 27, 2017 at 4:58 PM, Maxime Ripard
wrote:
> On Thu, Jan 26, 2017 at 07:20:22PM +0800, Chen-Yu Tsai wrote:
>> On Thu, Jan 26, 2017 at 6:39 PM, Maxime Ripard
>> wrote:
>> > Hi,
>> >
>> > On Tue, Jan 24, 2017 at 10:32:26AM +0800, Chen-Yu Tsai wrote:
>> >> Add support for the display engi
The ASPEED AST2400/2500 PWM controller supports 8 PWM output ports.
The ASPEED AST2400/2500 Fan tach controller supports 16 tachometer inputs.
Types M, N and 0 are three types just to have three independent PWM/Fan Tach
related settings.
The device driver matches on the device tree node. The config
On Fri, Jan 27, 2017 at 1:32 AM, Jaghathiswari Rankappagounder
Natarajan wrote:
>
>
> On Fri, Jan 13, 2017 at 8:21 AM, Rob Herring wrote:
>>
>> On Mon, Jan 09, 2017 at 01:59:34PM -0800, Jaghathiswari Rankappagounder
>> Natarajan wrote:
>> > This binding provides interface for adding values relate
On Mon, Jan 16, 2017 at 6:57 PM, Borislav Petkov wrote:
> Hi,
>
> On Fri, Jan 13, 2017 at 12:13:04PM +0100, Miklos Szeredi wrote:
>> On Thu, Jan 12, 2017 at 9:04 PM, Tahsin Erdogan wrote:
>> > fuse_abort_conn() moves requests from pending list to a temporary list
>> > before canceling them. This
This binding provides interface for adding values related to ASPEED
AST2400/2500 PWM and Fan tach controller support.
The PWM controller can support upto 8 PWM output ports.
The Fan tach controller can support upto 16 tachometer inputs.
Types M, N and 0 are three types just to have three independen
On Fri, Jan 27, 2017 at 4:54 PM, Quentin Schulz
wrote:
> The registers 0x56 and 0x57 of AXP22X PMIC store the value of the
> internal temperature of the PMIC.
>
> This patch modifies the name of these registers from AXP22X_PMIC_ADC_H/L
> to AXP22X_PMIC_TEMP_H/L so their purpose is clearer.
>
> Sig
On Thursday 26 January 2017 11:12 PM, Randy Dunlap wrote:
> From: Randy Dunlap
>
> Fix build errors in phy-rockchip-inno-usb2.c. The driver uses
> extcon interfaces so it should depend on EXTCON.
>
> Fixes these build errors:
>
> drivers/built-in.o: In function `rockchip_usb2phy_otg_sm_work':
Pali Rohár writes:
> On Friday 27 January 2017 09:56:09 Kalle Valo wrote:
>> Pali Rohár writes:
>>
>> > In case there is no valid MAC address kernel generates random one. This
>> > patch propagate this generated MAC address back to NVS data which will be
>> > uploaded to wl1251 chip. So HW woul
On 27/01/2017 at 10:24:09 +0100, Boris Brezillon wrote:
> Newer versions of the SMC block requires the SMC clock to be enabled
> before the SMC logic can be used.
>
> Signed-off-by: Boris Brezillon
> ---
> drivers/memory/atmel-ebi.c | 51
> +-
> 1 fil
On Fri, Jan 27, 2017 at 05:26:53PM +0800, Chen-Yu Tsai wrote:
> On Fri, Jan 27, 2017 at 4:58 PM, Maxime Ripard
> wrote:
> > On Thu, Jan 26, 2017 at 07:20:22PM +0800, Chen-Yu Tsai wrote:
> >> On Thu, Jan 26, 2017 at 6:39 PM, Maxime Ripard
> >> wrote:
> >> > Hi,
> >> >
> >> > On Tue, Jan 24, 2017 a
On Friday 27 January 2017 09:33:40 Kalle Valo wrote:
> Pali Rohár writes:
>
> > NVS calibration data for wl1251 are model specific. Every one device with
> > wl1251 chip has different and calibrated in factory.
> >
> > Not all wl1251 chips have own EEPROM where are calibration data stored. And
>
On Fri, Jan 27, 2017 at 05:26:59PM +0800, Icenowy Zheng wrote:
> > > +Example for sun8i-h3:
> > > + sid@01c14000 {
> > > + compatible = "allwinner,sun8i-h3-sid";
> > > + /*
> > > + * The length of SID on H3 is 0x100 bytes, add the value offset
> > > + * 0x200, so the total length should be 0x3
Am 26.01.2017 um 20:26 schrieb Jani Nikula :
> On Thu, 26 Jan 2017, Jonathan Corbet wrote:
>> Give me a new kerneldoc that passes those tests, and I'll happily
>> merge it. (I have some sympathy with the idea that we should look
>> into other parsers, but I would not hold up a new kerneldoc tha
On Fri, Jan 27, 2017 at 10:35:26AM +0100, Miklos Szeredi wrote:
> Do you still have the vmlinux for this? Or better yet, fs/fuse/dev.o?
Not really.
But I haven't been able to reproduce since and I was bisecting then. My
current guess is that perhaps there were some stale objects involved in
the
On Fri, Jan 27, 2017 at 10:50 AM, Borislav Petkov wrote:
> On Fri, Jan 27, 2017 at 10:35:26AM +0100, Miklos Szeredi wrote:
>> Do you still have the vmlinux for this? Or better yet, fs/fuse/dev.o?
>
> Not really.
>
> But I haven't been able to reproduce since and I was bisecting then. My
> current
Hi Andrey,
Am Donnerstag, den 26.01.2017, 14:05 -0800 schrieb Andrey Smirnov:
> Use IRQCHIP_DECLARE_DRIVER instead of Use IRQCHIP_DECLARE to allow
> 'imx_gpc_driver' to be probed in addition to irqchip initialized by
> imx_gpc_init().
>
> Cc: yurov...@gmail.com
> Cc: Shawn Guo
> Cc: Thomas Gleix
X-Powers AXP22X PMIC has multiple ADCs, each one exposing data from the
different power supplies connected to the PMIC.
This adds the ADC subnode for AXP22X PMIC.
Signed-off-by: Quentin Schulz
---
v2:
- removed #io-channels property (the IIO channels mapping is done by
using iio_map structure
On Thu, Jan 26, 2017 at 03:14:41PM -0800, Kees Cook wrote:
> On Mon, Nov 14, 2016 at 9:39 AM, Peter Zijlstra wrote:
> > Provide refcount_t, an atomic_t like primitive built just for
> > refcounting.
> >
> > It provides overflow and underflow checks as well as saturation
> > semantics such that whe
On 27 January 2017 at 02:50, Benjamin Herrenschmidt
wrote:
> On Thu, 2017-01-26 at 17:42 -0800, Tyrel Datwyler wrote:
>> On 01/26/2017 12:22 PM, Michal Suchánek wrote:
>> > Hello,
>> >
>> > building ibmvtpm I noticed gcc warning complaining that second word
>> > of
>> > struct ibmvtpm_crq in tpm_i
On Mon, Jan 23, 2017 at 10:02:37PM +0800, Herbert Xu wrote:
> On Mon, Jan 16, 2017 at 05:06:51PM +0100, Nicholas Mc Guire wrote:
> > Add declarations for the camellia substitution box to allow a clean build.
> >
> > Signed-off-by: Nicholas Mc Guire
> > ---
> > Problem reported by sparse
> > arch/
will send documentation change proposal in reply to these letter
Oleg Nesterov (1):
introduce the walk_process_tree() helper
Pavel Tikhomirov (1):
prctl: propagate has_child_subreaper flag to every descendant
include/linux/sched.h | 5 +
kernel/fork.c | 42 +
This driver adds pinctrl/GPIO support for Intel Gemini Lake SoC. The
GPIO controller is based on the next generation GPIO hardware but still
compatible with the one supported by the Intel core pinctrl/GPIO driver.
This commit includes material from David E. Box.
Signed-off-by: Mika Westerberg
Re
Hi,
These patches were originally introduced as part of patch series available
here:
https://lkml.org/lkml/2017/1/10/497
But I split out the generic pinconfig patches into another series which is
now merged in linux-pinctrl.git/devel.
This series applies on top of that.
Intel Gemini Lake is
On Friday 27 January 2017 09:56:09 Kalle Valo wrote:
> Pali Rohár writes:
>
> > In case there is no valid MAC address kernel generates random one. This
> > patch propagate this generated MAC address back to NVS data which will be
> > uploaded to wl1251 chip. So HW would have same MAC address as l
The next generation Intel GPIO hardware has two additional registers
PADCFG2 and PADCFG3. The latter is marked as reserved but the former
includes configuration for per-pad hardware debouncer.
This patch adds support for that in the Intel pinctrl core driver. Since
these are additional features on
From: Oleg Nesterov
Add the new helper to walk the process tree, the next patch adds a user.
Note that it visits the group leaders only, proc_visitor can do
for_each_thread itself or we can trivially extend walk_process_tree() to
do this.
Signed-off-by: Oleg Nesterov
Reviewed-by: Pavel Tikhomir
If process forks some children when it has is_child_subreaper
flag enabled they will inherit has_child_subreaper flag - first
group, when is_child_subreaper is disabled forked children will
not inherit it - second group. So child-subreaper does not reparent
all his descendants when their parents di
The next generation Intel GPIO hardware supports additional 1k pull-down
per-pad. Add support for this to the Intel core pinctrl driver.
Signed-off-by: Mika Westerberg
Reviewed-by: Andy Shevchenko
---
drivers/pinctrl/intel/pinctrl-intel.c | 18 +-
drivers/pinctrl/intel/pinctrl-i
Hi, Linus,
Please pull from
git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux.git for-rc
to receive the latest Thermal Management updates for v4.10-rc6 with
top-most commit 3feb479cea37fc623cf4e705631b2e679cbfbd7a:
Revert "thermal: thermal_hwmon: Convert to
hwmon_device_register_wit
On 01/27/2017 01:27 AM, Stephen Boyd wrote:
> On 01/25, mar...@kaiser.cx wrote:
>> From: Martin Kaiser
>>
>> These functions are referencing s3c_clk_regs[], which are marked as
>> __initdata. When compiling with CONFIG_DEBUG_SECTION_MISMATCH=y, this
>> produces warnings like
>>
>> WARNING: vml
Hi Ulf,
On jeu., janv. 26 2017, Ulf Hansson wrote:
> On 11 January 2017 at 18:19, Gregory CLEMENT
> wrote:
>> From: Hu Ziji
>>
>> Marvell Xenon SDHC can support eMMC/SD/SDIO.
>> Add Xenon-specific properties.
>> Also add properties for Xenon PHY setting.
>>
>> Signed-off-by: Hu Ziji
>> Sign
On Friday 27 January 2017 03:25 PM, Bartosz Golaszewski wrote:
> Hi Sekhar,
>
> I'll wait with sending v7 until we get an ack from Rob for the
> ahci-da850 bindings, so that we don't fall to the bottom of the review
> queue again.
Yes, makes sense.
Regards,
Sekhar
On Thu, Jan 26, 2017 at 3:11 PM, Bart Van Assche
wrote:
> This patch is wrong. The purpose of the dev_loss_tmo >= LONG_MAX / HZ check
> is to avoid that the expression 1UL * dev_loss_tmo * HZ further down
> overflows. Can you check whether changing the if-statement into if (1UL *
> dev_loss_tmo >=
On 27-1-2017 10:43, Pali Rohár wrote:
> On Friday 27 January 2017 09:33:40 Kalle Valo wrote:
>> Pali Rohár writes:
>>
>>> NVS calibration data for wl1251 are model specific. Every one device with
>>> wl1251 chip has different and calibrated in factory.
>>>
>>> Not all wl1251 chips have own EEPROM
On Thu 26-01-17 21:34:04, Daniel Borkmann wrote:
> On 01/26/2017 02:40 PM, Michal Hocko wrote:
[...]
> > But realistically, how big is this problem really? Is it really worth
> > it? You said this is an admin only interface and admin can kill the
> > machine by OOM and other means already.
> >
> >
On Friday 27 January 2017 11:05:32 Arend Van Spriel wrote:
> On 27-1-2017 10:43, Pali Rohár wrote:
> > On Friday 27 January 2017 09:33:40 Kalle Valo wrote:
> >> Pali Rohár writes:
> >>
> >>> NVS calibration data for wl1251 are model specific. Every one device with
> >>> wl1251 chip has different a
Le 27/01/2017 à 06:42, Harini Katakam a écrit :
> Hi Rafal,
>
> On Thu, Jan 26, 2017 at 8:45 PM, Rafal Ozieblo wrote:
>>> -Original Message-
>>> From: Andrei Pistirica [mailto:andrei.pistir...@microchip.com]
>>> Sent: 19 stycznia 2017 16:56
>>> Subject: [PATCH net-next v2] macb: Common co
old semantics was non deterministic and worked differently
depending on the external factors, but nothing changes if
process first sets itself subreaper and only after forks
Signed-off-by: Pavel Tikhomirov
---
man2/prctl.2 | 24 +---
1 file changed, 17 insertions(+), 7 deleti
From: Maxime Rossi Bellom
Split line before funtion argument.
Error was reported by checkpatch.pl as
WARNING: line over 80 characters
Signed-off-by: Maxime Rossi Bellom
---
drivers/staging/greybus/fw-management.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/st
X-Powers AXP209 PMIC has multiple ADCs, each one exposing data from the
different power supplies connected to the PMIC.
This adds the ADC subnode for AXP20X PMIC.
Signed-off-by: Quentin Schulz
---
v2:
- removed #io-channels property (the IIO channels mapping is done by
using iio_map structure
On Thu, Jan 26, 2017 at 11:22:49AM +0100, Ingo Molnar wrote:
> The 'kbuf' parameter is unused in the _user() side of the API, remove it.
>
> This simplifies the code and makes it easier to think about.
...
> @@ -1010,10 +1010,7 @@ int copy_xstate_to_kernel(unsigned int pos, unsigned
> int count
Hi Linus,
Please pull from:
git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media
tags/media/v4.10-2
For some fixes for -rc6:
- fix a regression on tvp5150 causing failures at input selection
and image glitches;
- CEC was moved out of staging for v4.10. Fix some bugs on it
Hi Giuseppe,
On Wed, 2017-01-25 at 21:39 +0300, Alexey Brodkin wrote:
> Hi Giuseppe,
>
> On Mon, 2016-11-14 at 09:14 +0100, Giuseppe CAVALLARO wrote:
> >
> > Hello Alexey
> >
> > Sorry for my late reply. In that case, I think that the stmmac
> > is using own RGMII/SGMII support (PCS) to dialog
>-Original Message-
>From: Harini Katakam [mailto:harinikatakamli...@gmail.com]
>Sent: 27 stycznia 2017 06:43
>Subject: Re: [PATCH net-next v2] macb: Common code to enable ptp support for
>MACB/GEM
>
>Hi Rafal,
>
>On Thu, Jan 26, 2017 at 8:45 PM, Rafal Ozieblo wrote:
>>> -Original Me
Le 27/01/2017 à 11:26, Rafal Ozieblo a écrit :
>> -Original Message-
>> From: Harini Katakam [mailto:harinikatakamli...@gmail.com]
>> Sent: 27 stycznia 2017 06:43
>> Subject: Re: [PATCH net-next v2] macb: Common code to enable ptp support for
>> MACB/GEM
>>
>> Hi Rafal,
>>
>> On Thu, Jan
Le 18/08/2016 à 09:37, Yunhui Cui a écrit :
> We can get the read/write/erase opcode from the spi nor framework
> directly. This patch uses the information stored in the SPI-NOR to
> remove the hardcode in the fsl_qspi_init_lut().
>
> Signed-off-by: Yunhui Cui
> Signed-off-by: Yunhui Cui
Applie
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