On 19 January 2017 at 11:19, Yong Mao wrote:
> From: yong mao
>
> configure some fixed mmc parameters
>
> Signed-off-by: Yong Mao
> Signed-off-by: Chaotian Jing
Please change the prefix of the commit message header to "ARM64: dts: mt8173:".
Also make sure you send this to the ARM mailing list
+devicetree, Rob
On 19 January 2017 at 11:19, Yong Mao wrote:
> From: yong mao
>
> Add description for mtk-hs200-cmd-int-delay
> Add description for mtk-hs400-cmd-int-delay
> Add description for mtk-hs400-cmd-resp-sel
>
> Signed-off-by: Yong Mao
> ---
> Documentation/devicetree/bindings/mmc/mt
HI,
On 19-01-17 21:27, Karsten Merker wrote:
On Thu, Jan 19, 2017 at 11:10:08PM +0800, Icenowy Zheng wrote:
19.01.2017, 22:34, "Maxime Ripard" :
On Wed, Jan 18, 2017 at 04:09:32AM +0800, Chen-Yu Tsai wrote:
On Wed, Jan 18, 2017 at 4:06 AM, Maxime Ripard
wrote:
> On Wed, Jan 18, 2017 at 12
Hi Javier,
On 2017-01-19 15:56, Javier Martinez Canillas wrote:
Thanks a lot for your feedback.
On 01/19/2017 11:17 AM, Marek Szyprowski wrote:
On 2017-01-18 01:30, Javier Martinez Canillas wrote:
Commit 15f90ab57acc ("[media] exynos-gsc: Make driver functional when
CONFIG_PM is unset") remov
Hi Eddie,
Am Freitag, 20. Januar 2017, 15:10:47 CET schrieb Eddie Cai:
> 2017-01-19 17:58 GMT+08:00 Heiko Stuebner :
> > Hi Eddie,
> >
> > Am Donnerstag, 19. Januar 2017, 10:11:59 CET schrieb Eddie Cai:
> >> This patch add basic support for RK3288-Tinker board. We can boot in to
> >> rootfs with
>
>>>On Tue, Jan 03, 2017 at 05:02:47PM +0800, Peter Chen wrote:
At some systems, the pinctrl setting will be lost or needs to set as
"sleep" state to save power consumption. So, we need to configure
pinctrl as "sleep" state when system enters suspend, and as "default"
state a
From: satendra singh thakur
-Added a new ioctl in Linux DRM KMS driver.
This ioctl allows user to set the values of an object’s multiple
properties in one go.
-In the absence of such ioctl, User would be calling one ioctl to set each
property value;
Thus, user needs to call N ioctls to set va
Hi Arvind,
On Fri, Jan 20, 2017 at 8:40 AM, Arvind Yadav wrote:
> If rcar_sysc_pd_init will fail, Handle ERROR properly.
> -Release memory
> -Unmap I/O memory from kernel address space.
>
> In rcar_sysc_init, If ioremap_nocache will fail. It will return NULL.
> Kernel can run into a NULL-pointe
This patch series re enables DMA support for UART 8250_omap driver.
Tested on AM335x, AM437x that use EDMA and OMAP5 and DRA74 EVM with
SDMA.
Vignesh R (3):
serial :8250_omap: pause DMA only if DMA transfer in progress
serial: 8250_omap: Add OMAP_DMA_TX_KICK quirk for AM437x
serial: 8250_om
It is possible that DMA transfer is already complete but, completion
handler is yet to be called, when dmaengine_pause() is called in case of
error condition(like break/rx timeout). This leads to dmaengine_pause()
API to return EINVAL (as descriptor is already NULL) causing
rx_dma_broken flag to be
UART uses as EDMA as dma engine on AM437x SoC and therefore, requires
OMAP_DMA_TX_KICK quirk just like AM33xx. So, enable OMAP_DMA_TX_KICK
quirk for AM437x platform as well. While at that, drop use of
of_machine_is_compatible() and instead pass quirks via device data.
Signed-off-by: Vignesh R
Ack
[...]
> struct msdc_delay_phase {
> @@ -331,6 +339,9 @@ struct msdc_host {
> unsigned char timing;
> bool vqmmc_enabled;
> u32 hs400_ds_delay;
> + u32 hs200_cmd_int_delay; /* cmd internal delay for HS200/SDR104 */
> + u32 hs400_cmd_int_delay; /* cmd internal de
8250 UART DMA support was marked broken by default as it was not
possible to pause ongoing RX DMA transfer. Now that both SDMA and
EDMA can support pause operation for RX DMA transactions, don't set
rx_dma_broken to true by default. With this patch 8250_omap driver will
use DMA by default.
Signed-
add a new compatible string for "mt2712", and move reference clock
into each port node;
Signed-off-by: Chunfeng Yun
---
.../devicetree/bindings/phy/phy-mt65xx-usb.txt | 91 +---
1 file changed, 77 insertions(+), 14 deletions(-)
diff --git a/Documentation/devicetree/binding
On Wed, Jan 18, 2017 at 04:19:47PM -0800, Andy Lutomirski wrote:
> ISTM even with pagefault_disable() in play, using access_ok() from,
> say, interrupt context is dangerous unless you've first checked that
> you're in a task. But I guess that in_task() would still return
> false, e.g. in perf.
Th
On Thursday 19 January 2017 09:05 PM, Greg Kroah-Hartman wrote:
> On Thu, Jan 19, 2017 at 06:54:23AM -0800, Tony Lindgren wrote:
>> * Greg Kroah-Hartman [170119 05:25]:
>>> On Fri, Jan 13, 2017 at 10:20:21AM -0800, Tony Lindgren wrote:
* Vignesh R [170113 00:03]:
> This patch series re
There are some variations from mt2701 to mt2712:
1. banks shared by multiple ports are put back into each port,
such as SPLLC and U2FREQ;
2. add a new bank MISC for u2port, and CHIP for u3port;
3. bank's offset in each port are also rearranged;
Signed-off-by: Chunfeng Yun
---
drivers/phy/phy
Currently usb3 port in fact includes two sub-ports, but it is not
flexible for some cases, such as following one:
usb3 port0 includes u2port0 and u3port0;
usb2 port0 includes u2port1;
If wants to support only HS, we can use u2port0 or u2port1, when
select u2port0, u3port0 is not needed;
If
there is a reference clock for each port, HighSpeed port is 48M,
and SuperSpeed port is 26M which usually comes from 26M oscillator
directly, but some SoCs is not. it is flexible to move it into port
node.
Signed-off-by: Chunfeng Yun
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi |8 ++--
split the old SuperSpeed port node into a HighSpeed one and a new
SuperSpeed one.
Signed-off-by: Chunfeng Yun
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 19 +--
1 file changed, 13 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
b/arch/a
the reference clock of HighSpeed port is 48M which comes from PLL;
the reference clock of SuperSpeed port is 26M which usually comes
from 26M oscillator directly, but some SoCs are not, add it for
compatibility, and put them into port node for flexibility.
Signed-off-by: Chunfeng Yun
---
drivers
On Thu, 19 Jan 2017, David Carrillo-Cisneros wrote:
> On Thu, Jan 19, 2017 at 9:41 AM, Thomas Gleixner wrote:
> > Above you are talking about the same CLOSID and different RMIDS and not
> > about changing both.
>
> The scenario I talked about implies changing CLOSID without affecting
> monitoring
On Thu, Jan 19, 2017 at 09:17:01PM -0600, Rob Herring wrote:
> On Thu, Jan 19, 2017 at 8:55 PM, Stephen Rothwell
> wrote:
> > Hi Greg,
> >
> > Today's linux-next merge of the staging tree got a conflict in:
> >
> > Documentation/devicetree/bindings/vendor-prefixes.txt
> >
> > between commit:
>
On Tuesday, December 20, 2016 9:49 PM Michal Hocko wrote:
>
> @@ -1013,7 +1013,7 @@ bool out_of_memory(struct oom_control *oc)
>* make sure exclude 0 mask - all other users should have at least
>* ___GFP_DIRECT_RECLAIM to get here.
>*/
> - if (oc->gfp_mask && !(oc->gf
On 01/20/2017 05:43 AM, Rafael J. Wysocki wrote:
> The above may be problematic if the constraints change relatively
> often. It is global and it will affect all of the CPUs in the system
> every time and now think about systems with hundreds of them.
Yes, the disadvantage is waking up all idle
On Fri, Jan 20, 2017 at 03:36:22PM +1100, Stephen Rothwell wrote:
> Hi Greg,
>
> After merging the staging tree, today's linux-next build (powerpc
> allyesconfig) produced this warning:
>
> warning: (IIO_ST_ACCEL_3AXIS) selects IIO_ST_ACCEL_I2C_3AXIS which has unmet
> direct dependencies (IIO &&
Hi Javier,
On 2017-01-19 18:51, Javier Martinez Canillas wrote:
On 01/19/2017 11:56 AM, Javier Martinez Canillas wrote:
On 01/19/2017 11:17 AM, Marek Szyprowski wrote:
[snip]
Also when removing the exynos_gsc driver, I get the same error:
# rmmod s5p_mfc
[ 106.405972] s5p-mfc 1100.code
On Thu, Jan 19, 2017 at 08:52:56PM +0100, codekip...@gmail.com wrote:
> From: Marcus Cooper
>
> The H3 SoC uses the same SPDIF block as found in earlier SoCs, but the
> transmit fifo is at a different address.
For both patches,
Acked-by: Maxime Ripard
Thanks,
Maxime
--
Maxime Ripard, Free E
On Thu, Jan 19, 2017 at 03:29:34PM -0800, Guenter Roeck wrote:
> On Fri, Jan 20, 2017 at 12:00:36AM +0100, Sebastian Reichel wrote:
> > Hi Thierry,
> >
> > > > > [...]
> > > >
> > > > Please use register_restart_handler() instead. It has support for
> > > > priorities, is not arm specific and prop
2017-01-20 16:12 GMT+08:00 Heiko Stuebner :
> Hi Eddie,
>
> Am Freitag, 20. Januar 2017, 15:10:47 CET schrieb Eddie Cai:
>> 2017-01-19 17:58 GMT+08:00 Heiko Stuebner :
>> > Hi Eddie,
>> >
>> > Am Donnerstag, 19. Januar 2017, 10:11:59 CET schrieb Eddie Cai:
>> >> This patch add basic support for RK3
On Thu, Jan 19, 2017 at 12:19 PM, Paul Cercueil wrote:
> The problem with pinctrl and PWM, is that the pinctrl API works by "states".
> A default state, sleep state, and basically any custom state that the
> devicetree
> provides. This works well until you need to control individually each pin;
>
On Fri, Jan 20, 2017 at 10:21:33AM +0800, Elaine Zhang wrote:
> If a PM domain is powered off before system suspend,
> we hope do nothing in system runtime suspend noirq phase
> and system runtime resume noirq phase.
>
> This modify is to slove system resume issue for RK3399.
> RK3399 SOC pd_gpu h
This patch adds dt-binding documentation for zx2967 family
i2c controller.
Signed-off-by: Baoyou Xie
---
.../devicetree/bindings/i2c/i2c-zx2967.txt | 22 ++
1 file changed, 22 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/i2c-zx2967.txt
diff
This patch adds i2c controller driver for ZTE's zx2967 family.
Signed-off-by: Baoyou Xie
---
drivers/i2c/busses/Kconfig | 8 +
drivers/i2c/busses/Makefile | 1 +
drivers/i2c/busses/i2c-zx2967.c | 645
3 files changed, 654 insertions(+)
creat
Vivek,
On 19/01/17 17:15, vivek.gau...@codeaurora.org wrote:
> Hi Roger,
>
> On 2017-01-19 17:45, Roger Quadros wrote:
>> Vivek,
>>
>> On 19/01/17 13:56, Vivek Gautam wrote:
>>> Hi,
>>>
>>>
>>> On Wed, Jun 22, 2016 at 2:00 PM, Roger Quadros wrote:
>>>
>>> Luckily hit this thread while checking a
On Thu, Jan 19, 2017 at 1:11 PM, Andy Shevchenko
wrote:
> On Thu, 2017-01-19 at 12:48 +0300, Mika Westerberg wrote:
>> When a GPIO driver is backed by a pinctrl driver the GPIO driver
>> sometimes needs to call the pinctrl driver to configure certain
>> things,
>> like whether the pin is used as i
On Fri, 20 Jan 2017, Peter Zijlstra wrote:
> On Wed, Jan 18, 2017 at 04:19:47PM -0800, Andy Lutomirski wrote:
> > ISTM even with pagefault_disable() in play, using access_ok() from,
> > say, interrupt context is dangerous unless you've first checked that
> > you're in a task. But I guess that in_
On Thu, Jan 19, 2017 at 10:48 AM, Mika Westerberg
wrote:
> The current pinconf packed format allows only 16-bit argument limiting
> the maximum value 65535. For most types this is enough. However,
> debounce time can be in range of hundreths of milliseconds in case of
> mechanical switches so we
On Thu, Jan 19, 2017 at 09:19:07PM +0530, Chaitra P B wrote:
> Driver processes the event MPI26_EVENT_ACTIVE_CABLE_DEGRADED
> when a cable is present and is running at a degraded speed
> (below the SAS3 12 Gb/s rate). Prints added
> to inform the user that the cable is not running at
> optimal spee
Add the zx2967 i2c controller driver as maintained by ARM ZTE
architecture maintainers, as they're parts of the core IP.
Signed-off-by: Baoyou Xie
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 275c434..757c098 100644
--- a/MAINTAINERS
+++ b
On Thu, Jan 19, 2017 at 02:03:12PM -0600, Brijesh Singh wrote:
> Hi Greg,
>
> On 01/19/2017 12:21 PM, Greg KH wrote:
> > On Thu, Jan 19, 2017 at 01:07:50PM -0500, Brijesh Singh wrote:
> > > The CCP device (drivers/crypto/ccp/ccp.ko) is part of AMD Secure
> > > Processor,
> > > which is not dedica
On Thu, Jan 19, 2017 at 09:19:06PM +0530, Chaitra P B wrote:
> Here is the change list:
> Posting 4 patches for mpt3sas driver enhancement and defect fixes.
> * Handle cable event for notifying degraded speed.
> * Performance improvement for Crusader.
> * Fix Firmware fault state 0x2100 durin
This document describes the concept of crossrelease feature.
Signed-off-by: Byungchul Park
---
Documentation/locking/crossrelease.txt | 874 +
1 file changed, 874 insertions(+)
create mode 100644 Documentation/locking/crossrelease.txt
diff --git a/Documentation/
Commit-ID: 358e96deaed3330a59d9dd6a7e419f4da08d6497
Gitweb: http://git.kernel.org/tip/358e96deaed3330a59d9dd6a7e419f4da08d6497
Author: Andy Shevchenko
AuthorDate: Thu, 19 Jan 2017 21:24:22 +0200
Committer: Thomas Gleixner
CommitDate: Fri, 20 Jan 2017 10:07:41 +0100
x86/ioapic: Return s
Commit-ID: 939533955d1f1d51e8e37d7d675646ce9d55534b
Gitweb: http://git.kernel.org/tip/939533955d1f1d51e8e37d7d675646ce9d55534b
Author: Andy Shevchenko
AuthorDate: Thu, 19 Jan 2017 21:24:24 +0200
Committer: Thomas Gleixner
CommitDate: Fri, 20 Jan 2017 10:07:41 +0100
x86/platform/intel-m
Am 20.01.2017 um 08:44 schrieb Nils Holland:
On Fri, Jan 20, 2017 at 11:47:53AM +0900, Michel Dänzer wrote:
On 20/01/17 04:35 AM, Nils Holland wrote:
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c2016-12-11
20:17:54.0 +0100
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
Commit-ID: 910a26f6e952148a0c8815281737aaead640626c
Gitweb: http://git.kernel.org/tip/910a26f6e952148a0c8815281737aaead640626c
Author: Andy Shevchenko
AuthorDate: Thu, 19 Jan 2017 21:24:23 +0200
Committer: Thomas Gleixner
CommitDate: Fri, 20 Jan 2017 10:07:41 +0100
x86/platform/intel-m
On 20/01/17 04:44 PM, Nils Holland wrote:
> On Fri, Jan 20, 2017 at 11:47:53AM +0900, Michel Dänzer wrote:
>> On 20/01/17 04:35 AM, Nils Holland wrote:
>>>
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c2016-12-11
>>> 20:17:54.0 +0100
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ob
On Thu, Jan 19, 2017 at 10:48 AM, Mika Westerberg
wrote:
> Currently we already have two pin configuration related callbacks
> available for GPIO chips .set_single_ended() and .set_debounce(). In
> future we expect to have even more, which does not scale well if we need
> to add yet another callb
Commit-ID: e2e2eabb68dfd00502bf8501b015862eb8b3f392
Gitweb: http://git.kernel.org/tip/e2e2eabb68dfd00502bf8501b015862eb8b3f392
Author: Andy Shevchenko
AuthorDate: Thu, 19 Jan 2017 21:24:25 +0200
Committer: Thomas Gleixner
CommitDate: Fri, 20 Jan 2017 10:07:42 +0100
x86/platform/intel-m
On 01/19/2017 11:57 PM, David Rientjes wrote:
> Commit 82e7d3abec86 ("oom: print nodemask in the oom report") implicitly
> sets the allocation nodemask to cpuset_current_mems_allowed when there is
> no effective mempolicy. cpuset_current_mems_allowed is only effective
> when cpusets are enabled
Am 19.01.2017 um 05:36 schrieb Kevin Hilman:
> Andreas Färber writes:
>> Am 19.01.2017 um 01:20 schrieb Andreas Färber:
>>> Am 18.01.2017 um 17:50 schrieb Neil Armstrong:
The Amlogic Meson GXBB/GXL/GXM secure monitor uses part of the memory
space,
this patch adds these reserved zon
version 9:
- fix pwm commit message header
- re-oerder nodes in DT file
version 8:
- rebase on v4.10-rc4
- fix comments done by Thierry on PWM
- reword "reg" parameter description
- change kernel kernel in IIO ABI documentation
version 7:
- rebase on v4.10-rc2
- remove iio_device code from driver
Add bindings information for STM32 Timers
version 6:
- rename stm32-gtimer to stm32-timers
- change compatible
- add description about the IPs
version 2:
- rename stm32-mfd-timer to stm32-gptimer
- only keep one compatible string
Signed-off-by: Benjamin Gaignard
Acked-by: Lee Jones
Acked-by: R
Define and enable pwm1 and pwm3 for stm32f469 discovery board
Signed-off-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32f469-disco.dts | 28
1 file changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f469-disco.dts
b/arch/arm/boot/dts/stm32f469-disco.dt
This hardware block could at used at same time for PWM generation
and IIO timers.
PWM and IIO timer configuration are mixed in the same registers
so we need a multi fonction driver to be able to share those registers.
version 7:
- rebase on v4.10-rc2
version 6:
- rename files to stm32-timers
- re
On Fri, Jan 20, 2017 at 9:37 AM, Greg KH wrote:
> On Fri, Jan 20, 2017 at 03:36:22PM +1100, Stephen Rothwell wrote:
>> Hi Greg,
>>
>> After merging the staging tree, today's linux-next build (powerpc
>> allyesconfig) produced this warning:
>>
>> warning: (IIO_ST_ACCEL_3AXIS) selects IIO_ST_ACCEL_I
This driver adds support for PWM driver on STM32 platform.
The SoC have multiple instances of the hardware IP and each
of them could have small differences: number of channels,
complementary output, auto reload register size...
version 9:
- fix commit message header
- remove one space MODULE_ALIAS
Timers IPs can be used to generate triggers for other IPs like
DAC or ADC.
Each trigger may result of timer internals signals like counter enable,
reset or edge, this configuration could be done through "master_mode"
device attribute.
Since triggers could be used by DAC or ADC their names are defi
Add Timers and it sub-nodes into DT for stm32f429 family.
version 9:
- re-order timers node per addresses
version 6:
- split patch in two: one for SoC family and one for stm32f469
discovery board.
version 5:
- rename gptimer node to timers
- re-order timers node per addresses
version 4:
- rem
Define bindings for pwm-stm32
version 9:
- change commit message header
version 8:
- reword st,breakinput description.
version 6:
- change st,breakinput parameter format to make it usuable on stm32f7 too.
version 2:
- use parameters instead of compatible of handle the hardware configuration
Si
Define bindings for STM32 timer trigger
version 8:
- reword "reg" parameter description
version 4:
- remove triggers enumeration from DT
- add reg parameter
version 3:
- change file name
- add cross reference with mfd bindings
version 2:
- only keep one compatible
- add DT parameters to set lis
On 01/20/2017 10:13 AM, Linus Walleij wrote:
> On Thu, Jan 19, 2017 at 10:48 AM, Mika Westerberg
> wrote:
>
>> Currently we already have two pin configuration related callbacks
>> available for GPIO chips .set_single_ended() and .set_debounce(). In
>> future we expect to have even more, which doe
On Fri, Jan 20, 2017 at 02:42:24PM +0800, Hillf Danton wrote:
> > @@ -1603,16 +1603,16 @@ int isolate_lru_page(struct page *page)
> > * the LRU list will go small and be scanned faster than necessary,
> > leading to
> > * unnecessary swapping, thrashing and OOM.
> > */
> > -static int too_ma
Currently we allow only to expand or collapse all entries
in the browser with E or C keys. Allow user to expand or
collapse only current entry in the browser with e or c key.
Signed-off-by: Jiri Olsa
Cc: David Ahern
Cc: Namhyung Kim
Cc: Peter Zijlstra
Link: http://lkml.kernel.org/n/tip-vbzhy5y
hi,
sending out few assorted fixes before I loose them ;-)
Available also here:
git://git.kernel.org/pub/scm/linux/kernel/git/jolsa/perf.git
perf/fixes
thanks,
jirka
---
Jiri Olsa (4):
perf hists browser: Put hist_entry folding login into single function
perf hists browser: Add
It seems to be the most used argument for -c option so far.
In the beginning when you want to have the overall process
report, so it makes sense to make it the default one.
Signed-off-by: Jiri Olsa
Cc: David Ahern
Cc: Namhyung Kim
Cc: Peter Zijlstra
Link: http://lkml.kernel.org/n/tip-70pfa7swi
Adding "Total records" column into cacheline pareto table,
between cycles and cpu info.
$ perf c2c report
...
----- cycles --Total cpu
rmt hitm lcl hitm load records cnt
... ...
It will be used in following patch to expand or collapse
only the current entry of the browser.
Signed-off-by: Jiri Olsa
Cc: David Ahern
Cc: Namhyung Kim
Cc: Peter Zijlstra
Link: http://lkml.kernel.org/n/tip-9lh8jzpzuac5ymqnmrm55...@git.kernel.org
---
tools/perf/ui/browsers/hists.c | 43 +
On Thu, Jan 19, 2017 at 12:55:27PM -0500, Cathy Avery wrote:
>
>
> On 01/18/2017 06:15 PM, Dan Carpenter wrote:
> >On Wed, Jan 18, 2017 at 03:28:58PM -0500, Cathy Avery wrote:
> >>Enable FC lightweight host option so that the luns exposed by
> >>the driver may be manually scanned.
> >>
> >>Signed
Brian Norris wrote:
> Depending on system factors (e.g., the PCIe link PM state), the first
> read to wake up the Wifi firmware can take a long time. There is no
> reason to use a (blocking, non-posted) read at this point, so let's just
> use a write instead. Write vs. read doesn't matter function
Brian Norris wrote:
> Marvell folks tell me this is a debugging event that the driver doesn't
> need to handle, but on 8997 w/ firmware 16.68.1.p97, I see several of
> these sorts of messages at (for instance) boot time:
>
> [ 13.825848] mwifiex_pcie :01:00.0: event: unknown event id: 0x63
On Fri, Jan 20, 2017 at 10:24 AM, Neil Armstrong
wrote:
>>> - return ret;
>>> + return pinctrl_gpio_set_config(chip->base + offset, config);
>>> }
>>
>> This is the beauty of it all..
>
> It would be even cooler it this becomes a generic helper !
It does, with this series we can pus
Hi,
On Fri, Jan 20, 2017 at 02:36:12AM +0100, msuchanek wrote:
> On 2017-01-16 23:54, Rob Herring wrote:
> > Here's a new version of the serdev bus support with all the review
> > feedback so far incorporated. I've left it named serdev for now pending
> > any further votes one way or the other, bu
Hi Naoya,
On 2017/1/18 17:45, Naoya Horiguchi wrote:
> On Wed, Jan 18, 2017 at 12:00:54PM +0800, Yisheng Xie wrote:
>> This patch is to extends soft offlining framework to support
>> non-lru page, which already support migration after
>> commit bda807d44454 ("mm: migrate: support non-lru movable p
Newline per Hillf
Signed-off-by: David Rientjes
---
mm/oom_kill.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/mm/oom_kill.c b/mm/oom_kill.c
index 1767e50844ac..51c091849dcb 100644
--- a/mm/oom_kill.c
+++ b/mm/oom_kill.c
@@ -408,7 +408,7 @@ static void dump_header(struct o
On Thu, Jan 19, 2017 at 02:03:11PM -0800, Kees Cook wrote:
> On Thu, Jan 19, 2017 at 2:40 AM, Juerg Haefliger
> wrote:
> > No jprobe is registered when the module is loaded without specifying a
> > crashpoint that uses a jprobe. At the moment, we unconditionally try to
> > unregister the jprobe on
Hello Marek,
On 01/20/2017 05:08 AM, Marek Szyprowski wrote:
> Hi Javier,
>
[snip]
>> Ok, I misunderstood the relationship between runtime PM and the power domains
>> then. I thought the power domains were only powered on when the runtime PM
>> framework resumed an associated device (i.e: pm_ru
Le 2017-01-19 10:07, Linus Walleij a écrit :
On Wed, Jan 18, 2017 at 12:14 AM, Paul Cercueil
wrote:
All the drivers for the various hardware elements of the jz4740 SoC
have been modified to use the pinctrl framework for their pin
configuration needs. As such, this platform code is now unuse
On Fri, 20 Jan 2017, Vlastimil Babka wrote:
> Could we simplify both patches with something like this?
> Although the sizeof("null") is not the nicest thing, because it relies on
> knowledge
> that pointer() in lib/vsprintf.c uses this string. Maybe Rasmus has some
> better idea?
>
> Thanks,
>
On Fri, 2017-01-20 at 07:39 +0100, Thierry Reding wrote:
> On Thu, Jan 19, 2017 at 05:52:10PM +0100, Clemens Gruber wrote:
> > On Thu, Jan 19, 2017 at 06:10:08PM +0200, Andy Shevchenko wrote:
> > > Combining with your proposal I would see the best approach is to
> > > set
> > > pca->period_ns accor
Hi Benjamin,
On 01/20/2017 10:15 AM, Benjamin Gaignard wrote:
Define and enable pwm1 and pwm3 for stm32f469 discovery board
Signed-off-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32f469-disco.dts | 28
1 file changed, 28 insertions(+)
diff --git a/arch/arm/boo
Hi Benjamin,
On 01/20/2017 10:15 AM, Benjamin Gaignard wrote:
Add Timers and it sub-nodes into DT for stm32f429 family.
version 9:
- re-order timers node per addresses
version 6:
- split patch in two: one for SoC family and one for stm32f469
discovery board.
version 5:
- rename gptimer node
Hello Marek,
On 01/20/2017 05:37 AM, Marek Szyprowski wrote:
[snip]
>> I'll post a proper patch for the exynos5800.dtsi, to override the
>> clocks in the gsc_pd device node.
>>
>> I also see that the two power domains that fail to be disabled msc_pd
>> (power-domain@10044120) and isp_pd (power
On Thu, Jan 19, 2017 at 02:40:51PM -0800, Dmitry Torokhov wrote:
> There are no more users of pwm-beeper driver in mainline relying on
> this legacy API, so let's remove it and simplify the driver code.
>
> Signed-off-by: Dmitry Torokhov
> ---
> drivers/input/misc/pwm-beeper.c | 6 --
> 1 fi
On Wed 18-01-17 19:39:35, Fabian Frederick wrote:
> udf_fill_super() used udf_parse_options() to flag UDF_FLAG_BLOCKSIZE_SET
> when blocksize was specified otherwise used 512 bytes
> (bdev_logical_block_size) and 2048 bytes (UDF_DEFAULT_BLOCKSIZE)
> IOW both 1024 and 4096 specifications were requir
Hi all
This patch serial is for RK3399 MIPI DSI. The MIPI DSI controller of
RK3399 is almost the same as RK3288, except a little bit of difference
in phy clock controlling and port id selection register. These patches
add RK3399 support and the power domain support.
And these patches base on John
Hello,
On 01/19/2017 07:36 PM, Javier Martinez Canillas wrote:
> Commit 15f90ab57acc ("[media] exynos-gsc: Make driver functional when
> CONFIG_PM is unset") removed the implicit dependency that the driver
> had with CONFIG_PM, since it relied on the config option to be enabled.
>
> In order to w
On Thu, Jan 19, 2017 at 02:40:53PM -0800, Dmitry Torokhov wrote:
> Instead of manipulating capability bits directly, let's use
> input_set_capability() API.
>
> Signed-off-by: Dmitry Torokhov
> ---
> drivers/input/misc/pwm-beeper.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Rev
From: Douglas Anderson
Add the defines for the new buttons and switches connected to the CrosEC.
Signed-off-by: Douglas Anderson
Signed-off-by: Enric Balletbo i Serra
---
include/linux/mfd/cros_ec_commands.h | 73 +++-
1 file changed, 71 insertions(+), 2 deleti
From: Douglas Anderson
On some newer boards using mkbp we're hooking up non-matrix buttons and
switches to the EC but NOT to the main application processor.
Let's add kernel support to handle this. Rather than creating a whole
new input driver, we'll continue to use cros_ec_keyb and just report
On Thu, Jan 19, 2017 at 02:40:54PM -0800, Dmitry Torokhov wrote:
> Usually userspace sends SND_BELL and SND_TONE events, and by the time
> pwm_beeper_suspend() runs userpsace is already frozen, but theoretically
> in-kernel users may send these events too, and that may cause
> pwm_beeper_event() sc
On Thu, Jan 19, 2017 at 02:40:55PM -0800, Dmitry Torokhov wrote:
> From: David Lechner
>
> This suppress printing an error message when pwm_get returns -EPROBE_DEFER.
> Otherwise you get a bunch of noise in the kernel log.
>
> Signed-off-by: David Lechner
> Patchwork-Id: 9499915
> Signed-off-by
The dw-mipi-dsi of rk3399 is almost the same as rk3288, the rk3399 has
additional phy config clock.
Signed-off-by: Chris Zhong
Acked-by: Rob Herring
---
Changes in v3: None
.../devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt | 4 +++-
1 file changed, 3 insertions(+), 1 delet
The vopb/vopl switch register of RK3399 mipi is different from RK3288,
the default setting for mipi dsi mode is different too, so add a
of_device_id structure to distinguish them, and make sure set the
correct mode before mipi phy init.
Signed-off-by: Chris Zhong
Signed-off-by: Mark Yao
---
Cha
On Thu, Jan 19, 2017 at 02:40:52PM -0800, Dmitry Torokhov wrote:
> Use of managed resources (devm) simplifies error handling and tear down
> of the driver.
>
> Signed-off-by: Dmitry Torokhov
> ---
> drivers/input/misc/pwm-beeper.c | 44
> ++---
> 1 file chang
Le 2017-01-20 09:40, Linus Walleij a écrit :
On Thu, Jan 19, 2017 at 12:19 PM, Paul Cercueil
wrote:
The problem with pinctrl and PWM, is that the pinctrl API works by
"states". A default state, sleep state, and basically any custom state
that the devicetree provides. This works well until y
The MIPI DSI do not need check the validity of resolution, the max
resolution should depend VOP. Hence, remove rk3288_mipi_dsi_mode_valid
here.
Signed-off-by: Chris Zhong
---
Changes in v3: None
drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 39 --
1 file changed, 39
On Thu, Jan 19, 2017 at 02:40:56PM -0800, Dmitry Torokhov wrote:
[...]
> diff --git a/drivers/input/misc/pwm-beeper.c b/drivers/input/misc/pwm-beeper.c
> index 9964c46468d3..7b213e0ab06c 100644
> --- a/drivers/input/misc/pwm-beeper.c
> +++ b/drivers/input/misc/pwm-beeper.c
> @@ -14,6 +14,7 @@
> *
I'm announcing the release of the 4.9.5 kernel.
All users of the 4.9 kernel series must upgrade.
The updated 4.9.y git tree can be found at:
git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git
linux-4.9.y
and can be browsed at the normal kernel.org git web browser:
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