On Tue, Jan 10, 2017 at 10:57 AM, Dan Streetman wrote:
> On Mon, Jan 9, 2017 at 2:30 PM, Stefano Stabellini
> wrote:
>> On Mon, 9 Jan 2017, Konrad Rzeszutek Wilk wrote:
>>> On Mon, Jan 09, 2017 at 10:42:41AM -0500, Dan Streetman wrote:
>>> > On Mon, Jan 9, 2017 at 9:59 AM, Boris Ostrovsky
>>> >
On Tue, Jan 10, 2017 at 04:27:29PM +0100, Arnd Bergmann wrote:
> The newly added qedi driver links against the UIO framework, but can
> be built without that:
>
> drivers/scsi/qedi/qedi_main.o: In function `qedi_free_uio':
> qedi_main.c:(.text.qedi_free_uio+0x78): undefined reference to
> `uio_un
Hi,
On Mon, Jan 9, 2017 at 10:15 PM, Xing Zheng wrote:
> The structure rockchip_clk_provider needs to refer the GRF regmap
> in somewhere, if the CRU node has not "rockchip,grf" property,
> calling syscon_regmap_lookup_by_phandle will return an invalid GRF
> regmap, and the MUXGRF type clock will
Add DT binding for devantech,srf08
Add vendor devantech to vendor list
Signed-off-by: Andreas Klinger
---
Documentation/devicetree/bindings/i2c/trivial-devices.txt | 1 +
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
2 files changed, 2 insertions(+)
diff --git a/Documentation
On Tue, Jan 10, 2017 at 02:38:30PM -0300, Javier Martinez Canillas wrote:
> This patch fixes the following DTC warning about a mismatch
> between a device node reg property and its unit name:
>
> Node /soc has a reg or ranges property, but no unit name
>
> Signed-off-by: Javier Martinez Canillas
This patch series adds IIO driver support for srf08 ultrasonic ranger
devices.
The first patch add a trivial device tree binding for the device together
with a new vendor devantech.
The second patch is the IIO driver which in turn is using I2C to talk to
the device.
Documentation about the senso
Hi Christoffer,
thanks for the review!
On Mon, Jan 9, 2017 at 7:13 AM, Christoffer Dall
wrote:
> On Mon, Dec 26, 2016 at 12:12:05PM -0500, Jintack Lim wrote:
>> Set a background timer for the EL1 physical timer emulation while VMs are
>> running, so that VMs get interrupts for the physical timer
This is the IIO driver for devantech srf08 ultrasonic ranger which can be
used to measure the distances to an object.
The sensor supports I2C with some registers.
Supported Features include:
- read the distance in ranging mode in centimeters
- output of the driver is directly the read value
- tog
Declare usb_gadget_ops structures as const as they are only stored in
the ops field of a usb_gadget structure. This field is of type const, so
usb_gadget_ops structures having this property can be declared const
too.
Done using Coccinelle:
@r1 disable optional_qualifier@
identifier i;
position p;
PC/104 form factor devices serve a specific niche of embedded system
users. Since PC/104 devices and hardware are typically used by just a
subset of Linux users, it would be appropriate to filter PC/104 related
Kconfig options for those uninterested.
This patchset introduces the PC104 Kconfig opti
On Tue, Jan 10, 2017 at 02:38:32PM -0300, Javier Martinez Canillas wrote:
> The "samsung,exynos5433-mipi-video-phy" and "samsung,exynos5250-dwusb3"
> DT bindings don't specify a reg property for these nodes, so having a
> unit name leads to the following DTC warnings:
>
> Node /soc/video-phy@105c0
PC/104 form factor devices serve a specific niche of embedded system
users; most Linux users will not have PC/104 form factor devices. This
patch introduces the PC104 Kconfig option, which should be used to
filter PC/104 specific device drivers and options, so that only those
users interested in PC
PC/104 drivers should be hidden on machines which do not support PC/104
devices. This patch adds the PC104 Kconfig option as a dependency for
the relevant PC/104 device driver Kconfig options.
Cc: Linus Walleij
Cc: Alexandre Courbot
Signed-off-by: William Breathitt Gray
---
drivers/gpio/Kconfi
On Tue, Jan 10, 2017 at 11:15:05AM -0500, Tejun Heo wrote:
> On Tue, Jan 10, 2017 at 12:02:12AM +, Parav Pandit wrote:
> > Patchset is compiled and tested against below Tejun's cgroup tree
> > using cgroup v1 and v2 mode.
> > URL: git://git.kernel.org/pub/scm/linux/kernel/git/tj/cgroup.git
> >
PC/104 drivers should be hidden on machines which do not support PC/104
devices. This patch adds the PC104 Kconfig option as a dependency for
the relevant PC/104 device driver Kconfig options.
Cc: Jonathan Cameron
Cc: Hartmut Knaack
Cc: Lars-Peter Clausen
Cc: Peter Meerwald-Stadler
Signed-off-
On Fri, Dec 16, 2016 at 09:05:00AM +0100, Luis R. Rodriguez wrote:
> On Thu, Dec 15, 2016 at 01:46:25PM +0100, Petr Mladek wrote:
> > On Thu 2016-12-08 22:08:59, Luis R. Rodriguez wrote:
> > > On Thu, Dec 08, 2016 at 12:29:42PM -0800, Kees Cook wrote:
> > > > On Thu, Dec 8, 2016 at 11:48 AM, Luis R
On Sat, Jan 07, 2017 at 05:11:38PM +0100, Wim Osterholt wrote:
> On Thu, Dec 29, 2016 at 05:53:58PM +0100, Wim Osterholt wrote:
>
> L.S.,
> >
> > after appearance of kernel-4.10-rc1 two days ago...
>
> A quickly following release of 4.10-rc2 made sure that lirc_dev was loaded
> together with ser
On 01/03/2017 03:37 PM, Andy Shevchenko wrote:
On Mon, Jan 2, 2017 at 11:07 PM, Steve Longerbeam wrote:
Add optional reset-gpios pin control. If present, de-assert the
specified reset gpio pin to bring the chip out of reset.
--- a/drivers/gpio/gpio-pca953x.c
+++ b/drivers/gpio/gpio-pca953x.c
On Tue, Jan 10, 2017 at 11:37:24AM -0700, Shuah Khan wrote:
> On 01/10/2017 11:23 AM, Bartlomiej Zolnierkiewicz wrote:
> > I also think that regardless of what is decided on making susp_clk
> > non-optional for some Exynos SoCs we should probably remove the debug
> > message as it doesn't bring use
On Tue, Jan 10, 2017 at 9:56 AM, Dave Jiang wrote:
> CONFIG_RANDOMIZE_BASE relocates the kernel to a random base address.
> However it does not take into account the memmap= parameter passed in from
> the kernel cmdline. This results in the kernel sometimes being put in
> the middle of memmap. Tea
On Tue, 10 Jan 2017, Dan Streetman wrote:
> On Tue, Jan 10, 2017 at 10:57 AM, Dan Streetman wrote:
> > On Mon, Jan 9, 2017 at 2:30 PM, Stefano Stabellini
> > wrote:
> >> On Mon, 9 Jan 2017, Konrad Rzeszutek Wilk wrote:
> >>> On Mon, Jan 09, 2017 at 10:42:41AM -0500, Dan Streetman wrote:
> >>> > O
On 01/07/2017 08:49 AM, Boris Brezillon wrote:
> On Sat, 7 Jan 2017 00:53:24 +0100
> Marek Vasut wrote:
>
>> On 01/04/2017 06:08 PM, Boris Brezillon wrote:
>>> On Wed, 4 Jan 2017 16:14:07 +0100
>>> Marek Vasut wrote:
>>>
On 01/03/2017 02:01 PM, Boris Brezillon wrote:
> Move Samsung
Hello Krzysztof,
On 01/10/2017 03:51 PM, Krzysztof Kozlowski wrote:
[snip]
>>
>> -usbdrd30: usb@1540 {
>> +usbdrd30: usb-0 {
>
> How about "usbdrd" instead of "usb-0"? It would be still quite a generic
> description of a class.
>
>> compatib
On 01/04/2017 02:31 AM, Andy Shevchenko wrote:
+ reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
+GPIOD_OUT_LOW);
Shouldn't be _optional_exclusive?
See this recent discussion https://patchwork.ozlabs.org/patch/7060
On 11/21/2016 01:45 PM, Boris Brezillon wrote:
> Some raw NAND function names conflict with names defined in nand.h.
> Prefix all those functions with nandc (for nand chip) instead of nand so
> we can include nand.h from rawnand.h
>
> Signed-off-by: Boris Brezillon
Nit, nand and nandc is quite c
On 1/5/2017 2:20 PM, Jason Gunthorpe wrote:
I'd rather give up features (eg policy sessions, if necessary) for the
unpriv fd than give up security of the unpriv fd.
Please don't give up policy. Nearly every use case of that we think of
for TPM 2.0 uses policy sessions.
E.g.,
In 1.2, PCR a
On 11/21/2016 01:45 PM, Boris Brezillon wrote:
> Create the rawnand_device struct inheriting from nand_device and make
> nand_chip inherit from this struct.
>
> The rawnand_device object should be used for the new
> rawnand-device/rawnand-controller model, and fields inside nand_chip
> should prog
On Mon, Jan 09, 2017 at 09:13:12PM +0800, Icenowy Zheng wrote:
>
> 2017年1月9日 下午7:01于 Maxime Ripard 写道：
> >
> > On Fri, Jan 06, 2017 at 06:48:31AM +0800, Icenowy Zheng wrote:
> > >
> > > 2017年1月6日 06:04于 Maxime Ripard 写道：
> > > >
> > > > On Tue, Dec 27, 2016 at 12:25:15AM +0800, Icenowy Zheng w
On Tue, Jan 10, 2017 at 12:21 AM, Pengfei Wang wrote:
>
> 在 2017年1月10日，上午1:05，Vaishali Thakkar 写道：
>
> On Tuesday 27 December 2016 11:51 PM, Julia Lawall wrote:
>
> I totally dropped the ball on this. Many thanks to Vaishali for
> resurrecting it.
>
> Some changes are suggested below.
>
> On Tue
Hi,
On Tue, Jan 10, 2017 at 01:01:20AM +0800, Chen-Yu Tsai wrote:
> On Tue, Jan 10, 2017 at 12:46 AM, Maxime Ripard
> wrote:
> > All the controllers can have a maximum frequency of 200MHz.
> >
> > Since older SoCs cannot go that high, we cannot change the default maximum
> > frequency, but fortun
On 10 January 2017 at 19:00, Andy Lutomirski wrote:
> On Tue, Jan 10, 2017 at 9:30 AM, Ard Biesheuvel
> wrote:
>> On 10 January 2017 at 14:33, Herbert Xu wrote:
>>> I recently applied the patch
>>>
>>> https://patchwork.kernel.org/patch/9468391/
>>>
>>> and ended up with a boot crash whe
On Tue, Jan 10, 2017 at 12:40 AM, Vaishali Thakkar
wrote:
> On Tuesday 10 January 2017 01:51 PM, Pengfei Wang wrote:
>>
>>
>>> 在 2017年1月10日，上午1:05，Vaishali Thakkar 写道：
>>>
>>> On Tuesday 27 December 2016 11:51 PM, Julia Lawall wrote:
I totally dropped the ball on this. Many thanks to V
> diff --git a/drivers/xen/xenbus/xenbus_dev_frontend.c
> b/drivers/xen/xenbus/xenbus_dev_frontend.c
> index e4b9847..4d343ee 100644
> --- a/drivers/xen/xenbus/xenbus_dev_frontend.c
> +++ b/drivers/xen/xenbus/xenbus_dev_frontend.c
>
LGTM.
-boris
On 01/04/2017 02:25 AM, Vladimir Zapolskiy wrote:
Hi Steve,
On 01/02/2017 11:07 PM, Steve Longerbeam wrote:
Add optional reset-gpios pin control. If present, de-assert the
specified reset gpio pin to bring the chip out of reset.
Signed-off-by: Steve Longerbeam
Cc: Linus Walleij
Cc: Alexand
On Tue, Jan 10, 2017 at 09:30:21PM +0300, Konstantin Khlebnikov wrote:
> If overlay was mounted by root then quota set for upper layer does not work
> because overlay now always use mounter's credentials for operations.
> Also overlay might deplete reserved space and inodes in ext4.
>
> This patch
On 01/10/2017 11:59 AM, Krzysztof Kozlowski wrote:
> On Tue, Jan 10, 2017 at 11:37:24AM -0700, Shuah Khan wrote:
>> On 01/10/2017 11:23 AM, Bartlomiej Zolnierkiewicz wrote:
>>> I also think that regardless of what is decided on making susp_clk
>>> non-optional for some Exynos SoCs we should probabl
On 01/04/2017 05:22 AM, Rob Herring wrote:
On Mon, Jan 02, 2017 at 01:07:51PM -0800, Steve Longerbeam wrote:
Add optional reset-gpios pin control. If present, de-assert the
specified reset gpio pin to bring the chip out of reset.
Signed-off-by: Steve Longerbeam
Cc: Linus Walleij
Cc: Alexand
* Tony Lindgren [170110 07:32]:
> * Geert Uytterhoeven [170110 06:09]:
> > Hi Tony,
> >
> > On Tue, Dec 27, 2016 at 6:19 PM, Tony Lindgren wrote:
> > > Having the pin control framework call pin controller functions
> > > before it's probe has finished is not nice as the pin controller
> > > dev
On Fri, Dec 16, 2016 at 09:39:56AM +0100, Luis R. Rodriguez wrote:
> On Wed, Dec 14, 2016 at 04:38:27PM +0100, Petr Mladek wrote:
> > On Thu 2016-12-08 11:48:14, Luis R. Rodriguez wrote:
> > > diff --git a/init/Kconfig b/init/Kconfig
> > > index 271692a352f1..da2c25746937 100644
> > > --- a/init/Kc
On Tue, Jan 10, 2017 at 10:28 AM, Julia Lawall wrote:
>> +./drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c:2159
>> +./drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c:2257
>> +./drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c:2302
>> +./drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c:2342
>> +./dr
On Tue, Jan 10, 2017 at 11:16 AM, Ard Biesheuvel
wrote:
> On 10 January 2017 at 19:00, Andy Lutomirski wrote:
>> On Tue, Jan 10, 2017 at 9:30 AM, Ard Biesheuvel
>> wrote:
>>> On 10 January 2017 at 14:33, Herbert Xu wrote:
I recently applied the patch
https://patchwork.ker
On Tue, Jan 10, 2017 at 11:23 AM, Kees Cook wrote:
> On Tue, Jan 10, 2017 at 10:28 AM, Julia Lawall wrote:
>>> +./drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c:2159
>>> +./drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c:2257
>>> +./drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c:2302
>>> +./dri
Hi stan,
>-Original Message-
>From: linux-arm-msm-ow...@vger.kernel.org
>[mailto:linux-arm-msm-ow...@vger.kernel.org] On Behalf Of Stanimir Varbanov
>Sent: Tuesday, January 10, 2017 10:14 PM
>To: Rajendra Nayak ; sb...@codeaurora.org;
>mturque...@baylibre.com
>Cc: linux-...@vger.kernel.o
On Tue, 10 Jan 2017, Kees Cook wrote:
> On Tue, Jan 10, 2017 at 10:28 AM, Julia Lawall wrote:
> >> +./drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c:2159
> >> +./drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c:2257
> >> +./drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c:2302
> >> +./drivers/ne
From: Jeff Westfahl
If implemented, 'max_bad_blocks' returns the maximum number of bad
blocks to reserve for a MTD. An implementation for NAND is coming soon.
Signed-off-by: Jeff Westfahl
Signed-off-by: Zach Brown
Acked-by: Boris Brezillon
Acked-by: Brian Norris
---
drivers/mtd/mtdpart.c
The fields max_bb_per_die and blocks_per_die are useful determining the
number of bad blocks a MTD needs to allocate. How they are set will
depend on if the chip is ONFI, JEDEC or a full-id entry in the nand_ids
table.
Signed-off-by: Zach Brown
Acked-by: Boris Brezillon
Acked-by: Brian Norris
-
Implement the new mtd function 'max_bad_blocks'. Using the chip's
max_bb_per_die and blocks_per_die fields to determine the maximum bad
blocks to reserve for an MTD.
Signed-off-by: Jeff Westfahl
Signed-off-by: Zach Brown
Acked-by: Boris Brezillon
Acked-by: Brian Norris
---
drivers/mtd/nand/na
ONFI compliant chips contain the values for the max_bb_per_die and
blocks_per_die fields in the parameter page. When the ONFI paged is
retrieved/parsed the chip's fields are set by the corresponding fields
in the param page.
Signed-off-by: Zach Brown
Acked-by: Boris Brezillon
Acked-by: Brian Nor
From: Jeff Westfahl
If the user has not set max_beb_per1024 using either the cmdline or
Kconfig options for doing so, use the MTD function 'max_bad_blocks' to
compute the UBI bad_peb_limit.
Signed-off-by: Jeff Westfahl
Signed-off-by: Zach Brown
Acked-by: Boris Brezillon
---
drivers/mtd/ubi/b
For ONFI-compliant NAND devices, the ONFI parameters report the maximum number
of bad blocks per LUN that will be encountered over the lifetime of the device,
so we can use that information to get a more accurate (and smaller) value for
the UBI bad PEB limit.
The ONFI parameter "maxiumum number of
Detect MBA feature if CPUID.(EAX=10H, ECX=0):EBX.L2[bit 3] = 1.
Add supporting data structures to detect feature details which is done
in later patch using CPUID with EAX=10H, ECX= 3.
Signed-off-by: Vikas Shivappa
---
arch/x86/include/asm/cpufeatures.h | 2 ++
arch/x86/include/asm/intel_rdt.h
Memory b/w allocation is part of Intel RDT(resource director technology)
which lets user control the amount of memory b/w (L2 external b/w) per
thread. This is done programming MSR interfaces like cache allocation
technology and other RDT features.
This patch adds documentation for Memory b/w alloc
On Tue, Jan 10, 2017 at 12:03:00PM -0500, Jintack Lim wrote:
> On Mon, Jan 9, 2017 at 7:02 AM, Christoffer Dall
> wrote:
> > On Mon, Dec 26, 2016 at 12:12:02PM -0500, Jintack Lim wrote:
> >> Initialize the emulated EL1 physical timer with the default irq number.
> >>
> >> Signed-off-by: Jintack Li
Add the files in info directory for MBA.
The files in the info directory are as follows :
- num_closids: max number of closids for MBA which represents the max
class of service user can configure.
- max_thrtl_by: the max throttle by values.
Throttle by can have a linear scale and non linear sca
This patch does some changes to get ready to handle more resources like
Memory b/w allocation(MBA).
-Update the control registers only when user changes the controls(cbm for
Cache resources and Mem b/w for memory). Hence not sending IPIs on all
domains when user updates the control vals.
-Introduc
The MBA feature details are obtained via executing CPUID with EAX=10H
ECX= 3 and initialize the MBA structures from this info.
Add a new rdt resource 'MBA' to the global list of RDT resources. Add
extensions to the generic RDT resource structure to store the MBA
specific feature details. Paramet
Add optional reset-gpios pin control. If present, de-assert the
specified reset gpio pin to bring the chip out of reset.
Signed-off-by: Steve Longerbeam
Cc: Linus Walleij
Cc: Alexandre Courbot
Cc: linux-g...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
--
v2:
- Specify that reset signal t
On 1/9/2017 6:16 PM, Jarkko Sakkinen wrote:
Here's my cuts for the kernel:
- Kernel virtualizes handle areas. It's mechanical.
- Kernel does not virtualize bodies. It's not mechanical.
- At least the first version of the RM will not do other than session
isolation for sessions.
Is it correc
Add support to update the MBA throttle_by values for the domains.
The MBA throttle_by values are specified for each domain which is L3
cache. The schemata string is parsed and validated for the correct
throttle_by values.
The throttle_by granularity is 100-max_throttle_by if scale is linear
and 2^
During rmdir only reset the ctrl values for the rdtgroup's closid. This
is done so that that next time when the closid is reused they dont
reflect old values.
Remove the closid update during cpuonline in cqm as its
already in the CAT code. Since both cqm and CAT want the rmid and closid
to be zero
In version 2:
- Specify that reset signal to PCA953x chip is active low, in
binding doc.
- reorder includes in gpio-pca953x.c.
- remove dev_err() on devm_gpiod_get_optional() error return.
Steve Longerbeam (1):
gpio: pca953x: Add optional reset gpio control
Documentation/devicetree/binding
This patch just generalizes the naming for RDT so that we can get ready
to apply other resource controls like MBA.
RDT resource cbm values are named to ctrl_val representing generic
control values which will hold both cbm(cache bit mask) and memory b/w
throttle values. max_cbm is updated to no_ctr
Memory b/w allocation(MBA) is part of the Intel Resource Director
Technology (RDT). RDT helps monitor and share processor shared
resources. MBA helps enforce a limit on the memory b/w, threads can use
when they are scheduled. OS does the enforcement using MSR(model
specific register) interface and
On Tue, 10 Jan 2017, Oleg Nesterov wrote:
Well, speaking of naming, rcuwait_trywake() doesn't look good to me,
rcuwait_wake_up() looks better, "try" is misleading imo. But this is
cosmetic/subjective too.
I actually added the 'try' on second thought -- in that for the particular
pcpu-rwsem use
On Tue, Jan 10, 2017 at 01:47:49PM -0500, Jintack Lim wrote:
> Hi Christoffer,
>
> thanks for the review!
>
> On Mon, Jan 9, 2017 at 7:13 AM, Christoffer Dall
> wrote:
> > On Mon, Dec 26, 2016 at 12:12:05PM -0500, Jintack Lim wrote:
> >> Set a background timer for the EL1 physical timer emulatio
On Tue, Jan 10, 2017 at 12:36:36PM -0500, Jintack Lim wrote:
> On Mon, Jan 9, 2017 at 7:16 AM, Christoffer Dall
> wrote:
> > On Mon, Dec 26, 2016 at 12:12:06PM -0500, Jintack Lim wrote:
> >> Emulate read and write operations to CNTP_TVAL, CNTP_CVAL and CNTP_CTL.
> >> Now the VM is able to use the
On Tue, Jan 10, 2017 at 9:30 AM, Ard Biesheuvel
wrote:
> On 10 January 2017 at 14:33, Herbert Xu wrote:
>> I recently applied the patch
>>
>> https://patchwork.kernel.org/patch/9468391/
>>
>> and ended up with a boot crash when it tried to run the x86 chacha20
>> code. It turned out that
On Tue, Jan 10, 2017 at 05:15:57PM +0100, Arnd Bergmann wrote:
> On Monday, November 28, 2016 2:24:00 PM CET Ross Zwisler wrote:
> > On Mon, Nov 28, 2016 at 10:12:17PM +0100, Arnd Bergmann wrote:
> > > Without the get_block based I/O, we get warnings when CONFIG_FS_IOMAP
> > > is disabled:
> > >
>
Am Dienstag, 10. Januar 2017, 10:45:48 schrieb Doug Anderson:
> Hi,
>
> On Mon, Jan 9, 2017 at 10:15 PM, Xing Zheng
wrote:
> > The structure rockchip_clk_provider needs to refer the GRF regmap
> > in somewhere, if the CRU node has not "rockchip,grf" property,
> > calling syscon_regmap_lookup_by_
Declare fsnotify_ops structures as const as they are only passed as an
argument to the function fsnotify_alloc_group. This argument is of type
const, so fsnotify_ops structures having the same property can be
declared const too.
Done using Coccinelle:
@r1 disable optional_qualifier@
identifier i;
On 01/10/2017 08:16 AM, Leonard Crestez wrote:
> Hello,
>
> I have some trouble with this patch.
>
> It seems the intention is to allow CMA to be placed in highmem. If the CMA
> area is
> larger than highmem and no alloc-ranges is specified (just a size) it is
> possible
> to end up allocating
In the current arm-smmu-v3 driver, all smmus that support 2-level
stream tables are being forced to use them. This is suboptimal for
smmus that support fewer stream id bits than would fill in a single
second level table. This patch limits the use of 2-level tables to
smmus that both support the fea
On Tue, Jan 03, 2017 at 11:16:25PM +0800, Icenowy Zheng wrote:
> Allwinner V3s is a low-end single-core Cortex-A7 SoC, with 64MB
> integrated DRAM, and several peripherals.
>
> Signed-off-by: Icenowy Zheng
> ---
> Documentation/arm/sunxi/README | 4
> arch/arm/mach-sunxi/sunxi.c| 1 +
>
On Fri, 6 Jan 2017 10:26:32 -0600
Rob Herring wrote:
> Add a common binding for describing serial/UART attached devices. Common
> examples are Bluetooth, WiFi, NFC and GPS devices.
>
> Serial attached devices are represented as child nodes of a UART node.
> This may need to be extended for more
Hello Krzysztof,
On 01/10/2017 03:47 PM, Krzysztof Kozlowski wrote:
> On Tue, Jan 10, 2017 at 02:38:30PM -0300, Javier Martinez Canillas wrote:
>> This patch fixes the following DTC warning about a mismatch
>> between a device node reg property and its unit name:
>>
>> Node /soc has a reg or range
Hi Doug,
Am Dienstag, 10. Januar 2017, 20:46:12 schrieb Heiko Stübner:
> Am Dienstag, 10. Januar 2017, 10:45:48 schrieb Doug Anderson:
> > Hi,
> >
> > On Mon, Jan 9, 2017 at 10:15 PM, Xing Zheng
>
> wrote:
> > > The structure rockchip_clk_provider needs to refer the GRF regmap
> > > in somewher
Hi
On 01/10/2017 06:18 AM, Roger Quadros wrote:
> Hi Linus,
>
> I see the following lockdep warning on v4.10-rc3 on TI's dra7-evm.
>
> reverting (d245b3f9bd3 "gpio: simplify adding threaded interrupts") seems to
> fix it.
>
>
> [2.358337] [ cut here ]
> [2.3631
On Tue, 10 Jan 2017, Josh Poimboeuf wrote:
> On Tue, Jan 10, 2017 at 11:14:51AM +0100, Miroslav Benes wrote:
> > On Mon, 9 Jan 2017, Josh Poimboeuf wrote:
> > > Signed-off-by: Josh Poimboeuf
> > > ---
> > > arch/x86/include/asm/stacktrace.h | 5 +
> > > arch/x86/include/asm/switch_to.h | 1
On Thu, Dec 15, 2016 at 01:57:48PM +0100, Petr Mladek wrote:
> On Thu 2016-12-08 11:48:50, Luis R. Rodriguez wrote:
> > Only decrement *iff* we're possitive. Warn if we've hit
> > a situation where the counter is already 0 after we're done
> > with a modprobe call, this would tell us we have an una
On 10 January 2017 at 19:22, Andy Lutomirski wrote:
> On Tue, Jan 10, 2017 at 11:16 AM, Ard Biesheuvel
> wrote:
>> On 10 January 2017 at 19:00, Andy Lutomirski wrote:
>>> On Tue, Jan 10, 2017 at 9:30 AM, Ard Biesheuvel
>>> wrote:
On 10 January 2017 at 14:33, Herbert Xu
wrote:
>
Bartlomiej,
>> How is polling implemented in libata? Sleeping for something
>> approximating the average seek latency shouldn't hurt but spinning
>> wont be acceptable for a low performance single CPU architecture like
>> the Falcon.
>
> You can find actual implementation in libata-sff.c.
>
> Ple
On Tue, Jan 10, 2017 at 9:29 PM, Steve Longerbeam wrote:
> Add optional reset-gpios pin control. If present, de-assert the
> specified reset gpio pin to bring the chip out of reset.
>
> Signed-off-by: Steve Longerbeam
> Cc: Linus Walleij
> Cc: Alexandre Courbot
> Cc: linux-g...@vger.kernel.org
On Tue, Jan 10, 2017 at 11:30 AM, Julia Lawall wrote:
>
>
> On Tue, 10 Jan 2017, Kees Cook wrote:
>
>> On Tue, Jan 10, 2017 at 10:28 AM, Julia Lawall wrote:
>> >> +./drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c:2159
>> >> +./drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c:2257
>> >> +./drivers
On Tue, Jan 10, 2017 at 01:16:35AM +0200, Jarkko Sakkinen wrote:
> On Wed, Jan 04, 2017 at 10:12:41AM -0600, Dr. Greg Wettstein wrote:
> > The kernel needs a resource manager. Everyone needs to think VERY
> > hard and VERY, VERY carefully about what gets put into the kernel. In
> > making a decis
First off my sincere apologies for being so horribly slow with this :/
I did spend some time thinking about this thing during the Christmas
holidays, but have not yet managed to write a coherent text on it like I
promised I'd do.
That said; I think I now mostly understand what and why.
But I st
On Tue, Jan 10, 2017 at 2:40 PM, Christoffer Dall
wrote:
> On Tue, Jan 10, 2017 at 12:36:36PM -0500, Jintack Lim wrote:
>> On Mon, Jan 9, 2017 at 7:16 AM, Christoffer Dall
>> wrote:
>> > On Mon, Dec 26, 2016 at 12:12:06PM -0500, Jintack Lim wrote:
>> >> Emulate read and write operations to CNTP_T
Utilize the ability to pass board specific MDIO bus information towards a
particular MDIO device thus allowing us to provide the per-port switch layout
to the Marvell 88E6XXX switch driver.
Since we would end-up with conflicting registration paths, do not register the
"dsa" platform device anymore
Hi all,
This is not exactly new, and was sent before, although back then, I did not
have an user of the pre-declared MDIO board information, but now we do. Note
that I have additional changes queued up to have b53 register platform data for
MIPS bcm47xx and bcm63xx.
Yes I know that we should have
Make it clear that these functions take a device_node structure pointer
Signed-off-by: Florian Fainelli
---
net/dsa/dsa2.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/net/dsa/dsa2.c b/net/dsa/dsa2.c
index 91141ac6ec18..9089b3b1d7f5 100644
--- a/net/dsa/ds
In preparation for allowing dsa_register_switch() to be supplied with
device/platform data, pass down a struct device pointer instead of a
struct device_node.
Signed-off-by: Florian Fainelli
---
drivers/net/dsa/b53/b53_common.c | 2 +-
drivers/net/dsa/mv88e6xxx/chip.c | 11 ++-
drivers/
We are going to need this in net/dsa/dsa2.c as well, so make it
avaialable.
Signed-off-by: Florian Fainelli
---
include/net/dsa.h | 1 +
net/dsa/dsa.c | 3 ++-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/net/dsa.h b/include/net/dsa.h
index 16a502a6c26a..b9394379affb
Allow drivers to use the new DSA API with platform data. Most of the
code in net/dsa/dsa2.c does not rely so much on device_nodes and can get
the same information from platform_data instead.
Signed-off-by: Florian Fainelli
---
include/net/dsa.h | 1 +
net/dsa/dsa2.c| 96
Allow board support code to collect pre-declarations for MDIO devices by
registering them with mdiobus_register_board_info(). SPI and I2C buses
have a similar feature, we were missing this for MDIO devices, but this
is particularly useful for e.g: MDIO-connected switches which need to
provide their
In preparation for allowing platform data, and therefore no valid
device_node pointer, make most DSA functions takes a pointer to a
dsa_port structure whenever possible. While at it, introduce a
dsa_port_is_valid() helper function which checks whether port->dn is
NULL or not at the moment.
Signed-
Move the assignment of ports in _dsa_register_switch() closer to where
it is checked, no functional change. Re-order declarations to be
preserve the inverted christmas tree style.
Signed-off-by: Florian Fainelli
---
net/dsa/dsa2.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --g
On Tue, 2017-01-10 at 16:27 +0100, Arnd Bergmann wrote:
> The newly added qedi driver links against the UIO framework, but can
> be built without that:
>
> drivers/scsi/qedi/qedi_main.o: In function `qedi_free_uio':
> qedi_main.c:(.text.qedi_free_uio+0x78): undefined reference to
> `uio_unregiste
On Tue, Jan 10, 2017 at 6:14 AM, Mark Rutland wrote:
> On Tue, Jan 10, 2017 at 02:24:58AM -0800, David Carrillo-Cisneros wrote:
>> Add a rb-tree that indexes inactive events by {CPU/cgroup,flexible,stamp}.
>>
>> The original idea by Peter Z. was to sort task events in an rb-tree using
>> {pmu,cpu,
On Tue, Jan 10, 2017 at 2:34 PM, Christoffer Dall
wrote:
> On Tue, Jan 10, 2017 at 12:03:00PM -0500, Jintack Lim wrote:
>> On Mon, Jan 9, 2017 at 7:02 AM, Christoffer Dall
>> wrote:
>> > On Mon, Dec 26, 2016 at 12:12:02PM -0500, Jintack Lim wrote:
>> >> Initialize the emulated EL1 physical timer
On Tue, Jan 03, 2017 at 11:25:34PM +0800, Icenowy Zheng wrote:
> Lichee Pi Zero features a USB OTG port.
>
> Add support for it.
>
> Note: in order to use the Host mode, the board must be powered via the
> +5V and GND pins.
>
> Signed-off-by: Icenowy Zheng
> ---
> arch/arm/boot/dts/sun8i-v3s-l
On 01/09/2017 10:27 PM, Chandan Rajendra wrote:
> On Monday, January 09, 2017 04:42:58 PM Jeff Moyer wrote:
>> Commit 20ce44d545844 ("do_direct_IO: Use inode->i_blkbits to compute
>> block count to be cleaned") introduced a regression: if the block size
>> of the block device is changed while a dir
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