All the other occurrence refer "uapi/asm-generic/*.h" directly instead
of "uapi/asm/*.h" in tools/include except mman.h. Without this patch,
the following build failure is seen.
In file included from util/event.c:2:0:
tools/include/uapi/linux/mman.h:4:27: fatal error: uapi/asm/mman.h: No such
f
Currently, perf uses pinned_groups and flexible_groups for sched in/out.
We can do better because:
- sched out only cares about the ACTIVE events, this is usually a small
set of events.
- There can be many events in these lists thate are no relevant to
the scheduler (e.g. other CPU/cgroups,
During sched in, only events that match the current CPU and cgroup can
be scheduled in. These events should be added to the PMU in increasing
timestamp order to guaratee fairness in the event rotation.
In task contexts, events with no CPU affinity or with affinity to the
current CPU are eligible.
Following the discussion in:
https://patchwork.kernel.org/patch/9420035/
This is is an early version of a series of perf context switches
optimizations.
The main idea is to create and maintain a list of inactive events sorted
by timestamp, and a rb-tree index to index it. The rb-tree's key are
{c
Hi,
Às 4:41 PM de 1/9/2017, Murali Karicheri escreveu:
> On 01/04/2017 02:32 PM, Murali Karicheri wrote:
>> Recent fixes for iATU unroll support introduced a bug that causes
>> asynchronous external abort in Keystone PCIe h/w which doesn't have
>> ATU port and the corresponding register. So the ch
Add a rb-tree that indexes inactive events by {CPU/cgroup,flexible,stamp}.
The original idea by Peter Z. was to sort task events in an rb-tree using
{pmu,cpu,timestamp} as key.
Having the PMU as part of the key gets complicated for contexts that
share pmus (i.e. software context) because all even
A version of perf_iterate_ctx uses event_filter_match. Replace it with
the rb-tree.
Signed-off-by: David Carrillo-Cisneros
---
kernel/events/core.c | 64 ++--
1 file changed, 47 insertions(+), 17 deletions(-)
diff --git a/kernel/events/core.c b/ke
Avoid unnecessary rb-tree queries.
Signed-off-by: David Carrillo-Cisneros
---
include/linux/perf_event.h | 2 ++
kernel/events/core.c | 17 +++--
2 files changed, 17 insertions(+), 2 deletions(-)
diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
index fd32e
* Thomas Garnier wrote:
> Coming back on that after a bit more testing. The LTR instruction
> check if the busy bit is already set, if already set then it will just
> issue a #GP given a bad selector:
>
> [0.00] general protection fault: 0040 [#1] SMP
> ...
> [0.00] RIP: 0010:na
The sched in/out process updates timestamps and "rotates"
ctx->inactive_groups.
This changes the speed at which rotation happens. Before events will
rotate one event per interruption, now they will rotate q events each
timer interruption. Where q is the number of events added to the pmu per
sched
On Fri 06-01-17 21:53:49, Fabian Frederick wrote:
> defined in linux/compiler-gcc.h
>
> Signed-off-by: Fabian Frederick
Thanks. Applied.
Honza
> ---
> fs/udf/ecma_167.h | 98
> +++--
On Tue, Jan 10, 2017 at 10:22:41 +0100, Michal Hocko wrote:
> On Mon 09-01-17 23:02:10, Sami Farin wrote:
> > # sysctl vm.vfs_cache_pressure=-100
> >
> > kernel: vmscan: shrink_slab: super_cache_scan+0x0/0x1a0 negative objects to
> > delete nr=-6640827866535449472
> > kernel: vmscan: shrink_slab:
On Mon, Jan 09, 2017 at 09:42:22AM -0800, Dave Hansen wrote:
> On 01/09/2017 08:59 AM, Daniel Vetter wrote:
> > On Mon, Jan 9, 2017 at 5:50 PM, Dave Hansen wrote:
> >> On 01/09/2017 08:41 AM, Daniel Vetter wrote:
> >>> On Mon, Jan 9, 2017 at 2:40 PM, Dave Hansen wrote:
> Well, now I found wh
On Mon, 9 Jan 2017, Josh Poimboeuf wrote:
> On Mon, Jan 09, 2017 at 01:50:19PM +0100, Miroslav Benes wrote:
> > There is still one thing which I don't understand. Why __schedule()
> > (patched or the original) is not on the stack. The actual "sleep"
> > should happen in __switch_to_asm() which i
On Fri 06-01-17 21:53:50, Fabian Frederick wrote:
> Having struct kernel_long_ad laarr[EXTENT_MERGE_SIZE]
> in all function arguments could be understood as by-value parameter.
> Use kernel_long_ad pointer for functions depending on
> inode_getblk()
>
> Signed-off-by: Fabian Frederick
Yeah, it i
On Fri 06-01-17 21:53:51, Fabian Frederick wrote:
> Merge all bh free at one place.
>
> Signed-off-by: Fabian Frederick
Thanks. Applied.
Honza
> ---
> fs/udf/inode.c | 28 ++--
> 1 file changed, 10 inserti
On Fri 06-01-17 21:53:52, Fabian Frederick wrote:
> Signed-off-by: Fabian Frederick
Thanks. Applied.
Honza
> ---
> fs/udf/inode.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/fs/udf/inode.c b/fs/udf/
On Fri 06-01-17 21:53:53, Fabian Frederick wrote:
> loc & 0x02 is empty since first git version in 2005 in
> udf_add_extendedattr()
>
> Signed-off-by: Fabian Frederick
Thanks. Applied.
Honza
> ---
> fs/udf/misc.c | 2 --
> 1 file
On Fri 2017-01-06 14:07:34, Josh Poimboeuf wrote:
> On Fri, Dec 23, 2016 at 11:18:03AM +0100, Petr Mladek wrote:
> > On Fri 2016-12-23 10:24:35, Miroslav Benes wrote:
> > > > > > diff --git a/kernel/livepatch/patch.c b/kernel/livepatch/patch.c
> > > > > > index 5efa262..e79ebb5 100644
> > > > > > -
On Mon, Jan 09, 2017 at 11:50:59AM -0500, Sean Paul wrote:
> On Mon, Jan 9, 2017 at 9:31 AM, Peter Ujfalusi wrote:
> > Instead of scheduling the work to handle the initial delayed event, use 1s
> > delay.
> >
> > This delay should not be needed, but Optimus/nouveau will fail in a
> > mysterious wa
On 10/01/2017 at 10:52:56 +0100, Peter Rosin wrote :
> On 2017-01-10 10:29, Alexandre Belloni wrote:
> > Hi,
> >
> > This needs a commit message, please add one.
>
> There's not all that much to say, but ok, I'll add something.
>
It doesn't have to be long but it has to be present.
> > On 10/0
On Tue, Jan 10, 2017 at 11:40:59AM +0100, Daniel Vetter wrote:
> On Mon, Jan 09, 2017 at 11:50:59AM -0500, Sean Paul wrote:
> > On Mon, Jan 9, 2017 at 9:31 AM, Peter Ujfalusi
> > wrote:
> > > Instead of scheduling the work to handle the initial delayed event, use 1s
> > > delay.
> > >
> > > This
On Fri 06-01-17 21:53:54, Fabian Frederick wrote:
> Merge timespec affectations
>
> Signed-off-by: Fabian Frederick
Thanks. I've just renamed the function to udf_trim_crtime() which better
describes what it does.
Honza
> ---
> fs
In ca91cx42_slave_get function, the value pointed by vme_base pointer is
set through:
*vme_base = ioread32(bridge->base + CA91CX42_VSI_BS[i]);
So it must be dereferenced to be used in calculation of pci_base:
*pci_base = (dma_addr_t)*vme_base + pci_offset;
This bug was caught thanks to the foll
> > > --- a/kernel/sched/idle.c
> > > +++ b/kernel/sched/idle.c
> > > @@ -9,6 +9,7 @@
> > > #include
> > > #include
> > > #include
> > > +#include
> > >
> > > #include
> > >
> > > @@ -264,6 +265,9 @@ static void do_idle(void)
> > >
> > > sched_ttwu_pending();
> > > schedule_pree
On 09/01/17 14:54, Will Deacon wrote:
> On Mon, Jan 09, 2017 at 11:24:04AM +, Robin Murphy wrote:
>> On 06/01/17 21:51, Andy Lutomirski wrote:
>>> On Fri, Jan 6, 2017 at 10:32 AM, Robin Murphy wrote:
On 06/01/17 17:48, Jean-Philippe Brucker wrote:
> It used to work with 4.9, but since
On Monday, January 9, 2017 9:57:46 PM CET Christoph Hellwig wrote:
> > - architecture should stop breaking 64-bit DMA when driver attempts to
> > set 64-bit dma mask,
> >
> > - NVMe should issue proper blk_queue_bounce_limit() call based on what
> > is actually set mask,
>
> Or even better remove
Reviewed-by: David Gstir
Signed-off-by: Richard Weinberger
---
fs/ubifs/tnc.c | 97 --
1 file changed, 46 insertions(+), 51 deletions(-)
diff --git a/fs/ubifs/tnc.c b/fs/ubifs/tnc.c
index 709aa098dd46..ce69f170b7c5 100644
--- a/fs/ubifs/tn
When replaying the journal it can happen that a journal entry points to
a garbage collected node.
This is the case when a power-cut occurred between a garbage collect run
and a commit. In such a case nodes have to be read using the failable
read functions to detect whether the found node matches wh
Qualcomm chipsets have QMP phy controller that provides
support to a number of controller, viz. PCIe, UFS, and USB.
Adding dt binding information for the same.
Signed-off-by: Vivek Gautam
Acked-by: Rob Herring
---
Changes since v3:
- Added #clock-cells = <1>, indicating that phy is a clock pro
PHY transceiver driver for QUSB2 phy controller that provides
HighSpeed functionality for DWC3 controller present on
Qualcomm chipsets.
Signed-off-by: Vivek Gautam
Reviewed-by: Stephen Boyd
---
Changes since v3:
- Added 'Reviewed-by' from Stephen.
- Fixed debug message for qusb2_phy_set_tune2
Qualcomm chipsets have QUSB2 phy controller that provides
HighSpeed functionality for DWC3 controller.
Adding dt binding information for the same.
Signed-off-by: Vivek Gautam
Acked-by: Rob Herring
---
Changes since v3:
- Added 'Acked-by' from Rob.
- Removed 'reset-names' and 'nvmem-cell-names
This patch series adds couple of PHY drivers for Qualcomm chipsets.
a) qcom-qusb2 phy driver: that provides High Speed USB functionality.
b) qcom-qmp phy driver: that is a combo phy providing support for
USB3, PCIe, UFS and few other controllers.
The patches are based on next branch of linux-ph
On Tue, Jan 10, 2017 at 11:00:32AM +0100, Greg KH wrote:
> On Tue, Jan 10, 2017 at 10:21:16AM +0100, Sven Schmidt wrote:
> > On 01/08/2017 12:25 PM, Greg KH wrote:
> > >On Sat, Jan 07, 2017 at 05:55:42PM +0100, Sven Schmidt wrote:
> > >> This patch updates LZ4 kernel module to LZ4 v1.7.2 by Yann Co
Qualcomm SOCs have QMP phy controller that provides support
to a number of controller, viz. PCIe, UFS, and USB.
Add a new driver, based on generic phy framework, for this
phy controller.
Signed-off-by: Vivek Gautam
Tested-by: Srinivas Kandagatla
---
Changes since v3:
- Renamed 'struct qcom_qmp
On Fri 06-01-17 21:53:55, Fabian Frederick wrote:
> recalculate offset if needed.
>
> Signed-off-by: Fabian Frederick
IMHO not really worth it since numalloc gets updated and forgetting to
update the byte variant is just too easy. Skipped.
On Fri 06-01-17 21:53:56, Fabian Frederick wrote:
> udf_update_extent_cache() is only called from inode_bmap()
> with 1 for next_epos
>
> Signed-off-by: Fabian Frederick
Thanks. Applied.
Honza
> ---
> fs/udf/inode.c | 23
On Fri 06-01-17 21:53:57, Fabian Frederick wrote:
> Move all module attributes at the end of one file like other FS.
>
> Signed-off-by: Fabian Frederick
Thanks. Applied.
Honza
> ---
> fs/udf/inode.c | 4
> fs/udf/super.c | 9
On Tuesday, January 10, 2017 8:07:20 AM CET Christoph Hellwig wrote:
> On Tue, Jan 10, 2017 at 09:47:21AM +0300, Nikita Yushchenko wrote:
> > I'm now working with HW that:
> > - is now way "low end" or "obsolete", it has 4G of RAM and 8 CPU cores,
> > and is being manufactured and developed,
> > -
On Tue, 2017-01-10 at 05:18 +0100, Linus Lüssing wrote:
> On Mon, Jan 09, 2017 at 01:30:32PM -0800, Stephen Hemminger wrote:
> > I wonder if MAC80211 should be doing IGMP snooping and not bridge
> > in this environment.
>
> In the long term, yes. For now, not quite sure.
There's no "for now" in t
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On Fri 06-01-17 21:54:41, Fabian Frederick wrote:
> See i_size_read() comments in include/linux/fs.h
>
> Signed-off-by: Fabian Frederick
Applied. Thanks!
Honza
> ---
> fs/udf/lowlevel.c | 2 +-
> fs/udf/super.c| 7 ---
>
Hi,
On 10/01/2017 at 14:01:00 +1100, Stephen Rothwell wrote :
> Hi Alexandre,
>
> After merging the rtc tree, today's linux-next build (x86_64 allmodconfig)
> produced this warning:
>
> drivers/rtc/rtc-armada38x.c: In function 'read_rtc_register_wa':
> drivers/rtc/rtc-armada38x.c:131:25: warning
On Fri 06-01-17 21:54:43, Fabian Frederick wrote:
> We were checking block number without checking partition.
> sbi->s_partmaps[iloc->partitionReferenceNum] could lead to
> bad memory access. See udf_nfs_get_inode() path for instance.
>
> Signed-off-by: Fabian Frederick
Thanks. Applied.
hi
On 12/13/2016 03:20 PM, Gabriel FERNANDEZ wrote:
From: Gabriel Fernandez
This patch include auxiliary clock definition (clocks which are not derived
from system clock.
Signed-off-by: Gabriel Fernandez
---
arch/arm/boot/dts/stm32f429.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git
On Fri 06-01-17 21:53:48, Fabian Frederick wrote:
> This small patchset does some clean-up in UDF branch
>
> Fabian Frederick (12):
> udf: use __packed instead of __attribute__ ((packed))
> udf: use pointer for kernel_long_ad argument
> udf: merge bh free
> udf: remove unneeded line break
Hi
On 12/13/2016 03:20 PM, Gabriel FERNANDEZ wrote:
From: Gabriel Fernandez
This patch adds an external I2S clock in the DT.
The I2S clock could be derived from an external I2S clock or by I2S pll.
Signed-off-by: Gabriel Fernandez
---
arch/arm/boot/dts/stm32f429.dtsi | 8 +++-
1 file ch
On Tuesday, January 10, 2017 10:31:47 AM CET Nikita Yushchenko wrote:
> Christoph, thanks for clear input.
>
> Arnd, I think that given this discussion, best short-term solution is
> indeed the patch I've submitted yesterday. That is, your version +
> coherent mask support. With that, set_dma_mas
When regulators are successfully registered, we check to see if the
regulator is a supply for any other registered regulator and if so
add the new regulator as the supply for the existing regulator(s).
Some devices, such as Power Management ICs, may register a series of
regulators when probed and
Set the elsiocb contexts to NULL after freeing as others depend on it.
Signed-off-by: Johannes Thumshirn
---
drivers/scsi/lpfc/lpfc_els.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/scsi/lpfc/lpfc_els.c b/drivers/scsi/lpfc/lpfc_els.c
index 236e4e5..7b6bd8e 100644
--- a/drivers/
Hi Sean
Some more review comments.
On Tue, Jan 10, 2017 at 05:13:51PM +0800, sean.w...@mediatek.com wrote:
> From: Sean Wang
>
> This patch adds driver for IR controller on MT7623 SoC.
> and should also work on similar Mediatek SoC. Currently
> testing successfully on NEC and SONY remote contr
On Thu, Jan 05, 2017 at 02:46:06PM +, Jose Abreu wrote:
> Hi Ville,
>
>
> On 05-01-2017 11:46, Ville Syrjälä wrote:
> > On Thu, Jan 05, 2017 at 10:07:45AM +, Jose Abreu wrote:
> >> Hi Ville,
> >>
> >>
> >> On 04-01-2017 16:36, Ville Syrjälä wrote:
> >>> On Wed, Jan 04, 2017 at 04:15:01PM
Hello!
On 01/10/2017 05:21 AM, Shuah Khan wrote:
Fix dwc3_exynos_probe() to call clk_prepare_enable() only when suspend
clock is specified. Call clk_disable_unprepare() from remove and probe
error path only when susp_clk has been set from remove and probe error
paths.
Signed-off-by: Shuah Khan
On 2017-01-10 11:42, Alexandre Belloni wrote:
> On 10/01/2017 at 10:52:56 +0100, Peter Rosin wrote :
>> On 2017-01-10 10:29, Alexandre Belloni wrote:
>>> Hi,
>>>
>>> This needs a commit message, please add one.
>>
>> There's not all that much to say, but ok, I'll add something.
>>
>
> It doesn't h
The stm is automatically enabled when an application sets the policy
via ->link() call back by using coresight_enable(), which keeps the
refcount of the current users of the STM. However, the unlink() callback
issues stm_disable() directly, which leaves the STM turned off, without
the coresight lay
On Wednesday 04 January 2017 04:06 PM, Bartosz Golaszewski wrote:
> TI aemif driver creates its own subnodes of the device tree in order
> to guarantee that all child devices are probed after the AEMIF timing
> parameters are configured.
>
> Some devices (e.g. da850) use struct of_dev_auxdata for
Hi Hans,
Thank you for the extensive review.
On 12/05/2016 03:44 PM, Hans Verkuil wrote:
> A few comments below:
>
> On 11/25/2016 03:57 PM, Todor Tomov wrote:
>> These files handle the video device nodes of the camss driver.
>>
>> Signed-off-by: Todor Tomov
>> ---
>> drivers/media/platform/qc
Commit: bc1f44709cf2 - net: make ndo_get_stats64 a void function
and
Commit: 6a8162e99ef3 - net: netcp: store network statistics in 64 bits.
The commit 6a8162e99ef3 adds ndo_get_stats64 function as per old
signature which causes compilation error:
drivers/net/ethernet/ti/netcp_core.c:1951:28: err
On Mon, Jan 09, 2017 at 03:56:14PM +0100, Takashi Iwai wrote:
> I noticed that the VT switch doesn't work any longer with a Dell
> laptop with 1366x768 eDP when the machine is connected with a DP
> monitor. It behaves as if VT were switched, but the graphics remain
> frozen. Actually the keyboard
If overlay was mounted by root then quota set for upper layer does not work
because overlay now always use mounter's credentials for operations.
This patch adds second copy of credentials without CAP_SYS_RESOURCE and
use it if current task doesn't have this capability in mounter's user-ns.
This af
Hi Laurent, Hans,
On 12/05/2016 05:25 PM, Laurent Pinchart wrote:
> Hi Hans,
>
> On Monday 05 Dec 2016 16:02:55 Hans Verkuil wrote:
>> On 12/05/2016 03:45 PM, Laurent Pinchart wrote:
>>> On Monday 05 Dec 2016 14:44:55 Hans Verkuil wrote:
On 11/25/2016 03:57 PM, Todor Tomov wrote:
> These
On 10/01/2017 at 12:21:42 +0100, Peter Rosin wrote :
> On 2017-01-10 11:42, Alexandre Belloni wrote:
> > On 10/01/2017 at 10:52:56 +0100, Peter Rosin wrote :
> >> On 2017-01-10 10:29, Alexandre Belloni wrote:
> >>> Hi,
> >>>
> >>> This needs a commit message, please add one.
> >>
> >> There's not a
On Tue, 10 Jan 2017 12:28:36 +0100,
Ville Syrjälä wrote:
>
> On Mon, Jan 09, 2017 at 03:56:14PM +0100, Takashi Iwai wrote:
> > I noticed that the VT switch doesn't work any longer with a Dell
> > laptop with 1366x768 eDP when the machine is connected with a DP
> > monitor. It behaves as if VT wer
From: Mark Rutland
Now that we have a __tlbi() helper, make use of this in the arm64 KVM hyp
code to get rid of asm() boilerplate. At the same time, we simplify
__tlb_flush_vm_context by using __flush_icache_all(), as this has the
appropriate instruction cache maintenance and barrier.
Signed-off
Userspace tools such as perf can be used to profile individual
processes.
Track the PID of the virtual machine process to match profiling requests
targeted at it. This can be used to take appropriate action to enable
the requested profiling operations for the VMs of interest.
Signed-off-by: Punit
Hi,
This is a new version of the patchset to monitor guest TLB
operations. The user interface has been re-written to incorporate
feedback from LPC'16 on the previous version - it now uses a software
PMU instead of relying on perf trace to track guest TLB operations
(Patch 6 and 7). Previous versio
As TLB operations can have an impact on system performance, add a trace
event to enable monitoring of guest TLB maintenance operations.
Signed-off-by: Punit Agrawal
Cc: Steven Rostedt
Cc: Paolo Bonzini
---
include/trace/events/kvm.h | 18 ++
1 file changed, 18 insertions(+)
di
It is possible to enable selective trapping of guest TLB maintenance
instructions executed in lower privilege levels to HYP mode. This
feature can be used to monitor guest TLB operations.
Add support to emulate the TLB instructions when their execution traps
to hyp mode. Also keep track of the num
Add the Kconfig option and Makefile updates to enable the recently added
support for host pmu.
Signed-off-by: Punit Agrawal
Cc: Christoffer Dall
Cc: Marc Zyngier
Cc: Russell King
---
arch/arm/kvm/Kconfig | 4
arch/arm/kvm/Makefile | 1 +
2 files changed, 5 insertions(+)
diff --git a/ar
Add the callbacks required by host PMU to support monitoring guest TLB
operations.
Signed-off-by: Punit Agrawal
Cc: Christoffer Dall
Cc: Marc Zyngier
---
virt/kvm/arm/host_pmu.c | 50 +
1 file changed, 50 insertions(+)
diff --git a/virt/kvm/arm/
Add the Kconfig option and Makefile update the enable the recently added
host pmu.
Signed-off-by: Punit Agrawal
Cc: Christoffer Dall
Cc: Marc Zyngier
---
arch/arm64/kvm/Kconfig | 4
arch/arm64/kvm/Makefile | 1 +
2 files changed, 5 insertions(+)
diff --git a/arch/arm64/kvm/Kconfig b/arc
On 01/10/2017 07:04 AM, Michael S. Tsirkin wrote:
> On Sat, Dec 31, 2016 at 05:15:36PM +0800, Cao jin wrote:
>> Support serious device error recovery
>
> serious?
>
Sorry for my poor vocabulary if it confuses people. I wanted to express
the meaning that: vfio-pci actually cannot do a real recov
The cache hierarchy can be identified through Cache Level ID(CLIDR)
architected system register. However in some cases it will provide
only the number of cache levels that are integrated into the processor
itself. In other words, it can't provide any information about the
caches that are external a
The ARMv8 architecture allows trapping of TLB maintenane instructions
from EL0/EL1 to higher exception levels. On encountering a trappable TLB
instruction in a guest, an exception is taken to EL2.
Add support to handle emulating the TLB instructions. Also track the
number of emulated operations.
Both AArch32 and AArch64 mode of the ARMv8 architecture support trapping
certain VM operations, e.g, TLB and cache maintenance
operations. Selective trapping of these operations for specific VMs can
be used to track the frequency with which these occur during execution.
Add a software PMU on the h
This patch fixes a typo: s/enable to/unable to/
Signed-off-by: Soramichi Akiyama
---
tools/perf/util/evlist.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/perf/util/evlist.c b/tools/perf/util/evlist.c
index d92e020..23e6f33 100644
--- a/tools/perf/util/evlist.c
+++ b
It is useful to have helper function just to get the number of cache
levels for a given logical cpu. This patch adds the support for the
same.
It will be used on ARM64 platform where the device tree provides the
information for the additional non-architected/transparent/external
last level caches
On 10/01/2017 08:14, Hanjun Guo wrote:
From: Hanjun Guo
commit f1bc1e4c44b1 ("ata: acpi: rework the ata acpi bind support")
removed scsi_register_acpi_bus_type() and scsi_unregister_acpi_bus_type(),
but forgot to remove them in the head file, do it now.
Signed-off-by: Hanjun Guo
---
include/
On Thu, 5 Jan 2017, Frederic Weisbecker wrote:
> This version is a rebase on top of latest Linus tree which includes
> the fix 8f2b468aadc ("s390/vtime: correct system time accounting").
>
> Also a small change: I have moved account_system_index_scaled() to s390
> in patch "s390/cputime: delayed
Hi Rob,
> Am 06.01.2017 um 17:26 schrieb Rob Herring :
>
> Here goes another attempt at a serial device bus (aka uart slaves, tty
> slaves, etc.).
>
> After some discussions with Dmitry at LPC, I decided to move away from
> extending serio and moved back to making a new bus type instead. He didn
Hi Eric,
On 09/01/17 13:46, Eric Auger wrote:
> We introduce two new enum values for the irq domain flag:
> - IRQ_DOMAIN_FLAG_MSI indicates the irq domain corresponds to
> an MSI domain
> - IRQ_DOMAIN_FLAG_MSI_REMAP indicates the irq domain has MSI
> remapping capabilities.
>
> Those values w
On Tue, Jan 10, 2017 at 04:14:04PM +0800, Hanjun Guo wrote:
> From: Hanjun Guo
>
> commit f1bc1e4c44b1 ("ata: acpi: rework the ata acpi bind support")
> removed scsi_register_acpi_bus_type() and scsi_unregister_acpi_bus_type(),
> but forgot to remove them in the head file, do it now.
On Mon, Jan 09, 2017 at 10:30:02AM +0300, Nikita Yushchenko wrote:
> It is possible that device is capable of 64-bit DMA addresses, and
> device driver tries to set wide DMA mask, but bridge or bus used to
> connect device to the system can't handle wide addresses.
>
> With swiotlb, memory above 4
On Mon, Jan 9, 2017 at 8:08 PM, Eric Dumazet wrote:
> On Mon, Jan 9, 2017 at 11:06 AM, Andrey Konovalov
> wrote:
>>
>> Hi Eric,
>>
>> This patch fixes the issue.
>>
>> Thanks!
>
> Thanks Andrey.
>
> Could you please post your .config for next KASAN reports ?
Sure, no problem!
>
> I am asking t
On 09/01/17 13:46, Eric Auger wrote:
> This new function checks whether all MSI irq domains
> implement IRQ remapping. This is useful to understand
> whether VFIO passthrough is safe with respect to interrupts.
>
> On ARM typically an MSI controller can sit downstream
> to the IOMMU without preven
Commit 01e0e15c8b3b ("scsi: don't use fc_bsg_job::request and fc_bsg_job::reply
directly") introduced a typo, which causes that the bsg_request variable in
bfad_im_bsg_els_ct_request() is initialized to itself instead of pointing to
the bsg job's request.
Reported-by: Nicolas Iooss
Signed-off-by:
On 10/01/17 11:41, Sudeep Holla wrote:
> It is useful to have helper function just to get the number of cache
> levels for a given logical cpu. This patch adds the support for the
> same.
>
> It will be used on ARM64 platform where the device tree provides the
> information for the additional no
Hi Eric,
On 09/01/17 13:46, Eric Auger wrote:
> The GICv3 ITS is MSI remapping capable. Let's advertise
> this property so that VFIO passthrough can assess IRQ safety.
>
> Signed-off-by: Eric Auger
> ---
> drivers/irqchip/irq-gic-v3-its.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git
Enable the Extended Stream ID feature when available.
This patch on top of series "[PATCH v7 00/19] KVM PCIe/MSI passthrough
on ARM/ARM64 and IOVA reserved regions" by Eric Auger allows
to passthrough an external PCIe network card on a ThunderX server
successfully.
Without this patch that card ca
Commit 618f535a6062 ("ACPI/IORT: Add single mapping function")
introduced a function (iort_node_get_id()) to retrieve ids for IORT
named components.
The iort_node_get_id() takes an index as input to refer to a specific
mapping entry in the named component IORT node mapping array.
For a mapping en
Add clock-ids for the isp block of the rk3288.
Signed-off-by: Jacob Chen
---
include/dt-bindings/clock/rk3288-cru.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/clock/rk3288-cru.h
b/include/dt-bindings/clock/rk3288-cru.h
index 9a586e2..08de7de 100644
--- a/include/dt
Add clock-ids for the cif block of the rk3288
Signed-off-by: Jacob Chen
---
include/dt-bindings/clock/rk3288-cru.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/clock/rk3288-cru.h
b/include/dt-bindings/clock/rk3288-cru.h
index 08de7de..128b191 100644
--- a/include/dt-
Add the clocks for the cif block of the rk3288
Signed-off-by: Jacob Chen
---
drivers/clk/rockchip/clk-rk3288.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/clk/rockchip/clk-rk3288.c
b/drivers/clk/rockchip/clk-rk3288.c
index 8047cea..f071c24 100644
--- a/drivers/clk/rockchi
Reference the newly added isp clock-ids in the clock-tree.
Signed-off-by: Jacob Chen
---
drivers/clk/rockchip/clk-rk3288.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/rockchip/clk-rk3288.c
b/drivers/clk/rockchip/clk-rk3288.c
index 39af05a..8047cea 100644
---
It is useful to have helper function just to get the number of cache
levels for a given logical cpu. This patch adds the support for the
same.
It will be used on ARM64 platform where the device tree provides the
information for the additional non-architected/transparent/external
last level caches
Hi Nikolaus,
>> Here goes another attempt at a serial device bus (aka uart slaves, tty
>> slaves, etc.).
>>
>> After some discussions with Dmitry at LPC, I decided to move away from
>> extending serio and moved back to making a new bus type instead. He didn't
>> think using serio was a good fit,
Hi Rob,
> Here goes another attempt at a serial device bus (aka uart slaves, tty
> slaves, etc.).
>
> After some discussions with Dmitry at LPC, I decided to move away from
> extending serio and moved back to making a new bus type instead. He didn't
> think using serio was a good fit, and serio h
On Mon, 2017-01-09 at 18:00 +0100, Jan Kiszka wrote:
> On 2017-01-05 22:54, Andy Shevchenko wrote:
> > On Wed, Jan 4, 2017 at 10:48 PM, Jan Kiszka
> > wrote:
> > > MSI needs it as well.
> > >
> > > Should have no practical impact, though, as DMA is always
> > > available on
> > > the Quark. But g
Hi,
On Monday, January 09, 2017 07:21:31 PM Shuah Khan wrote:
> Fix dwc3_exynos_probe() to call clk_prepare_enable() only when suspend
> clock is specified. Call clk_disable_unprepare() from remove and probe
> error path only when susp_clk has been set from remove and probe error
> paths.
It is
Hi Hans,
On 01/09/2017 03:04 PM, Hans Verkuil wrote:
> On 12/05/2016 01:20 PM, Stanimir Varbanov wrote:
>> Hi Hans,
>>
>> On 12/05/2016 02:05 PM, Hans Verkuil wrote:
>>> On 12/01/2016 10:03 AM, Stanimir Varbanov wrote:
Here is the implementation of Venus video accelerator low-level
funct
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