On 3 January 2017 09:23:34 GMT+00:00, Benjamin Gaignard
wrote:
>2017-01-02 19:22 GMT+01:00 Jonathan Cameron :
>> On 02/01/17 08:46, Benjamin Gaignard wrote:
>>> 2016-12-30 22:12 GMT+01:00 Jonathan Cameron :
On 09/12/16 14:15, Benjamin Gaignard wrote:
> Timers IPs can be used to generat
On Tue, Jan 03, 2017 at 10:29:58PM +1000, Nicholas Piggin wrote:
> > kernel building showed nothing unusual on any machine
> >
> > git checkout in a loop showed;
> > o minor gains with Nick's patch
> > o no impact from Linus's patch
> > o flat performance from PeterZ's
> >
> > git tes
Hello,
This patch series is a step forward in supporting vendor-specific
functionalities.
This series is mainly moving vendor-specific initialization or
detection code out of the core, but also introduces an infrastructure
allowing support for vendor-specific features.
While those features might
From: Alexander Duyck
This is a first pass at trying to add documentation for the page_frag APIs.
They may still change over time but for now I thought I would try to get
these documented so that as more network drivers and stack calls make use
of them we have one central spot to document how the
On 12/28/2016 04:30 PM, Michal Hocko wrote:
--- a/mm/vmscan.c
+++ b/mm/vmscan.c
@@ -1428,6 +1428,7 @@ static unsigned long isolate_lru_pages(unsigned long
nr_to_scan,
unsigned long nr_taken = 0;
unsigned long nr_zone_taken[MAX_NR_ZONES] = { 0 };
unsigned long nr_skipped[M
Happy New Year!
This is a very minor rebase from v5. It only moves a few headers around.
I think this series should be ready to be queued up for 4.11.
Thanks,
Laura
Laura Abbott (11):
lib/Kconfig.debug: Add ARCH_HAS_DEBUG_VIRTUAL
mm/cma: Cleanup highmem check
arm64: Move some macros under
DEBUG_VIRTUAL currently depends on DEBUG_KERNEL && X86. arm64 is getting
the same support. Rather than add a list of architectures, switch this
to ARCH_HAS_DEBUG_VIRTUAL and let architectures select it as
appropriate.
Acked-by: Ingo Molnar
Reviewed-by: Mark Rutland
Tested-by: Mark Rutland
Sugg
On 03/01/2017 13:06, David Hildenbrand wrote:
>>
>> switch (cap->cap) {
>> case KVM_CAP_HYPERV_SYNIC:
>> -return kvm_hv_activate_synic(vcpu);
>> +if (!irqchip_in_kernel(vcpu->kvm))
>> +return -EINVAL;
>> +else
>
> You can simply drop the else and ret
On 01/03/2017 01:11 PM, Pantelis Antoniou wrote:
> Hi Frank, Heinrich,
>
>> On Dec 22, 2016, at 21:00 , Frank Rowand wrote:
>>
>> Hi Heinrich,
>>
>> On 12/20/16 11:04, Heinrich Schuchardt wrote:
>>> Currently the kernel only supplies an internal API for creating
>>> and destroying device tree ove
Den 02.01.2017 12:35, skrev Andy Shevchenko:
There is 64x48 display exists. In order to support that set multiplexer
to 48 pixels and window address to proper position in the graphic display
data RAM.
Signed-off-by: Andy Shevchenko
---
Patches 5 and 6:
Acked-by: Noralf Trønnes
drivers/
6b101e2a3ce4 ("mm/CMA: fix boot regression due to physical address of
high_memory") added checks to use __pa_nodebug on x86 since
CONFIG_DEBUG_VIRTUAL complains about high_memory not being linearlly
mapped. arm64 is now getting support for CONFIG_DEBUG_VIRTUAL as well.
Rather than add an explosion
__pa_symbol is technically the marcro that should be used for kernel
symbols. Switch to this as a pre-requisite for DEBUG_VIRTUAL which
will do bounds checking.
Reviewed-by: Mark Rutland
Tested-by: Mark Rutland
Signed-off-by: Laura Abbott
---
arch/arm64/include/asm/kvm_mmu.h | 4 ++--
Shared mmc queue changes break mmc-mq ones currently.
This reverts commit 6540ce8420b7790ef0696ccfd6e911df7ba84c33.
Conflicts:
drivers/mmc/core/queue.c
Signed-off-by: Bartlomiej Zolnierkiewicz
---
drivers/mmc/core/block.c | 11 +--
drivers/mmc/core/queue.c | 252 +++---
Signed-off-by: Bartlomiej Zolnierkiewicz
---
drivers/mmc/core/block.c| 104 --
drivers/mmc/core/block.h| 3 +-
drivers/mmc/core/bus.c | 3 +-
drivers/mmc/core/core.c | 120 +---
drivers/mmc/core/mmc_t
Certain architectures may have the kernel image mapped separately to
alias the linear map. Introduce a macro lm_alias to translate a kernel
image symbol into its linear alias. This is used in part with work to
add CONFIG_DEBUG_VIRTUAL support for arm64.
Reviewed-by: Mark Rutland
Tested-by: Mark
Hi,
It prints a lot of scheduling while atomic warnings during
boot, lacks error handling and is otherwise incomplete but
boots successully on my Odroid-XU3 board. I hope that it
is useful to somebody.
The differences between these patches and Linus' RFD patch:
- request completion is handled fr
__pa_symbol is technically the macro that should be used for kernel
symbols. Switch to this as a pre-requisite for DEBUG_VIRTUAL which
will do bounds checking.
Reviewed-by: Mark Rutland
Tested-by: Mark Rutland
Signed-off-by: Laura Abbott
---
drivers/firmware/psci.c | 2 +-
1 file changed, 1 i
The usercopy checking code currently calls __va(__pa(...)) to check for
aliases on symbols. Switch to using lm_alias instead.
Reviewed-by: Mark Rutland
Tested-by: Mark Rutland
Acked-by: Kees Cook
Signed-off-by: Laura Abbott
---
mm/usercopy.c | 4 ++--
1 file changed, 2 insertions(+), 2 deleti
virt_to_pfn lacks a cast at the top level. Don't rely on __virt_to_phys
and explicitly cast to unsigned long.
Reviewed-by: Mark Rutland
Tested-by: Mark Rutland
Signed-off-by: Laura Abbott
---
arch/arm64/include/asm/memory.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/a
__pa_symbol is the correct API to find the physical address of symbols.
Switch to it to allow for debugging APIs to work correctly. Other
functions such as p*d_populate may call __pa internally. Ensure that the
address passed is in the linear region by calling lm_alias.
Reviewed-by: Mark Rutland
Several macros for various x_to_y exist outside the bounds of an
__ASSEMBLY__ guard. Move them in preparation for support for
CONFIG_DEBUG_VIRTUAL.
Reviewed-by: Mark Rutland
Tested-by: Mark Rutland
Signed-off-by: Laura Abbott
---
arch/arm64/include/asm/memory.h | 38 +++---
__pa_symbol is the correct api to get the physical address of kernel
symbols. Switch to it to allow for better debug checking.
Reviewed-by: Mark Rutland
Tested-by: Mark Rutland
Acked-by: "Eric W. Biederman"
Signed-off-by: Laura Abbott
---
kernel/kexec_core.c | 2 +-
1 file changed, 1 insertio
Den 02.01.2017 12:35, skrev Andy Shevchenko:
First of all, fbtft in current state doesn't allow to override GPIOs to be
optional, like "reset" one. It might be a bug somewhere, but rather out of
scope of this fix.
Second, not all GPIOs available on the board would be SoC based, some of them
mig
On 3 January 2017 12:59:20 GMT+00:00, Benjamin Gaignard
wrote:
>2017-01-03 10:23 GMT+01:00 Benjamin Gaignard
>:
>> 2017-01-02 19:22 GMT+01:00 Jonathan Cameron :
>>> On 02/01/17 08:46, Benjamin Gaignard wrote:
2016-12-30 22:12 GMT+01:00 Jonathan Cameron :
> On 09/12/16 14:15, Benjamin G
MTD Maintainers,
Enjoy!
The following changes since commit 7ce7d89f48834cefece7804d38fc5d85382edf77:
Linux 4.10-rc1 (2016-12-25 16:13:08 -0800)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git ib-mfd-mtd-v4.11
for you to fetch changes up to
With the introduction of the new iommu_{register/get}_instance()
interface in commit e4f10ffe4c9b ("iommu: Make of_iommu_set/get_ops() DT
agnostic") (based on struct fwnode_handle as look-up token, so firmware
agnostic) to register IOMMU instances with the core IOMMU layer there is
no reason to kee
MTD_NAND_IDS is selected by MTD_NAND, which makes it useless. Remove the
Kconfig option and link nand_ids.o into the nand.o object file.
Doing that also prevents adding an extra nand_ids.ko module when MTD_NAND
is activated as a module.
Signed-off-by: Boris Brezillon
---
arch/cris/arch-v32/drive
Den 03.01.2017 17:12, skrev Andy Shevchenko:
On Mon, 2017-01-02 at 13:35 +0200, Andy Shevchenko wrote:
Fall back to usual allocation method if DMA coherent allocation fails.
SPI framework will map and use DMA mapped memory when possible.
Locally I have re-done DMA approach and thus this patch
On Tue, 06 Dec 2016, Andrew Jeffery wrote:
> Whilst describing a device and not a bus, simple-mfd is modelled on
> simple-bus where child nodes are iterated and registered as platform
> devices. Some complex devices, e.g. the Aspeed LPC controller, can
> benefit from address space mapping such tha
On Tue, 06 Dec 2016, Andrew Jeffery wrote:
> The LPC bus pinmux configuration on fifth generation Aspeed SoCs depends
> on bits in both the System Control Unit and the LPC Host Controller.
>
> The Aspeed LPC Host Controller is described as a child node of the
> LPC host-range syscon device for ar
On 2017-01-03 04:46, Boris Brezillon wrote:
>> > Well, regarding the imx_pwm_apply_v2() suggested by Stefan, I think we
>> > both agreed that most of the code was unneeded when all we want to do
>> > is disable the PWM.
>>
>> So for the PATCH 7/11 we fix the issue with recalculating clocks
>> when
On Tue, 06 Dec 2016, Andrew Jeffery wrote:
> The Aspeed SoC Display Controller is presented as a syscon device to
> arbitrate access by display and pinmux drivers. Video pinmux
> configuration on fifth generation SoCs depends on bits in both the
> System Control Unit and the Display Controller.
>
SF Markus Elfring writes:
> From: Markus Elfring
> Date: Sat, 31 Dec 2016 22:42:34 +0100
>
> Some update suggestions were taken into account
> from static source code analysis.
This series is:
Reviewed-by: Eric Anholt
signature.asc
Description: PGP signature
On Tue, 06 Dec 2016, Andrew Jeffery wrote:
> Signed-off-by: Andrew Jeffery
Applied with Acks, thanks.
> ---
> .../devicetree/bindings/mfd/aspeed-lpc.txt | 111
> +
> 1 file changed, 111 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mfd/aspee
On Tue, Dec 27, 2016 at 05:13:04PM +0800, Minghuan Lian wrote:
> A MSI controller of LS1043a v1.0 only includes one MSIR and
> is assigned one GIC interrupt. In order to support affinity,
> LS1043a v1.1 MSI is assigned 4 MSIRs and 4 GIC interrupts.
> But the MSIR has the different offset and only s
On Tue, Dec 27, 2016 at 05:13:03PM +0800, Minghuan Lian wrote:
> LS1046a includes 4 MSIRs, each MSIR is assigned a dedicate GIC
> SPI interrupt and provides 32 MSI interrupts. Compared to previous
> MSI, LS1046a's IBS(interrupt bit select) shift is changed to 2 and
> total MSI interrupt number is c
On Tue, 06 Dec 2016, Andrew Jeffery wrote:
> Signed-off-by: Andrew Jeffery
Applied with Acks, thanks.
> ---
> Documentation/devicetree/bindings/mfd/mfd.txt | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/mfd/mfd.txt
> b/Documentation
On Tue, 2017-01-03 at 13:34 +0900, Minchan Kim wrote:
> Hi Jan,
>
> On Mon, Jan 02, 2017 at 04:48:41PM +0100, Jan Kara wrote:
> >
> > Hi,
> >
> > On Tue 27-12-16 16:45:03, Minchan Kim wrote:
> > >
> > > >
> > > > Patch 3 splits the swap cache radix tree into 64MB chunks, reducing
> > > >
On Tue, 3 Jan 2017 11:45:30 -0500
Steven Rostedt wrote:
> On Tue, 3 Jan 2017 11:32:58 -0500
> Luiz Capitulino wrote:
>
> > On Tue, 22 Nov 2016 15:20:50 -0500
> > Luiz Capitulino wrote:
> >
> > > This series adds support for a --cpu-list option, which is
> > > much more human friendly than -
mm/filemap.c: In function ‘clear_bit_unlock_is_negative_byte’:
mm/filemap.c:933: warning: passing argument 2 of ‘test_bit’ discards qualifiers
from pointer target type
Make the bitmask pointed to by the "vaddr" parameter volatile to fix
this, like is done on other architectures.
Signed-off-by: G
mm/filemap.c: In function 'clear_bit_unlock_is_negative_byte':
mm/filemap.c:933:9: warning: passing argument 2 of 'test_bit' discards
'volatile' qualifier from pointer target type
return test_bit(PG_waiters, mem);
^
In file included from include/linux/bitops.h:36:0,
fro
+++ Jean Delvare [16/12/16 18:45 +0100]:
Struct module is already declared at the beginning of the file, no
need to declare it again.
Signed-off-by: Jean Delvare
Fixes: 93c2e105f6bc ("module: Optimize __module_address() using a latched
RB-tree")
Cc: Peter Zijlstra (Intel)
Cc: Jessica Yu
Cc:
pr_cont(...) and printk(KERN_CONT ...) uses should be discouraged
as their output can be interleaved by multiple logging processes.
Signed-off-by: Joe Perches
---
scripts/checkpatch.pl | 6 ++
1 file changed, 6 insertions(+)
diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index 1
x86 has an option CONFIG_DEBUG_VIRTUAL to do additional checks
on virt_to_phys calls. The goal is to catch users who are calling
virt_to_phys on non-linear addresses immediately. This inclues callers
using virt_to_phys on image addresses instead of __pa_symbol. As features
such as CONFIG_VMAP_STAC
On Mon, Dec 26, 2016 at 05:35:59PM +0100, Pavel Machek wrote:
>
> Right question is "should we solve it without user-space help"?
>
> Answer is no, too. Way too complex. Yes, it would be nice if hardware
> was designed in such a way that getting calibration data from kernel
> is easy, and if you
Ideally we want the CPU to be preemptible even when inside or waiting
for a lock. We cannot make it preemptible when inside a lock critical
section, but we can try to make the task voluntarily yield the CPU
when waiting for a lock.
This patch checks the need_sched() flag and yields the CPU when th
This patchset introduces a new variant of queued spinlocks - the
realtime queued spinlocks. The purpose of this new variant is to
support real spinlock in a realtime environment where high priority
RT tasks should be allowed to complete its work ASAP. This means as
little waiting time for spinlocks
The spin_lock_bh_nested() API is defined but is not used anywhere
in the kernel. So all spin_lock_bh_nested() and related APIs are
now removed.
Signed-off-by: Waiman Long
---
include/linux/spinlock.h | 8
include/linux/spinlock_api_smp.h | 2 --
include/linux/spinlock_api_up.h
In general, the spinlock critical section is typically small enough
that once a CPU acquires a spinlock, it should be able to release the
lock in a reasonably short time. Waiting for the lock, however, can
take a while depending on how many CPUs are contending for the lock.
The exception here is w
As the priority of a task may get boosted due to an acquired rtmutex,
we will need to periodically check the task priority to see if it
gets boosted. For an originally non-RT task, that means unqueuing from
the MCS wait queue before doing an RT spinning. So the unqueuing code
from osq_lock is borro
On Tue, Dec 27, 2016 at 01:59:02PM +, Ramiro Oliveira wrote:
> Create device tree bindings documentation.
>
> Signed-off-by: Ramiro Oliveira
> ---
> .../devicetree/bindings/media/i2c/ov5647.txt | 35
> ++
> 1 file changed, 35 insertions(+)
> create mode 100644 Doc
Realtime queued spinlock is a variant of the queued spinlock that is
suitable for use in a realtime running environment where the highest
priority task should always get its work done as soon as possible. That
means a minimal wait for spinlocks. To make that happen, RT tasks
will not wait in the MC
When in interrupt context, the priority of the interrupted task is
meaningless. So static RT priority is assigned in this case to make
sure that it can get lock ASAP to reduce latency to the interrupted
task.
Signed-off-by: Waiman Long
---
kernel/locking/qspinlock_rt.h | 15 +--
1 fi
This patch enables the collection of event counts in the slowpath of the
realtime queued spinlocks. The following events are being tracked if
CONFIG_QUEUED_LOCK_STAT is defined:
- # of interrupt context RT spinnings
- # of task context RT spinnings
- # of nested spinlock RT spinnings
- # of un
On Mon, 2 Jan 2017, Juergen Gross wrote:
> On 28/12/16 01:47, Jiandi An wrote:
> > Ensure all reserved fields of xatp are zero before making
> > hypervisor call to XEN in xen_map_device_mmio().
> > xenmem_add_to_physmap_one() in XEN fails the mapping request if
> > extra.res reserved field in xatp
On Wed, Dec 28, 2016 at 07:34:52PM +0900, Jaehoon Chung wrote:
> Adds the exynos-pcie-phy binding for Exynos PCIe PHY.
> This is for using generic PHY framework.
>
> Signed-off-by: Jaehoon Chung
> ---
> .../devicetree/bindings/phy/samsung-phy.txt| 23
> ++
> 1 file c
On Tue, 03 Jan 2017, Mark Rutland wrote:
Does the below help?
It does, yes. Performance is pretty much the same with either function
without sysreg. With arm no longer in the picture, I'll send up another
patchset with this change as well as Peter's cleanup remarks.
Thanks,
Davidlohr
Perf already supports multiple PMU instances for heterogeneous systems,
so there's no need to be strict in the cpufeature checking, particularly
as the PMU extension is optional in the architecture.
Reviewed-by: Suzuki K Poulose
Signed-off-by: Will Deacon
---
arch/arm64/kernel/cpufeature.c | 6
If NO_DMA=y:
ERROR: "dmam_alloc_coherent" [drivers/ata/libata.ko] undefined!
Add a dependency on HAS_DMA to fix this.
Signed-off-by: Geert Uytterhoeven
---
drivers/ata/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 275dbbded6dbe0
Hi all,
This RFC series adds support for the ARMv8.2 Statistical Profiling
Extension (SPE) to Linux in the form of a perf PMU driver. There aren't
any userspace patches for perf tool yet, but Kim (on CC) is working on
those and I thought posting the kernel side as an RFC was still worth it
in the
The statistical profiling extension (SPE) is an optional feature of
ARMv8.1 and is unlikely to be supported by all of the CPUs in a
heterogeneous system.
This patch updates the cpufeature checks so that such systems are not
tainted as unsupported.
Reviewed-by: Suzuki Poulose
Signed-off-by: Will
If NO_DMA=y:
ERROR: "dma_pool_alloc" [drivers/ata/sata_mv.ko] undefined!
ERROR: "dmam_pool_create" [drivers/ata/sata_mv.ko] undefined!
ERROR: "dma_pool_free" [drivers/ata/sata_mv.ko] undefined!
Add a dependency on HAS_DMA to fix this.
Signed-off-by: Geert Uytterhoeven
---
drivers/a
Commit 70e6ad0c6d1e6cb9 ("[PATCH] libata: prepare ata_sg_clean() for
invocation from EH") made ata_sg_clean() global, but no user outside
libata-core.c has ever materialized.
Signed-off-by: Geert Uytterhoeven
---
drivers/ata/libata-core.c | 2 +-
drivers/ata/libata.h | 1 -
2 files changed,
The SPE architecture requires each exception level to enable access
to the SPE controls for the exception level below it, since additional
context-switch logic may be required to handle the buffer safely.
This patch allows EL1 (host) access to the SPE controls when entered at
EL2.
Cc: Marc Zyngie
The ARM SPE architecture permits an implementation to ignore a sample
if the sample is due to be taken whilst another sample is already being
produced. In this case, it is desirable to report the collision to
userspace, as they may want to lower the sample period.
This patch adds a PERF_AUX_FLAG_C
On 12/28/2016 12:47 AM, Yuriy Kolerov wrote:
> Ignore value of interrupt distribution mode for common interrupts in
> IDU since setting of affinity using value from Device Tree is deprecated
> in ARC. Originally it is done in idu_irq_xlate() function and it is
> semantically wrong and does not guar
Hi all,
Bartlomiej's "[PATCH 1/3] ata: allow subsystem to be used on m68k arch"
exposed a few missing dependencies on HAS_DMA. This series allows to
build again "allmodconfig" and "allyesconfig" kernels tailored for
Sun-3, which sets NO_DMA=y.
Geert Uytterhoeven (6):
ata: SATA_MV should
If NO_DMA=y:
ERROR: "bad_dma_ops" [drivers/ata/sata_highbank.ko] undefined!
Add a dependency on HAS_DMA to fix this.
Signed-off-by: Geert Uytterhoeven
---
drivers/ata/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 7b36b791078a480
In preparation for adding additional flags to perf AUX records, allow
the flags for a session to be passed directly to perf_aux_output_end,
rather than extend the function to take a bool for each one.
Signed-off-by: Will Deacon
---
arch/x86/events/intel/bts.c | 11 ++
The SPE buffer is virtually addressed, using the page tables of the CPU
MMU. Unusually, this means that the EL0/1 page table may be live whilst
we're executing at EL2 on non-VHE configurations. When VHE is in use,
we can use the same property to profile the guest behind its back.
This patch adds t
Perf PMU drivers using AUX buffers cannot be built as modules unless
the AUX helpers are exported.
This patch exports perf_aux_output_{begin,end,skip} and perf_get_aux to
modules.
Cc: Peter Zijlstra
Signed-off-by: Will Deacon
---
kernel/events/ring_buffer.c | 4
1 file changed, 4 insertio
Any modular driver using cluster-affine PPIs needs to be able to call
irq_get_percpu_devid_partition so that it can enable the IRQ on the
correct subset of CPUs.
This patch exports the symbol so that it can be called from within a
module.
Cc: Marc Zyngier
Cc: Thomas Gleixner
Signed-off-by: Will
The ARMv8.2 architecture introduces the Statistical Profiling Extension
(SPE). SPE provides a way to configure and collect profiling samples
from the CPU in the form of a trace buffer, which can be mapped directly
into userspace using the perf AUX buffer infrastructure.
This patch adds support for
This patch documents the devicetree binding in use for ARM SPE.
Cc: Mark Rutland
Cc: Rob Herring
Signed-off-by: Will Deacon
---
Documentation/devicetree/bindings/arm/spe-pmu.txt | 20
1 file changed, 20 insertions(+)
create mode 100644 Documentation/devicetree/bindings/ar
On Tue, Jan 03, 2017 at 10:06:58AM -0800, Davidlohr Bueso wrote:
> On Tue, 03 Jan 2017, Mark Rutland wrote:
>
> >Does the below help?
>
> It does, yes. Performance is pretty much the same with either function
> without sysreg.
Great!
> With arm no longer in the picture, I'll send up another pat
If NO_DMA=y:
ERROR: "bad_dma_ops" [drivers/ata/libahci_platform.ko] undefined!
ERROR: "dmam_alloc_coherent" [drivers/ata/libahci.ko] undefined!
Add a block dependency on HAS_DMA to fix this.
Signed-off-by: Geert Uytterhoeven
---
drivers/ata/Kconfig | 4
1 file changed, 4 insertion
If NO_DMA=y:
ERROR: "bad_dma_ops" [drivers/ata/libata.ko] undefined!
To fix this, protect the DMA code by #ifdef CONFIG_HAS_DMA, and provide
dummies of ata_sg_clean() and ata_sg_setup() for the !CONFIG_HAS_DMA
case.
Signed-off-by: Geert Uytterhoeven
---
drivers/ata/libata-core.c | 61 +
The HWMON support was only registered in the legacy DSA code. Register
it in the newer DSA code (dsa2) as well.
---
net/dsa/dsa2.c | 4
1 file changed, 4 insertions(+)
diff --git a/net/dsa/dsa2.c b/net/dsa/dsa2.c
index 5fff951a0a49..668aa2974d01 100644
--- a/net/dsa/dsa2.c
+++ b/net/dsa/dsa2
The current HWMON support in DSA in embedded in the legacy code.
Extract it to its own file and register it in the newer DSA code.
Tested on ZII Rev B boards.
Vivien Didelot (3):
net: dsa: remove out label in dsa_switch_setup_one
net: dsa: move HWMON support to its own file
net: dsa: restor
The HWMON support in DSA is currently embedded in the legacy DSA code.
Move it out in its own file, so that it can be reused in newer DSA code.
---
net/dsa/Makefile | 1 +
net/dsa/dsa.c | 131 +-
net/dsa/dsa_priv.h | 9
net/dsa/hwmon.c
The "out" label in dsa_switch_setup_one() is useless, thus remove it.
---
net/dsa/dsa.c | 40 +---
1 file changed, 13 insertions(+), 27 deletions(-)
diff --git a/net/dsa/dsa.c b/net/dsa/dsa.c
index 7899919cd9f0..89e66b623d73 100644
--- a/net/dsa/dsa.c
+++ b/net
This patch fixes a bug in the freelist randomization code. When a high
random number is used, the freelist will contain duplicate entries. It
will result in different allocations sharing the same chunk.
Fixes: c7ce4f60ac19 ("mm: SLAB freelist randomization")
Signed-off-by: John Sperbeck
Reviewed-
On 12/28/2016 12:46 AM, Yuriy Kolerov wrote:
> It is necessary to call entry/exit functions for parent interrupt
> controllers for proper masking/unmasking of interrupt lines.
>
> Signed-off-by: Yuriy Kolerov
Applied to for-curr.
Thx,
-vineet
On Tuesday, 2017-01-03 17:56:10 +0100, Rainer Hochecker wrote:
> On Mon, Jan 2, 2017 at 3:31 PM, Rainer Hochecker wrote:
> >
> > I chose GR16 because that matches with Mesa texture formats. Unfortunately
> > RG16 is already taken by DRM_FORMAT_RGB565
> > So GR32 / RG32 might be better. All other c
From: Caleb Crome
The fsl_ssi fifo watermark is by default set to 2 free spaces (i.e.
activate DMA on FIFO when only 2 spaces are left.) This means the
DMA must service the fifo within 2 audio samples, which is just not
enough time for many use cases with high data rate. In many
configurations
On Tue, Jan 3, 2017 at 12:31 AM, Baoquan He wrote:
> Hi Dan,
>
> On 11/22/16 at 09:26am, Dan Williams wrote:
>> [ replying for Dave since he's offline today and tomorrow ]
>>
>> On Tue, Nov 22, 2016 at 12:47 AM, Ingo Molnar wrote:
>> >
>> > * Dave Jiang wrote:
>> >
>> >> CONFIG_RANDOMIZE_BASE re
On 12/28/2016 12:46 AM, Yuriy Kolerov wrote:
> It is necessary to use hwirq instead of virq when you communicate
> with an interrupt controller since there is no guaranty that virq
> numbers match hwirq numbers.
>
> Signed-off-by: Yuriy Kolerov
Applied to for-curr.
Thx,
-vineet
On Sun, Dec 18, 2016 at 10:20:53PM -0600, Jiandi An wrote:
> crb_check_resource() in TPM CRB driver calls
> acpi_dev_resource_memory() which only handles 32-bit resources.
> Adding a call to acpi_dev_resource_address_space() in TPM CRB
> driver which handles 64-bit resources.
>
> Signed-off-by: Ji
On Tue, Jan 3, 2017 at 8:04 AM, Kirill A. Shutemov wrote:
> On Mon, Jan 02, 2017 at 10:08:28PM -0800, Andy Lutomirski wrote:
>> On Mon, Jan 2, 2017 at 12:44 AM, Arnd Bergmann wrote:
>> > On Tuesday, December 27, 2016 4:54:13 AM CET Kirill A. Shutemov wrote:
>> >> As with other resources you can s
This series enables 64x48 OLED display and fixes the driver to work with DMA
enabled SPI properly.
Has been tested on Intel Edison board with Adafruit 2'8" and SSD1306 64x48
(Sparkfun for Intel Edison) OLED displays at their maximum speed (25MHz and
10MHz).
Since v2:
- fix kbuild bot warning
- re
First of all, fbtft in current state doesn't allow to override GPIOs to be
optional, like "reset" one. It might be a bug somewhere, but rather out of
scope of this fix.
Second, not all GPIOs available on the board would be SoC based, some of them
might sit on I2C GPIO expanders, for example, on In
There is 64x48 display exists. In order to support that set multiplexer
to 48 pixels and window address to proper position in the graphic display
data RAM.
Acked-by: Noralf Trønnes
Signed-off-by: Andy Shevchenko
---
drivers/staging/fbtft/fb_ssd1306.c | 21 +
1 file changed,
On Tue, Jan 03, 2017 at 06:30:17PM +0100, Bartlomiej Zolnierkiewicz wrote:
> Shared mmc queue changes break mmc-mq ones currently.
>
> This reverts commit 6540ce8420b7790ef0696ccfd6e911df7ba84c33.
>
> Conflicts:
> drivers/mmc/core/queue.c
Why are these lines in your changelog?
Please remo
On Tue, Jan 03, 2017 at 09:46:51AM -0800, Eric Anholt wrote:
> SF Markus Elfring writes:
>
> > From: Markus Elfring
> > Date: Sat, 31 Dec 2016 22:42:34 +0100
> >
> > Some update suggestions were taken into account
> > from static source code analysis.
>
> This series is:
>
> Reviewed-by: Eric
kstrto*() functions return proper error code.
Do propogate it to the user.
Signed-off-by: Andy Shevchenko
---
drivers/staging/fbtft/fbtft-sysfs.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/staging/fbtft/fbtft-sysfs.c
b/drivers/staging/fbtft/fbtft-sysfs.c
Refactor write_vmem() for sake of readability.
While here, fix indentation in one comment.
Acked-by: Noralf Trønnes
Signed-off-by: Andy Shevchenko
---
drivers/staging/fbtft/fb_ssd1306.c | 16 +++-
1 file changed, 7 insertions(+), 9 deletions(-)
diff --git a/drivers/staging/fbtft/f
There is no need to duplicate what SPI core already does, i.e. mapping buffers
for DMA capable transfers.
Remove all related pices of code.
Note, that code, besides its redundancy, was buggy: DMA address potentially can
be 0, SPI slave device has nothing to do with DMA capable device properties a
On Tue, Jan 3, 2017 at 5:18 AM, Arnd Bergmann wrote:
> On Monday, January 2, 2017 10:08:28 PM CET Andy Lutomirski wrote:
>>
>> > This seems to nicely address the same problem on arm64, which has
>> > run into the same issue due to the various page table formats
>> > that can currently be chosen at
On Tue, Jan 03, 2017 at 01:15:35PM -0500, Vivien Didelot wrote:
> The current HWMON support in DSA in embedded in the legacy code.
> Extract it to its own file and register it in the newer DSA code.
Hi Vivien
I would really prefer not to do this.
The temperature sensor is in the embedded PHYs of
On Mon, Dec 26, 2016 at 05:17:08PM +0800, Wangnan (F) wrote:
> Hi Mathieu,
Hello Wang,
>
> I meet problems caused by your commit d52c9750f150 ('coresight:
> reset "enable_sink" flag when need be'). Not only the one I
> posted in the previous patch.
>
> My use case is a simple 'perf record -e cs
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