On 12/02/2016 01:43 PM, Andrey Konovalov wrote:
> Hi!
>
> I've got the following error report while running the syzkaller fuzzer.
>
> A reproducer is attached.
>
> On commit d8e435f3ab6fea2ea324dce72b51dd7761747523 (Nov 26).
>
> [ cut here ]
> WARNING: CPU: 0 PID: 4009 a
On 02.12.2016 04:29, Lu Baolu wrote:
handle_cmd_completion() frees a command structure which might
be still referenced by xhci->current_cmd. This might cause
problem when xhci->current_cmd is accessed after that.
A real-life case could be like this. The host takes a very long
time to respond to
Within unwind stack, check if the stack pointer being unwound is within
the CPU's irq_stack and if so use that page rather than the task's stack
page.
Signed-off-by: Matt Redfearn
---
arch/mips/kernel/process.c | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/
Since do_IRQ is now invoked on a separate IRQ stack, we select
HAVE_IRQ_EXIT_ON_IRQ_STACK so that softirq's may be invoked directly
from irq_exit(), rather than requiring do_softirq_own_stack.
Signed-off-by: Matt Redfearn
---
arch/mips/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a
When enterring interrupt context via handle_int or except_vec_vi, switch
to the irq_stack of the current CPU if it is not already in use.
The current stack pointer is masked with the thread size and compared to
the base or the irq stack. If it does not match then the stack pointer
is set to the to
This series adds a separate stack for each CPU wihin the system to use
when handling IRQs. Previously IRQs were handled on the kernel stack of
the current task. If that task was deep down a call stack at the point
of the interrupt, and handling the interrupt required a deep IRQ stack,
then there w
The SAVE_SOME macro is used to save the execution context on all
exceptions.
If an exception occurs while executing user code, the stack is switched
to the kernel's stack for the current task, and register $28 is switched
to point to the current_thread_info, which is at the bottom of the stack
regi
Allocate a per-cpu irq stack for use within interrupt handlers.
Also add a utility function on_irq_stack to determine if a given stack
pointer is within the irq stack for that cpu.
Signed-off-by: Matt Redfearn
---
arch/mips/include/asm/irq.h| 12
arch/mips/kernel/asm-offsets.
Hi Benjamin,
On 12/02/2016 11:17 AM, Benjamin Gaignard wrote:
Add general purpose timers and it sub-nodes into DT for stm32f4.
Define and enable pwm1 and pwm3 for stm32f469 discovery board
version 3:
- use "st,stm32-timer-trigger" in DT
version 2:
- use parameters to describe hardware capabili
Hi,
using dapltest on s390 I ran into the following warning:
[ 20.781709] mlx4_core :00:00.0: DMA-API: device driver frees DMA sg list
with different entry count [map count=2] [unmap count=1]
[ 20.781760] [ cut here ]
[ 20.781767] WARNING: CPU: 4 PID: 1063 at li
On Wed 30-11-16 13:15:16, Yu Zhao wrote:
> __unregister_cpu_notifier() only removes registered notifier from its
> linked list when CPU hotplug is configured. If we free registered CPU
> notifier when HOTPLUG_CPU=n, we corrupt the linked list.
>
> To fix the problem, we can either use a static CPU
On 11/29/2016 04:45 PM, John Garry wrote:
From: Xiaofei Tan
This patch addresses 4 problems in the module probe/remove:
- When hisi_sas_shost_alloc() fails after we alloc shost memory,
we should free shost memory before the function returns.
- When hisi_sas_probe() fails after we alloc the HB
On Mon, Nov 28, 2016 at 02:47:57AM +, Kuninori Morimoto wrote:
>
> From: Kuninori Morimoto
>
> Signed-off-by: Kuninori Morimoto
> ---
> .../bindings/sound/simple-graph-card.txt | 67
> ++
> 1 file changed, 67 insertions(+)
> create mode 100644
> Documentati
On Fri, Dec 02, 2016 at 10:37:35AM +0100, Michal Hocko wrote:
> On Thu 01-12-16 21:10:01, Boris Zhmurov wrote:
> > Michal Hocko 30/11/16 21:25:
> >
> > >>> Do I get it right that s@cond_resched_rcu_qs@cond_resched@ didn't help?
> > >>
> > >> I didn't try that. I've tried 4 patches from Paul's linu
On 12/2/2016 1:32 PM, Pavel Machek wrote:
Hi!
Well, if you have a workload that sends and receive packets, it tends
to work ok, as you do tx_clean() in stmmac_poll(). My workload is not
like that -- it is "sending packets at 3MB/sec, receiving none". So
the stmmac_tx_timer() is rescheduled and
On Fri, 02 Dec 2016, Benjamin Gaignard wrote:
> Timers IPs can be used to generate triggers for other IPs like
> DAC, ADC or other timers.
> Each trigger may result of timer internals signals like counter enable,
> reset or edge, this configuration could be done through "master_mode"
> device attr
On Fri, 02 Dec 2016, Benjamin Gaignard wrote:
> Define bindings for stm32 timer trigger
>
> version 3:
> - change file name
> - add cross reference with mfd bindings
>
> version 2:
> - only keep one compatible
> - add DT parameters to set lists of the triggers:
> one list describe the triggers
Add ADC support & pinctrl analog phandle (adc3_in8) to stm32f429.
Signed-off-by: Fabrice Gasnier
---
arch/arm/boot/dts/stm32f429.dtsi | 49
1 file changed, 49 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
ADC driver depends on REGULATOR and IIO that are not yet selected.
Current hardware boards (like stm32f429i-eval) is using fixed
regulators.
Signed-off-by: Fabrice Gasnier
---
arch/arm/configs/stm32_defconfig | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/configs/stm32_defconf
Enable minimal configuration and device tree to support ADC on STM32,
using ADC driver: https://lwn.net/Articles/706445/
Simple test on stm32f429i-eval board, using on-board potentiometer:
- cd /sys/bus/iio/devices/iio\:device0/
- cat in_voltage8_raw
Fabrice Gasnier (3):
ARM: configs: stm32: en
Enable analog to digital converter on stm32f429i-eval board.
It has on-board potentimeter wired to ADC3 in8 analog pin and
uses fixed regulator to provide reference voltage.
Signed-off-by: Fabrice Gasnier
---
arch/arm/boot/dts/stm32429i-eval.dts | 25 +
1 file changed, 25
On Fri, Dec 02, 2016 at 04:41:09PM +0300, Andrey Ryabinin wrote:
>
>
> On 12/01/2016 11:31 PM, Josh Poimboeuf wrote:
>
> > arch/x86/kernel/acpi/wakeup_64.S | 16
> > 1 file changed, 16 insertions(+)
> >
> > diff --git a/arch/x86/kernel/acpi/wakeup_64.S
> > b/arch/x86/kernel/a
On Fri, Dec 2, 2016 at 3:01 PM, Josh Poimboeuf wrote:
> On Fri, Dec 02, 2016 at 04:41:09PM +0300, Andrey Ryabinin wrote:
>>
>>
>> On 12/01/2016 11:31 PM, Josh Poimboeuf wrote:
>>
>> > arch/x86/kernel/acpi/wakeup_64.S | 16
>> > 1 file changed, 16 insertions(+)
>> >
>> > diff --gi
On 12/02/2016 04:45 AM, Ingo Molnar wrote:
> * Boris Ostrovsky wrote:
>
>> On 10/31/2016 08:33 AM, Boris Ostrovsky wrote:
>>>
>>> On 10/14/2016 02:05 PM, Boris Ostrovsky wrote:
From: Matt Fleming
The new Xen PVH entry point requires page tables to be setup by the
kernel since
On Wed, 30 Nov 2016, Rasmus Villemoes wrote:
> We have the %pU printf extension for doing exactly this. Saves some
> .text, and is likely also a little faster.
>
> Signed-off-by: Rasmus Villemoes
Applied, thanks.
--
Jiri Kosina
SUSE Labs
Hi,
>
> There's nothing that protect stmmac_poll() from running concurently
> with stmmac_dma_interrupt(), right?
>
could it be that there is also another issue concerned locking?:
The tx completion handler takes the xmit_lock in case that the
netif_queue is stopped. This is AFAICS unnecessary
SAS3.5 Generic Megaraid based Controllers will have the support for 128 MSI-X
vectors,
resulting in the need to support 128 reply queues
This patch is depending on patch 1
Signed-off-by: Sasikumar Chandrasekaran
---
drivers/scsi/megaraid/megaraid_sas.h| 1 +
drivers/scsi/megaraid/mega
Detect sequential IO streams and pass those IOs directly to FW.
This patch is depending on patch 3
Signed-off-by: Sasikumar Chandrasekaran
---
drivers/scsi/megaraid/megaraid_sas.h| 1 +
drivers/scsi/megaraid/megaraid_sas_base.c | 40 +++-
drivers/scsi/megaraid/megaraid_sas_fp.c
Sasikumar Chandrasekaran (11):
megaraid_sas: Add new pci device Ids for SAS3.5 Generic Megaraid
Controllers
megaraid_sas: 128 MSIX Support
megaraid_sas: EEDP Escape Mode Support for SAS3.5 Generic Megaraid
Controllers
megaraid_sas: SAS3.5 Generic Megaraid Controllers Stream Detecti
SAS3.5 Generic Megaraid Controllers FW will support new dynamic RaidMap to have
different
sizes for different number of supported VDs.
This patch is depending on patch 5
Signed-off-by: Sasikumar Chandrasekaran
---
drivers/scsi/megaraid/megaraid_sas.h| 7 +
drivers/scsi/megaraid/megar
The Megaraid driver has to support the SAS3.5 Generic Megaraid Controllers
Firmware functionality.
This patch is depending on patch 6
Signed-off-by: Sasikumar Chandrasekaran
---
drivers/scsi/megaraid/megaraid_sas_base.c | 53 ++---
drivers/scsi/megaraid/megaraid_sas_f
An UNMAP command on a PI formatted device will leave the Logical Block
Application
Tag and Logical Block Reference Tag as all F's (for those LBAs that are
unmapped).
To avoid IO errors if those LBAs are subsequently read before they are written
with
valid tag fields, the MPI SCSI IO requests nee
On 12/01/2016 06:17 PM, Shuah Khan wrote:
> On 10/19/2016 06:49 AM, Emilio López wrote:
>> Hello everyone,
>>
>> This is a series of tests to exercise the sync kernel infrastructure. It is
>> meant to be a test suite for the work Gustavo has been doing to destage it.
>>
>> These tests were original
Update Linux driver to use new pdTargetId field for JBOD target ID
This patch is depending on patch 9
Signed-off-by: Sasikumar Chandrasekaran
---
drivers/scsi/megaraid/megaraid_sas.h| 106 +---
drivers/scsi/megaraid/megaraid_sas_base.c | 5 +-
drivers/scsi/me
Large SEQ IO workload should sent as non fast path commands
This patch is depending on patch 7
Signed-off-by: Sasikumar Chandrasekaran
---
drivers/scsi/megaraid/megaraid_sas.h| 8 +
drivers/scsi/megaraid/megaraid_sas_base.c | 49 +
drivers/scsi/megarai
This patch contains new pci device ids for SAS3.5 Generic Megaraid Controllers
Signed-off-by: Sasikumar Chandrasekaran
---
drivers/scsi/megaraid/megaraid_sas.h| 11 ++-
drivers/scsi/megaraid/megaraid_sas_base.c | 20 +++-
drivers/scsi/megaraid/megaraid_sas_fusio
To improve RAID 1/10 Write performance, OS drivers need to issue the required
Write
IOs as Fast Path IOs (after the appropriate checks allowing Fast Path to be
used)
to the appropriate physical drives (translated from the OS logical IO) and wait
for
all Write IOs to complete. If any of the Writ
Hi Pavel,
On 11/28/2016 01:17 PM, Pavel Machek wrote:
Remove code duplication getting basic descriptors.
I agree with your patch, it will make code easier to understand.
After fix kbuild issue you can add my Acked-by;
Regards
Alex
Signed-off-by: Pavel Machek
diff --git a/drivers/net/eth
Configure the UART RTS line as a GPIO for manipulation within the UART driver.
Signed-off-by: Lee Jones
---
arch/arm/boot/dts/stih410-b2260.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/stih410-b2260.dts
b/arch/arm/boot/dts/stih410-b2260.dts
index 7fb507f..f46603f 10
Upgrade driver version.
This patch is depending on patch 10
Signed-off-by: Sasikumar Chandrasekaran
---
drivers/scsi/megaraid/megaraid_sas.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/scsi/megaraid/megaraid_sas.h
b/drivers/scsi/megaraid/megaraid_sas.h
index
Until this point, it has not been possible for serial applications
to toggle the UART RTS line. This can be useful with certain
configurations. For example, when using a Mezzanine on a Linaro
96board, RTS line is used to take the the on-board microcontroller
in and out of reset.
Signed-off-by: Le
On 01/12/16 06:05, Masahiro Yamada wrote:
> I see no override of read/write callbacks in sdhci-of-at91.c.
>
> Signed-off-by: Masahiro Yamada
Acked-by: Adrian Hunter
> ---
>
> BTW, this config may not be so useful in recent multi-platforms.
> Perhaps, is it better to remove this config entirel
ldio outstanding variable needs to be decremented in io completion path for
iMR dual queue depth
This patch is depending on patch 8
Signed-off-by: Sasikumar Chandrasekaran
---
drivers/scsi/megaraid/megaraid_sas_fusion.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/d
> > I have a HP ProLiant DL380 G3 server. It has two
> > dual-core 32-bit Xeon CPUs. CONFIG_NR_CPUS=4 and has always been.
>
> Same happens on DL360 G3 - 1U server of the same era.
And the next generation of it, DL380 G4, shows the same problem.
--
Meelis Roos (mr...@linux.ee)
From: Niklas Cassel
All drivers except pci glue layer calls stmmac_probe_config_dt.
stmmac_probe_config_dt does a kzalloc dma_cfg.
pci glue layer does kzalloc dma_cfg explicitly, so all current
drivers does a kzalloc dma_cfg.
Return an error if no DMA configuration is found, that way
we can ass
From: Niklas Cassel
commit 64c3b252e9fc ("net: stmmac: fixed the pbl setting with DT")
changed the parsing of the DT binding.
Before 64c3b252e9fc, snps,fixed-burst and snps,mixed-burst were parsed
regardless if the property snps,pbl existed or not.
After the commit, fixed burst and mixed burst a
This patch adds support for the STM32 RTC.
Signed-off-by: Amelie Delaunay
---
drivers/rtc/Kconfig | 10 +
drivers/rtc/Makefile| 1 +
drivers/rtc/rtc-stm32.c | 777
3 files changed, 788 insertions(+)
create mode 100644 drivers/rtc/rtc-s
This patchset adds support for the STM32 Real-Time Clock.
This RTC is an independent BCD timer/counter and provides a time-of-day
clock/calendar with programmable alarm interrupt.
RTC calendar can be driven by three clock sources LSE, LSI or HSE.
Amelie Delaunay (8):
ARM: dts: stm32: set HSE_RTC
This patch adds documentation of device tree bindings for the STM32 RTC.
Signed-off-by: Amelie Delaunay
---
.../devicetree/bindings/rtc/st,stm32-rtc.txt | 31 ++
1 file changed, 31 insertions(+)
create mode 100644 Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt
From: Niklas Cassel
DMA_BUS_MODE_RPBL_MASK is really 6 bits,
just like DMA_BUS_MODE_PBL_MASK.
Signed-off-by: Niklas Cassel
---
drivers/net/ethernet/stmicro/stmmac/dwmac1000.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
b/
From: Niklas Cassel
Use struct stmmac_dma_cfg *dma_cfg as an argument rather
than using all the struct members as individual arguments.
Signed-off-by: Niklas Cassel
---
drivers/net/ethernet/stmicro/stmmac/common.h| 4 ++--
drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c | 13 +
> -Original Message-
> From: Vineet Gupta [mailto:vgu...@synopsys.com]
> Sent: Wednesday, November 30, 2016 7:55 PM
> To: Yuriy Kolerov ; Michal Hocko
>
> Cc: linux-snps-...@lists.infradead.org; alexey.brod...@synopsys.com; linux-
> ker...@vger.kernel.org
> Subject: Re: [RFC] ARC: mm: Rest
This patch enables RTC on stm32f429-disco with LSI as clock source because
X2 crystal for LSE is not fitted by default.
Signed-off-by: Amelie Delaunay
---
arch/arm/boot/dts/stm32f429-disco.dts | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f429-disco.dts
b/arch
This patch adds STM32 RTC bindings for STM32F429.
Signed-off-by: Amelie Delaunay
---
arch/arm/boot/dts/stm32f429.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index d195ccf..d181025 100644
--- a/arch/a
This patch enables RTC on stm32f469-disco with default LSE clock source.
Signed-off-by: Amelie Delaunay
---
arch/arm/boot/dts/stm32f469-disco.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f469-disco.dts
b/arch/arm/boot/dts/stm32f469-disco.dts
index 8a163d7..
From: Niklas Cassel
GMAC and newer supports independent programmable burst lengths for
DMA tx/rx. Add new optional devicetree properties representing this.
To be backwards compatible, snps,pbl will still be valid, but
snps,txpbl/snps,rxpbl will override the value in snps,pbl if set.
If the IP i
From: Niklas Cassel
The driver currently always sets the PBLx8/PBLx4 bit, which means that
the pbl values configured via the pbl/txpbl/rxpbl DT properties are
always multiplied by 8/4 in the hardware.
In order to allow the DT to configure lower pbl values, while at the
same time not changing beh
This patch adds STM32 RTC support in stm32_defconfig file.
Signed-off-by: Amelie Delaunay
---
arch/arm/configs/stm32_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/stm32_defconfig b/arch/arm/configs/stm32_defconfig
index e7b56d4..71f9787 100644
--- a/arch/arm/co
This patch set HSE_RTC clock frequency to 1 MHz, as the clock supplied to
the RTC must be 1 MHz.
Signed-off-by: Amelie Delaunay
---
arch/arm/boot/dts/stm32f429.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index b07
This patch enables RTC on stm32429i-eval with default LSE clock source.
Signed-off-by: Amelie Delaunay
---
arch/arm/boot/dts/stm32429i-eval.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/stm32429i-eval.dts
b/arch/arm/boot/dts/stm32429i-eval.dts
index 8b158f9..5007
On Fri, 02 Dec 2016, Benjamin Gaignard wrote:
> Define bindings for pwm-stm32
>
> version 2:
> - use parameters instead of compatible of handle the hardware configuration
>
> Signed-off-by: Benjamin Gaignard
> ---
> .../devicetree/bindings/pwm/pwm-stm32.txt | 38
> +++
According to the documentation, the PHYs supported by this driver
can also support pause frames. Announce this to be so.
Tested with a TI83822I.
Signed-off-by: Jesper Nilsson
---
drivers/net/phy/dp83848.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/phy/dp838
On 02/12/16 04:21, Masahiro Yamada wrote:
> Some SDHCI-compat controllers support not only SD, but also eMMC,
> but they use different commands for tuning: CMD19 for SD, CMD21 for
> eMMC.
>
> Due to the difference of the underlying mechanism, some controllers
> (at least, the Cadence IP is the cas
Hi Pavel and Peppe,
On 12/02/2016 02:51 PM, Giuseppe CAVALLARO wrote:
On 12/2/2016 1:32 PM, Pavel Machek wrote:
Hi!
Well, if you have a workload that sends and receive packets, it tends
to work ok, as you do tx_clean() in stmmac_poll(). My workload is not
like that -- it is "sending packets a
On Fri, 02 Dec 2016, Benjamin Gaignard wrote:
> This hardware block could at used at same time for PWM generation
> and IIO timer for other IPs like DAC, ADC or other timers.
> PWM and IIO timer configuration are mixed in the same registers
> so we need a multi fonction driver to be able to share
This patch adds support for the min, max and alarm attributes of the
voltage and temperature channels. Additionally, the temp2_fault attribute
is supported which indicates a fault of the external temperature diode.
Signed-off-by: Michael Walle
---
v2:
- use BIT()
- new function adt7411_write_in
Hi,
On 02-12-16 15:22, Icenowy Zheng wrote:
01.12.2016, 17:36, "Maxime Ripard" :
On Mon, Nov 28, 2016 at 12:29:07AM +, André Przywara wrote:
> Something more interesting happened.
>
> Xunlong made a add-on board for Orange Pi Zero, which exposes the
> two USB Controllers exported at
On 12/02/2016 08:22 AM, Jesper Nilsson wrote:
> According to the documentation, the PHYs supported by this driver
> can also support pause frames. Announce this to be so.
> Tested with a TI83822I.
>
Looks like all PHYs supported by this driver do, so:
Acked-by: Andrew F. Davis
> Signed-off-by:
Hi!
I've got the following error report while booting the kernel with
various usb configs enabled.
On commit 2caceb3294a78c389b462e7e236a4e744a53a474 (Dec 1).
gadgetfs: USB Gadget filesystem, version 24 Aug 2004
usbip_core: USB/IP Core v1.0.0
vhci_hcd vhci_hcd: USB/IP Virtual Host Controller
vhc
On 01.12.2016 17:12, Michal Marek wrote:
> On 2016-12-01 04:39, Nicholas Piggin wrote:
>> On Thu, 01 Dec 2016 02:35:54 +
>> Ben Hutchings wrote:
>>> As I understand it, genksyms incorporates the definitions of a
>>> function's parameter and return types - not just their names - and all
>>> the
On Fri 02-12-16 09:24:35, Dan Streetman wrote:
> On Fri, Dec 2, 2016 at 8:46 AM, Michal Hocko wrote:
> > On Wed 30-11-16 13:15:16, Yu Zhao wrote:
> >> __unregister_cpu_notifier() only removes registered notifier from its
> >> linked list when CPU hotplug is configured. If we free registered CPU
>
2016-12-02 14:59 GMT+01:00 Lee Jones :
> On Fri, 02 Dec 2016, Benjamin Gaignard wrote:
>
>> Define bindings for stm32 timer trigger
>>
>> version 3:
>> - change file name
>> - add cross reference with mfd bindings
>>
>> version 2:
>> - only keep one compatible
>> - add DT parameters to set lists of
The datasheet states:
"If the MODE field selects an 8-bit frame then this [parity error] bit
is undefined. Software should ignore this bit when reading 8-bit frames."
Signed-off-by: Lee Jones
---
drivers/tty/serial/st-asc.c | 16 +---
1 file changed, 13 insertions(+), 3 deletions(-
On 2.12.2016 15:07, Sasikumar Chandrasekaran wrote:
> Sasikumar Chandrasekaran (11):
> megaraid_sas: Add new pci device Ids for SAS3.5 Generic Megaraid
> Controllers
> megaraid_sas: 128 MSIX Support
> megaraid_sas: EEDP Escape Mode Support for SAS3.5 Generic Megaraid
> Controllers
>
On Fri, Dec 2, 2016 at 8:46 AM, Michal Hocko wrote:
> On Wed 30-11-16 13:15:16, Yu Zhao wrote:
>> __unregister_cpu_notifier() only removes registered notifier from its
>> linked list when CPU hotplug is configured. If we free registered CPU
>> notifier when HOTPLUG_CPU=n, we corrupt the linked lis
Resuming from a suspend operation is showing a KASAN false positive
warning:
BUG: KASAN: stack-out-of-bounds in unwind_get_return_address+0x11d/0x130 at
addr 8803867d7878
Read of size 8 by task pm-suspend/7774
page:ea000e19f5c0 count:0 mapcount:0 mapping: (null) index:0x0
On Fri 02-12-16 15:38:48, Michal Hocko wrote:
> On Fri 02-12-16 09:24:35, Dan Streetman wrote:
> > On Fri, Dec 2, 2016 at 8:46 AM, Michal Hocko wrote:
> > > On Wed 30-11-16 13:15:16, Yu Zhao wrote:
> > >> __unregister_cpu_notifier() only removes registered notifier from its
> > >> linked list when
Hi cuilifei,
[auto build test ERROR on fuse/for-next]
[also build test ERROR on v4.9-rc7 next-20161202]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/cuilifei/fuse-freezing-abort-when-use
Some more bits and pieces inside.
---
Best Regards, Laurentiu
On 12/02/2016 12:41 AM, Stuart Yoder wrote:
> From: Roy Pledge
>
> Add global definitions for DPAA2 frame descriptors and scatter
> gather entries.
>
> Signed-off-by: Roy Pledge
> Signed-off-by: Stuart Yoder
> ---
>
> Notes:
>
Hi Robert,
On 02/12/16 07:11, Robert Richter wrote:
> On 01.12.16 17:26:55, James Morse wrote:
>> On 01/12/16 16:45, Will Deacon wrote:
>>> Thanks for sending out the new patch. Whilst I'm still a bit worried about
>>> changing pfn_valid like this, I guess we'll just have to fix up any callers
>>>
In function ioat_dma_self_test(), when the calls to dma_mapping_error()
fails, the value of return variable err is 0 (indicates no error). As a
result, the return value may be inconsistent with the execution status.
This patch fixes the bug by assigning -ENOMEM to err on the error path.
Bugzill
Patch "arm64: mm: Fix memmap to be initialized for the entire section"
changes pfn_valid() in a way that breaks hibernate. These patches fix
hibernate, and provided struct page's are allocated for nomap pages,
can be applied before [0].
Hibernate core code belives 'valid' to mean "I can access thi
pfn_valid() needs to be changed so that all struct pages in a numa
node have the same node-id. Currently 'nomap' pages are skipped, and
retain their pre-numa node-ids, which leads to a later BUG_ON().
Once this change happens, hibernate's code code will try and
save/restore the nomap pages.
Add t
linux/page-flags.h has a flag for describing special pages:
> PG_reserved is set for special pages, which can never be swapped out.
> Some of them might not even exist (eg empty_bad_page)...
memblock nomap pages fall in the 'might not even exist' category,
set this bit on all the struct pages in t
On Fri, Dec 02, 2016 at 08:35:23AM -0600, Andrew F. Davis wrote:
> On 12/02/2016 08:22 AM, Jesper Nilsson wrote:
> > According to the documentation, the PHYs supported by this driver
> > can also support pause frames. Announce this to be so.
> > Tested with a TI83822I.
> >
>
> Looks like all PHYs
Hi cuilifei,
[auto build test WARNING on fuse/for-next]
[also build test WARNING on v4.9-rc7 next-20161202]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/cuilifei/fuse-freezing-abort-when-use
On Friday, December 2, 2016 1:59:15 PM CET Geert Uytterhoeven wrote:
> On Fri, Dec 2, 2016 at 1:40 PM, Arnd Bergmann wrote:
> > With binutils-2.16 and before, a weak missing symbol was kept during the
>
> 2.26?
>
> > final link, and a missing CRC for an export would lead to that CRC
> > being tr
From: Mitchel Humpherys
Add the IOMMU_PRIV attribute, which is used to indicate privileged
mappings.
Reviewed-by: Robin Murphy
Tested-by: Robin Murphy
Acked-by: Will Deacon
Signed-off-by: Mitchel Humpherys
---
[V6] No change
include/linux/iommu.h | 1 +
1 file changed, 1 insertion(+)
dif
From: Jeremy Gebben
Allow the creation of privileged mode mappings, for stage 1 only.
Reviewed-by: Robin Murphy
Tested-by: Robin Murphy
Acked-by: Will Deacon
Signed-off-by: Jeremy Gebben
---
[V6] No change
drivers/iommu/io-pgtable-arm.c | 5 -
1 file changed, 4 insertions(+), 1 deleti
From: Mitchel Humpherys
The newly added DMA_ATTR_PRIVILEGED is useful for creating mappings that
are only accessible to privileged DMA engines. Implement it in
dma-iommu.c so that the ARM64 DMA IOMMU mapper can make use of it.
Reviewed-by: Robin Murphy
Tested-by: Robin Murphy
Acked-by: Will D
This series is a resend of the V5 that Mitch sent sometime back [2]
All the patches are the same and i have just rebased. Not sure why this
finally did not make it last time. The last patch in the previous
series does not apply now [3], so just redid that. Also Copied the tags
that he had from last
From: Mitchel Humpherys
This patch adds the DMA_ATTR_PRIVILEGED attribute to the DMA-mapping
subsystem.
Some advanced peripherals such as remote processors and GPUs perform
accesses to DMA buffers in both privileged "supervisor" and unprivileged
"user" modes. This attribute is used to indicate
According to the documentation, the PHYs supported by this driver
can also support pause frames. Announce this to be so.
Tested with a TI83822I.
Acked-by: Andrew F. Davis
Signed-off-by: Jesper Nilsson
---
drivers/net/phy/dp83848.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff -
On Fri, Dec 2, 2016 at 9:44 AM, Michal Hocko wrote:
> On Fri 02-12-16 15:38:48, Michal Hocko wrote:
>> On Fri 02-12-16 09:24:35, Dan Streetman wrote:
>> > On Fri, Dec 2, 2016 at 8:46 AM, Michal Hocko wrote:
>> > > On Wed 30-11-16 13:15:16, Yu Zhao wrote:
>> > >> __unregister_cpu_notifier() only r
Currently the driver sets all the device transactions privileges
to UNPRIVILEGED, but there are cases where the iommu masters wants
to isolate privileged supervisor and unprivileged user.
So don't override the privileged setting to unprivileged, instead
set it to default as incoming and let it be c
From: Mitchel Humpherys
The PL330 performs privileged instruction fetches. This can result in
SMMU permission faults on SMMUs that implement the ARMv8 VMSA, which
specifies that mappings that are writeable at one execution level shall
not be executable at any higher-privileged level. Fix this b
Greg KH wrote:
> > If root is able to modify the behaviour of verified code after it was
> > verified, then the value of that verification is reduced. Ensuring that
> > the code remains trustworthy is vital in a number of security use cases.
>
> Ok, but why are you now deciding to somehow try
On Fri, Dec 02, 2016 at 05:45:18PM +0300, Andrey Ryabinin wrote:
>
>
> On 12/02/2016 05:42 PM, Josh Poimboeuf wrote:
>
>
> > diff --git a/mm/kasan/kasan.c b/mm/kasan/kasan.c
> > index 0e9505f..e9d8ba0 100644
> > --- a/mm/kasan/kasan.c
> > +++ b/mm/kasan/kasan.c
> > @@ -80,7 +80,14 @@ void kasan
Em Fri, Dec 02, 2016 at 10:15:39AM +0100, Jiri Olsa escreveu:
> On Thu, Dec 01, 2016 at 04:53:23PM -0200, Arnaldo Carvalho de Melo wrote:
> > Em Thu, Dec 01, 2016 at 09:48:40AM -0800, Peter Foley escreveu:
> > > On Thu, Dec 1, 2016 at 5:00 AM, Jiri Olsa wrote:
> > > > ok, so v3 actually ;-)
> > >
Hi!
I've got the following error report while running the syzkaller fuzzer.
The length passed to memdup_user() directly without limitations.
On commit 2caceb3294a78c389b462e7e236a4e744a53a474 (Dec 1).
WARNING: CPU: 3 PID: 14477 at mm/page_alloc.c:3511
__alloc_pages_nodemask+0x159c/0x1e20
Kernel
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