* Pavel Machek [161104 00:10]:
> On Thu 2016-11-03 22:00:56, Matt Ranostay wrote:
> Do you actually have hardware with more than one bq27xxx?
I can at least see the twl4030 battery/charger features
being used together with some bq device to monitor the
battery state. Not sure if that counts as mu
The delay can be applied at PHY or MAC level, but since
PHY drivers will apply the delay at PHY level when using
one of the "internal delay" declinations of RGMII mode
(like PHY_INTERFACE_MODE_RGMII_TXID), applying it again
at MAC level causes issues.
Signed-off-by: Sebastian Frias
---
drivers/n
On Thu, Oct 27, 2016 at 12:42 PM, Jerome Brunet wrote:
> Ressource issue : When you create an irq mapping, in case of hierarchic
> domain, it calls the "alloc" function of the domain, which will
> eventually call the "alloc" function of the parent domain ... until you
> reach the "root" domain (h
On Nov 04 2016 or thereabouts, Bastien Nocera wrote:
> On Fri, 2016-11-04 at 15:26 +0100, Benjamin Tissoires wrote:
> > On Oct 27 2016 or thereabouts, Bastien Nocera wrote:
> > > This adds support for the THQ uDraw tablet for the PS3, as
> > > 4 separate device nodes, so that user-space can easily
On Fri, Nov 04, 2016 at 12:19:49PM +0100, Heiko Stuebner wrote:
> Hi Jaehoon,
>
> Am Freitag, 4. November 2016, 19:21:30 CET schrieb Jaehoon Chung:
> > On 11/04/2016 03:41 AM, Krzysztof Kozlowski wrote:
> > > On Thu, Nov 03, 2016 at 03:21:32PM +0900, Jaehoon Chung wrote:
> > >> In drivers/mmc/core
Commit a999589ccaae ("phylib: add RGMII-ID interface mode definition")
and commit 7d400a4c5897 ("phylib: add PHY interface modes for internal
delay for tx and rx only") added several RGMII declinations:
PHY_INTERFACE_MODE_RGMII_ID, PHY_INTERFACE_MODE_RGMII_RXID and
PHY_INTERFACE_MODE_RGMII_TXID to
On Fri, Nov 04, 2016 at 03:53:02PM +0100, Paolo Bonzini wrote:
> > The modification to scattered et al without the kvm use should be a
> > separate patch.
>
> With no usage? Sounds like a good use of Acked-by. :)
I don't understand what do you mean here?
> >> +u32 get_scattered_cpuid_leaf(unsig
On Fri, 4 Nov 2016, Joel Holdsworth wrote:
> The Lattice iCE40 is a family of FPGAs with a minimalistic architecture
> and very regular structure, designed for low-cost, high-volume consumer
> and system applications.
>
> This patch adds support to the FPGA manager for configuring the SRAM of
> i
On Mon, Oct 31, 2016 at 3:57 PM, Mika Westerberg
wrote:
> If async suspend is enabled, the driver may access registers concurrently
> with another instance which may fail because of the bug in Cherryview GPIO
> hardware. Prevent this by taking the shared lock while accessing the
> hardware in sus
On Fri, Nov 04, 2016 at 04:02:24PM +0100, Sebastian Frias wrote:
> The delay can be applied at PHY or MAC level, but since
> PHY drivers will apply the delay at PHY level when using
> one of the "internal delay" declinations of RGMII mode
> (like PHY_INTERFACE_MODE_RGMII_TXID), applying it again
>
On 04/11/2016 16:06, Borislav Petkov wrote:
> > With no usage? Sounds like a good use of Acked-by. :)
> I don't understand what do you mean here?
I mean that the changes to scattered.c are small, so it makes no sense
to split them. With an Acked-by I could simply take the patch into my tree.
On Mon, Oct 31, 2016 at 3:57 PM, Mika Westerberg
wrote:
> When the system is suspended to S3 the BIOS might re-initialize certain
> GPIO pins back to their original state or it may re-program interrupt mask
> of others. For example Acer TravelMate B116-M had BIOS bug where certain
> GPIO pin (MF_
On Mon, Oct 31, 2016 at 3:57 PM, Mika Westerberg
wrote:
> Printing the prefix does not provide any additional information. In
> addition this makes the output look more consistent with pinctrl-intel.c.
>
> Signed-off-by: Mika Westerberg
Patch applied.
The first two patches were applied for fix
On Fri, Nov 4, 2016 at 4:12 PM, Linus Walleij wrote:
> On Mon, Oct 31, 2016 at 3:57 PM, Mika Westerberg
> wrote:
>
>> If async suspend is enabled, the driver may access registers concurrently
>> with another instance which may fail because of the bug in Cherryview GPIO
>> hardware. Prevent this b
From: Lino Sanfilippo
Date: Fri, 4 Nov 2016 12:01:17 +0100
> Hi,
>
> On 04.11.2016 07:53, Joe Perches wrote:
>>
>> CHECK:REVERSE_XMAS_TREE: Prefer ordering declarations longest to
>> shortest
>> #446: FILE: drivers/net/ethernet/ethoc.c:446:
>> +int size = bd.stat >> 16;
>> +
>
> Call the struct simply smca_bank, it's instance ID can be simply ->id.
> Makes the code much more readable.
>
> Signed-off-by: Borislav Petkov
Looks good to me.
Please add:
Tested-by: Yazen Ghannam
Ditto for the others.
Thanks,
Yazen
On Fri, Nov 04, 2016 at 03:24:24PM +0100, Sebastian Andrzej Siewior wrote:
> Eventually Fedora and SUSE will migrate to PIE by default and by then we
> should cover all major distros so even Al should be affected unless he
> decides not to update or is using something else.
That "something else"
Sebastian Frias writes:
> The delay can be applied at PHY or MAC level, but since
> PHY drivers will apply the delay at PHY level when using
> one of the "internal delay" declinations of RGMII mode
> (like PHY_INTERFACE_MODE_RGMII_TXID), applying it again
> at MAC level causes issues.
The Broadc
On Fri, Nov 04, 2016 at 03:18:11PM +, Al Viro wrote:
> On Fri, Nov 04, 2016 at 03:24:24PM +0100, Sebastian Andrzej Siewior wrote:
>
> > Eventually Fedora and SUSE will migrate to PIE by default and by then we
> > should cover all major distros so even Al should be affected unless he
> > decide
On Fri, Nov 04, 2016 at 01:42:40PM +, Matthew Fortune wrote:
> Maciej Rozycki writes:
> > On Tue, 1 Nov 2016, Guenter Roeck wrote:
> >
> > > > > Some toolchains fail to build mips images with the following build
> > error.
> > > > >
> > > > > arch/mips/vdso/gettimeofday.c:1:0: error: '-march=
On 11/04/2016 08:46 AM, Christoph Hellwig wrote:
On Thu, Nov 03, 2016 at 10:00:58PM -0600, Jens Axboe wrote:
I've applied 1-2 for 4.10, but we probably should look into unifying
those parts of sq and mq in general. For instance, it doesn't seem to
make a lot of sense why we'd depth limit sq and
From: Giuseppe CAVALLARO
Date: Fri, 4 Nov 2016 14:53:09 +0100
> the series have some Acked-by, do you prefer a new
> series (I can rebase them if you ask me) or you can keep
> this one? Or you have some advice or issue to warn?
If it's not in an "Action Required" state in patchwork, you
can safe
On 11/04/2016 08:44 AM, Christoph Hellwig wrote:
On Thu, Nov 03, 2016 at 01:45:05PM -0600, Jens Axboe wrote:
The poll code is blk-mq specific, let's move it to blk-mq.c. This
is a prep patch for improving the polling code.
Signed-off-by: Jens Axboe
Reviewed-by: Christoph Hellwig
So I gave m
On Fri, Nov 04, 2016 at 10:44:47AM -0400, Yazen Ghannam wrote:
> Please add:
> Tested-by: Yazen Ghannam
>
> Ditto for the others.
Thanks, here's one more which I've been meaning to do:
---
From: Borislav Petkov
Date: Thu, 3 Nov 2016 21:12:33 +0100
Subject: [PATCH] x86/RAS: Hide SMCA bank names
On Fri, Nov 04, 2016 at 04:15:59PM +0100, Linus Walleij wrote:
> On Fri, Nov 4, 2016 at 4:12 PM, Linus Walleij
> wrote:
> > On Mon, Oct 31, 2016 at 3:57 PM, Mika Westerberg
> > wrote:
> >
> >> If async suspend is enabled, the driver may access registers concurrently
> >> with another instance wh
Andrew Lunn writes:
> On Fri, Nov 04, 2016 at 04:02:24PM +0100, Sebastian Frias wrote:
>> The delay can be applied at PHY or MAC level, but since
>> PHY drivers will apply the delay at PHY level when using
>> one of the "internal delay" declinations of RGMII mode
>> (like PHY_INTERFACE_MODE_RGMII
Hi Andrew,
On 11/04/2016 04:11 PM, Andrew Lunn wrote:
> On Fri, Nov 04, 2016 at 04:02:24PM +0100, Sebastian Frias wrote:
>> The delay can be applied at PHY or MAC level, but since
>> PHY drivers will apply the delay at PHY level when using
>> one of the "internal delay" declinations of RGMII mode
Hi Måns,
On 11/04/2016 04:18 PM, Måns Rullgård wrote:
> Sebastian Frias writes:
>
>> The delay can be applied at PHY or MAC level, but since
>> PHY drivers will apply the delay at PHY level when using
>> one of the "internal delay" declinations of RGMII mode
>> (like PHY_INTERFACE_MODE_RGMII_TXI
Limit number of kmemleak's false positives by including
.data.ro_after_init in memory scanning. To achieve this we need to add
symbols for start and end of the section to the linker scripts.
The problem has been uncovered by commit 56989f6d8568 ("genetlink: mark
families as __ro_after_init").
Si
Hi Paul,
On (11/03/16 21:17), Paul Burton wrote:
> > [..]
> > > + * The device tree stdout-path chosen node property was
> > > + * specified so we don't want to enable the first
> > > + * registered console just now in order to give the
> > > +
Hi David (and anyone else with an interest to review)
Following on from the request_key(2) page that I already posted,
I've pasted the current draft of the add_key(2) below. The
changes to this page are less wide-ranging than for request_key(2),
but you may also have suggestions for further chang
Hi David (and anyone else with an interest to review)
Triggered by Eugene Syromyatnikov's recent input for the keyctl(2)
man page, I've been doing a fair bit of work on improving the key
management syscall man pages, and wonder if I could ask you for
some review assistance?
First off, below, I'
Hi Peter,
Thank you for the patch.
On Friday 04 Nov 2016 09:58:02 Peter Ujfalusi wrote:
> When requesting the DMA channel it was mandatory that we do not have DMA
> resource nor valid DMA channel via DT. In this case the
> dma_request_slave_channel_compat() would fall back and request any channel
Hi David,
As part of the process of adopting the *.7 pages from
keyutils into man-pages, I've made some significant
extensions to the keyrings(7) page. Among the more notable
changes:
* Expanded the detail in "Key types"
* Addition of a section on the various /proc files
* Various other minor re
On Fri, Nov 04, 2016 at 04:38:54PM +1100, Stephen Rothwell wrote:
> Hi Liviu,
>
> On Thu, 3 Nov 2016 17:19:58 + Liviu Dudau wrote:
> >
> > I have revamped the mali-dp tree and rebased it on the newer
> > version of drm-next (which includes the drm-misc change) and pushed the
> > updated patch
On Fri, 4 Nov 2016, Joel Holdsworth wrote:
> The Lattice iCE40 is a family of FPGAs with a minimalistic architecture
> and very regular structure, designed for low-cost, high-volume consumer
> and system applications.
>
> This patch adds support to the FPGA manager for configuring the SRAM of
> i
On Fri, Nov 04, 2016 at 10:52:17AM +0800, Huang Shijie wrote:
> On Thu, Nov 03, 2016 at 06:16:16PM -0600, Catalin Marinas wrote:
> > On Thu, Nov 03, 2016 at 10:27:38AM +0800, Huang Shijie wrote:
> > > diff --git a/arch/arm64/mm/hugetlbpage.c b/arch/arm64/mm/hugetlbpage.c
> > > index 2e49bd2..4811ef
In order to support PHY switching on Amlogic GXL SoCs, add support for
16bit and 32bit registers sizes.
Reviewed-by: Andrew Lunn
Signed-off-by: Neil Armstrong
---
.../devicetree/bindings/net/mdio-mux-mmioreg.txt | 4 +-
drivers/net/phy/mdio-mux-mmioreg.c | 60
The Amlogic Meson GXL SoCs have an internal RMII PHY that is muxed with the
external RGMII pins.
In order to support switching between the two PHYs links, extended registers
size for mdio-mux-mmioreg must be added.
The DT related patches submitted as RFC in [3] will be sent in a separate
patchset
Add driver for the Internal RMII PHY found in the Amlogic Meson GXL SoCs.
This PHY seems to only implement some standard registers and need some
workarounds to provide autoneg values from vendor registers.
Some magic values are currently used to configure the PHY, and this a
temporary setup until
On 2016/11/4 1:57, Jaegeuk Kim wrote:
> On Thu, Nov 03, 2016 at 05:50:34PM +0800, Chao Yu wrote:
>> On 2016/11/3 1:23, Jaegeuk Kim wrote:
>>> On Wed, Nov 02, 2016 at 03:34:32PM +0800, Chao Yu wrote:
Hi Jaegeuk,
On 2016/10/21 10:28, Jaegeuk Kim wrote:
> This patch replaces the cop
On Fri, Nov 04, 2016 at 08:22:23AM -0700, Christoph Hellwig wrote:
> On Fri, Nov 04, 2016 at 03:18:11PM +, Al Viro wrote:
> > On Fri, Nov 04, 2016 at 03:24:24PM +0100, Sebastian Andrzej Siewior wrote:
> >
> > > Eventually Fedora and SUSE will migrate to PIE by default and by then we
> > > shou
Hi Rick,
On Friday 04 Nov 2016 12:51:00 Rick Chang wrote:
> On Thu, 2016-11-03 at 20:34 +0200, Laurent Pinchart wrote:
> > On Thursday 03 Nov 2016 20:33:12 Laurent Pinchart wrote:
> >> On Monday 31 Oct 2016 15:16:55 Rick Chang wrote:
> >>> Add a DT binding documentation for Mediatek JPEG Decoder o
This adds support for the THQ uDraw tablet for the PS3, as
4 separate device nodes, so that user-space can easily consume
events coming from the hardware.
Note that the touchpad two-finger support is fairly unreliable,
and a right-click can only be achieved with a two-finger tap
with the two finge
On Fri, Nov 04, 2016 at 04:13:24PM +0100, Paolo Bonzini wrote:
> I mean that the changes to scattered.c are small, so it makes no sense
> to split them. With an Acked-by I could simply take the patch into my
> tree.
On no, it is not about the size or which tree it goes thru - rather that
having st
On 04/11/2016 16:57, Borislav Petkov wrote:
> On Fri, Nov 04, 2016 at 04:13:24PM +0100, Paolo Bonzini wrote:
>> I mean that the changes to scattered.c are small, so it makes no sense
>> to split them. With an Acked-by I could simply take the patch into my
>> tree.
>
> On no, it is not about the
On 2016-11-04 15:54:27 [+], Al Viro wrote:
> Christoph, would you mind rereading what I posted upthread? I *am* aware of
> that clusterfuck, including the Balint's charming games with the
> reassignments,
> etc. Directly affected by the whole mess, actually.
Al, I am re-doing the patch with
Hello Will, Catalin, (and others in the To:)
As I mentioned to you both at LPC, over time there have been
a number of ARM-specific additions to ptrace(2), and these
have not been documented yet. Would I be able to appeal to
you (and others in the To:) to send patches for these changes
(and future
Hi Hans,
On 11/04/2016 12:53 PM, Hans de Goede wrote:
Hi,
On 04-11-16 08:52, Jacek Anaszewski wrote:
Initially the claim about no need for lock in brightness_show()
was valid as the function was just returning unchanged
LED brightness. After the addition of led_update_brightness() this
is no l
Hi Jan,
On (11/04/16 00:28), Jan Kara wrote:
[..]
> > I'm still not entirely sure if I want to split async pintk and printk
> > deadlock rework. these things want to come together, for a number of
> > reasons. or, at least, push the async printk before printk deadlock
> > rework.
>
> Yep, please
On 2016-11-04 16:10:48 [+], Al Viro wrote:
> And I don't see any way around severity:important against gcc-6. Unless the
> policy has changed, "has a major effect on the usability of a package, without
> rendering it completely unusable to everyone" still warrants that. And
> kernel developme
On 11/04/2016 08:51 AM, Neil Armstrong wrote:
> Add driver for the Internal RMII PHY found in the Amlogic Meson GXL SoCs.
>
> This PHY seems to only implement some standard registers and need some
> workarounds to provide autoneg values from vendor registers.
>
> Some magic values are currently
On 11/04/2016 08:51 AM, Neil Armstrong wrote:
> In order to support PHY switching on Amlogic GXL SoCs, add support for
> 16bit and 32bit registers sizes.
>
> Reviewed-by: Andrew Lunn
> Signed-off-by: Neil Armstrong
Reviewed-by: Florian Fainelli
--
Florian
> -Original Message-
> From: Stuart Yoder [mailto:stuart.yo...@nxp.com]
> Sent: Friday, October 21, 2016 9:02 AM
> To: gre...@linuxfoundation.org
> Cc: German Rivera ; de...@driverdev.osuosl.org;
> linux-kernel@vger.kernel.org; ag...@suse.de; a...@arndb.de; Leo Li
> ; Roy Pledge ; Roy Pled
On Fri, Nov 04, 2016 at 04:58:55PM +0100, Sebastian Andrzej Siewior wrote:
> On 2016-11-04 15:54:27 [+], Al Viro wrote:
> > Christoph, would you mind rereading what I posted upthread? I *am* aware of
> > that clusterfuck, including the Balint's charming games with the
> > reassignments,
> > e
On 11/04/2016 05:16 AM, Fabian Mewes wrote:
> Add Qualcomm QCA tagging introduced in cafdc45c9 to the
> list of supported protocols.
>
> Signed-off-by: Fabian Mewes
Acked-by: Florian Fainelli
--
Florian
On 11/04/2016 08:05 AM, Sebastian Frias wrote:
> Commit a999589ccaae ("phylib: add RGMII-ID interface mode definition")
> and commit 7d400a4c5897 ("phylib: add PHY interface modes for internal
> delay for tx and rx only") added several RGMII declinations:
> PHY_INTERFACE_MODE_RGMII_ID, PHY_INTERF
On Tue, Nov 01, 2016 at 02:13:43PM -0700, Babu Moger wrote:
> This is an attempt to cleanup watchdog handlers. Right now,
> kernel/watchdog.c implements both softlockup and hardlockup detectors.
> Softlockup code is generic. Hardlockup code is arch specific. Some
> architectures don't use hardlocku
On Fri, Nov 04, 2016 at 04:58:55PM +0100, Sebastian Andrzej Siewior wrote:
> On 2016-11-04 15:54:27 [+], Al Viro wrote:
> > Christoph, would you mind rereading what I posted upthread? I *am* aware of
> > that clusterfuck, including the Balint's charming games with the
> > reassignments,
> > e
On 11/04/2016 08:36 AM, Sebastian Frias wrote:
> Hi Måns,
>
> On 11/04/2016 04:18 PM, Måns Rullgård wrote:
>> Sebastian Frias writes:
>>
>>> The delay can be applied at PHY or MAC level, but since
>>> PHY drivers will apply the delay at PHY level when using
>>> one of the "internal delay" decli
On 11/04/2016 05:23 PM, Florian Fainelli wrote:
>
>
> On 11/04/2016 08:05 AM, Sebastian Frias wrote:
>> Commit a999589ccaae ("phylib: add RGMII-ID interface mode definition")
>> and commit 7d400a4c5897 ("phylib: add PHY interface modes for internal
>> delay for tx and rx only") added several RGMI
On Fri, Nov 04, 2016 at 04:31:40PM +0300, Sergei Shtylyov wrote:
> Hello.
>
> On 11/4/2016 8:11 AM, Jon Mason wrote:
>
> >Add support for the AMAC ethernet to the Broadcom Northstar2 SoC device
> >tree
> >
> >Signed-off-by: Jon Mason
> >---
> > arch/arm64/boot/dts/broadcom/ns2-svk.dts | 5 +
On Fri, 4 Nov 2016, Guenter Roeck wrote:
> > As above, unless absolutely critical to have floating point code then
> > the vDSO should just avoid all FP related issues and build soft-float.
>
> FWIW, my logic was quite simple: The rest of the kernel builds with
> -msoft-float, thus vDSO should do
On Tue, 1 Nov 2016, Kees Cook wrote:
> > How about we queue this up for 4.10?
>
> Okay, sounds good to me. Thanks!
Pulled to -next.
--
James Morris
From: Lijun Ou
In old code, It only added the interface for querying non-specific
QP. This patch mainly adds an interface for querying QP1.
Signed-off-by: Lijun Ou
Reviewed-by: Wei Hu (Xavier)
Signed-off-by: Salil Mehta
---
drivers/infiniband/hw/hns/hns_roce_hw_v1.c | 87 +
From: Lijun Ou
This patch modified the condition of notifying hardware loopback.
In hip06, RoCE Engine has several ports, one QP is related
to one port. hardware only support loopback in the same port,
not in the different ports.
So, If QP related to port N, the dmac in the QP context equals
th
From: "Wei Hu (Xavier)"
This patch modified the output query info qp_attr->port_num
to fix bug in hip06.
Signed-off-by: Wei Hu (Xavier)
Signed-off-by: Salil Mehta
---
drivers/infiniband/hw/hns/hns_roce_hw_v1.c |4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/
From: "Wei Hu (Xavier)"
This patch modified the logic of allocating memory using APIs in
hns RoCE driver. We used kcalloc instead of kmalloc_array and
bitmap_zero. And When kcalloc failed, call vzalloc to alloc
memory.
Signed-off-by: Wei Hu (Xavier)
Signed-off-by: Ping Zhang
Signed-off-by: Sal
From: Lijun Ou
In old code, the value of qp state from qpc was assigned for
attr->qp_state. The value may be an error while attr_mask &
IB_QP_STATE is zero.
Signed-off-by: Lijun Ou
Reviewed-by: Wei Hu (Xavier)
Signed-off-by: Salil Mehta
---
drivers/infiniband/hw/hns/hns_roce_hw_v1.c |2
From: Lijun Ou
This patch mainly adds self loopback support for CM.
Signed-off-by: Lijun Ou
Signed-off-by: Peter Chen
Reviewed-by: Wei Hu (Xavier)
Signed-off-by: Salil Mehta
---
drivers/infiniband/hw/hns/hns_roce_hw_v1.c | 11 +++
drivers/infiniband/hw/hns/hns_roce_hw_v1.h |2
From: Shaobo Xu
IB core has implemented the calculation of GIDs and the management
of GID tables, and it is now responsible to supply query function
for GIDs. So the calculation of GIDs and the management of GID
tables in the RoCE driver is redundant.
The patch is to implement the add_gid/del_gi
This patch correct the comment style errors caught by
checkpatch.pl script
Signed-off-by: Salil Mehta
---
drivers/infiniband/hw/hns/hns_roce_cmd.c|8 ++--
drivers/infiniband/hw/hns/hns_roce_device.h | 28 +++---
drivers/infiniband/hw/hns/hns_roce_eq.c |6 +--
drivers/i
From: "Wei Hu (Xavier)"
When using CM to establish connections, qp number that was freed
just now will be rejected by ib core. To fix these problem, We
change qpn allocation to round-robin mode. We added the round-robin
mode for allocating resources using bitmap. We use round-robin mode
for qp nu
On Fri, 4 Nov 2016, Jarkko Sakkinen wrote:
> On Fri, Nov 04, 2016 at 02:06:00PM +0200, Jani Nikula wrote:
> > On Fri, 04 Nov 2016, Jarkko Sakkinen
> > wrote:
> > > In order too make Documentation root directory cleaner move the tpm
> > > directory under Documentation/security.
> >
> > FWIW I li
From: "Wei Hu (Xavier)"
This patch added the code for refreshing CQ CI using TPTR in hip06
SoC.
We will send a doorbell to hardware for refreshing CQ CI when user
succeed to poll a cqe. But it will be failed if the doorbell has
been blocked. So hardware will read a special buffer called TPTR
to
The first attempt to read a register may fail because the clock may not
be enabled, and then the probe of musb driver will fail.
Call clk_prepare_enable() before the first register read.
Signed-off-by: Alexandre Bailon
---
drivers/usb/musb/da8xx.c | 17 -
1 file changed, 8 insert
During the init, the driver will use the mode to configure
the controller mode and the phy mode.
The PHY of DA8xx has some issues when the phy is forced in host or device.
Add way to skip the set mode and let the da8xx glue manage the phy mode.
Signed-off-by: Alexandre Bailon
---
drivers/usb/mus
If we configure the da8xx OTG phy in OTG mode, neither device or host
mode will work. That is because the PHY is not able to detect and notify
the driver that value of ID pin changed.
To work despite this hardware limitation, the da8xx glue implement a
workaround.
But to work, the workaround requir
The DA8xx OTG PHY has some issues when it is forced in host or
peripheral mode. Actually, most of the time, OTG is the best mode
because host or peripheral mode are only required for hardware that
miss some circuitry.
Init the PHY mode OTG mode by default.
Signed-off-by: Alexandre Bailon
---
dri
From: "Wei Hu (Xavier)"
This patch modified the macro for the timeout when cmd is
processing as follows:
Before modification:
enum {
HNS_ROCE_CMD_TIME_CLASS_A = 1,
HNS_ROCE_CMD_TIME_CLASS_B = 1,
HNS_ROCE_CMD_TIME_CLASS_C = 1,
};
After modifi
Hi,
On 04-11-16 17:06, Jacek Anaszewski wrote:
Hi Hans,
On 11/04/2016 12:53 PM, Hans de Goede wrote:
Hi,
On 04-11-16 08:52, Jacek Anaszewski wrote:
Initially the claim about no need for lock in brightness_show()
was valid as the function was just returning unchanged
LED brightness. After the
This patchset introduces some code improvements and fixes
for the identified problems in the HNS RoCE driver.
Lijun Ou (4):
IB/hns: Add the interface for querying QP1
IB/hns: add self loopback for CM
IB/hns: Modify the condition of notifying hardware loopback
IB/hns: Fix the bug for qp sta
Florian Fainelli writes:
> On 11/04/2016 08:36 AM, Sebastian Frias wrote:
>> Hi Måns,
>>
>> On 11/04/2016 04:18 PM, Måns Rullgård wrote:
>>> Sebastian Frias writes:
>>>
The delay can be applied at PHY or MAC level, but since
PHY drivers will apply the delay at PHY level when using
>>>
On Fri, Nov 04, 2016 at 04:09:37PM +, Maciej W. Rozycki wrote:
> On Fri, 4 Nov 2016, Guenter Roeck wrote:
>
> > > As above, unless absolutely critical to have floating point code then
> > > the vDSO should just avoid all FP related issues and build soft-float.
> >
> > FWIW, my logic was quite
Currently, the USB OTG of the da8xx doesn't work.
This series intend to fix them.
Change in v2:
* Fix the error path da8xx_musb_init()
Changes in v3:
* Remove the host workaround that was not working on every platform
* Add a property to the devicetree node of phy to force the phy in a specific
On 11/4/2016 11:25 AM, Don Zickus wrote:
On Tue, Nov 01, 2016 at 02:13:43PM -0700, Babu Moger wrote:
This is an attempt to cleanup watchdog handlers. Right now,
kernel/watchdog.c implements both softlockup and hardlockup detectors.
Softlockup code is generic. Hardlockup code is arch specific. S
Maciej Rozycki writes:
> On Fri, 4 Nov 2016, Guenter Roeck wrote:
>
> > > As above, unless absolutely critical to have floating point code
> > > then the vDSO should just avoid all FP related issues and build
> soft-float.
...
> > Anyway, isn't the kernel supposed to not use floating point operat
From: Markus Mayer
This series lets the user clear the CPUfreq stats by writing to a new
sysfs attribute.
Changes since v1:
- add new cpufreq_freq_attr_wr_perm() macro for write-only
attributes (because this is a separate commit, this patch has
turned into a series)
- remove
Hi Liviu,
On Fri, 4 Nov 2016 15:48:02 + Liviu Dudau wrote:
>
> Brian Starkey is a co-maintainer for the Mali DP tree, so his Signed-off-by
> alone should be good. Baoyou's patch is in my tree to stop him repeatedly
> send me the same patch over and over again :) But yes, I will add my
> Signe
Commit a999589ccaae ("phylib: add RGMII-ID interface mode definition")
and commit 7d400a4c5897 ("phylib: add PHY interface modes for internal
delay for tx and rx only") added several RGMII definitions:
PHY_INTERFACE_MODE_RGMII_ID, PHY_INTERFACE_MODE_RGMII_RXID and
PHY_INTERFACE_MODE_RGMII_TXID to d
From: Markus Mayer
Allow CPUfreq statistics to be cleared by writing anything to
/sys/.../cpufreq/stats/reset.
Signed-off-by: Markus Mayer
---
Documentation/cpu-freq/cpufreq-stats.txt | 6 ++
drivers/cpufreq/cpufreq_stats.c | 22 ++
2 files changed, 28 inserti
From: Markus Mayer
With the new attribute type, it is possible to create write-only
CPUfreq attributes.
Signed-off-by: Markus Mayer
---
include/linux/cpufreq.h | 4
1 file changed, 4 insertions(+)
diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h
index 5fa55fc..ed09930 10064
On Sat, Nov 05, 2016 at 03:55:03AM +1100, Stephen Rothwell wrote:
> Hi Liviu,
>
> On Fri, 4 Nov 2016 15:48:02 + Liviu Dudau wrote:
> >
> > Brian Starkey is a co-maintainer for the Mali DP tree, so his Signed-off-by
> > alone should be good. Baoyou's patch is in my tree to stop him repeatedly
On 11/03/16 23:53, Joe Perches wrote:
> On Thu, 2016-11-03 at 15:58 -0400, David Miller wrote:
>> From: Madalin Bucur
>> Date: Wed, 2 Nov 2016 22:17:26 +0200
>>
>>> This introduces the Freescale Data Path Acceleration Architecture
>>> +static inline size_t bpool_buffer_raw_size(u8 index, u8 cnt)
>
On Thu, Nov 03, 2016 at 08:57:49PM -0700, Andy Lutomirski wrote:
>
> The crypto request objects can live on the stack just fine. It's the
> request buffers that need to live elsewhere (or the alternative
> interfaces can be used, or the crypto core code can start using
> something other than scat
On 27 October 2016 at 14:05, Markus Mayer wrote:
> From: Markus Mayer
>
> This series contains the CPUfreq driver for Broadcom SoCs that use "AVS
> Firmware" for voltage and frequency scaling. All voltage and frequency
> transitions are performed by the firmware and are therefore hidden from
> Li
Sebastian Frias writes:
> Commit a999589ccaae ("phylib: add RGMII-ID interface mode definition")
> and commit 7d400a4c5897 ("phylib: add PHY interface modes for internal
> delay for tx and rx only") added several RGMII definitions:
> PHY_INTERFACE_MODE_RGMII_ID, PHY_INTERFACE_MODE_RGMII_RXID and
Hi Chris,
> https://cgit.freedesktop.org/drm-intel/
I pulled from there and rebuild my kernel. Rebooting and everything
is fine. Looks much better!!!
> https://cgit.freedesktop.org/drm-intel/commit/?h=drm-intel-next-queued&id=d2a84a76a3b970fa32e6eda3d85e7782f831379e
Do you want me to test this
Hi Linus,
My for-linus-4.9 branch:
git://git.kernel.org/pub/scm/linux/kernel/git/mason/linux-btrfs.git
for-linus-4.9
Has some fixes that Dave Sterba collected. We held off on these last
week because I was focused on the memory corruption testing.
I had asked you about pulling this directly f
Fixes: 90844f00049e9f42573fd31d7c32e8fd31d3fd07
drm: make drm_get_format_name thread-safe
Signed-off-by: Eric Engestrom
[danvet: Clarify that the returned pointer must be freed with
kfree().]
Signed-off-by: Daniel Vetter
Note (Rob Clark):
I think we need to be a bit careful
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