The frame synchronization error happens when the DMA engine attempts
to read what it believes to be the first word of the video buffer but
it cannot be recognized as such or when the LCDC is starved of data
due to insufficient bandwidth of the system interconnect.
On some SoCs (notably: da850) the
This series contains two patches needed to support revision 1 of the
LCD controller on da850 SoCs.
The first one implements palette loading - this is a resend of v4 of
the stand-alone patch.
The second resets the input FIFO in the DMA controller if a sync lost
error occurs and disables the interr
Revision 1 of the IP doesn't work if we don't load the palette (even
if it's not used, which is the case for the RGB565 format).
Add a function called from tilcdc_crtc_enable() which performs all
required actions if we're dealing with a rev1 chip.
Signed-off-by: Bartosz Golaszewski
---
drivers/
On Mon, Oct 31, 2016 at 11:40:06AM +0100, Martin Kepplinger wrote:
> In case the screenshot doesn't make it to you, here it is:
> https://postimg.org/image/5wl2wemt9/
Can you please send a boot-dmesg and 'lspci -v'? We need more
information about your system first.
Joerg
uzImage.bin is vmlinuz.bin wrapped in a legacy U-Boot image. Since
the extraction code is inside the image, it does not depend on the
boot loader to extract the kernel.
Signed-off-by: Maarten ter Huurne
---
arch/mips/Makefile | 4
arch/mips/boot/compressed/Makefile | 4
On 24/10/16 20:12, Jonathan Richardson wrote:
From: Jonathan Richardson
Add support for 32 and 64-bit versions of Broadcom's On-Chip OTP
controller. These controllers are used on SoC's such as Cygnus and
Stingray.
Reviewed-by: Ray Jui
Tested-by: Jonathan Richardson
Signed-off-by: Scott Bran
On 10/21/2016 06:08 PM, Andrew Lunn wrote:
> Hi Neil
>
>> Yes this would be a good idea if we were able to scan the internal
>> and external PHYs at the same time, but with our limited knowledge
>> the values we write in the register seems to switch a mux for the
>> whole RMII and MDIO signals to
On 10/21/2016 10:56 PM, Florian Fainelli wrote:
> On 10/21/2016 07:40 AM, Neil Armstrong wrote:
>> Add driver for the Internal RMII PHY found in the Amlogic Meson GXL SoCs.
>>
>> This PHY seems to only implement some standard registers and need some
>> workarounds to provide autoneg values from ven
October 27, 2016 4:36 PM, "Sean Young" wrote:
> Since we have to be able to switch between waiting and not waiting,
> we need some sort of ABI for this. I think this warrants a new ioctl;
> I'm not sure how else it can be done. I'll be sending out a patch
> shortly.
Hi Sean,
have you considered
I am Mrs. Gu Kailai and i intend to make a DONATION. Contact my personal E-mail
Via: mrsgukai...@post.cz for more details:
From: Joachim Eastwood
Add simple read only driver for the internal OTP (One Time Programmable)
memory found on all NXP LPC18xx and LPC43xx devices.
The OTP memory is split into 4 banks each with 4 32-bits word. Some of
the banks contain predefined data while others are for general purpose
and u
Hi Greg,
This patchset contains two new nvmem drivers one for Broadcom OTP and
other for LPC18xx OTP devices
These patches are reviewed and tested.
Can you please queue them up for next merge window (v4.10).
Thanks,
srini
Joachim Eastwood (2):
nvmem: add NXP LPC18xx OTP driver
nvmem: dt: d
From: Jonathan Richardson
Add support for 32 and 64-bit versions of Broadcom's On-Chip OTP
controller. These controllers are used on SoC's such as Cygnus and
Stingray.
Reviewed-by: Ray Jui
Tested-by: Jonathan Richardson
Signed-off-by: Scott Branden
Signed-off-by: Oza Pawandeep
Signed-off-by:
From: Jonathan Richardson
Reviewed-by: Ray Jui
Tested-by: Jonathan Richardson
Signed-off-by: Scott Branden
Signed-off-by: Oza Pawandeep
Signed-off-by: Jonathan Richardson
Signed-off-by: Srinivas Kandagatla
---
Documentation/devicetree/bindings/nvmem/brcm,ocotp.txt | 17 +
1
From: Joachim Eastwood
Documenation for the LPC18xx/43xx OTP memory bindings.
Signed-off-by: Joachim Eastwood
Signed-off-by: Srinivas Kandagatla
---
.../devicetree/bindings/nvmem/lpc1850-otp.txt| 20
1 file changed, 20 insertions(+)
create mode 100644 Documentati
This series adds two new drivers in order to better support the LCDC
rev1 present on the da850 boards.
The first patch adds a new memory driver which allows to write to the
DDR2/mDDR memory controller present on the da8xx SoCs.
The second patch adds a new bus driver which allows to interact with
Add the nodes for the MSTPRI configuration and DDR2/mDDR memory
controller drivers to da850.dtsi.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/boot/dts/da850.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index
Create the driver for the da8xx master peripheral priority
configuration and implement support for writing to the three
Master Priority registers on da850 SoCs.
Signed-off-by: Bartosz Golaszewski
---
.../devicetree/bindings/bus/ti,da850-mstpri.txt| 20 ++
drivers/bus/Kconfig
On Mon, Oct 31, 2016 at 09:27:05AM +0100, Pavel Machek wrote:
> > On Fri, Oct 28, 2016 at 01:21:36PM +0200, Pavel Machek wrote:
> > > > Has this been tested on a system vulnerable to rowhammer, and if so, was
> > > > it reliable in mitigating the issue?
> > > I do not have vulnerable machine near
The tilcdc driver is not yet ready for working together with the
dumb-vga-dac drm bridge. While the work on enabling drm_bridge
support in tilcdc continues, enable the VGA connector on da850-lcdk
with the following workaround: use the tilcdc-panel driver with
a set of common (and tested) resolution
Create a new driver for the da8xx DDR2/mDDR controller and implement
support for writing to the Peripheral Bus Burst Priority Register.
Signed-off-by: Bartosz Golaszewski
---
.../memory-controllers/ti-da8xx-ddrctl.txt | 20 +++
drivers/memory/Kconfig | 8 +
Enable the MSTPRI configuration and DDR2/mDDR memory controller
nodes on da850-lcdk. This is needed in order to adjust the memory
throughput constraints for better tilcdc support.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/boot/dts/da850-lcdk.dts | 8
1 file changed, 8 insertions(+
On Sun, Oct 30, 2016 at 11:00 PM, Fengguang Wu wrote:
>
> Ah the root cause is these reminding reports for old errors
Thanks for looking into it, the report looked a bit scary ;)
Linus
On 10/31/2016 05:18 AM, Sekhar Nori wrote:
On Tuesday 25 October 2016 11:24 PM, David Lechner wrote:
This fixes pwm name matching for DA850 familiy devices. When using device
tree, the da850_auxdata_lookup[] table caused pwm devices to have the exact
same name, which caused errors when trying to
Add a driver for the A53 Clock Controller. It is a hardware block that
implements a combined mux and half integer divider functionality. It can
choose between a fixed-rate clock or the dedicated A53 PLL. The source
and the divider can be set both at the same time.
This is required for enabling CPU
Changes since v6 (https://lkml.org/lkml/2016/9/7/347)
* Addressed various comments from Stephen
Changes since v5 (https://lkml.org/lkml/2016/2/1/407)
* Rebase to clk-next and update according to the recent API changes.
Changes since v4 (https://lkml.org/lkml/2015/12/14/367)
* Convert to builti
On Sat, Oct 29, 2016 at 02:08:12PM -0700, Linus Torvalds wrote:
> On Mon, Oct 24, 2016 at 5:06 PM, Linus Torvalds
> wrote:
> >
> > Then I could just enable "--binary" and "-M", and see what happens.
>
> Let's see what happens with 4.9-rc3. Will anybody notice? Did I do it right?
Looks good to me
Add support for hardware that can switch both parent clocks and divider
at the same time. This avoids generating intermediate frequencies from
either the old parent clock and new divider or new parent clock and
old divider combinations.
Signed-off-by: Georgi Djakov
---
drivers/clk/qcom/Makefile
Add support for the PLL, which generates the higher range of CPU
frequencies on MSM8916 platforms.
Signed-off-by: Georgi Djakov
---
.../devicetree/bindings/clock/qcom,a53pll.txt | 20 +
drivers/clk/qcom/Kconfig | 9 +++
drivers/clk/qcom/Makefile
From: Andrei Vagin
Date: Mon, 24 Oct 2016 18:29:13 -0700
> From: Andrey Vagin
>
> Each socket operates in a network namespace where it has been created,
> so if we want to dump and restore a socket, we have to know its network
> namespace.
>
> We have a socket_diag to get information about soc
When the system is suspended to S3 the BIOS might re-initialize certain
GPIO pins back to their original state or it may re-program interrupt mask
of others. For example Acer TravelMate B116-M had BIOS bug where certain
GPIO pin (MF_ISH_GPIO_5) was programmed to trigger on high level, and the
pin s
Printing the prefix does not provide any additional information. In
addition this makes the output look more consistent with pinctrl-intel.c.
Signed-off-by: Mika Westerberg
---
drivers/pinctrl/intel/pinctrl-cherryview.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/
Hi Michael,
On Mon, 31 Oct 2016 13:59:53 +1100 Michael Ellerman wrote:
>
> I don't run a hook, but I have a separate script which does checks like
> that. I've pulled out the Signed-off-by check into a script below, which
> might work for you, or at least give you something to start from.
Turns
Hi Michael,
On Fri, Sep 16, 2016 at 4:11 PM, Michael Opdenacker
wrote:
> I've just detected that the http://www.remword.com/kps_result/ page with the
> Kernel Patch Statistics is gone :(
Oops, I knew the statistics hadn't been updated in 2016, but not that the
domain had disappeared...
> Appare
If async suspend is enabled, the driver may access registers concurrently
with another instance which may fail because of the bug in Cherryview GPIO
hardware. Prevent this by taking the shared lock while accessing the
hardware in suspend and resume hooks.
Signed-off-by: Mika Westerberg
---
drive
Hi Peter,
Thanks for your review
On 31/10/16 13:55, Peter Rosin wrote:
> On 2016-10-26 10:53, Lee Jones wrote:
>> On Tue, 25 Oct 2016, Kieran Bingham wrote:
>>
>>> If a user provides a shortened string to match a device to the sysfs i2c
>>> interface it will match on the first string that contain
On Mon, Oct 31, 2016 at 09:10:57AM -0500, Rob Herring wrote:
> On Mon, Oct 31, 2016 at 7:28 AM, Geert Uytterhoeven
> wrote:
> > Hi Greg,
> >
> > On Mon, Oct 31, 2016 at 1:21 PM, Greg Kroah-Hartman
> > wrote:
> >> On Mon, Oct 31, 2016 at 11:12:45AM +0100, Geert Uytterhoeven wrote:
> >>> On Fri, Oc
On 2016-10-28 01:49, Peter Zijlstra wrote:
On Fri, Oct 28, 2016 at 12:57:05AM -0700, Vikram Mulukutla wrote:
On 2016-10-28 00:49, Peter Zijlstra wrote:
>On Fri, Oct 28, 2016 at 12:10:39AM -0700, Vikram Mulukutla wrote:
>>This RFC patch has been tested on live X86 machines with the following
>>sa
On Mon, Oct 31, 2016 at 09:07:24AM -0600, Greg Kroah-Hartman wrote:
> On Mon, Oct 31, 2016 at 09:10:57AM -0500, Rob Herring wrote:
> > On Mon, Oct 31, 2016 at 7:28 AM, Geert Uytterhoeven
> > wrote:
> > > Hi Greg,
> > >
> > > On Mon, Oct 31, 2016 at 1:21 PM, Greg Kroah-Hartman
> > > wrote:
> > >>
On Mon, 31 Oct 2016 11:08:28 +0100
Jesper Dangaard Brouer wrote:
> Trivial spelling fixes for Kconfig help text of config HWLAT_TRACER.
>
> Fixes: e7c15cd8a113 ("tracing: Added hardware latency tracer")
> Signed-off-by: Jesper Dangaard Brouer
Acked-by: Steven Rostedt
-- Steve
> ---
> kerne
From: Borislav Petkov
We already have the same functionality in usercopy_32.c. Share it with
64-bit and get rid of some more asm glue which is not needed anymore.
Signed-off-by: Borislav Petkov
---
Guys, please double-check me on this but I think the asm and the
access_ok() macros are equivale
On Mon, Oct 31, 2016 at 09:59:43AM -0400, Theodore Ts'o wrote:
> What is _rd and _wt supposed to stand for?
I think it's read and write, but I think the naming is highly
unfortunate. I started dabbling around with the patches a bit,
and to keep my sanity a started reaming it to _pages and _bvec
w
If something goes wrong with task stack refcounting and a stack
refcount hits zero too early, warn and leak it rather than
potentially freeing it early.
Signed-off-by: Andy Lutomirski
---
kernel/fork.c | 4
1 file changed, 4 insertions(+)
diff --git a/kernel/fork.c b/kernel/fork.c
index 62
From: Colin Ian King
Add missing space in a dev_err message and join wrapped text so
it does not span multiple lines. Fix spelling mistake on "unknown".
Signed-off-by: Colin Ian King
---
drivers/net/wireless/ath/ath9k/htc_hst.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff
> -Original Message-
> From: Vitaly Kuznetsov [mailto:vkuzn...@redhat.com]
> Sent: Monday, October 31, 2016 3:05 AM
> To: KY Srinivasan
> Cc: de...@linuxdriverproject.org; Van De Ven, Arjan
> ; linux-kernel@vger.kernel.org; Haiyang Zhang
>
> Subject: Re: [PATCH] Drivers: hv: vmbus: Rais
Found a couple of issues, will resubmit after cleaning up. Feel free to add
general feedback on the idea anyways in the meantime. Sorry for double post.
On Sun, Oct 30, 2016 at 11:12 AM, Moritz Fischer
wrote:
> Most of the drivers only support a subset of {PARTIAL, FULL}
> reconfiguration.
> Pull
> -Original Message-
> From: Greg KH [mailto:gre...@linuxfoundation.org]
> Sent: Monday, October 31, 2016 5:46 AM
> To: KY Srinivasan
> Cc: linux-kernel@vger.kernel.org; de...@linuxdriverproject.org;
> o...@aepfle.de; a...@canonical.com; vkuzn...@redhat.com;
> jasow...@redhat.com; leann.
> -Original Message-
> From: Greg KH [mailto:gre...@linuxfoundation.org]
> Sent: Monday, October 31, 2016 5:44 AM
> To: KY Srinivasan
> Cc: linux-kernel@vger.kernel.org; de...@linuxdriverproject.org;
> o...@aepfle.de; a...@canonical.com; vkuzn...@redhat.com;
> jasow...@redhat.com; leann.
check_sync() calls bucket_find_contain(), which in turn calls
dma_get_max_seg_size(), which dereferences the device pointer.
Signed-off-by: Maarten ter Huurne
---
lib/dma-debug.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/lib/dma-debug.c b/lib/dma-debug.c
index 8971370..84c6e88 100
Hi Rob,
On 10/31/2016 12:36 AM, Rob Herring wrote:
On Thu, Oct 27, 2016 at 03:00:23PM -0500, ttha...@opensource.altera.com wrote:
From: Thor Thayer
Add the Arria10 DevKit System Resource Chip register and state
monitoring module to the MFD.
Signed-off-by: Thor Thayer
---
Note: This needs to
On Sat, Oct 29, 2016 at 04:08:02PM +0800, Ming Lei wrote:
> For a non-cloned bio, bio_add_page() only returns failure when
> the io vec table is full, but in that case, bio->bi_vcnt can't
> be zero at all.
>
> So remove the impossible failure handling.
>
> Acked-by: Lars Ellenberg
> Signed-off-b
Why not keep the bio_add_page in the same spot as direct assignments
were before?
On Mon, Oct 31, 2016 at 3:20 AM, Russell King - ARM Linux
wrote:
> On Mon, Oct 24, 2016 at 08:04:47AM -0400, Alexander Duyck wrote:
>> The use of DMA_ATTR_SKIP_CPU_SYNC was not consistent across all of the DMA
>> APIs in the arch/arm folder. This change is meant to correct that so that
>> we get
On Sat, Oct 29, 2016 at 04:08:04PM +0800, Ming Lei wrote:
> When the bio is full, bio_add_pc_page() will return zero,
> so use this way to handle full bio.
>
> Also replace access to .bi_vcnt for pr_debug() with bio_segments().
>
> Signed-off-by: Ming Lei
Looks fine,
Reviewed-by: Christoph Hel
On Sat, Oct 29, 2016 at 04:08:08PM +0800, Ming Lei wrote:
> Avoid to access .bi_vcnt directly, because it may be not what
> the driver expected any more after supporting multipage bvec.
>
> Signed-off-by: Ming Lei
It would be really nice to have a comment in the code why it's
even checking for m
Looks fine,
Reviewed-by: Christoph Hellwig
On Sat, Oct 29, 2016 at 04:08:12PM +0800, Ming Lei wrote:
> The check on bio->bi_vcnt doesn't make sense in erase_end_io().
Agreed,
Reviewed-by: Christoph Hellwig
> On Oct 31, 2016, at 09:19, Sebastian Andrzej Siewior
> wrote:
>
> The raw_write_seqcount_begin() in nfs4_reclaim_open_state() bugs me
> because it maps to preempt_disable() in -RT which I can't have at this
> point. So I took a look at the code.
> It the lockdep part was removed in commit abb
Please pull this fix for 4.9.
The following changes since commit 2a26d99b251b8625d27aed14e97fc10707a3a81f:
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net (2016-10-29
20:33:20 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/jmorris
Btw, the lib/iov_iter.c code that iterates over bvec currently
expects single-page segments. Is the loop code fine with that?
Even if it is I think we'd be much better off if it becomes multipage
segment aware.
Looks fine,
Reviewed-by: Christoph Hellwig
Please pick up my "pktcdvd: don't scribble over the bvec array"
patch instead of the pktcdvd patches in this series.
On Sun, Oct 30, 2016 at 02:38:58PM +, Catalin Marinas wrote:
> On Fri, Oct 21, 2016 at 02:28:46PM +0530, Neeraj Upadhyay wrote:
> > Fix parameter name for __page_to_voff, to match its definition.
> > At present, we don't see any issue, as page_to_virt's caller
> > declares 'page'.
> >
> > Fixe
The new sun4i mfd driver is lacking a dependency, triggering very rarely
int randconfig kernel builds:
drivers/mfd/sun4i-gpadc.o: In function `sun4i_gpadc_probe':
sun4i-gpadc.c:(.text.sun4i_gpadc_probe+0x110): undefined reference to
`devm_regmap_add_irq_chip'
This adds a 'select REGMAP_IRQ', as
On Mon, 31 Oct 2016, Vadim Pasternak wrote:
> Since mlx-platform is not an architectural driver, it is moved out
> of arch/x86/platform to drivers/platform/x86.
> Relevant Makefile and Kconfig are updated.
>
> Signed-off-by: Vadim Pasternak
Acked-by: Thomas Gleixner
From: Colin Ian King
Trival fixes, minor spelling mistakes in comments and in a KERN_INFO
message.
Signed-off-by: Colin Ian King
---
drivers/scsi/mpt3sas/mpt3sas_scsih.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/scsi/mpt3sas/mpt3sas_scsih.c
b
I think we'll just need a version zero_fill_bio with a length argument
and let that handle all the bvec access. I have vague memories that
Kent posted one a while ago, Ccing him.
On Sat, Oct 29, 2016 at 04:08:18PM +0800, Ming Lei wrote:
> Signed-off-by: Ming Lei
> ---
> fs/buffer.c | 7 ++-
On Sat, Oct 29, 2016 at 04:08:25PM +0800, Ming Lei wrote:
> There are lots of direct access to .bi_vcnt & .bi_io_vec
> of bio, and it isn't ready to support multipage bvecs
> for BTRFS, so set NO_MP for these request queues.
For one bio is an I/O submitter, it has absolutely no business changing
q
On Sat, Oct 29, 2016 at 04:08:27PM +0800, Ming Lei wrote:
> Some drivers(such as dm) should be capable of dealing with multipage
> bvec, but the incoming bio may be too big, such as, a new singlepage bvec
> bio can't be cloned from the bio, or can't be allocated to singlepage
> bvec with same size.
On Sat, Oct 29, 2016 at 04:08:45PM +0800, Ming Lei wrote:
> In bio_check_pages_dirty(), bvec->bv_page is used as flag
> for marking if the page has been dirtied & released, and if
> no, it will be dirtied in deferred workqueue.
>
> With multipage bvec, we can't do that any more, so change
> the lo
If the system runs out of SW-IOMMU space, changes are high successive
requests will fail, too, flooding the kernel log. This is true
especially for streaming DMA, which is typically used repeatedly outside
the driver's initialization routine. Add rate-limiting to fix this.
While at it, get rid o
On architectures like arm64, swiotlb is tied intimately to the core
architecture DMA support. In addition, ZONE_DMA cannot be disabled.
To aid debugging and catch devices not supporting DMA to memory outside
the 32-bit address space, add a kernel command line option
"swiotlb=nobounce", which disab
Hi Konrad, Jon,
This patch series contains two improvements for the SWIOTLB subsystem.
The first patch adds rate-limiting to an error message, to avoid
flooding the kernel log.
The second patch adds a kernel command line option to aid debugging when
developing support for DMA to memory ou
From: Michael Scott
Initial pinctrl driver for QCOM msm8994 platforms.
In order to continue the initial board support for QCOM msm8994/msm8992
presented in patches from Jeremy McNicoll , let's put
a proper pinctrl driver in place.
Currently, the DT for these platforms uses the msm8x74 pinctrl d
On Wed, Oct 26, 2016 at 07:01:12PM +0200, Bartlomiej Zolnierkiewicz wrote:
>
> Hi,
>
> On Wednesday, July 13, 2016 04:37:31 PM Arnd Bergmann wrote:
> > On Wednesday, July 13, 2016 12:59:23 PM CEST Bartlomiej Zolnierkiewicz
> > wrote:
> > >
> > > On Friday, July 08, 2016 10:23:48 PM Arnd Bergman
The patch
ASoC: sun4i-codec: return error code instead of NULL when create_card fails
has been applied to the asoc tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in th
On Monday, 31 October 2016 12:14:55 GMT Paul Burton wrote:
> If a device tree specified a preferred device for kernel console output
> via the stdout-path or linux,stdout-path chosen node properties there's
> no guarantee that it will have specified a device for which we have a
> driver. It may als
On 10/31/2016 08:45 AM, Hashcode wrote:
From: Michael Scott
Initial pinctrl driver for QCOM msm8994 platforms.
In order to continue the initial board support for QCOM msm8994/msm8992
presented in patches from Jeremy McNicoll , let's put
a proper pinctrl driver in place.
Currently, the DT fo
This fixes the case where a signal that was sent by a user-namespaced
process appears to come from a different uid. This happens if the following
conditions are met:
- sender is in a user namespace
- sender's uid isn't mapped into sender's user namespace
- target is in the init user namespace
On 2016-10-31 15:30:02 [+], Trond Myklebust wrote:
> > On Oct 31, 2016, at 09:19, Sebastian Andrzej Siewior
> > wrote:
> > The list_for_each_entry() in nfs4_reclaim_open_state:
> > It seems that this lock protects the ->so_states list among other
> > atomic_t & flags members. So at the begin
On Thu, Oct 27, 2016 at 12:17:24AM +0200, Maxime Ripard wrote:
> Hi Rob,
>
> On Wed, Oct 26, 2016 at 05:13:46PM -0500, Rob Herring wrote:
> > On Thu, Oct 20, 2016 at 11:43:37AM +0800, Chen-Yu Tsai wrote:
> > > Some rgb-to-vga bridges have an enable GPIO, either directly tied to
> > > an enable pin
On 10/31/2016 07:14 AM, Paul Burton wrote:
If a device tree specified a preferred device for kernel console output
via the stdout-path or linux,stdout-path chosen node properties there's
no guarantee that it will have specified a device for which we have a
driver. It may also be the case that we
Initial pinctrl driver for QCOM msm8994 platforms.
In order to continue the initial board support for QCOM msm8994/msm8992
presented in patches from Jeremy McNicoll , let's put
a proper pinctrl driver in place.
Currently, the DT for these platforms uses the msm8x74 pinctrl driver to enable
basic
Initial pinctrl driver for QCOM msm8994 platforms.
In order to continue the initial board support for QCOM msm8994/msm8992
presented in patches from Jeremy McNicoll , let's put
a proper pinctrl driver in place.
Currently, the DT for these platforms uses the msm8x74 pinctrl driver to
enable basic
On 10/31/2016 06:45 PM, Geert Uytterhoeven wrote:
If the system runs out of SW-IOMMU space, changes are high successive
s/changes/chances/?
requests will fail, too, flooding the kernel log. This is true
especially for streaming DMA, which is typically used repeatedly outside
the driver's
Use the module_cpu_feature_match to make sure the system has
HWCAP_AES to use the module.
Cc: Ard Biesheuvel
Signed-off-by: Suzuki K Poulose
---
arch/arm64/crypto/aes-ce-ccm-glue.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/crypto/aes-ce-ccm-glue.c
b/ar
The arm64 kernel assumes that FP/ASIMD units are always present
and accesses the FP/ASIMD specific registers unconditionally. This
could cause problems when they are absent. This patch adds the
support for kernel handling systems without FP/ASIMD by skipping the
register access within the kernel. F
On Mon, Oct 31, 2016 at 7:04 AM, Jann Horn wrote:
> On machines with sizeof(unsigned long)==8, this ensures that the more
> significant 32 bits of stack_canary are random, too.
> stack_canary is defined as unsigned long, all the architectures with stack
> protector support already pick the stack_c
The hypervisor may not have full access to the kernel data structures
and hence cannot safely use cpus_have_cap() helper for checking the
system capability. Add a safe helper for hypervisors to check a constant
system capability, which *doesn't* fall back to checking the bitmap
maintained by the ke
This series adds supports to the kernel and KVM hyp to handle
systems without FP/ASIMD properly. At the moment the kernel
doesn't check if the FP unit is available before accessing
the registers (e.g during context switch). Also for KVM,
we trap the FP/ASIMD accesses and handle it by injecting an
u
On 10/31/16 16:19, Bartosz Golaszewski wrote:
> Revision 1 of the IP doesn't work if we don't load the palette (even
> if it's not used, which is the case for the RGB565 format).
>
> Add a function called from tilcdc_crtc_enable() which performs all
> required actions if we're dealing with a rev1
On Mon 24-10-16 14:36:25, Kirill A. Shutemov wrote:
> On Thu, Oct 13, 2016 at 03:18:02PM +0200, Jan Kara wrote:
> > On Thu 13-10-16 15:08:44, Kirill A. Shutemov wrote:
> > > On Thu, Oct 13, 2016 at 11:44:41AM +0200, Jan Kara wrote:
> > > > On Thu 15-09-16 14:54:59, Kirill A. Shutemov wrote:
> > > >
From: Alexander Usyskin
NFC version reply size checked against only header size, not against
full message size. That may lead potentially to uninitialized memory access
in version data.
That leads to warnings when version data is accessed:
drivers/misc/mei/bus-fixup.c: warning: '*((void *)&ver+1
On Fri, Oct 28, 2016 at 01:22:21AM +, Kuninori Morimoto wrote:
> +static struct platform_driver snd_dw_hdmi_driver = {
> + .probe = snd_dw_hdmi_probe,
The driver must have a .remove function, because the platform device it
is binding against can appear and disappear.
--
RMK's Patch syst
> On Oct 31, 2016, at 11:56, Sebastian Andrzej Siewior
> wrote:
>
> On 2016-10-31 15:30:02 [+], Trond Myklebust wrote:
>>> On Oct 31, 2016, at 09:19, Sebastian Andrzej Siewior
>>> wrote:
>>> The list_for_each_entry() in nfs4_reclaim_open_state:
>>> It seems that this lock protects the ->s
On Sat, Oct 29, 2016 at 11:09:55AM +0100, Ard Biesheuvel wrote:
> On 21 September 2016 at 16:35, Ard Biesheuvel
> wrote:
> > Since I will be co-maintaining the EFI subsystem, it makes sense to
> > mention the ARM and arm64 EFI bits in the EFI section in MAINTAINERS
> > so that Matt, the list and
From: Steve Twiss
MFD support for DA9061 is provided as part of the DA9062 device driver.
The registers header file adds two new chip variant IDs defined in DA9061
and DA9062 hardware. The core header file adds new software enumerations
for listing the valid DA9061 IRQs and a da9062_compatible_t
From: Steve Twiss
Device tree binding information for DA9062 and DA9061 thermal junction
temperature monitor.
Binding descriptions for the DA9061 and DA9062 thermal TJUNC supervisor
device driver, using a single THERMAL_TRIP_HOT trip-wire and allowing for
a configurable polling period for over-t
From: Steve Twiss
Add binding information for DA9061 onkey.
This patch updates the compatible string "dlg,da9061-onkey" to support
DA9061, removes the reference to KEY_SLEEP (which the driver no longer
supports) and fixes a typo in the example for DA9063.
Supporting KEY_SLEEP was not the genera
From: Steve Twiss
Regulator support for the DA9061 is added into the DA9062 regulator driver.
The regulators for DA9061 differ from those of DA9062.
A new DA9061 enumeration list for the LDOs and Bucks supported by this
device is added. Regulator information added: the old regulator
information
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