This is a follow-up for the series[1] adding new bus and memory drivers
to better support the TI LCD controller on the da850-lcdk board.
The general consensus of the discussion that followed was that DT is
not the right tool for this kind of SoC performance tweaks.
In order to avoid committing to
On Mon, Oct 24, 2016 at 11:46:18PM +0100, Colin King wrote:
> From: Colin Ian King
>
> trivial fix to spelling mistake in dev_err message
>
> Signed-off-by: Colin Ian King
One of these days I'll learn to spell.
Acked-by: Jon Mason
> ---
> drivers/net/ethernet/broadcom/bgmac.c | 2 +-
> 1 f
Hi Lee,
On Tue, 25 Oct 2016, Lee Jones wrote:
> On Tue, 25 Oct 2016, Peter Griffin wrote:
>
> > Hi Lee,
> >
> > On Tue, 25 Oct 2016, Lee Jones wrote:
> >
> > > On Mon, 24 Oct 2016, Peter Griffin wrote:
> > >
> > > > Hi Lee,
> > > >
> > > > On Mon, 24 Oct 2016, Lee Jones wrote:
> > > > > On T
On Mon, Oct 24, 2016 at 11:40:30PM +0200, Arnd Bergmann wrote:
> gcc warns about an uninitialized pointer dereference in the vlan
> priority handling:
>
> net/core/flow_dissector.c: In function '__skb_flow_dissect':
> net/core/flow_dissector.c:281:61: error: 'vlan' may be used uninitialized in
>
This series adds supports to the kernel and KVM hyp to handle
systems without FP/ASIMD properly. At the moment the kernel
doesn't check if the FP unit is available before accessing
the registers (e.g during context switch). Also for KVM,
we trap the FP/ASIMD accesses and handle it by injecting an
u
The hypervisor may not have full access to the kernel data structures
and hence cannot safely use cpus_have_cap() helper for checking the
system capability. Add a safe helper for hypervisors to check a constant
system capability, which *doesn't* fall back to checking the bitmap
maintained by the ke
The arm64 kernel assumes that FP/ASIMD units are always present
and accesses the FP/ASIMD specific registers unconditionally. This
could cause problems when they are absent. This patch adds the
support for kernel handling systems without FP/ASIMD by skipping the
register access within the kernel. F
On 25/10/16 14:08, Jerome Brunet wrote:
> On Tue, 2016-10-25 at 11:38 +0100, Marc Zyngier wrote:
>>>
>> On 25/10/16 10:14, Linus Walleij wrote:
>>>
>>> On Fri, Oct 21, 2016 at 11:06 AM, Jerome Brunet >> om> wrote:
>>>
>
> Isn't this usecase (also as described in the cover letter) a
>>>
If we configure the da8xx OTG phy in OTG mode, neither device or host
mode will work. That is because the PHY is not able to detect and notify
the driver that value of ID pin changed.
To work despite this hardware limitation, the da8xx glue implement a
workaround.
But to work, the workaround requir
The first attempt to read a register may fail because the clock may not
be enabled, and then the probe of musb driver will fail.
Call clk_prepare_enable() before the first register read.
Signed-off-by: Alexandre Bailon
---
drivers/usb/musb/da8xx.c | 12 ++--
1 file changed, 6 insertions(
When the phy is forced in host mode, only the first hot plug and
hot remove works. That is actually because the driver execute the
OTG workaround, whereas it is not applicable in host or device mode.
Indeed, to work correctly, the VBUS sense and session end comparator
must be enabled, what is only
Currently, the USB OTG of the da8xx doesn't work.
This series intend to fix them.
Alexandre Bailon (3):
usb: musb: da8xx: Only execute the OTG workaround when phy in OTG mode
usb: musb: da8xx: Fixup the OTG workaround
usb: musb: da8xx: Call earlier clk_prepare_enable()
drivers/phy/phy-da8x
On Tue, 25 Oct 2016 11:29:16 +0200
luca abeni wrote:
> Hi Daniel,
>
> On Tue, 25 Oct 2016 11:09:52 +0200
> Daniel Bristot de Oliveira wrote:
> [...]
> > > +static void add_running_bw(struct sched_dl_entity *dl_se, struct
> > > dl_rq *dl_rq) +{
> > > + u64 se_bw = dl_se->dl_bw;
> > > +
> > > + d
On Tue, 25 Oct 2016, Mason wrote:
> Is the irq_mask() call-back exposed via some module-visible API?
No. And there is no reason to do so.
Thanks,
tglx
Hi Suzuki,
On 25 October 2016 at 14:50, Suzuki K Poulose wrote:
> The arm64 kernel assumes that FP/ASIMD units are always present
> and accesses the FP/ASIMD specific registers unconditionally. This
> could cause problems when they are absent. This patch adds the
> support for kernel handling sys
On 25/10/2016 12:45, Marc Zyngier wrote:
> On 25/10/16 09:36, Mason wrote:
>> On 25/10/2016 10:29, Sebastian Frias wrote:
>>
>>> On 10/24/2016 06:55 PM, Thomas Gleixner wrote:
>>>
On Mon, 24 Oct 2016, Mason wrote:
> For the record, setting the IRQ_DISABLE_UNLAZY flag for this device
>
On 10/24/2016 05:02 PM, Colin King wrote:
> From: Colin Ian King
>
> trivial fix to spelling mistake in pr_debug message
>
> Signed-off-by: Colin Ian King
Reviewed-by: Nathan Fontenot
> ---
> arch/powerpc/platforms/pseries/hotplug-cpu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-
On 10/25, Roman Pen wrote:
>
> This patch avoids allocation of kthread structure on a stack, and simply
> uses kmalloc.
Oh. I didn't even read this patch, but I have to admit I personally do not
like it. I can be wrong, but imo this is the step to the wrong direction.
struct kthread is already bl
Hi James,
On 10/20/2016 10:56 AM, James Liao wrote:
-static int scpsys_probe(struct platform_device *pdev)
+static void init_clks(struct platform_device *pdev, struct clk *clk[CLK_MAX])
I prefer struct clk **clk.
+{
+ int i;
+
+ for (i = CLK_NONE + 1; i < CLK_MAX; i++)
+
On Tue, Oct 25, 2016 at 07:55:00AM +0200, Julia Lawall wrote:
> On Mon, 24 Oct 2016, Mark Brown wrote:
> > You split out a few drivers as separate patches but not these ones -
> > what's special about these ones?
> If it's preferred, I could send them all one file at a time, or when the
> maintai
On Tue, Oct 25, 2016 at 11:07:47AM +0200, Michal Hocko wrote:
> Acked-by: Michal Hocko
Thank you.
> I would prefer to have the PF_MEMALLOC condition in a check on its own
> with a short explanation that we really do not want to recurse to the
> reclaim due to stack overflows.
Okay, fair enough.
I forget to add a dummy function in case the CONFIG_GENERIC_PHY
is disabled.
Signed-off-by: Randy Li
---
include/linux/phy/phy.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h
index ee1bed7..78bb0d7 100644
--- a/include/linux/phy/phy.
On 10/25, Roman Penyaev wrote:
>
> On Tue, Oct 25, 2016 at 2:56 PM, Oleg Nesterov wrote:
> > On 10/25, Roman Pen wrote:
> >>
> >> struct task_struct *wq_worker_sleeping(struct task_struct *task)
> >> {
> >> - struct worker *worker = kthread_data(task), *to_wakeup = NULL;
> >> + struct wo
On Tue, 2016-10-25 at 14:38 +0100, Marc Zyngier wrote:
> On 25/10/16 14:08, Jerome Brunet wrote:
> >
> > On Tue, 2016-10-25 at 11:38 +0100, Marc Zyngier wrote:
> > >
> > > >
> > > >
> > > On 25/10/16 10:14, Linus Walleij wrote:
> > > >
> > > >
> > > > On Fri, Oct 21, 2016 at 11:06 AM, Jerome
This implements only the very basic protocol "Mode A", just to make the
device functional. Patches to implement "Mode C" that uses better bulking
and is interrupt-driver may follow.
The device essentially speaks the same protocol as USB CCID devices do over
the bulk endpoints. The driver exchanges
On Mon, Oct 24, 2016 at 09:27:57AM -0700, Joe Perches wrote:
> On Mon, 2016-10-24 at 12:31 +0100, Mark Rutland wrote:
> > On Sun, Oct 23, 2016 at 01:40:49PM -0700, Joe Perches wrote:
> > > commit db4b0710fae9 ("arm64: fix show_regs fallout from KERN_CONT
> > > changes")
> > > corrected the KERN_CO
Hi,
has it been merged somewhere? I can't find it in linux-next yet.
BR and thanks,
Nikolaus
> Am 30.09.2016 um 10:52 schrieb Laurent Pinchart
> :
>
> Hello Nikolaus,
>
> On Friday 30 Sep 2016 10:28:40 H. Nikolaus Schaller wrote:
>>> Am 29.09.2016 um 10:54 schrieb Laurent Pinchart:
>>> On Thurs
On Tue, Oct 25, 2016 at 02:55:48PM +0200, Axel Haslam wrote:
> To be able to use regulator to handle the overcurrent pin, i need to be able
> to somehow retrieve the over current pin state from the regulator driver.
What makes you say that, none of the existing users need this?
> As i was tryi
All 4 backport patches:
Acked-by: Johannes Weiner
Thank you Michal.
This adds the device tree node for the usb otg
controller present in the da850 family of SoC's.
This also enables the otg usb controller for the lcdk board.
Signed-off-by: Alexandre Bailon
---
arch/arm/boot/dts/da850-lcdk.dts | 8
arch/arm/boot/dts/da850.dtsi | 15 +++
From: Petr Kulhavy
DT binding for the TI DA8xx/OMAP-L1x/AM17xx/AM18xx MUSB driver.
Signed-off-by: Petr Kulhavy
Signed-off-by: Alexandre Bailon
---
.../devicetree/bindings/usb/da8xx-usb.txt | 43 ++
1 file changed, 43 insertions(+)
create mode 100644 Documentation
From: Petr Kulhavy
This adds DT support for TI DA8xx/OMAP-L1x/AM17xx/AM18xx MUSB driver
Signed-off-by: Petr Kulhavy
Signed-off-by: Alexandre Bailon
---
drivers/usb/musb/da8xx.c | 76 ++--
1 file changed, 67 insertions(+), 9 deletions(-)
diff --git
The purpose of this series is to add DT support to the da8xx USB OTG.
This series should apply and build without any issues but it has
some dependencies on "Add DT support for ohci-da8xx" series.
Without it, the phy init will fail and then the da8xx driver will also fail.
Alexandre Bailon (1):
A
On 20.10.2016 14:20, Suganath Prabu S wrote:
> Added Device ID's for SAS35 devices (Ventura, Crusader, Harpoon &
> Tomcat) and updated mpi header file for the same. Also added
> "is_gen35_ioc" to MPT3SAS_ADAPTER structure for identifying SAS35 adapters.
>
> Signed-off-by: Chaitra P B
> Signed-off-
From: Petr Kulhavy
This adds the function musb_get_mode() to get the DT property "dr_mode"
Signed-off-by: Petr Kulhavy
Acked-by: Sergei Shtylyov
Signed-off-by: Alexandre Bailon
---
drivers/usb/musb/musb_core.c | 19 +++
drivers/usb/musb/musb_core.h | 5 +
2 files changed
On 20.10.2016 14:20, Suganath Prabu S wrote:
> For SAS35 devices MSIX vectors are inceased to 128 from 96. To support this
> Reply post host index register count is increased to 16. Also variable
> msix96_vector is replaced with combined_reply_queue and variable
> combined_reply_index_count is adde
On 20.10.2016 14:20, Suganath Prabu S wrote:
> An UNMAP command on a PI formatted device will leave the Logical Block
> Application Tag and Logical Block Reference Tag as all F's (for those LBAs
> that are unmapped). To avoid IO errors if those LBAs are subsequently read
> before they are written w
On Sun, Oct 23, 2016 at 11:11:18AM -0700, Linus Torvalds wrote:
>
> For example, one of the really historical uses for partial lines is this:
>
>pr_info("Checking 'hlt' instruction... ");
>
>if (!boot_cpu_data.hlt_works_ok) {
>pr_cont("disabled\n");
>
On 10/25, Peter Zijlstra wrote:
>
> On Mon, Oct 24, 2016 at 05:39:08PM +0200, Oleg Nesterov wrote:
> > On 10/24, Peter Zijlstra wrote:
> > >
> > > --- a/kernel/events/core.c
> > > +++ b/kernel/events/core.c
> > > @@ -1257,7 +1257,14 @@ static u32 perf_event_pid(struct perf_event
> > > *event, stru
On Mon 2016-10-24 19:22:59, Linus Torvalds wrote:
> On Mon, Oct 24, 2016 at 7:06 PM, Linus Torvalds
> wrote:
> > On Mon, Oct 24, 2016 at 6:55 PM, Sergey Senozhatsky
> > wrote:
> >>
> >> I think cont_flush() should grab the logbuf_lock lock, because
> >> it does log_store() and touches the cont.le
On 20.10.2016 14:20, Suganath Prabu S wrote:
> Removing macro "MPT_DEVICE_TLR_ON" defined in header file as its unused
>
> Signed-off-by: Chaitra P B
> Signed-off-by: Sathya Prakash
> Signed-off-by: Suganath Prabu S
> ---
> drivers/scsi/mpt3sas/mpt3sas_base.h | 1 -
> 1 file changed, 1 deletion
On 20.10.2016 14:20, Suganath Prabu S wrote:
> No. of MSIX vectors supported = min (Total no. of CPU cores,
> MSIX vectors supported by card)
>
> when RDPQ is disabled "max_msix_vectors" module parameter which was
> declared as global was set to '8' and hence if there are more than one card
> in sy
On 20.10.2016 14:20, Suganath Prabu S wrote:
> Support Atomic Request Descriptors for Ventura/SAS35 devices.
>
> Signed-off-by: Chaitra P B
> Signed-off-by: Sathya Prakash
> Signed-off-by: Suganath Prabu S
> ---
Reviewed-by: Tomas Henzl
Tomas
On 25/10/16 15:22, Jerome Brunet wrote:
> On Tue, 2016-10-25 at 14:38 +0100, Marc Zyngier wrote:
>> On 25/10/16 14:08, Jerome Brunet wrote:
>>>
>>> On Tue, 2016-10-25 at 11:38 +0100, Marc Zyngier wrote:
>
>
On 25/10/16 10:14, Linus Walleij wrote:
>
>
> On Fri, Oct 21,
On Tue, 25 Oct 2016, Joel Holdsworth wrote:
>
> > Hi Joel,
> >
> > Thanks for submitting your driver!
> >
> > I didn't see any huge problems, just minor things below...
> >
> > Alan
> >
>
> Hi Alan, Thanks for your feedback. I've implemented all your suggestions and
> I'll resubmit.
>
> I h
On 20.10.2016 14:20, Suganath Prabu S wrote:
> Use le16_to_cpu only for accessing two byte data provided by controller.
>
> Signed-off-by: Chaitra P B
> Signed-off-by: Sathya Prakash
> Signed-off-by: Suganath Prabu S
Reviewed-by: Tomas Henzl
Tomas
Linus suggested we try to remove some of the low-hanging fruit related
to kernel address exposure in dmesg. The only leaks I see on my local
system are:
Freeing SMP alternatives memory: 32K (9e309000 - 9e311000)
Freeing initrd memory: 10588K (a0b736b42000 - a0b73759900
These are some changes suggested by Linus to remove some kernel address
exposures in printk. Most notably, the x86 stack dump no longer prints
full kernel text addresses.
There's also a fix for the faddr2line script which is used for
converting a function offset into a source code file name and l
For mostly historical reasons, the x86 oops dump shows the raw stack
values:
...
[registers]
Stack:
880079af7350 880079905400 c98f3ae0
a0196610 0001 0001 87654321
0002 0
On Tue 25-10-16 10:10:50, Johannes Weiner wrote:
> On Tue, Oct 25, 2016 at 11:07:47AM +0200, Michal Hocko wrote:
> > Acked-by: Michal Hocko
>
> Thank you.
>
> > I would prefer to have the PF_MEMALLOC condition in a check on its own
> > with a short explanation that we really do not want to recur
Printing kernel text addresses in stack dumps is of questionable value,
especially now that address randomization is becoming common.
It can be a security issue because it leaks kernel addresses. It also
affects the usefulness of the stack dump. Linus says:
"I actually spend time cleaning up
On 25/10/16 15:44, Sören Brinkmann wrote:
> On Tue, 2016-10-25 at 12:49:33 +0200, Thomas Gleixner wrote:
>> On Tue, 25 Oct 2016, Zubair Lutfullah Kakakhel wrote:
>>> On 10/21/2016 10:48 AM, Marc Zyngier wrote:
Shouldn't you return an error if irq is zero?
>>>
>>> I'll add the following fo
I'm not sure how we missed this problem before. When I take a function
address and size from an oops and give it to faddr2line, it usually
complains about a size mismatch:
$ scripts/faddr2line ~/k/vmlinux write_sysrq_trigger+0x51/0x60
skipping write_sysrq_trigger address at 0x815731a1
Add documentation for new FPGA bridge class's sysfs interface.
Signed-off-by: Alan Tull
Acked-by: Moritz Fischer
--
v15: Document added in v15 of patch set
v16: No change to this patch in v16 of patch set
v17: No change to this patch in v17 of patch set
v18: No change to this patch in v18 of pat
This framework adds API functions for enabling/
disabling FPGA bridges under kernel control.
This allows the Linux kernel to disable FPGA bridges
during FPGA reprogramming and to enable FPGA bridges
when FPGA reprogramming is done. This framework is
be manufacturer-agnostic, allowing it to be use
Supports Altera SOCFPGA bridges:
* fpga2sdram
* fpga2hps
* hps2fpga
* lwhps2fpga
Allows enabling/disabling the bridges through the FPGA
Bridge Framework API functions.
The fpga2sdram driver only supports enabling and disabling
of the ports that been configured early on. This is due to
a hard
This patchset supports FPGA programming under the control
of Device Tree overlays.
Changes since v20 are minor:
* s/Mangager/Manager/
* altera-hps2fpga bridge: remove a clk_put
* altera-hps2fpga bridge: don't need to look up l3regs for f2h
bridge
The following were acked so they are no long
FPGA Regions support programming FPGA under control of the Device
Tree.
Signed-off-by: Alan Tull
---
v9: initial version (this patch added during rest of patchset's v9)
v10: request deferral if fpga mgr or bridges not available yet
cleanup as fpga manager core goes into the real kernel
This patch adds a minor change in the FPGA Manager API
to hold information that is specific to an FPGA image
file. This change is expected to bring little, if any,
pain. The socfpga and zynq drivers are fixed up in
this patch.
An FPGA image file will have particulars that affect how the
image is
On Tue, Oct 25, 2016 at 4:33 PM, Mark Brown wrote:
> On Tue, Oct 25, 2016 at 02:55:48PM +0200, Axel Haslam wrote:
>
>> To be able to use regulator to handle the overcurrent pin, i need to be able
>> to somehow retrieve the over current pin state from the regulator driver.
>
> What makes you say th
Commit-ID: 6bad6bccf2d717f652d37e63cf261eaa23466009
Gitweb: http://git.kernel.org/tip/6bad6bccf2d717f652d37e63cf261eaa23466009
Author: Thomas Gleixner
AuthorDate: Sat, 22 Oct 2016 11:07:37 +
Committer: Thomas Gleixner
CommitDate: Tue, 25 Oct 2016 16:32:50 +0200
timers: Prevent base
Commit-ID: 041ad7bc758db259bb960ef795197dd14aab19a6
Gitweb: http://git.kernel.org/tip/041ad7bc758db259bb960ef795197dd14aab19a6
Author: Thomas Gleixner
AuthorDate: Sat, 22 Oct 2016 11:07:35 +
Committer: Thomas Gleixner
CommitDate: Tue, 25 Oct 2016 16:32:50 +0200
timers: Prevent base
On Tue, Oct 25, 2016 at 04:45:44PM +0200, Michal Hocko wrote:
> On Tue 25-10-16 10:10:50, Johannes Weiner wrote:
> > Like other direct reclaimers, mark tasks in memcg reclaim PF_MEMALLOC
> > to avoid recursing into any other form of direct reclaim. Then let
> > recursive charges from PF_MEMALLOC co
On Tue, 2016-10-25 at 12:49:33 +0200, Thomas Gleixner wrote:
> On Tue, 25 Oct 2016, Zubair Lutfullah Kakakhel wrote:
> > On 10/21/2016 10:48 AM, Marc Zyngier wrote:
> > > Shouldn't you return an error if irq is zero?
> > >
> >
> > I'll add the following for the error case
> >
> > pr_err("%s:
Commit-ID: 4da9152a4308dcbf611cde399c695c359fc9145f
Gitweb: http://git.kernel.org/tip/4da9152a4308dcbf611cde399c695c359fc9145f
Author: Thomas Gleixner
AuthorDate: Mon, 24 Oct 2016 11:55:10 +0200
Committer: Thomas Gleixner
CommitDate: Tue, 25 Oct 2016 16:27:39 +0200
timers: Lock base fo
Commit-ID: b831275a3553c32091222ac619cfddd73a5553fb
Gitweb: http://git.kernel.org/tip/b831275a3553c32091222ac619cfddd73a5553fb
Author: Thomas Gleixner
AuthorDate: Mon, 24 Oct 2016 11:41:56 +0200
Committer: Thomas Gleixner
CommitDate: Tue, 25 Oct 2016 16:27:39 +0200
timers: Plug locking
These are never used by the host, but they can still be reflected to
the guest.
Signed-off-by: Paolo Bonzini
---
arch/x86/include/asm/vmx.h | 1 +
arch/x86/include/uapi/asm/vmx.h | 4
arch/x86/kvm/vmx.c | 3 +++
3 files changed, 8 insertions(+)
diff --git a/arch/x86/inclu
LS1046a has three MSI controllers. each controller is assigned
four SPI interrupts.
Signed-off-by: Minghuan Lian
---
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 32 ++
1 file changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
b/ar
On Tue, 2016-10-25 at 08:00 -0700, Michael Zoran wrote:
> On Mon, 2016-10-24 at 10:31 -0700, Eric Anholt wrote:
> > mzo...@crowfest.net writes:
> >
> > > */
> > >
> > > static int
> > > create_pagelist(char __user *buf, size_t count, unsigned short
> > > type,
> > > - struct task_struct *task
On 20.10.2016 14:20, Suganath Prabu S wrote:
> Return value and Device_handle Arguments passed in correct order
> to match with its format string.
>
> Signed-off-by: Chaitra P B
> Signed-off-by: Sathya Prakash
> Signed-off-by: Suganath Prabu S
> ---
Reviewed-by: Tomas Henzl
Tomas
On Tue, Oct 25, 2016 at 4:57 PM, Axel Haslam wrote:
> On Tue, Oct 25, 2016 at 4:33 PM, Mark Brown wrote:
>> On Tue, Oct 25, 2016 at 02:55:48PM +0200, Axel Haslam wrote:
>>
>>> To be able to use regulator to handle the overcurrent pin, i need to be able
>>> to somehow retrieve the over current pin
From: Hanjun Guo
Introduce its_pmsi_init_one() to refactor the code to isolate
ACPI&DT common code to prepare for ACPI later.
Signed-off-by: Hanjun Guo
Tested-by: Sinan Kaya
Cc: Marc Zyngier
Cc: Tomasz Nowicki
Cc: Thomas Gleixner
---
drivers/irqchip/irq-gic-v3-its-platform-msi.c | 45 +
On Mon, 2016-10-24 at 10:31 -0700, Eric Anholt wrote:
> mzo...@crowfest.net writes:
>
> > */
> >
> > static int
> > create_pagelist(char __user *buf, size_t count, unsigned short
> > type,
> > - struct task_struct *task, PAGELIST_T ** ppagelist)
> > + struct task_struct *task, PAG
From: Hanjun Guo
With the platform msi domain created for ITS, irqchip such as
mbi-gen connecting ITS, which needs ctreate its own irqdomain.
Fortunately with the platform msi support upstreamed by Marc,
we just need to add minor code to make it run properly.
platform_msi_create_device_domain()
Add low level driver to support reprogramming FPGAs for Altera
SoCFPGA Arria10.
Signed-off-by: Alan Tull
Reviewed-by: Moritz Fischer
---
v19: Added to this patchset as has been changed to use
fpga image information struct
a checkpatch fix of a block comment
do not use clk_put be
This patch adds a minor change in the FPGA Manager API
to hold information that is specific to an FPGA image
file. This change is expected to bring little, if any,
pain.
An FPGA image file will have particulars that affect how the
image is programmed to the FPGA. One example is that
current 'fla
From: Hanjun Guo
Cleanup iort_match_node_callback() a little bit to reduce
some lines of code, aslo fix the indentation in iort_scan_node().
Signed-off-by: Hanjun Guo
Cc: Lorenzo Pieralisi
Cc: Marc Zyngier
Cc: Tomasz Nowicki
---
drivers/acpi/arm64/iort.c | 10 +++---
1 file changed, 3 i
New bindings document for FPGA Region to support programming
FPGA's under Device Tree control
Signed-off-by: Alan Tull
Signed-off-by: Moritz Fischer
Reviewed-by: Rob Herring
---
v9: initial version added to this patchset
v10: s/fpga/FPGA/g
replace DT overlay example with slightly more com
From: Hanjun Guo
With the preparation of platform msi support and interrupt producer
in DSDT, we can add mbigen ACPI support now.
We are using _PRS methd to indicate number of irq pins instead
of num_pins in DT to avoid _DSD usage in this case.
For mbi-gen,
Device(MBI0) {
Name(_HI
Add a low level driver for Altera Freeze Bridges to the FPGA Bridge
framework. A freeze bridge is a bridge that exists in the FPGA
fabric to isolate one region of the FPGA from the busses while that
one region is being reprogrammed.
Signed-off-by: Alan Tull
Signed-off-by: Matthew Gerlach
---
v1
From: Hanjun Guo
Adding ACPI support for platform MSI, we need to retrieve the
dev id in ACPI way instead of device tree, we already have
a well formed function its_pmsi_prepare() to get the dev id
but it's OF dependent, so collect OF related code and put them
into a single function to make its_p
On Tue 25-10-16 11:01:42, Johannes Weiner wrote:
> On Tue, Oct 25, 2016 at 04:45:44PM +0200, Michal Hocko wrote:
> > On Tue 25-10-16 10:10:50, Johannes Weiner wrote:
> > > Like other direct reclaimers, mark tasks in memcg reclaim PF_MEMALLOC
> > > to avoid recursing into any other form of direct re
On 25 October 2016 at 18:13, Jack Wang wrote:
> Hi Binoy,
>
> snip
>>
>> port->ib_dev = device;
>> port->port_num = port_num;
>> - sema_init(&port->sm_sem, 1);
>> + init_completion(&port->sm_comp);
>> + complete(&port->sm_comp);
>
> Why complete here?
>
>>
From: Hanjun Guo
With the introduction of its_pmsi_init_one(), we can add some code
on top for ACPI support of platform MSI.
We are scanning the MADT table to get the ITS entry(ies), then use
the information to create the platform msi domain for devices connect
to it, just like the PCI MSI for I
From: Hanjun Guo
The head file is strictly in alphabetic order now, so let's
be the rule breaker. As acpi_iort.h includes acpi.h so remove
the duplidate acpi.h inclusion as well.
Signed-off-by: Hanjun Guo
Cc: Marc Zyngier
Cc: Tomasz Nowicki
---
drivers/irqchip/irq-gic-v3-its.c | 3 +--
1 fil
From: Kefeng Wang
Module owner will be set by driver core, so drop it.
Signed-off-by: Kefeng Wang
Signed-off-by: Hanjun Guo
Cc: Marc Zyngier
Cc: Thomas Gleixner
Cc: Ma Jun
---
drivers/irqchip/irq-mbigen.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/irqchip/irq-mbigen.c b/dri
From: Hanjun Guo
iort_node_get_id() has two output, one is the mapped ids,
the other is the referenced parent node which is returned
from the function.
For now we need a API just return its parent node for
single mapping, so just update this function slightly then
reuse it later.
Signed-off-by:
On Tue, Oct 25, 2016 at 09:56:35AM +0530, Aneesh Kumar K.V wrote:
> Jerome Glisse writes:
>
> > On Mon, Oct 24, 2016 at 10:01:49AM +0530, Anshuman Khandual wrote:
> >
> >> [...]
> >
> >>Core kernel memory features like reclamation, evictions etc. might
> >> need to be restricted or modified o
From: Hanjun Guo
For devices connecting to ITS, it needs dev id to identify
itself, and this dev id is represented in the IORT table in
named componant node [1] for platform devices, so in this
patch we will scan the IORT to retrieve device's dev id.
Introduce iort_pmsi_get_dev_id() with pointer
Well. I was going to ignore this patch, I will leave this to Thomas
anyway...
But can't resist, because I have to admit I dislike this one too ;)
On 10/25, Roman Pen wrote:
>
> int kthread_park(struct task_struct *k)
> {
> - struct kthread *kthread = to_live_kthread_and_get(k);
> + stru
From: Hanjun Guo
We are missing req_id's comment for iort_dev_find_its_id(),
add it back.
Signed-off-by: Hanjun Guo
Cc: Lorenzo Pieralisi
Cc: Tomasz Nowicki
---
drivers/acpi/arm64/iort.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c
From: Hanjun Guo
In ACPI 6.1 spec, section 19.6.62, Interrupt Resource Descriptor Macro,
Interrupt (ResourceUsage, EdgeLevel, ActiveLevel, Shared,
ResourceSourceIndex, ResourceSource, DescriptorName)
{ InterruptList } => Buffer
For the arguement ResourceUsage and DescriptorName, which means:
R
On Tue, Oct 25, 2016 at 11:07:39PM +1100, Balbir Singh wrote:
> On 25/10/16 04:09, Jerome Glisse wrote:
> > On Mon, Oct 24, 2016 at 10:01:49AM +0530, Anshuman Khandual wrote:
> >
> >> [...]
> >
> >>Core kernel memory features like reclamation, evictions etc. might
> >> need to be restricted o
From: Kefeng Wang
Introduce mbigen_of_create_domain() to consolidate OF related
code and prepare for ACPI later.
Signed-off-by: Kefeng Wang
Signed-off-by: Hanjun Guo
Cc: Marc Zyngier
Cc: Thomas Gleixner
Cc: Ma Jun
---
drivers/irqchip/irq-mbigen.c | 42 +++---
From: Hanjun Guo
This patch series is v3 of a previous posting,
https://lkml.org/lkml/2016/9/14/510
v2 -> v3:
- Drop RFC tag
- Rebase against v4.9-rc2 and Lorenzo's v6 of ACPI IORT ARM SMMU
support [1]
- Add 3 cleanup patches (patch 1, 2, 3)
- Drop arch_init cal
From: Hanjun Guo
With the platform msi domain created, we can set up the msi domain
for a platform device when it's probed.
In order to do that, we need to get the domain that the platform
device connecting to, so the iort_get_platform_device_domain() is
introduced to retrieve the domain from io
On 2016/10/19 0:03, Lorenzo Pieralisi wrote:
This patch series is v6 of a previous posting:
https://lkml.org/lkml/2016/9/9/418
v5 -> v6
- Rebased against v4.9-rc1
- Changed FWNODE_IOMMU to FWNODE_ACPI_STATIC
- Moved platform devices creation into IORT code
- Upda
On Tue, Oct 25, 2016 at 3:43 AM, Christian König
wrote:
> Am 25.10.2016 um 01:14 schrieb Colin King:
>>
>> From: Colin Ian King
>>
>> Fix trivial spelling mistake cant't -> can't and add KERN_WARNING to
>> printk messages. Remove redundant spaces before \n too (thanks to
>> Joe Perches for spott
The ethtool api {get|set}_settings is deprecated.
We move this driver to new api {get|set}_link_ksettings.
Signed-off-by: Philippe Reynes
---
drivers/infiniband/hw/nes/nes_nic.c | 76 +++---
1 files changed, 42 insertions(+), 34 deletions(-)
diff --git a/drivers/in
On Tue, 2016-10-25 at 15:47 +0100, Marc Zyngier wrote:
>
> > > But why are those number different? Why don't you use the same
> > > namespace? If gpio == hwirq, all your problems are already
> > > solved. If
> > > you don't find the mapping in the irqdomain, then there is no
> > > irq,
> > > end
>
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