I'm working on converting the pca953x driver to using regmap, but since
it's not a trivial task I figured I'd post a couple refactoring patches
I did so far for 4.9.
The first patch just fixes a couple coding style issues. The second
removes a couple unnecessary switches. Last three refactor the
r
The chip_type variable in struct pca953x_chip is no longer required.
Remove it.
Signed-off-by: Bartosz Golaszewski
---
drivers/gpio/gpio-pca953x.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
index 6b62898..00b
Avoid the unnecessary if-else in pca953x_read_regs() by spltting the
routine into smaller, specialized functions and calling the right one
via a function pointer held in struct pca953x.
Signed-off-by: Bartosz Golaszewski
---
drivers/gpio/gpio-pca953x.c | 55 --
Avoid the unnecessary if-else in pca953x_write_regs() by splitting
the routine into smaller, specialized functions and calling the right
one via a function pointer held in struct pca953x_chip.
Signed-off-by: Bartosz Golaszewski
---
drivers/gpio/gpio-pca953x.c | 75 ---
There are multiple places in the driver code where a
switch (chip->chip_type) is used to determine the proper register
offset.
Unduplicate the code by adding a simple structure holding the possible
offsets that differ between the pca953x and pca957x chip families and
use it to avoid the checks.
S
pca953x_gpio_set_multiple() has some coding style issues that make it
harder to read. Tweak the code a bit.
Signed-off-by: Bartosz Golaszewski
---
drivers/gpio/gpio-pca953x.c | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/drivers/gpio/gpio-pca953x.c b/dr
On Wed, Sep 07, 2016 at 10:52:46AM +0200, Arnd Bergmann wrote:
> On Wednesday, September 7, 2016 3:44:28 PM CEST Peter Chen wrote:
> >
> > The pre-condition of DT function at USB HCD core works is the host
> > controller device has of_node, since it is the root node for USB tree
> > described at D
Hi,
On 06-09-16 14:54, Arnd Bergmann wrote:
The driver now calls of_usb_get_dr_mode_by_phy, which is part of the
USB core layer, and it fails to build when that is not provided:
drivers/phy/phy-sun4i-usb.o: In function `sun4i_usb_phy_probe':
phy-sun4i-usb.c:(.text.sun4i_usb_phy_probe+0x140): un
Hi,
On 07-09-16 11:09, Chen-Yu Tsai wrote:
simplefb gets unregister when a proper framebuffer driver comes in and
kicks it out. However the claimed clocks and regulators stay enabled
as they are only released in the platform device remove function, which
in theory would never get called.
Move t
Instructions which can be emulated are suppliants for optimization.
Before optimization ensure that the address range between the detour
buffer allocated and the instruction being probed is within ?? 32MB.
Signed-off-by: Anju T Sudhakar
---
arch/powerpc/include/asm/sstep.h | 1 +
arch/powerpc/
This is the patchset of the kprobes jump optimization
(a.k.a OPTPROBES)for powerpc. Kprobe being an inevitable tool
for kernel developers, enhancing the performance of kprobe has
got much importance.
Currently kprobes inserts a trap instruction to probe a running kernel.
Jump optimization allows k
Mark optprobe 'ok' for powerpc
Signed-off-by: Anju T Sudhakar
---
Documentation/features/debug/optprobes/arch-support.txt | 2 +-
arch/powerpc/Kconfig| 1 +
arch/powerpc/kernel/Makefile| 1 +
3 files changed, 3 insertions(+), 1 dele
On 09/05/2016 03:36 PM, Aleksey Makarov wrote:
> SBBR mentions SPCR as a mandatory ACPI table. So enable it for ARM64
>
> Earlycon should be set up as early as possible. ACPI boot tables are
> mapped in arch/arm64/kernel/acpi.c:acpi_boot_table_init() that
> is called from setup_arch() and that'
Hi Vitaly,
On 07/09/2016 10:07, Vitaly Kuznetsov wrote:
Stefano Stabellini writes:
I don't know that much about cpuid, but the virtual MPIDR is constructed
from the vcpu id right now:
v->arch.vmpidr = MPIDR_SMP | vcpuid_to_vaffinity(v->vcpu_id);
[...]
static inline register_t vc
Detour buffer contains instructions to create an in memory pt_regs.
After the execution of prehandler a call is made for instruction emulation.
The NIP is decided after the probed instruction is executed. Hence a branch
instruction is created to the NIP returned by emulate_step().
Instruction slot
On Wed, Sep 07, 2016 at 05:29:01PM +0800, Peter Chen wrote:
> On Wed, Sep 07, 2016 at 10:52:46AM +0200, Arnd Bergmann wrote:
> > On Wednesday, September 7, 2016 3:44:28 PM CEST Peter Chen wrote:
> > >
> > > The pre-condition of DT function at USB HCD core works is the host
> > > controller device
From: Borislav Petkov
It means different things on Intel and AMD so write it down so that
there's no confusion.
Signed-off-by: Borislav Petkov
Cc: Peter Zijlstra
Cc: Thomas Gleixner
---
Documentation/x86/topology.txt | 6 ++
1 file changed, 6 insertions(+)
diff --git a/Documentation/x86
2016-08-29 11:07 GMT+02:00 Romain Izard :
> Disabling USB gadget functions configured through configfs is something
> that can happen in normal use cases. Keep the existing log for this type
> of event, but only as debug, not as an error.
>
> Signed-off-by: Romain Izard
> ---
> v1 -> v2:
> - use d
This patch enables the MIPS CPS driver for MIPSr6 CPUs.
Signed-off-by: Matt Redfearn
Reviewed-by: Paul Burton
---
Changes in v2: None
drivers/cpuidle/Kconfig.mips | 2 +-
drivers/cpuidle/cpuidle-cps.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/cpuidle/Kco
This patch adds support for CPUs implementing the MIPSr6 ISA to the CPS
power management code. Three changes are necessary:
1. In MIPSr6, coupled coherence is necessary when CPUS implement multiple
Virtual Processors (VPs).
2. MIPSr6 virtual processors are more like real cores and cannot yield
All calls to mips_cpc_lock_other should be wrapped in
mips_cm_lock_other. This only matters if the system has CM3 and is using
cpu idle, since otherwise a) the CPC lock is sufficent for CM < 3 and b)
any systems with CM > 3 have not been able to use cpu idle until now.
Signed-off-by: Matt Redfearn
Add the definitions of sync stype 0 (global completion barrier) and sync
stype 0x10 (local ordering barrier) to barrier.h for use with the sync
instruction.
These types are defined by the MIPS Instruction Set since R2 of the
architecture and are documented in document MD00087 table 6.5.
Signed-of
MIPS CM3 changed the management of coherence. Instead of a coherence
control register with a bitmask of coherent domains, CM3 simply has a
coherence enable register with a single bit to enable coherence of the
local core. Support this by clearing and setting this single bit to
disable / enable cohe
Instead of selecting an implementation or vendor specific sync type for
the required sync operations, always use the architecturally mandated
sync types which previous patches have put in place. The selection of
special sync types is now redundant an can be removed.
Signed-off-by: Matt Redfearn
R
This code makes large use of barriers, which had quite vague
descriptions. Update the comments to make the choice of barrier and
reason for it more clear.
Signed-off-by: Matt Redfearn
Reviewed-by: Paul Burton
---
Changes in v2:
Update comments on barriers
arch/mips/kernel/pm-cps.c | 16 +
Dear Maintainer,
This is writing from Advantech , an IPC/Server manufacturer locates in
Taiwan. We would like to upstream a hard disk hot swap button driver for
Advantech compactPCI products.
The source code is in the appended document and more precise information is
listed as the following. T
Checkpatch complains about use of bare unsigned type.
Signed-off-by: Matt Redfearn
Reviewed-by: Paul Burton
---
Changes in v2: None
arch/mips/kernel/mips-cpc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/mips/kernel/mips-cpc.c b/arch/mips/kernel/mips-cpc.c
i
On Tue, 2016-09-06 at 11:28 +0800, Dawei Chien wrote:
> Dear Rui,
>
> On Tue, 2016-09-06 at 08:30 +0800, Zhang Rui wrote:
> > On 二, 2016-09-06 at 08:24 +0800, Zhang Rui wrote:
> > > On 四, 2016-08-18 at 11:50 +0800, Dawei Chien wrote:
> > > >
> > > > This adds the thermal controller and auxadc nod
This updated series incorporates comments from Peter Zijlstra on v1
around the barriers in pm-cps.c.
This series fixes a small issue with the CPC driver when A CM3 is
present, where a redundant lock was taken.
There are then additions to the pm-cps driver to add support for R6 CPUs
such as the I
Since R2 of the MIPS architecture, SYNC(0x10) has been an optional but
architecturally defined ordering barrier. If a CPU does not implement it,
the arch specifies that it must fall back to SYNC(0).
In places where we require that the instruction stream not be reordered,
but do not require that lo
SYNC type 0 is defined in the MIPS architecture as a completion barrier
where all loads/stores in the pipeline before the sync instruction must
complete before any loads/stores subsequent to the sync instruction.
In places where we require loads / stores be globally completed, use the
standard com
The check for whether a CPU required the FSB flush workaround
previously required every CPU not requiring it to be whitelisted. That
approach does not scale well as new CPUs are introduced so change the
default from a WARN and returning an error to just returning 0. Any CPUs
requiring the workaroun
MIPS CM version 3 removed the CPC_CL_OTHER register and instead the
CM_CL_OTHER register is used to redirect the CPC_OTHER region. As such,
we should not write the unimplmented register and can avoid the
spinlock as well.
These lock functions should aleady be called within the context of a
mips_cm_
On Wed, Sep 07, 2016 at 10:48:06AM +0200, Arnd Bergmann wrote:
> On Wednesday, September 7, 2016 2:33:13 PM CEST Peter Chen wrote:
> > >
> > > Right, that should make it work with iommu as well. However, it does
> > > not solve the other issue I mentioned above, with boards that have
> > > USB dev
When an MSI doorbell is located downstream of an IOMMU, attaching
devices to a DMA ops domain and switching on translation leads to a rude
shock when their attempt to write to the physical address returned by
the irqchip driver faults (or worse, writes into some already-mapped
buffer) and no interr
Le 06/09/2016 à 15:58, Marc Zyngier a écrit :
> at91 used to set a default trigger type for GPIO interrupts in
> order to cope with the old board files. These days are long gone,
> and it all gets probed through DT.
>
> Andras Szemzo reported that the Ethernet device on his board was
> bailing to
> On 01.06.2016, at 21:05, Eric Anholt wrote:
>
> I figured out another critical clock (patch 3), but didn't use the
> CLK_IS_CRITICAL flag since I want to just protect whatever clock
> happens to be the parent (there are #ifdefs in the firmware indicating
> that they've experimented with using
Hi,
Alan Stern writes:
> On Tue, 6 Sep 2016, Peter Zijlstra wrote:
>
>> On Tue, Sep 06, 2016 at 01:49:37PM +0200, Peter Zijlstra wrote:
>> > On Tue, Sep 06, 2016 at 02:43:39PM +0300, Felipe Balbi wrote:
>>
>> > > My fear now, however, is that changing smp_[rw]mb() to smp_mb() just
>> > > adds e
Hi Kalle,
> From: linux-wireless-ow...@vger.kernel.org [mailto:linux-wireless-
> ow...@vger.kernel.org] On Behalf Of Amitkumar Karwar
> Sent: Thursday, August 11, 2016 4:11 PM
> To: Steve deRosier
> Cc: Brian Norris; linux-wirel...@vger.kernel.org; Cathy Luo; Nishant
> Sarmukadam; linux-kernel@vge
Hi,
Russell King - ARM Linux writes:
> On Wed, Sep 07, 2016 at 05:29:01PM +0800, Peter Chen wrote:
>> On Wed, Sep 07, 2016 at 10:52:46AM +0200, Arnd Bergmann wrote:
>> > On Wednesday, September 7, 2016 3:44:28 PM CEST Peter Chen wrote:
>> > >
>> > > The pre-condition of DT function at USB HCD c
Add documentation for summit SMB347 charger
Cc: John Stultz
Cc: Sumit Semwal
Signed-off-by: Jonghwa Lee
Cc: Chanwoo Choi
Cc: Myungjoo Ham
Signed-off-by: Vinay Simha BN
---
.../bindings/power/supply/smb347_charger.txt | 57 ++
1 file changed, 57 insertions(+)
creat
Add vendor id for Summit microelectronics
for SMB347 charger.
Cc: John Stultz
Cc: Sumit Semwal
Signed-off-by: Jonghwa Lee
Cc: Chanwoo Choi
Cc: Myungjoo Ham
Signed-off-by: Vinay Simha BN
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --g
smb347 charger driver to support dt binding.
All legacy platform data now can be parsed from dt.
smb347 is i2c client driver, IRQ number can be passed
automatically through client's irq variable.
Cc: John Stultz
Cc: Sumit Semwal
Signed-off-by: Jonghwa Lee
Cc: Chanwoo Choi
Cc: Myungjoo Ham
Sig
Summit microelectronics SMB345 charger chip added.
Cc: Jonghwa Lee
Cc: Chanwoo Choi
Cc: Myungjoo Ham
Cc: Sumit Semwal
Cc: John Stultz
Signed-off-by: Vinay Simha BN
---
.../bindings/power/supply/smb347_charger.txt | 21 +++-
drivers/power/supply/smb347-charger.c | 123 +++
Hi,
Arnd Bergmann writes:
[...]
> Regarding the DMA configuration that you mention in ci_hdrc_add_device(),
> I think we should replace
>
> pdev->dev.dma_mask = dev->dma_mask;
> pdev->dev.dma_parms = dev->dma_parms;
> dma_set_coherent_mask(&pdev->dev, dev->coherent_dma
On Tue, 06 Sep 2016, Russell King - ARM Linux wrote:
> On Tue, Sep 06, 2016 at 04:45:30PM +0100, Lee Jones wrote:
> > On Tue, 06 Sep 2016, Russell King - ARM Linux wrote:
> >
> > > You need to send this _to_ me as I need to merge it with my other
> > > changes. This patch on its own does not mak
http://marc.info/?l=linux-kernel&m=147211966914100&w=2 follow up.
More complete rlimits violations reporting RFC using tracing
infrastructure.
Yauheni Kaliuta (2):
rlimits: add infra to report violations
rlimits: report resource limits violations
arch/ia64/kernel/perfmon.c |
The patch defines tracepoints for resource limits (rlimits) violations
reporting and adds a thin layer to be called from rlimits aware code
without direct dependency of the tracepoints.
Signed-off-by: Yauheni Kaliuta
---
include/linux/resource.h | 5 +++
kernel/Makefile | 4 +-
kern
The patch instrument different places of resource limits checks with
reporting using the infrastructure from the previous patch.
Signed-off-by: Yauheni Kaliuta
---
arch/ia64/kernel/perfmon.c | 4 +++-
arch/powerpc/kvm/book3s_64_vio.c | 6 --
arch/powerpc/mm/mmu_co
Hi,
this series basically takes the facility for continuously capturing CRCs
of frames from the i915 driver and into the DRM core.
The idea is that test suites such as IGT use this information to check
that frames that are exected to be identical, also have identical CRC
values.
Other drivers fo
Adds files and directories to debugfs for controlling and reading frame
CRCs, per CRTC:
dri/0/crtc-0/crc
dri/0/crtc-0/crc/control
dri/0/crtc-0/crc/data
Drivers can implement the set_crc_source callback() in drm_crtc_funcs to
start and stop generating frame CRCs and can add entries to the output
b
The core provides now an ABI to userspace for generation of frame CRCs,
so implement the ->set_crc_source() callback and reuse as much code as
possible with the previous ABI implementation.
v2:
- Leave the legacy implementation in place as the ABI implementation
in the core is incompatib
In preparation to using a generic API in the DRM core for continuous CRC
generation, move the related code out of i915_debugfs.c into a new file.
Eventually, only the Intel-specific code will remain in this new file.
v2: Rebased.
v6: Rebased.
Signed-off-by: Tomeu Vizoso
---
drivers/gpu/drm/i
Use drm_accurate_vblank_count so we have the full 32 bit to represent
the frame counter and userspace has a simpler way of knowing when the
counter wraps around.
Signed-off-by: Tomeu Vizoso
---
drivers/gpu/drm/i915/i915_irq.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --g
Hi,
Stefan Wahren writes:
> Hi John,
>
>> John Youn hat am 1. September 2016 um 23:07
>> geschrieben:
>>
>>
>> This series accounts for the delay from the IDDIG debounce filter when
>> switching modes. This delay is a function of the PHY clock speed and
>> can range from 5-50 ms. This delay m
From: Eric Anholt
The BCM2835-ARM-Peripherals.pdf documentation specifies what the
function selects do for the pins, and there are a bunch of obvious
groupings to be made. With these created, we'll be able to replace
bcm2835-rpi.dtsi's main "set all of these pins to alt0" with
references to spec
From: Eric Anholt
This pin group definition comes from downstream. We don't have a
driver for sdhost integrated yet, but they've been experimenting with
it and it sounds useful to bring over.
Signed-off-by: Eric Anholt
---
arch/arm/boot/dts/bcm283x.dtsi | 4
1 file changed, 4 insertions(
Signed-off-by: Gerd Hoffmann
---
arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi
b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index 88bcd0c..ff62236 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm
Signed-off-by: Gerd Hoffmann
---
arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi
b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index 8688204..3f0ce61 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm
From: Eric Anholt
This will be used for having EMMC (sdhci-bcm2835.c) drive the
wireless.
Signed-off-by: Eric Anholt
---
arch/arm/boot/dts/bcm283x.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index 062d09db..b6b19
Signed-off-by: Gerd Hoffmann
---
arch/arm/boot/dts/bcm283x.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index acb616f..164d962 100644
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -253,6
Signed-off-by: Gerd Hoffmann
---
arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi
b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index b936978..8688204 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm
On 07/09/16 10:55, Peter Chen wrote:
[...]
>> Regarding the DMA configuration that you mention in ci_hdrc_add_device(),
>> I think we should replace
>>
>> pdev->dev.dma_mask = dev->dma_mask;
>> pdev->dev.dma_parms = dev->dma_parms;
>> dma_set_coherent_mask(&pdev->dev, dev->
Signed-off-by: Gerd Hoffmann
---
arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi
b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index ff62236..b936978 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm
Rafael,
There are two fixes for iort.c:
1. patch 1 - convert switch to if-else in iort_match_node_callback()
2. patch 2 - remove static local variable for iort_get_device_domain()
Do you want me to repost these patches to get your ACK, or you want new V11?
Thanks,
Tomasz
On 06.09.2016 12:27, T
On 07/09/2016 09:49, SF Markus Elfring wrote:
>>> A multiplication for the size determination of a memory allocation
>>> indicated that an array data structure should be processed.
>>> Thus use the corresponding function "kmalloc_array".
>>>
>>> This issue was detected by using the Coccinelle sof
On Wed, Sep 07, 2016 at 11:22:19AM +0200, Borislav Petkov wrote:
> From: Borislav Petkov
>
> It means different things on Intel and AMD so write it down so that
> there's no confusion.
>
> Signed-off-by: Borislav Petkov
> Cc: Peter Zijlstra
> Cc: Thomas Gleixner
> ---
> Documentation/x86/top
Hi,
On 05/09/16 10:58, Suzuki K Poulose wrote:
> This is a cosmetic change to rename the functions dealing with
> the errata work arounds to be more consistent with their naming.
>
> 1) check_local_cpu_errata() => update_cpu_errata_workarounds()
> check_local_cpu_errata() actually updates the sys
Hi,
Arnd Bergmann writes:
> Starting with v4.8-rc5, we get a warning about the dwc3_pci_pm_dummy function
> when CONFIG_PM_SLEEP is disabled:
>
> drivers/usb/dwc3/dwc3-pci.c:253:12: warning: 'dwc3_pci_pm_dummy' defined but
> not used
>
> Using __maybe_unused instead of #ifdef lets the compiler
Romain Izard writes:
> 2016-08-29 11:07 GMT+02:00 Romain Izard :
>> Disabling USB gadget functions configured through configfs is something
>> that can happen in normal use cases. Keep the existing log for this type
>> of event, but only as debug, not as an error.
>>
>> Signed-off-by: Romain Izar
Hi,
Robin Murphy writes:
> On 07/09/16 10:55, Peter Chen wrote:
> [...]
>>> Regarding the DMA configuration that you mention in ci_hdrc_add_device(),
>>> I think we should replace
>>>
>>> pdev->dev.dma_mask = dev->dma_mask;
>>> pdev->dev.dma_parms = dev->dma_parms;
>>> d
Retrieve device properties from EFI on Macs before ExitBootServices is
called and assign them to devices (patch [3/4]). The devices that
properties pertain to are encoded as EFI Device Paths, so add a parser
for these (patch [2/4]). As a first use case, amend the Thunderbolt driver
to take advantag
From: K. Y. Srinivasan
Some miscellaneous fixes.
Dexuan Cui (1):
Drivers: hv: vmbus: suppress some "hv_vmbus: Unknown GUID" warnings
Stephen Hemminger (1):
Driver: hv: vmbus: Make mmio resource local
drivers/hv/channel_mgmt.c | 26 --
drivers/hv/vmbus_drv.c|
Following the fwnode of a device is currently a one-way road: We provide
ACPI_COMPANION() to obtain the fwnode but there's no (public) method to
do the reverse. Granted, there may be multiple physical_nodes, but often
the first one in the list is sufficient.
A handy function to obtain it was intro
Hi Greg,
Did you have a chance to look at the below 4 patches?
Did I do something wrong when submitting them or are there other reasons not to
include them in the
4.4 kernel?
Btw, they still apply on top of 4.4.20.
Thanks
...Juerg
On 08/29/2016 03:38 PM, Juerg Haefliger wrote:
> This patch s
We're about to extended the efistub to retrieve device properties from
EFI on Apple Macs. The properties use EFI Device Paths to indicate the
device they belong to. This commit adds a parser which, given an EFI
Device Path, locates the corresponding struct device and returns a
reference to it.
Ini
From: Stephen Hemminger
This fixes a sparse warning because hyperv_mmio resources
are only used in this one file and should be static.
Signed-off-by: Stephen Hemminger
Signed-off-by: K. Y. Srinivasan
---
drivers/hv/vmbus_drv.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
dif
Apple's EFI drivers supply device properties which are needed to support
Macs optimally. They contain vital information which cannot be obtained
any other way (e.g. Thunderbolt Device ROM). They're also used to convey
the current device state so that OS drivers can pick up where EFI
drivers left (e
Macs with Thunderbolt 1 do not have a unit-specific DROM: The DROM is
empty with uid 0x1. (Apple started factory-burning a unit-
specific DROM with Thunderbolt 2.)
Instead, the NHI EFI driver supplies a DROM in a device property. Use
it if available. It's only available when booting wi
From: Wanpeng Li
Interrupt exit is the place to stop the tick: it happens after all
events happening before and during the irq which are liable to update
the dependency on the tick occurred. However, tick_nohz_stop_sched_tick()
try to stop the full tick instead of bailing out in advance.
As
From: Dexuan Cui
Some VMBus devices are not needed by Linux guest[1][2], and, VMBus channels
of Hyper-V Sockets don't really mean usual synthetic devices, so let's
suppress the warnings for them.
[1] https://support.microsoft.com/en-us/kb/2925727
[2] https://msdn.microsoft.com/en-us/library/jj98
We get 2 warnings when building kernel with W=1:
drivers/gpu/drm/rockchip/rockchip_drm_fbdev.c:130:5: warning: no previous
prototype for 'rockchip_drm_fbdev_init' [-Wmissing-prototypes]
drivers/gpu/drm/rockchip/rockchip_drm_fbdev.c:173:6: warning: no previous
prototype for 'rockchip_drm_fbdev_fin
This patch adds support to msm8996 pcie phy which supports 3 ports,
Port A, Port B and Port C.
Each port is independent and connected to a pcie host controller, there is
also a common block which is shared across all the 3 ports.
Signed-off-by: Srinivas Kandagatla
---
drivers/phy/Kconfig
This patch adds supports to pcie phy found in msm8996/apq8096.
This phy block has 3 ports each one supported a single root complex.
Most of the code is derived from qualcomms downstream 3.18 kernel.
I tested this patch on DB820c based on APQ8096 on port A and
port A using sata and ethernet contro
This patch adds bindings for pcie phy on MSM8996.
This PHY has 3 Ports, including a common block. Each port is connected
to one root complex. Each port has dedicated reset control lines apart
from common reset and clocks for common block.
Signed-off-by: Srinivas Kandagatla
---
.../bindings/phy/
On Wed, Sep 07, 2016 at 12:50:13PM +0200, Juerg Haefliger wrote:
> Hi Greg,
>
> Did you have a chance to look at the below 4 patches?
Not yet, I have over 300 pending patches for the stable kernels to work
through at the moment. Don't worry, these aren't lost, just sitting in
the middle of all o
We get 2 warnings when building kernel with W=1:
drivers/gpu/drm/msm/mdp/mdp4/mdp4_lcdc_encoder.c:96:23: warning: no previous
prototype for 'get_connector' [-Wmissing-prototypes]
drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c:84:5: warning: no previous prototype
for 'mdp4_plane_set_property' [-Wmissin
We get 2 warnings when building kernel with W=1:
drivers/gpu/drm/rockchip/rockchip_drm_drv.c:309:6: warning: no previous
prototype for 'rockchip_drm_fb_suspend' [-Wmissing-prototypes]
drivers/gpu/drm/rockchip/rockchip_drm_drv.c:318:6: warning: no previous
prototype for 'rockchip_drm_fb_resume' [-
We get 2 warnings when building kernel with W=1:
drivers/gpu/drm/sti/sti_mixer.c:361:6: warning: no previous prototype for
'sti_mixer_set_matrix' [-Wmissing-prototypes]
drivers/gpu/drm/sti/sti_dvo.c:109:5: warning: no previous prototype for
'dvo_awg_generate_code' [-Wmissing-prototypes]
In fact,
We get 4 warnings when building kernel with W=1:
drivers/net/ethernet/qlogic/qed/qed_selftest.c:6:5: warning: no previous
prototype for 'qed_selftest_memory' [-Wmissing-prototypes]
drivers/net/ethernet/qlogic/qed/qed_selftest.c:19:5: warning: no previous
prototype for 'qed_selftest_interrupt' [-W
This patch adds support to msm8996/apq8096 pcie, MSM8996 supports
Gen 1/2, One lane, 3 pcie root-complex with support to MSI and
legacy interrupts and it conforms to PCI Express Base 2.1 specification.
This patch adds post_init callback to qcom_pcie_ops, as this is pcie
pipe clocks and smmu config
On Wed, Sep 7, 2016 at 11:09 AM, Chen-Yu Tsai wrote:
> simplefb gets unregister when a proper framebuffer driver comes in and
> kicks it out. However the claimed clocks and regulators stay enabled
> as they are only released in the platform device remove function, which
> in theory would never get
Hi,
Thank you Daniel, Steven for reviewing the code and for the comments.
These set of patches [v6] capture latency events caused by interrupts and
premption disabled in kernel. The patches are based on the hist trigger
feature developed by Tom Zanussi.
v5: https://lkml.org/lkml/2016/9/2/246
v4:
From: Daniel Wagner
The tracepoint can't be used in code section where we are in the
middle of a state transition.
For example if we place a tracepoint inside start/stop_critical_section(),
lockdep complains with
[0.035589] WARNING: CPU: 0 PID: 3 at kernel/locking/lockdep.c:3560 \
check_fla
This work is based on work by Daniel Wagner. A few tracepoints are added
at the end of the critical section. With the hist trigger in place, the
hist trigger plots may be generated, with per-cpu breakdown of events
captured. It is based on linux kernel's event infrastructure.
The following filter(
From: Daniel Wagner
Whenever a trace is printed the generic fields (CPU, COMM) are
reconstructed (see trace_print_context()). CPU is taken from the
trace_iterator and COMM is extracted from the savedcmd map (see
__trace_find_cmdline()).
We can't reconstruct this information for hist events. Ther
Generate a histogram of the latencies of delayed timer offsets in
nanoseconds. It shows the latency captured due to a delayed timer expire
event. It happens for example when a timer misses its deadline due to
disabled interrupts. A process if scheduled as a result of the timer
expiration suffers th
On Wed, 2016-09-07 at 11:24 +0200, Bartosz Golaszewski wrote:
> pca953x_gpio_set_multiple() has some coding style issues that make it
> harder to read. Tweak the code a bit.
>
I would suggest to make this a last patch in the series. Rationale is
that you might have changed same lines by functiona
>> Are you looking for further possibilities to improve the involved
>> source code search patterns?
>
> Why are you not answering the simple question that was asked?
I find that I answered it to some degree.
It can be that you do not really like the kind of answer that I chose
a moment ago.
But
On 07/09/2016 13:17, SF Markus Elfring wrote:
>>> Are you looking for further possibilities to improve the involved
>>> source code search patterns?
>>
>> Why are you not answering the simple question that was asked?
>
> I find that I answered it to some degree.
>
> It can be that you do not re
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