On Thu, Jul 14, 2016 at 6:18 AM, Peter Zijlstra wrote:
> On Wed, Jul 13, 2016 at 10:51:02PM +0200, Peter Zijlstra wrote:
>> So, IIRC, the trade-off is a full memory barrier in read_lock and
>> read_unlock() vs sync_sched() in write.
>>
>> Full memory barriers are expensive and while the combined c
On Thu, Jul 14, 2016 at 09:23:55AM -0700, Paul E. McKenney wrote:
> Hmmm... How does this handle the following sequence of events for
> the case where we are not biased towards the reader?
>
> o The per-CPU rwsem is set up with RCU_NONE and readers_slow
> (as opposed to readers_block).
On Tue, Jul 12, 2016 at 12:24:39PM +0200, Paolo Bonzini wrote:
> On 12/07/2016 11:38, Liu Shuo wrote:
> > The failure of create debugfs of VM will return directly without release
> > the anon file. It will leak memory and file descriptors, even through
> > be not serious.
> >
> > Signed-off-by: L
This script replaces manual calculations by using the predefined
macros in kernel.h, DIV_ROUND_UP and roundup for readability purposes.
Signed-off-by: Amitoj Kaur Chawla
---
scripts/coccinelle/api/roundup.cocci | 215 +++
1 file changed, 215 insertions(+)
create
On Thu, Jul 14, 2016 at 09:43:40AM -0700, John Stultz wrote:
> On Thu, Jul 14, 2016 at 6:18 AM, Peter Zijlstra wrote:
> > On Wed, Jul 13, 2016 at 10:51:02PM +0200, Peter Zijlstra wrote:
> >> So, IIRC, the trade-off is a full memory barrier in read_lock and
> >> read_unlock() vs sync_sched() in wri
On 07/13/16 23:18, Stephen Rothwell wrote:
> Hi all,
>
> Changes since 20160713:
>
on i386, when:
# CONFIG_FS_POSIX_ACL is not set
fs/built-in.o: In function `ovl_posix_acl_xattr_set':
super.c:(.text+0x44223): undefined reference to `posix_acl_from_xattr'
--
~Randy
On Thu, Jul 14, 2016 at 1:34 AM, Ingo Molnar wrote:
>
> * Andy Lutomirski wrote:
>
>> On Wed, Jul 13, 2016 at 12:53 AM, Ingo Molnar wrote:
>> >
>> > * Andy Lutomirski wrote:
>> >
>> >> This allows x86_64 kernels to enable vmapped stacks. There are a
>> >> couple of interesting bits.
>> >
>> >>
On Wed, Jul 13, 2016 at 4:02 PM, Paul E. McKenney
wrote:
> On Wed, Jul 13, 2016 at 03:39:37PM -0700, John Stultz wrote:
>>
>> But otherwise both patches look great and are working well!
>>
>> Do you mind marking them both for stable 4.4+?
>
> OK, looks like it does qualify in the "fix a notable pe
On 14/07/2016 18:46, Al Viro wrote:
> On Tue, Jul 12, 2016 at 12:24:39PM +0200, Paolo Bonzini wrote:
>
>> On 12/07/2016 11:38, Liu Shuo wrote:
>>> The failure of create debugfs of VM will return directly without release
>>> the anon file. It will leak memory and file descriptors, even through
>>
c90bb7b enabled the high speed UARTs of the Jetson TK1. The address
specification inside the dts is wrong. Fix it and use the correct
address.
Fixes: c90bb7b9b9 ("ARM: tegra: Add high speed UARTs to Jetson TK1 device tree")
Signed-off-by: Ralf Ramsauer
---
arch/arm/boot/dts/tegra124-jetson-tk1.d
On Thu, 14 Jul 2016, Amitoj Kaur Chawla wrote:
> This script replaces manual calculations by using the predefined
> macros in kernel.h, DIV_ROUND_UP and roundup for readability purposes.
>
> Signed-off-by: Amitoj Kaur Chawla
Acked-by: Julia Lawall
> ---
> scripts/coccinelle/api/roundup.coc
On Thu, Jul 14, 2016 at 9:49 AM, Peter Zijlstra wrote:
> On Thu, Jul 14, 2016 at 09:43:40AM -0700, John Stultz wrote:
>> On Thu, Jul 14, 2016 at 6:18 AM, Peter Zijlstra wrote:
>> > On Wed, Jul 13, 2016 at 10:51:02PM +0200, Peter Zijlstra wrote:
>> >> So, IIRC, the trade-off is a full memory barri
When building with CONFIG_FUNCTION_GRAPH_TRACER or CONFIG_KASAN, put the
APIC interrupt handlers into the .irqentry.text section. This is needed
because both KASAN and function graph tracer use __irqentry_text_start and
__irqentry_text_end to determine whether a function is an IRQ entry point.
Dmi
On 07/14, Peter Zijlstra wrote:
>
> On Thu, Jul 14, 2016 at 04:58:44PM +0200, Oleg Nesterov wrote:
> >
> > But note that we do not need RCU_NONE. All we need is the trivial change
> > below.
>
> Hurm, maybe. So having that unbalanced keeps us in GP_PASSED state and
> since we'll never drop gp_count
The IS_ENABLED() macro checks if a Kconfig symbol has been enabled either
built-in or as a module, use that macro instead of open coding the same.
Signed-off-by: Javier Martinez Canillas
---
drivers/staging/octeon/ethernet.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/dr
On 07/14/16 02:37, Jiri Pirko wrote:
> From: Jiri Pirko
>
> Turned on that driver->owner which is struct module is not available when
> modules are disabled. Better to depend on a driver name which is
> always available.
>
> Reported-by: Randy Dunlap
> Fixes: e5224f0fe2 ("devlink: add hardware
On 07/14/16 02:37, Jiri Pirko wrote:
> From: Arnd Bergmann
>
> Including devlink.h on ARM and probably other 32-bit architectures results in
> a harmless warning:
>
> In file included from ../include/trace/define_trace.h:95:0,
> from ../include/trace/events/devlink.h:51,
>
On 07/14/2016 05:31 PM, Michal Hocko wrote:
On Thu 14-07-16 16:08:28, Ondrej Kozina wrote:
[...]
As Mikulas pointed out, this doesn't work. The system froze as well with the
patch above. Will try to tweak the patch with Mikulas's suggestion...
Thank you for testing! Do you happen to have trace
On 07/14/2016 12:22 PM, Catalin Marinas wrote:
> On Fri, Jul 08, 2016 at 12:35:44PM -0400, David Long wrote:
>> David A. Long (3):
>> arm64: Add HAVE_REGS_AND_STACK_ACCESS_API feature
>> arm64: Add more test functions to insn.c
>> arm64: add conditional instruction simulation support
>>
>> Pr
Use a bare printk to avoid a duplicate KERN_ in logging output.
Signed-off-by: Joe Perches
---
arch/metag/mm/fault.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/metag/mm/fault.c b/arch/metag/mm/fault.c
index 372783a..c765b36 100644
--- a/arch/metag/mm/fault.c
+++ b/a
On Thu, 14 Jul 2016 10:07:33 -0700
Randy Dunlap wrote:
> On 07/14/16 02:37, Jiri Pirko wrote:
> > From: Jiri Pirko
> >
> > Turned on that driver->owner which is struct module is not available when
> > modules are disabled. Better to depend on a driver name which is
> > always available.
> >
>
On 07/14, John Stultz wrote:
>
> So I am seeing synchronize_sched called, and its taking the
> !rcu_gp_is_expedited path when I see the particularly bad latencies.
>
> I wonder if I just mucked up applying the patch?
Probably yes...
Just in case, could you try the patch below? Of course, without
On 07/14/2016 07:50 AM, Tejun Heo wrote:
Hello,
On Wed, Jul 13, 2016 at 10:54:19PM -0400, Waiman Long wrote:
On 07/13/2016 12:08 PM, Tejun Heo wrote:
On Mon, Jul 11, 2016 at 01:32:06PM -0400, Waiman Long wrote:
...
A new header file include/linux/dlock-list.h will be added with the
Heh, I th
On 07/14/2016 06:13 PM, Steven Rostedt wrote:
>>
>> -# define wakeup_timer_waiters(b)wake_up(&(b)->wait_for_running_timer)
>> +# define wakeup_timer_waiters(b)
>> wake_up_all(&(b)->wait_for_running_timer)
>
> OK, I just received this patch (way after patch 2)
>
> I'm assuming that patch
Dear RT folks!
I'm pleased to announce the v4.6.4-rt7 patch set.
Changes since v4.6.4-rt6:
- Wake up all waiters of del_timer_sync(). Usually there should not
be more than just one waiter (per timer base) but it possible to
gain more.
- Wake up the waiters of del_timer_sync() after
On Thu, Jul 14, 2016 at 08:53:17AM +0200, Thomas Gleixner wrote:
> > Happy to take suggestions for something in between those
> > extremes :-)
>
> I'd suggest "resctrl" and the abbreviation dictionaries tell me that the most
> common ones for resource are: R, RESORC, RES
OK. "resctrl" it is.
> A
On Thu, 14 Jul 2016 19:14:58 +0200
Sebastian Andrzej Siewior wrote:
> On 07/14/2016 06:13 PM, Steven Rostedt wrote:
> >>
> >> -# define wakeup_timer_waiters(b) wake_up(&(b)->wait_for_running_timer)
> >> +# define wakeup_timer_waiters(b)
> >> wake_up_all(&(b)->wait_for_running_timer)
> >
>
On Thu, Jul 14, 2016 at 06:45:47PM +0200, Peter Zijlstra wrote:
> On Thu, Jul 14, 2016 at 09:23:55AM -0700, Paul E. McKenney wrote:
> > Hmmm... How does this handle the following sequence of events for
> > the case where we are not biased towards the reader?
> >
> > o The per-CPU rwsem is set u
On Thu, Jul 14, 2016 at 10:15:39AM -0600, Al Stone wrote:
> On 07/14/2016 04:03 AM, Alexey Klimov wrote:
> > Hi Al,
> >
> > On Tue, Jul 12, 2016 at 11:16:11AM -0600, Al Stone wrote:
> >> When CPPC is being used by ACPI on arm64, user space tools such as
> >> cpupower report CPU frequency values fr
On Thu, 14 Jul 2016 10:07:38 -0700
Randy Dunlap wrote:
> On 07/14/16 02:37, Jiri Pirko wrote:
> > From: Arnd Bergmann
> >
> > Including devlink.h on ARM and probably other 32-bit architectures results
> > in
> > a harmless warning:
> >
> > In file included from ../include/trace/define_trace.h
On 07/14/2016 06:09 PM, Steven Rostedt wrote:
> On Thu, 14 Jul 2016 18:05:04 +0200
> Sebastian Andrzej Siewior wrote:
>
>> There should be no need to hold the base lock during the wakeup. There
>> should be no boosting involved, the wakeup list has its own lock so it
>> should be safe to do this
Hi list,
I just wondered: I send the patch >14 days ago, 9 days ago it was
reviewed by Rex Zhu. As far as I know, it isn't applied by now. At
least I did not get a mail indicating that it was applied.
Are there issues with the patch I missed?
On 05-07-2016 15:06:59, Zhu, Rex wrote:
>
> Yes, s
On Thu, 14 Jul 2016 19:19:47 +0200
Sebastian Andrzej Siewior wrote:
> On 07/14/2016 06:09 PM, Steven Rostedt wrote:
> > On Thu, 14 Jul 2016 18:05:04 +0200
> > Sebastian Andrzej Siewior wrote:
> >
> >> There should be no need to hold the base lock during the wakeup. There
> >> should be no boo
On Fri, Jun 03, 2016 at 04:18:44PM -0700, Brian Silverman wrote:
> Without this, a realtime process which has called mlockall exiting
> causes large latencies for other realtime processes at the same or
> lower priorities. This seems like a fairly common use case too, because
> realtime processes g
Hi Will,
On Thu, Jul 14, 2016 at 6:16 AM, Will Deacon wrote:
> On Mon, Jul 11, 2016 at 12:05:40PM -0700, Tai Nguyen wrote:
>> In addition to the X-Gene ARM CPU performance monitoring unit (PMU), there
>> are PMU for the SoC system devices such as L3 cache(s), I/O bridge(s),
>> memory controller b
On Thu, Jul 14, 2016 at 10:13 AM, Oleg Nesterov wrote:
> On 07/14, John Stultz wrote:
>>
>> So I am seeing synchronize_sched called, and its taking the
>> !rcu_gp_is_expedited path when I see the particularly bad latencies.
>>
>> I wonder if I just mucked up applying the patch?
>
> Probably yes...
This patch adds the MAINTAINERS entry for APM X-Gene SoC PMU driver.
Signed-off-by: Tai Nguyen
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 1209323..41938e7 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -841,6 +841,13 @@ S: Supported
This patch adds a driver for the SoC-wide (AKA uncore) PMU hardware
found in APM X-Gene SoCs.
Signed-off-by: Tai Nguyen
Reviewed-by: Mark Rutland
---
Documentation/perf/xgene-pmu.txt | 48 ++
drivers/perf/Kconfig |7 +
drivers/perf/Makefile|1 +
drivers/perf/xg
Driver providing perf backend for the SoC-wide PMU hardware found
in APM X-Gene SoCs.
Signed-off-by: Tai Nguyen
Acked-by: Rob Herring
---
.../devicetree/bindings/perf/apm-xgene-pmu.txt | 112 +
1 file changed, 112 insertions(+)
create mode 100644 Documentation/devicetre
This patch adds APM X-Gene SoC PMU DTS entries.
Signed-off-by: Tai Nguyen
---
arch/arm64/boot/dts/apm/apm-storm.dtsi | 58 ++
1 file changed, 58 insertions(+)
diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi
b/arch/arm64/boot/dts/apm/apm-storm.dtsi
index 5147
In addition to the X-Gene ARM CPU performance monitoring unit (PMU), there
are PMU for the SoC system devices such as L3 cache(s), I/O bridge(s),
memory controller bridges and memory. These PMU devices are loosely
architected to follow the same model as the PMU for ARM cores.
Signed-off-by: Tai Ng
On 2016-07-14 09:31, Will Deacon wrote:
On Tue, Jul 12, 2016 at 02:19:20PM -0400, Nate Watterson wrote:
In the current arm-smmu-v3 driver, all smmus that support 2-level
stream tables are being forced to use them. This is suboptimal for
smmus that support fewer stream id bits than would fill in
On 07/14, Peter Zijlstra wrote:
>
> But I really think that this Android usecase invalidates the premise of
> cgroups using a global lock.
Perhaps... but it would be nice to have a global lock for cgroups (and in
fact probably unify it with dup_mmap_sem). And we can't simply revert that
change now
From: Thor Thayer
Add Altera Arria10 QSPI FIFO memory EDAC support.
Signed-off-by: Thor Thayer
---
drivers/edac/Kconfig |7 +++
drivers/edac/altera_edac.c | 34 +-
2 files changed, 40 insertions(+), 1 deletion(-)
diff --git a/drivers/edac/Kconfi
From: Thor Thayer
Add the device tree bindings needed to support the Altera NAND
FIFO buffers EDAC on the Arria10 chip.
Signed-off-by: Thor Thayer
---
.../bindings/arm/altera/socfpga-eccmgr.txt | 32
1 file changed, 32 insertions(+)
diff --git a/Documentation/de
On Thu 14-07-16 19:07:52, Ondrej Kozina wrote:
> On 07/14/2016 05:31 PM, Michal Hocko wrote:
> > On Thu 14-07-16 16:08:28, Ondrej Kozina wrote:
> > [...]
> > > As Mikulas pointed out, this doesn't work. The system froze as well with
> > > the
> > > patch above. Will try to tweak the patch with Mik
On Thu, Jul 14, 2016 at 10:28 AM, Tai Tri Nguyen wrote:
>
> Hi Will,
>
> On Thu, Jul 14, 2016 at 6:16 AM, Will Deacon wrote:
> > On Mon, Jul 11, 2016 at 12:05:40PM -0700, Tai Nguyen wrote:
> >> In addition to the X-Gene ARM CPU performance monitoring unit (PMU), there
> >> are PMU for the SoC sys
On Thu 14-07-16 19:36:59, Michal Hocko wrote:
> On Thu 14-07-16 19:07:52, Ondrej Kozina wrote:
> > On 07/14/2016 05:31 PM, Michal Hocko wrote:
> > > On Thu 14-07-16 16:08:28, Ondrej Kozina wrote:
> > > [...]
> > > > As Mikulas pointed out, this doesn't work. The system froze as well
> > > > with t
Paolo Bonzini writes:
> On 13/07/2016 17:47, Bandan Das wrote:
I wanted to keep it the former way because "PT_PRESENT_MASK is equal to
VMX_EPT_READABLE_MASK"
is an assumption all throughout. I wanted to use this section to catch
mismatches.
>>>
>>> I think there's no such as
On 7/14/2016 10:15 AM, Al Stone wrote:
> On 07/14/2016 04:03 AM, Alexey Klimov wrote:
>> Hi Al,
>>
>> On Tue, Jul 12, 2016 at 11:16:11AM -0600, Al Stone wrote:
>>> When CPPC is being used by ACPI on arm64, user space tools such as
>>> cpupower report CPU frequency values from sysfs that are incor
Hello,
On Thu, Jul 14, 2016 at 01:13:24PM -0400, Waiman Long wrote:
> On 07/14/2016 07:50 AM, Tejun Heo wrote:
> I got comment related to the percpu-list name from Christoph Lameter a while
> ago. His argument was that since deletion can happenned from any CPU, it was
> not really percpu like the
On 07/14, John Stultz wrote:
>
> I'm not supposed to be applying this on-top of
> Paul's change, right?
Right, unless I am totally confused,
> > Just in case, could you try the patch below? Of course, without other
> > optimizations from Peter, this change makes cgroup_threadgroup_rwsem
> > much
On Thu, 14 Jul 2016, Michal Hocko wrote:
> On Thu 14-07-16 10:00:16, Mikulas Patocka wrote:
> >
> >
> > On Thu, 14 Jul 2016, Michal Hocko wrote:
> >
> > > On Wed 13-07-16 11:02:15, Mikulas Patocka wrote:
> >
> > > > > diff --git a/drivers/md/dm-crypt.c b/drivers/md/dm-crypt.c
> > > > > index
On Thu, Jul 14, 2016 at 9:09 AM, John Stultz wrote:
> On Thu, Jul 14, 2016 at 5:48 AM, Serge E. Hallyn wrote:
>> Quoting Kees Cook (keesc...@chromium.org):
>>> I think the original CAP_SYS_NICE should be fine. A malicious
>>> CAP_SYS_NICE process can do plenty of insane things, I don't feel like
The private structure contain a pointer to phydev, but the structure
net_device already contain such pointer. So we can remove the pointer
phy in the private structure, and update the driver to use the
one contained in struct net_device.
Signed-off-by: Philippe Reynes
---
drivers/net/ethernet/xi
On Thu, 2016-07-14 at 10:27 -0700, Tai Nguyen wrote:
> This patch adds a driver for the SoC-wide (AKA uncore) PMU hardware
> found in APM X-Gene SoCs.
trivia:
> diff --git a/drivers/perf/xgene_pmu.c b/drivers/perf/xgene_pmu.c
[]
> +struct xgene_pmu_dev_ctx {
> + char *name;
> + struct lis
There are two generics functions phy_ethtool_{get|set}_link_ksettings,
so we can use them instead of defining the same code in the driver.
Signed-off-by: Philippe Reynes
---
drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 47 +
1 files changed, 2 insertions(+), 45 delet
On 7/14/2016 10:45 AM, Kees Cook wrote:
On Thu, Jul 14, 2016 at 9:09 AM, John Stultz wrote:
On Thu, Jul 14, 2016 at 5:48 AM, Serge E. Hallyn wrote:
Quoting Kees Cook (keesc...@chromium.org):
I think the original CAP_SYS_NICE should be fine. A malicious
CAP_SYS_NICE process can do plenty of i
Quoting Kees Cook (keesc...@chromium.org):
> On Thu, Jul 14, 2016 at 9:09 AM, John Stultz wrote:
> > On Thu, Jul 14, 2016 at 5:48 AM, Serge E. Hallyn wrote:
> >> Quoting Kees Cook (keesc...@chromium.org):
> >>> I think the original CAP_SYS_NICE should be fine. A malicious
> >>> CAP_SYS_NICE proce
On Thu, Jul 14, 2016 at 10:41 AM, Oleg Nesterov wrote:
> On 07/14, John Stultz wrote:
>>
>> I'm not supposed to be applying this on-top of
>> Paul's change, right?
>
> Right, unless I am totally confused,
>
>> > Just in case, could you try the patch below? Of course, without other
>> > optimizatio
Ok, so legacy gamma table updates are completely broken for Intel on
Linux-4.7-rc7, the final release candidate.
The good news is that applying Lionel's patch
"drm/i915: add missing condition for committing planes on crtc"
from
https://patchwork.freedesktop.org/patch/89111/
fixes it nicely.
Wanpeng Li writes:
> 2016-07-14 1:06 GMT+08:00 :
>> Wanpeng Li writes:
>>
>>> 2016-07-13 1:25 GMT+08:00 :
Konstantin Khlebnikov writes:
> On 11.07.2016 15:12, Xunlei Pang wrote:
>> On 2016/07/11 at 17:54, Wanpeng Li wrote:
>>> Hi Konstantin, Xunlei,
>>> 2016-07-11 16
Hi Joe,
On Thu, Jul 14, 2016 at 10:47 AM, Joe Perches wrote:
> On Thu, 2016-07-14 at 10:27 -0700, Tai Nguyen wrote:
>> This patch adds a driver for the SoC-wide (AKA uncore) PMU hardware
>> found in APM X-Gene SoCs.
>
> trivia:
>
>> diff --git a/drivers/perf/xgene_pmu.c b/drivers/perf/xgene_pmu.c
On 2016-07-14 07:21, Auger Eric wrote:
Hi Robin, Nate,
On 14/07/2016 12:36, Robin Murphy wrote:
On 14/07/16 09:34, Joerg Roedel wrote:
On Wed, Jul 13, 2016 at 02:49:32PM -0400, Nate Watterson wrote:
Passing a NULL or uninitialized iova_domain into put_iova_domain
will currently crash the kerne
On 07/14/2016 12:22 PM, Catalin Marinas wrote:
On Fri, Jul 08, 2016 at 12:35:44PM -0400, David Long wrote:
David A. Long (3):
arm64: Add HAVE_REGS_AND_STACK_ACCESS_API feature
arm64: Add more test functions to insn.c
arm64: add conditional instruction simulation support
Pratyush Anand
On Thu, Jul 14, 2016 at 10:49 AM, Serge E. Hallyn wrote:
> Kees, you said adding a capability is hard - can you expound on that?
Best I can find at the moment was discussion around CAP_COMPROMISE_KERNEL:
http://thread.gmane.org/gmane.linux.kernel/1459165
Basically, adding a new capability for an
On 07/14/2016 11:39 AM, Prakash, Prashanth wrote:
>
>
> On 7/14/2016 10:15 AM, Al Stone wrote:
>> On 07/14/2016 04:03 AM, Alexey Klimov wrote:
>>> Hi Al,
>>>
>>> On Tue, Jul 12, 2016 at 11:16:11AM -0600, Al Stone wrote:
When CPPC is being used by ACPI on arm64, user space tools such as
Hi Sasha,
On Thu, 14 Jul 2016 04:23:56 +0200,
Sasha Levin wrote:
>
> I'm announcing the release of the 4.1.28 kernel.
>
> All users of the 4.1 kernel series must upgrade.
>
> The updated 4.1.y git tree can be found at:
> git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.gi
On Thu, Jul 14, 2016 at 06:02:31PM +0800, Pingbo Wen wrote:
> > Steve Muckle (3):
> > cpufreq: add cpufreq_driver_resolve_freq()
> > cpufreq: schedutil: map raw required frequency to driver frequency
>
> Tested the first two patches on db410c, only waking up irq_work 53
> times, while previous
Hi Joe,
On Thu, Jul 14, 2016 at 10:54 AM, Tai Tri Nguyen wrote:
> Hi Joe,
>
> On Thu, Jul 14, 2016 at 10:47 AM, Joe Perches wrote:
>> On Thu, 2016-07-14 at 10:27 -0700, Tai Nguyen wrote:
>>> This patch adds a driver for the SoC-wide (AKA uncore) PMU hardware
>>> found in APM X-Gene SoCs.
>>
>> t
On Tue, Jun 28, 2016 at 11:25:11AM +0200, Ricardo Ribalda Delgado wrote:
> Xilinx Spartan-3AN FPGAs contain an In-System Flash where they keep
> their configuration data and (optionally) some user data.
>
> The protocol of this flash follows most of the spi-nor standard. With
> the following diffe
On 07/14/2016 02:14 AM, Alexander Graf wrote:
On 14.07.16 09:03, Zheng Xu wrote:
LuaJIT also fix the 48VA issue by allocating heap memory below 47 bits.
For mozjs issue, if there are pointers to .rodata, it can be a problem. Does it
happen on master and do we have any case to reproduce the is
On 07/14, Peter Zijlstra wrote:
>
> The below is a compile tested only first draft so far. I'll go give it
> some runtime next.
So I will wait for the new version, but at first glance this matches the
code I already reviewed in the past (at least, tried hard to review ;)
and it looks correct.
Jus
On Wed, Jul 13, 2016 at 5:23 PM, Florian Fainelli wrote:
> On 07/13/2016 11:18 AM, Jon Mason wrote:
>> The BCM958625HR board has 2GB of RAM available. Increase the amount
>> from 512MB to 2GB and add the device type to the memory entry.
>>
>> Signed-off-by: Jon Mason
>> ---
>> arch/arm/boot/dts
On Wed, Jul 13, 2016 at 10:48 PM, Josh Poimboeuf wrote:
> On Wed, Jul 13, 2016 at 03:04:26PM -0700, Kees Cook wrote:
>> On Wed, Jul 13, 2016 at 3:01 PM, Andy Lutomirski wrote:
>> > On Wed, Jul 13, 2016 at 2:55 PM, Kees Cook wrote:
>> >> This creates per-architecture function arch_within_stack_fr
Each namespace has an owning user namespace and now there is not way
to discover these relationships.
Pid and user namepaces are hierarchical. There is no way to discover
parent-child relationships too.
Why we may want to know relationships between namespaces?
One use would be visualization, in
Each namespace has an owning user namespace and now there is not way
to discover these relationships.
Understending namespaces relationships allows to answer the question:
what capability does process X have to perform operations on a resource
governed by namespace Y?
After a long discussion, Eri
Pid and user namepaces are hierarchical. There is no way to discover
parent-child relationships.
In a future we will use this interface to dump and restore nested
namespaces.
Signed-off-by: Andrey Vagin
---
fs/nsfs.c | 4
include/linux/proc_ns.h | 1 +
include/uapi/linu
There are two new ioctl-s:
One ioctl for the user namespace that owns a file descriptor.
One ioctl for the parent namespace of a namespace file descriptor.
The test checks that these ioctl-s works and that they handle a case
when a target namespace is outside of the current process namespace.
Sig
Return -EPERM if an owning user namespace is outside of a process
current user namespace.
Signed-off-by: Andrey Vagin
---
include/linux/user_namespace.h | 7 +++
kernel/user_namespace.c| 24
2 files changed, 31 insertions(+)
diff --git a/include/linux/user_
Every namespace has a pointer to an user namespace where is was created,
but they're all privately embedded in the individual namespace specific
structures.
Now we are going to add an user-space interface to get an owning user
namespace, so it looks reasonable to move it into ns_common.
Originall
ethtool -i provides a driver version that is hard coded.
Export the same value via "modinfo".
Signed-off-by: Grant Grundler
---
drivers/net/usb/r8152.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index 0da72d3..1c01ed5 100644
--- a/driver
Hi Al,
On 7/14/2016 11:57 AM, Al Stone wrote:
> On 07/14/2016 11:39 AM, Prakash, Prashanth wrote:
>>
>> On 7/14/2016 10:15 AM, Al Stone wrote:
>>> On 07/14/2016 04:03 AM, Alexey Klimov wrote:
Hi Al,
On Tue, Jul 12, 2016 at 11:16:11AM -0600, Al Stone wrote:
> When CPPC is being
On 14/07/2016 19:38, Bandan Das wrote:
> Paolo Bonzini writes:
>
>> On 13/07/2016 17:47, Bandan Das wrote:
> I wanted to keep it the former way because "PT_PRESENT_MASK is equal to
> VMX_EPT_READABLE_MASK"
> is an assumption all throughout. I wanted to use this section to catch
>>
The current percpu-rwsem read side is entirely free of serializing
instructions at the cost of having a synchronize_sched() in the write
path.
The latency of the synchronize_sched() is too high for some users
(cgroups), so provide a __percpu_init_rwsem(.bias) argument to forgot
this synchronize_sc
Currently the percpu-rwsem switches to (global) atomic ops while a
writer is waiting; which could be quite a while and slows down
releasing the readers.
This patch cures this problem by ordering the reader-state vs
reader-count (see the comments in __percpu_down_read() and
percpu_down_write()). Th
As reported by John and Dmitry, Android tickles bad behaviour in
cgroup_threadgroup_rwsem.
These two patches attempt to address the issue by optimizing the percpu-rwsem
slow path and second add a bias knob to the percpu-rwsem that allows disabling
the fast path which improves writer latency by get
On Thu, Jul 14 2016, 06:08 PM, Rosen, Rami wrote:
> Hi Amir,
Hi Rami,
> Here are my 2 cents:
>
> This method always returns true, should be void (unless you will change
> PDF_ERROR_NOTIFICATION or other pdf values to return false), and
> likewise its invocation should not check return value.
>
On Thu, Jul 14, 2016 at 08:09:52PM +0200, Oleg Nesterov wrote:
> On 07/14, Peter Zijlstra wrote:
> >
> > The below is a compile tested only first draft so far. I'll go give it
> > some runtime next.
>
> So I will wait for the new version, but at first glance this matches the
> code I already revie
Good day Arnaldo,
This is the first set of patches aimed at supporting trace acquisition and
decoding using the ARM CoreSight drivers. The library is now out and accessible
by anyone[1] - branch "opencsd-0v002" is stable and the one we advise to use.
Part of that branch is a "HOWTO.md" that descr
Adding the required mechanic allowing 'perf list pmu' to
discover coresight ETM/PTM tracers.
Signed-off-by: Mathieu Poirier
Acked-by: Adrian Hunter
---
MAINTAINERS| 1 +
tools/perf/arch/arm/util/Build | 2 ++
tools/perf/arch/arm/util/pmu.c | 34
Coresight ETMs are IP blocks used to perform HW assisted tracing
on a CPU core. This patch introduce the required auxiliary API
functions allowing the perf core to interact with a tracer.
Signed-off-by: Mathieu Poirier
---
MAINTAINERS | 4 +
tools/perf/arch/arm/util/Bu
Directly accessing kernel files is not allowed anymore. As such
making file coresight-pmu.h accessible by the perf tools and complain
if this copy strays from the one found in the main kernel tree.
Signed-off-by: Mathieu Poirier
---
tools/include/linux/coresight-pmu.h | 39 +
On 07/14/2016 07:19 PM, Steven Rostedt wrote:
>> While doing so I noticed that we drop the base lock during timer
>> invocations and so it could be possible that we have two invocations
>> of del_timer_sync() on a timer on the same "base" (one after the
>> other). This is patch #1.
>>
>> After that
On Thu, Jul 14, 2016 at 08:25:47PM +0200, Peter Zijlstra wrote:
> @@ -19,6 +20,13 @@ int __percpu_init_rwsem(struct percpu_rw
>
> /* ->rw_sem represents the whole percpu_rw_semaphore for lockdep */
> rcu_sync_init(&sem->rss, RCU_SCHED_SYNC);
> + if (bias == PERCPU_RWSEM_WRITER) {
* Paul Gortmaker wrote:
> > I'll continue testing with the setup_percpu.c change left out.
>
> Let me know if you want a resend or if you want to just add the
> asm/desc.h locally or ...
So I tried the asm/desc.h but saw other build failures - for now gave up.
Can we do this in a separate patc
On 07/14, Peter Zijlstra wrote:
>
> The current percpu-rwsem read side is entirely free of serializing
> instructions at the cost of having a synchronize_sched() in the write
> path.
>
> The latency of the synchronize_sched() is too high for some users
> (cgroups), so provide a __percpu_init_rwsem(
Commit-ID: 84e629b66882f8d1b6e40060e85e5bb27c892d42
Gitweb: http://git.kernel.org/tip/84e629b66882f8d1b6e40060e85e5bb27c892d42
Author: Paul Gortmaker
AuthorDate: Wed, 13 Jul 2016 20:18:54 -0400
Committer: Ingo Molnar
CommitDate: Thu, 14 Jul 2016 13:04:20 +0200
x86: Don't use module.h j
Commit-ID: 4b599fedb7eeea4c995e655a938b5ec419386ddf
Gitweb: http://git.kernel.org/tip/4b599fedb7eeea4c995e655a938b5ec419386ddf
Author: Paul Gortmaker
AuthorDate: Wed, 13 Jul 2016 20:18:55 -0400
Committer: Ingo Molnar
CommitDate: Thu, 14 Jul 2016 13:04:20 +0200
x86/mm: Audit and remove
Commit-ID: 186f43608a5c827f8284fe4559225b4dccaa49ef
Gitweb: http://git.kernel.org/tip/186f43608a5c827f8284fe4559225b4dccaa49ef
Author: Paul Gortmaker
AuthorDate: Wed, 13 Jul 2016 20:18:56 -0400
Committer: Ingo Molnar
CommitDate: Thu, 14 Jul 2016 15:06:41 +0200
x86/kernel: Audit and rem
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