On Tue, Jun 21, 2016 at 05:29:42PM +, Punnaiah Choudary Kalluri wrote:
>
> Ok agree with you for the scenario that I have mentioned above.
>
> Other simple dma mode feature that I missed to explain is configuring the
> Dma descriptors. It provides a register interface for configuring the dma
On Sun 26 Jun 00:28 PDT 2016, Stephen Boyd wrote:
> In the case of ULPI devices, we want to be able to load the
> driver before registering the device so that we don't get stuck
> in a loop waiting for the phy module to appear and failing usb
> controller probe. Currently we request the ulpi modul
On Wed, Jun 22, 2016 at 07:04:28AM +, Appana Durga Kedareswara Rao wrote:
> > > >
> > > > Can you elobrate what you meant by Multichannel mode? This patch
> > > > seems to do two things, one is to add interleaved dma support and
> > > > something else. Can you explain the latter part?
> > >
> >
On Mon, Jun 27, 2016 at 07:46:42PM -0600, Azael Avalos wrote:
> These series of patches update the accelerometer axis data
> reporting to use the IIO subsystem, deprecating the custom
> position sysfs entry, and finally bumping the driver version
> to 0.24.
>
Thanks Azael, queued to testing for 4
On Thursday 23 June 2016 01:30 PM, Alexey Brodkin wrote:
> If CONFIG_ARC_DW2_UNWIND is disabled every time arc_unwind_core()
> gets called following message gets printed in debug console:
> ->8---
> CONFIG_ARC_DW2_UNWIND needs to be enabled
> ->8-
To support execute only mappings on behalf of L1
hypervisors, we teach set_spte() to honor L1's valid XWR
bits. This is only if host supports EPT execute only. Reuse
ACC_USER_MASK to signify if the L1 hypervisor has the R bit
set
Signed-off-by: Bandan Das
---
arch/x86/kvm/mmu.c | 9 +
This is safe because is_shadow_present_pte() is called
on host controlled page table and we know the spte is
valid
Signed-off-by: Bandan Das
---
arch/x86/kvm/mmu.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index def97b3..a50af79
These patches are based on reviews to my RFC
http://www.spinics.net/lists/kvm/msg134440.html
Changes since RFC:
- Remove shadow_xonly_valid, it's not needed
- Remove checks from is_shadow_present_pte()
- In reset_tdp_shadow_zero_bits_mask, pass correct execonly to
__reset_rsvds_bits_mask_ept
In reset_tdp_shadow_zero_bits_mask, we always pass false
when initializing the reserved bits. By initializing with the
correct value of ept exec only, the host can correctly
identify if the guest pte is valid. Note that
kvm_init_shadow_ept_mmu() already knows about execonly.
Signed-off-by: Bandan
KVM MMU now knows about execute only mappings, so
advertise the feature to L1 hypervisors
Signed-off-by: Bandan Das
---
arch/x86/kvm/vmx.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 417debc..0fe61a3 100644
--- a/arch/x86/kvm/vmx.c
+++ b/a
Replace magic numbers used for L310 Prefetch Control Register
Acked-by: Arnd Bergmann
Signed-off-by: Andrey Smirnov
---
arch/arm/mm/cache-l2x0.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 9f9d542..30e2012 1
We have two versions of the above function.
To prevent confusion and bugs in the future, remove
the non-FNAME version entirely and replace all calls
with the actual check.
Signed-off-by: Bandan Das
---
arch/x86/kvm/mmu.c | 2 +-
arch/x86/kvm/mmu.h | 5 -
arch/x86/kvm/paging_t
As per L2C-310 TRM[1]:
"... You can control this feature using bits 30,27 and 23 of the
Prefetch Control Register. Bit 23 and 27 are only used if you set bit 30
HIGH..."
which means there is no need to clear bit 23 if bit 30 is being cleared.
[1]
http://infocenter.arm.com/help/index.jsp?topic=/
> * PGP Signed by an unknown key
>
> On Mon, Jun 27, 2016 at 05:13:44PM +0530, Venkat Reddy Talla wrote:
> > Check for valid regulator information data before configuring FPS
> > source and FPS power up/down period to avoid NULL pointer exception if
> > entries for PMIC regulators not provided thr
Hi everyone,
I'm sorry to bother you. But I was confused.
The IP ID check (flush_id) in inet_gro_receive is only used by
tcp_gro_receive, and in tcp_gro_receive we have tcphdr check to ensure the
order of skbs,
like below:
flush |= (__force int)(th->ack_seq ^ th
Implement new character device driver to allow access from user space
to the operator panel display present on IBM Power Systems machines
with FSPs.
This will allow status information to be presented on the display which
is visible to a user.
The driver implements a character buffer which a user
Add a binding to Documentation/devicetree/bindings/powerpc/opal
(oppanel-opal.txt) for the operator panel which is present on IBM
Power Systems machines with FSPs.
Signed-off-by: Suraj Jitindar Singh
Acked-by: Rob Herring
Acked-by: Stewart Smith
---
Change Log:
V1 -> V2:
- Nothing
V2
An opal_msg of type OPAL_MSG_ASYNC_COMP contains the return code in the
params[1] struct member. However this isn't intuitive or obvious when
reading the code and requires that a user look at the skiboot
documentation or opal-api.h to verify this.
Add a #define to get the return code from an opal_
Hi Heiko,
This series just want to enable the graphic support on RK3288 EVB
boards, most of them are DTS changes, but still have one change about
new eDP panel support.
Thanks,
- Yakir
Yakir Yang (5):
dt-bindings: Add support for LG LP079QX1-SP0V 1536x2048 panel
drm/panel: simple: Add s
The LG LP079QX1-SP0V is an 7.9" QXGA TFT with LED Backlight unit and
32 pins eDP interface. This module supports 1536x2048 mode.
Signed-off-by: Yakir Yang
---
.../devicetree/bindings/display/panel/lg,lp079qx1-sp0v.txt | 7 +++
1 file changed, 7 insertions(+)
create mode 100644
Docu
Panel regulator is controller by a normal GPIO, so we need to
write a regulator-fixed node for it.
Signed-off-by: Yakir Yang
---
arch/arm/boot/dts/rk3288-evb-rk808.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-evb-rk808.dts
b/arch/arm/boot/dts/rk3288-evb-r
Panel regulator is controller by a normal GPIO, so we need to
write a regulator-fixed node for it.
Signed-off-by: Yakir Yang
---
arch/arm/boot/dts/rk3288-evb-act8846.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-evb-act8846.dts
b/arch/arm/boot/dts/rk3288-e
The LG LP079QX1-SP0V is an 7.9" QXGA TFT with LED Backlight unit and
32 pins eDP interface. This module supports 1536x2048 mode.
Signed-off-by: Yakir Yang
---
drivers/gpu/drm/panel/panel-simple.c | 26 ++
1 file changed, 26 insertions(+)
diff --git a/drivers/gpu/drm/pane
On Sun 26 Jun 00:28 PDT 2016, Stephen Boyd wrote:
> We need to pick the correct phy at runtime based on how the SoC
> has been wired onto the board. If the secondary phy is used, take
> it out of reset and mux over to it by writing into the TCSR
> register. Make sure to do this on reset too, becau
The default eDP panel on RK3288 EVB board is LG LP079QX1-SP0V TFT LCD,
we haven't declared the panel regulator in the 'panel-simple' device
node here, so the specific board like ACT8846 / RK8080 need to support
the panel power supply.
Signed-off-by: Yakir Yang
---
arch/arm/boot/dts/rk3288-evb.dt
The original commit adding support for continuous voltage mode didn't
handle the regulator ramp delay properly. It treated the delay as a
fixed delay in uS despite the property being defined as uV / uS. Let's
adjust it. Luckily there appear to be no users of this ramp delay for
PWM regulators (a
Hi
> -Original Message-
> From: Stephen Boyd [mailto:stephen.b...@linaro.org]
> Sent: Tuesday, June 28, 2016 9:18 AM
> To: Peter Chen ; Felipe Balbi
> Cc: linux-arm-ker...@lists.infradead.org; linux-kernel@vger.kernel.org;
> linux-...@vger.kernel.org; Jun Li ; Greg Kroah-Hartman
>
> Subj
The problem was occurs in my system that a lot of drviers register
its own handler to the notifiler call chain for netdev_chain, and
then create 4095 vlan dev for one nic, and add several ipv6 address
on each one of them, just like this:
for i in `seq 1 4095`; do ip link add link eth0 name eth0.$i
On Tue, 2016-06-28 at 12:40 +0800, Tan Xiaojun wrote:
> Hi everyone,
>
> I'm sorry to bother you. But I was confused.
>
> The IP ID check (flush_id) in inet_gro_receive is only used by
> tcp_gro_receive, and in tcp_gro_receive we have tcphdr check to ensure
> the order of skbs,
>
On Tue, Jun 28, 2016 at 11:39:18AM +0800, xinhui wrote:
[snip]
> > > +{
> > > + struct lppaca *lp = &lppaca_of(cpu);
> > > +
> > > + if (unlikely(!(lppaca_shared_proc(lp) ||
> > > + lppaca_dedicated_proc(lp
> >
> > Do you want to detect whether we are running in a guest(ie. pse
On Fri 17 Jun 03:15 PDT 2016, Neil Armstrong wrote:
> In order to support the Qualcomm MDM9615 SoC, add support for the TLMM
> using the Qualcomm pinctrl generic driver.
>
> Note: the pinctrl is partial, need Documentation to complete all the groups.
> Signed-off-by: Neil Armstrong
Unfortunatel
From: James Ban
This is a patch for adding description for da9212/da9214.
Signed-off-by: James Ban
---
This patch applies against linux-next and next-20160624
.../devicetree/bindings/regulator/da9211.txt | 44 ++--
drivers/regulator/da9211-regulator.c
On Fri 17 Jun 03:15 PDT 2016, Neil Armstrong wrote:
> Signed-off-by: Neil Armstrong
Acked-by: Bjorn Andersson
Regards,
Bjorn
Topi Miettinen writes:
> On 06/24/16 17:21, Eric W. Biederman wrote:
>> "Serge E. Hallyn" writes:
>>
>>> Quoting Tejun Heo (t...@kernel.org):
Hello,
On Fri, Jun 24, 2016 at 10:59:16AM -0500, Serge E. Hallyn wrote:
> Quoting Tejun Heo (t...@kernel.org):
>> But isn't being
Hi,
> From: Andrey Skvortsov [mailto:andrej.skvort...@gmail.com]
> Subject: Re: acpi: broken suspend to RAM with v4.7-rc1
>
> On 27 Jun, Zheng, Lv wrote:
> > Hi,
> >
> > > From: Andrey Skvortsov [mailto:andrej.skvort...@gmail.com]
> > > Subject: Re: acpi: broken suspend to RAM with v4.7-rc1
> > >
On Tue, 2016-06-28 at 12:56 +0800, Ding Tianhong wrote:
> The problem was occurs in my system that a lot of drviers register
> its own handler to the notifiler call chain for netdev_chain, and
> then create 4095 vlan dev for one nic, and add several ipv6 address
> on each one of them, just like thi
> -Original Message-
> From: Jonathan Cameron [mailto:ji...@kernel.org]
> Sent: 28 June 2016 00:41
> To: Raveendra Padasalagi
> Cc: Peter Meerwald-Stadler; Rob Herring; Russell King; Arnd Bergmann;
> linux-
> i...@vger.kernel.org; devicet...@vger.kernel.org; linux-arm-
> ker...@lists.infrad
This adds DT binding documentation for Mediatek MT6755.
Signed-off-by: Mars Cheng
---
Documentation/devicetree/bindings/arm/mediatek.txt |4
.../interrupt-controller/mediatek,sysirq.txt |1 +
.../devicetree/bindings/serial/mtk-uart.txt|1 +
3 files changed, 6 inser
This adds basic chip support for MT6755 SoC.
Signed-off-by: Mars Cheng
---
arch/arm64/boot/dts/mediatek/Makefile |1 +
arch/arm64/boot/dts/mediatek/mt6755-evb.dts | 38 +++
arch/arm64/boot/dts/mediatek/mt6755.dtsi| 145 +++
3 files changed, 184 insert
This patch adds basic support for Mediatek's new 8-core chip, mt6755.
Based on 4.7-rc1
Changes in v2:
1. use evb as project suffix
2. add "disable" property for uart dts nodes
3. only alias uart0 as serial0, since we don't enable uart1
Mars Cheng (2):
Document: DT: Add bindings for mediatek MT6
Hello,
On Fri, Jun 24, 2016 at 7:55 PM, Chunyu Hu wrote:
> latency tracers(wakeup, wakeup_rt, wakeup_dl, irqsoff) can use the
> function_graph trace when display_graph trace option is set by user
> via tracefs. And currently the set_graph_notrace filter is not fully
> supported in latency tracers
On Mon, Jun 27, 2016 at 10:54 PM, Petr Mladek wrote:
> 1st patch adds one more paranoid check of the modified function on x86.
>
> Plus there are 3 small changes that appeared when hunting down
> the 1st patch.
For the series,
Acked-by: Namhyung Kim
Thanks,
Namhyung
>
> Petr Mladek (4):
>
On Thu, 23 Jun 2016, Manfred Spraul wrote:
What I'm not sure yet is if smp_load_acquire() is sufficient:
Thread A:
if (!READ_ONCE(sma->complex_mode)) {
The code is test_and_test, no barrier requirements for first test
Yeah, it would just make us take the big lock unnecessarily, nothin
Currently ftrace_graph_ent{,_entry} and ftrace_graph_ret{,_entry} struct
can have padding bytes at the end due to alignment in 64-bit data type.
As these data are recorded so frequently, those paddings waste
non-negligible space. As some archs can have efficient unaligned
accesses, reducing the al
On Mon, Jun 27, 2016 at 03:27:13PM +0100, David Howells wrote:
>
> I have some patches I need to finish revamping. I had it kind of working
> (though with a slightly different user interface) - then TPMv2 support was
> added to the TPM driver before I finished and I need to redo the patches.
In
On 2016年06月28日 13:03, Boqun Feng wrote:
On Tue, Jun 28, 2016 at 11:39:18AM +0800, xinhui wrote:
[snip]
+{
+ struct lppaca *lp = &lppaca_of(cpu);
+
+ if (unlikely(!(lppaca_shared_proc(lp) ||
+ lppaca_dedicated_proc(lp
Do you want to detect whether we are
Hi Vineet,
On Tue, 2016-06-28 at 10:00 +0530, Vineet Gupta wrote:
> On Thursday 23 June 2016 01:30 PM, Alexey Brodkin wrote:
> >
> > If CONFIG_ARC_DW2_UNWIND is disabled every time arc_unwind_core()
> > gets called following message gets printed in debug console:
> > ->8--
Hi Markus,
On Fri, Jun 24, 2016 at 3:39 PM, Pranay Kr. Srivastava
wrote:
> spinlocked ranges should be small and not contain calls into huge
> subfunctions. Fix my mistake and just get the pointer to the socket
> instead of doing everything with spinlock held.
>
> Reported-by: Mikulas Patocka
>
On 2016/6/27 20:13, Andy Shevchenko wrote:
On Mon, 2016-06-27 at 05:08 -0700, Joe Perches wrote:
On Mon, 2016-06-27 at 15:00 +0300, Andy Shevchenko wrote:
On Mon, 2016-06-27 at 04:49 -0700, Joe Perches wrote:
On Mon, 2016-06-27 at 17:54 +0800, Yisen Zhuang wrote:
From: Daode Huang
There a
From: Stefan Agner
Currently the tx_empty callback only considers the Transmit Complete Flag (TC).
The reference manual is not quite clear if the TC flag covers the TX FIFO too.
Debug prints on real hardware have shown that from time to time the TC flag is
asserted (indicating Transmitter idle) w
From: Stefan Agner
Commit 8e4934c6d6c6 ("tty: serial: fsl_lpuart: clear receive flag on FIFO
flush") implemented clearing of the receive flag by reading the status register
only. It turned out that even though we flush the FIFO afterwards, a explicit
read of the data register is still required.
Hi Vinod,
Thanks for the review...
> > > > > > /**
> > > > > > + * struct xilinx_mcdma_config - DMA Multi channel
> > > > > > +configuration structure
> > > > > > + * @tdest: Channel to operate on
> > > > > > + * @tid: Channel configuration
> > > > > > + * @tuser: Tuser configuration
>
tocol family 10
>
> [2.623472] ==
> [2.623548] [ INFO: HARDIRQ-safe -> HARDIRQ-unsafe lock order detected ]
> [2.623638] 4.7.0-rc4-next-20160627-dirty #303 Not tainted
> [2.623733] --
> [2.623817] kwor
The initial approach of DMA implementatin for RX is inefficient due to switching
from PIO to DMA, this leads to overruns especially on instances with the smaller
FIFO. To address these issues this patch uses a cyclic DMA for receiver path.
Some part of the code is borrowed from atmel serial driver
platform_device_id table is needed for adding the tps65218-pwrbutton
module to the mfd_cell array.
Signed-off-by: Keerthy
---
drivers/input/misc/tps65218-pwrbutton.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/input/misc/tps65218-pwrbutton.c
b/drivers/input/misc/tps65218-
Remove all the individual compatibles for all the regulators
and introduce id_table and update the driver accordingly
to parse device tree nodes using the regulator framework.
Acked-by: Mark Brown
Signed-off-by: Keerthy
---
drivers/regulator/tps65218-regulator.c | 131 +++---
Remove the individual compatible for the gpio module.
Introduce id_table and update the driver accordingly
to parse device tree nodes by just using the mfd compatible.
Signed-off-by: Keerthy
---
drivers/gpio/gpio-tps65218.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff -
Currently read directly calls the repmap read function. Hence
remove the redundant wrapper and use regmap read wherever
needed.
Signed-off-by: Keerthy
---
Changes in v3:
* Cleaned up tps65218-pwrbutton and gpio drivers to remove
tps65218_reg_read instances.
drivers/gpio/gpio-tps65218.c
The series cleans up mainly the regulator driver and implements
the device tree parsing using the regulator framework. Removes
all the redundant compatibles for the individual regulators.
Removes compatible for gpio driver as well and adds it to
the mfd_cell.
One of the patch removes redundant rea
With the device tree parsing using the regulator framework
there is a no longer a need for separate compatibles for
individual regulator nodes. Hence removing them all.
Signed-off-by: Keerthy
---
arch/arm/boot/dts/am43x-epos-evm.dts | 7 ---
1 file changed, 7 deletions(-)
diff --git a/arch/
From: Stefan Agner
In order to allow wake support in STOP sleep mode, clocks are needed. Use
imx_clk_gate2_cgr to disable automatic clock gating in low power mode STOP.
This allows to enable wake by UART using:
echo enabled > /sys/class/tty/ttyLP0/power/wakeup
However, if wake is not enabled, th
With the device tree parsing using the regulator framework
there is a no longer a need for separate compatibles for
individual regulator nodes. Hence removing them all.
Signed-off-by: Keerthy
---
arch/arm/boot/dts/am437x-cm-t43.dts | 6 --
1 file changed, 6 deletions(-)
diff --git a/arch/ar
By default the driver always configure the mode as 8s1 even when 8m1 mode is
selected. Fix this by adding support to control the space/mark bit.
Signed-off-by: Bhuvanchandra DV
---
drivers/tty/serial/fsl_lpuart.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/driver
With the device tree parsing using the regulator framework
there is a no longer a need for separate compatibles for
individual regulator nodes. Hence removing them all.
Signed-off-by: Keerthy
---
arch/arm/boot/dts/am437x-sk-evm.dts | 5 -
1 file changed, 5 deletions(-)
diff --git a/arch/arm
mfd_add_devices enables parsing device tree nodes without compatibles
for regulators and gpio modules. Replace of_platform_populate with
mfd_add_devices. mfd_cell currently is populated with regulators,
gpio and powerbutton.
Signed-off-by: Keerthy
---
drivers/mfd/tps65218.c | 15 +--
With the device tree parsing using the regulator framework
there is a no longer a need for separate compatibles for
individual regulator nodes. Hence removing them all.
Signed-off-by: Keerthy
---
arch/arm/boot/dts/am437x-gp-evm.dts | 6 --
1 file changed, 6 deletions(-)
diff --git a/arch/ar
On 2016/6/28 13:13, Eric Dumazet wrote:
> On Tue, 2016-06-28 at 12:56 +0800, Ding Tianhong wrote:
>> The problem was occurs in my system that a lot of drviers register
>> its own handler to the notifiler call chain for netdev_chain, and
>> then create 4095 vlan dev for one nic, and add several ipv6
Hi all,
Changes since 20160627:
New tree: binfmt_misc
The nfs tree lost its build failure.
The net-next tree gained a conflict against the imx-mxs tree.
The iommu tree gained a conflict against the arm tree.
The audit tree gained a conflict against the security tree.
Non-merge commits
Hi Jann,
On 06/25/2016 04:30 PM, Jann Horn wrote:
On Sat, Jun 25, 2016 at 09:30:43AM +0200, Michael Kerrisk (man-pages) wrote:
Hi Kees,
So, last year, I added some documentation to ptrace(2) to describe
the Yama ptrace_scope file. I don't think I asked you for review
at the time, but in the li
This updates the device tree according to the preferred way of parsing
the nodes using the regulator framework.
Acked-by: Rob Herring
Signed-off-by: Keerthy
---
.../devicetree/bindings/regulator/tps65218.txt | 87 ++
1 file changed, 71 insertions(+), 16 deletions(-)
dif
2016-06-27 21:11 GMT+08:00 Paolo Bonzini :
> If the TSC deadline timer is programmed really close to the deadline or
> even in the past, the computation in vmx_set_hv_timer can underflow and
> cause delta_tsc to be set to a huge value. This generally results
> in vmx_set_hv_timer returning -ERANGE
The clk notifier symbols are hidden by COMMON_CLK. However on some
platforms HAVE_CLK might be set while COMMON_CLK not which leads to
compile test build errors like:
$ make.cross ARCH=sh
drivers/devfreq/tegra-devfreq.c: In function 'tegra_actmon_rate_notify_cb':
>> drivers/devfreq/tegra-devfr
On Tue, 2016-06-28 at 14:09 +0800, Ding Tianhong wrote:
> On 2016/6/28 13:13, Eric Dumazet wrote:
> > On Tue, 2016-06-28 at 12:56 +0800, Ding Tianhong wrote:
> >> The problem was occurs in my system that a lot of drviers register
> >> its own handler to the notifiler call chain for netdev_chain, an
Hi,
[auto build test ERROR on robh/for-next]
[also build test ERROR on v4.7-rc5 next-20160627]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Keerthy/mfd-tps65218-Clean-ups/20160628-141354
base
On Tue, 2016-06-28 at 08:22 +0200, Eric Dumazet wrote:
> Follow the stack trace and add another cond_resched() where it is needed
> then ?
>
> Lot of this code was written decade ago where nobody expected a root
> user was going to try hard to crash its host ;)
>
> I did not check if the followi
Only register power off if the PMIC is defined as system power
controller (see Documentation/devicetree/bindings/power/
power-controller.txt).
Signed-off-by: Stefan Agner
Reviewed-by: Marcel Ziswiler
---
drivers/mfd/rn5t618.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
dif
Use the PMIC's repower capability for reboots. Register a restart
handler and use a slightly elevated priority of 192 since the PMIC
has suprior reset capability (causing a system wide reset).
Signed-off-by: Stefan Agner
Reviewed-by: Marcel Ziswiler
---
drivers/mfd/rn5t618.c | 43 ++
The Ricoh RN5T567 is from the same family as the Ricoh RN5T618 is,
the differences are:
+ DCDC4
+ Slightly different output voltage/currents
+ 32kHz Output
- ADC/Charger capabilities
Signed-off-by: Stefan Agner
Reviewed-by: Marcel Ziswiler
Acked-by: Rob Herring
---
Documentation/devicetree/bi
Extend the driver to support Ricoh RN5T567. Support the additional
DCDC and slightly different voltage range of LDORTC1.
Signed-off-by: Stefan Agner
Reviewed-by: Marcel Ziswiler
Acked-by: Mark Brown
Acked-by: Lee Jones
---
drivers/regulator/Kconfig | 5 +++--
drivers/regulator/rn
The PMIC driver used to register itself as poweroff controller by
default, hence assuming that this device is using the PMIC as
system power controller.
Signed-off-by: Stefan Agner
Reviewed-by: Marcel Ziswiler
Acked-by: Carlo Caione
---
arch/arm/boot/dts/meson8-minix-neo-x8.dts | 1 +
1 file c
This patchset adds RN5T567 PMIC support which is used on the
Toradex Colibri iMX7S/iMX7D modules. The existing RN5T618 is from
the same family, hence this patchset uses the same driver and adds
variant support.
The Colibris currently do not use the PMIC's power off capabilities,
as do the current
On 2016/6/27 16:31, oulijun wrote:
Hi, Leon
在 2016/6/27 16:01, Leon Romanovsky 写道:
On Sat, Jun 25, 2016 at 06:25:37PM +0800, Wei Hu (Xavier) wrote:
On 2016/6/24 22:59, Leon Romanovsky wrote:
On Thu, Jun 16, 2016 at 10:35:12PM +0800, Lijun Ou wrote:
This patch mainly added reset flow of RoC
Send again to correct addresses, sorry!
On Tue, Jun 28, 2016 at 3:25 PM, Namhyung Kim wrote:
> Hello,
>
> I'm running some guest machines for kernel development. For debugging
> purpose, I use lots of trace_printk() since it's faster than normal
> printk(). When kernel crash happens the trace b
Hi,
[auto build test ERROR on robh/for-next]
[also build test ERROR on v4.7-rc5 next-20160627]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Keerthy/mfd-tps65218-Clean-ups/20160628-141354
base
Generic callibrate delay required this value.
Signed-off-by: Yoshinori Sato
---
arch/sh/boards/of-generic.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c
index 3db4294..2d3cda3 100644
--- a/arch/sh/boards/of-generic.c
+++ b/ar
Signed-off-by: Yoshinori Sato
---
drivers/pci/ecam.h | 17 +
include/linux/pci.h | 18 ++
2 files changed, 19 insertions(+), 16 deletions(-)
diff --git a/drivers/pci/ecam.h b/drivers/pci/ecam.h
index 9878beb..f110091 100644
--- a/drivers/pci/ecam.h
+++ b/drivers/
This is an alternative SH7751 PCI driver.
Existing driver (arch/sh/drivers/pci/pci-sh7751) uses SH specific interface.
But this driver uses common PCI interface. It is more modern and generic.
Signed-off-by: Yoshinori Sato
---
.../devicetree/bindings/pci/sh7751-pci.txt | 51
arch/s
Signed-off-by: Yoshinori Sato
---
.../interrupt-controller/iodata-landisk.txt| 34 ++
arch/sh/boot/dts/Makefile | 2 +
arch/sh/boot/dts/landisk.dts | 62 ++
drivers/irqchip/Makefile | 2 +-
Signed-off-by: Yoshinori Sato
---
arch/sh/boot/dts/sh7751.dtsi | 85 ++
include/dt-bindings/clock/renesas-sh7750.h | 26 +++
include/dt-bindings/interrupt-controller/sh_intc.h | 2 +
3 files changed, 113 insertions(+)
create mode 100644 arch
On 27/06/16 22:30, Stephen Boyd wrote:
> Quoting Roger Quadros (2016-06-27 00:39:51)
>> Hi Stephen,
>>
>> On 26/06/16 08:56, Stephen Boyd wrote:
>>> Some Qualcomm PMICs have a misc device that performs USB id pin
>>> detection via an interrupt. When the interrupt triggers, we
>>> should read the in
Signed-off-by: Yoshinori Sato
---
arch/sh/Makefile| 2 ++
arch/sh/kernel/cpu/sh4/Makefile | 2 ++
2 files changed, 4 insertions(+)
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index 3b2c8b4..8adffa8 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -132,6 +132,7 @@ core
On Mon, Jun 27, 2016 at 11:21:01AM +0530, Anshuman Khandual wrote:
> On 06/16/2016 11:07 AM, Minchan Kim wrote:
> > On Thu, Jun 16, 2016 at 09:12:07AM +0530, Anshuman Khandual wrote:
> >> On 06/16/2016 05:56 AM, Minchan Kim wrote:
> >>> On Wed, Jun 15, 2016 at 12:15:04PM +0530, Anshuman Khandual wr
Signed-off-by: Yoshinori Sato
---
.../interrupt-controller/renesas-r2dplus.txt | 41 ++
arch/sh/boot/dts/Makefile | 1 +
arch/sh/boot/dts/r2dplus.dts | 84 +
drivers/irqchip/Makefile | 2 +
Signed-off-by: Yoshinori Sato
---
drivers/pci/host/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig
index df60505..83184eb 100644
--- a/drivers/pci/host/Kconfig
+++ b/drivers/pci/host/Kconfig
@@ -83,7 +83,7 @@ config P
Convert SH specific clock framework to CCF.
Signed-off-by: Yoshinori Sato
---
.../bindings/clock/renesas,sh7750-cpg.txt | 25 ++
arch/sh/boards/Kconfig | 1 +
arch/sh/kernel/cpu/Makefile| 8 +-
arch/sh/kernel/cpu/clock.c
Signed-off-by: Yoshinori Sato
---
arch/sh/Makefile | 7 +++
arch/sh/boot/dts/Makefile | 2 ++
2 files changed, 9 insertions(+)
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index 8adffa8..a44e630 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -189,6 +189,13 @@ drivers-$(
Signed-off-by: Yoshinori Sato
---
arch/sh/boards/of-generic.c | 64 +
1 file changed, 64 insertions(+)
diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c
index 2d3cda3..709006a 100644
--- a/arch/sh/boards/of-generic.c
+++ b/arch/sh/
Signed-off-by: Yoshinori Sato
---
arch/sh/kernel/setup.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 8e3b099..bdf57e5 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -280,6 +280,7 @@ void __init setup_arch(cha
Signed-off-by: Yoshinori Sato
---
arch/sh/drivers/pci/Makefile | 2 -
arch/sh/drivers/pci/common.c | 162
arch/sh/drivers/pci/pci.c| 320
arch/sh/kernel/Makefile | 2 +
arch/sh/kernel/pci-common.c | 162 ++
unflatten required MMU disabled.
Signed-off-by: Yoshinori Sato
---
arch/sh/boards/of-generic.c | 6 --
arch/sh/kernel/setup.c | 7 +++
2 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c
index 8dbf978..3db4294 1006
701 - 800 of 813 matches
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