A couple more of d_walk()/d_subdirs reordering fixes (stable fodder; ought to
solve that crap for good) and a fix for a brown paperbag bug in
d_alloc_parallel() (this cycle).
The following changes since commit 1607f09c226d1378439c411b020042750338:
coredump: fix dumping through pipes (2016-0
Add an helper function to allocate the chip structure at the beginning
of the probe functions. It will be used to initialize the SMI access.
Signed-off-by: Vivien Didelot
Reviewed-by: Andrew Lunn
---
drivers/net/dsa/mv88e6xxx.c | 39 +++
1 file changed, 27 in
After allocating the chip structure, pass it a compatible info pointer.
The compatible info structure will be used later to describe how to
access the switch registers and where to read the switch ID.
For the standard MDIO probe, get it from the device node data. For the
legacy DSA driver probing
On 06/20, Andy Lutomirski wrote:
>
> On Mon, Jun 20, 2016 at 8:24 AM, Oleg Nesterov wrote:
> >
> > How about the simple change below for now? IIRC 32-bit task can't use
> > "syscall" so if syscall_get_nr() >= 0 then even the wrong TS_COMPAT is
> > not that bad, even if it "leaks" to user-mode.
>
>
The mixed assignments, allocations and registrations in the probe code
make it hard to follow the logic and figure out what is DSA or chip
specific.
Extract the struct dsa_switch related code in a simple
mv88e6xxx_register_switch helper function.
For symmetry in the code, add a mv88e6xxx_unregist
Extract the common detection code which assigns the info structure to
the chip given the read switch ID.
Signed-off-by: Vivien Didelot
Reviewed-by: Andrew Lunn
---
drivers/net/dsa/mv88e6xxx.c | 64 +
1 file changed, 30 insertions(+), 34 deletions(-)
On Sun, Jun 19, 2016 at 10:59 AM, Pavel Machek wrote:
> Hi!
>
>> >Add the Microsoft _DSM command set to the white list of NVDIMM command sets.
>> >
>> >This command set is documented at
>> >https://msdn.microsoft.com/library/windows/hardware/mt604741.
>> >
>> >Signed-off-by: Stuart Hayes
>> >---
On Friday, June 17, 2016 9:02 PM, Greg KH wrote:
>> The patch looks fine (although this odd-ball Comedi driver shouldn't really
>> be sending signals to a user-space task!).
>
> Yeah, that's really odd, fixing that would be nice...
This is the last addi-data driver that does this. It's on my list
This patch fixes 5 style problems reported by checkpatch:
WARNING: suspect code indent for conditional statements (8, 24)
#492: FILE: drivers/net/dsa/mv88e6xxx.c:492:
+ if (phydev->link)
+ reg |= PORT_PCS_CTRL_LINK_UP;
CHECK: Logical continuations should be
t; on error in gen_pci_init().
> >
> > Reorder gen_pci_init() so we can take care of error path cleanup in
> > gen_pci_parse_request_of_pci_ranges() instead.
> >
> > Signed-off-by: Bjorn Helgaas
>
> The kernelci.org bot has reported[0] new qemu-aarch64
> (arm64-defcon
The current tpa6130a2 driver supports only a single instance.
This patch series add support for multiple instances by removing the global
variable that holds the instance.
This is performed by using the component API, regmap, the
snd_soc_{info,put,get}_volsw API and DAPM.
This patch series also to
Use snd_soc_{info,get,put}_volsw instead of custom volume functions
Signed-off-by: Lars-Peter Clausen
[koike: port for upstream]
Signed-off-by: Helen Koike
[On N900]
Tested-By: Sebastian Reichel
---
Changes since v1:
- Add tested-by from Sebastian
sound/soc/codecs/tpa6130a2.c | 64 ++---
On 6/17/2016 11:23 AM, Thierry Reding wrote:
> * PGP Signed by an unknown key
>
> On Fri, Jun 17, 2016 at 02:49:41PM +0100, Jon Hunter wrote:
>> Hi Thierry,
>>
>> On 26/05/16 17:41, Rhyland Klein wrote:
>>> From: Andrew Bresticker
>>>
>>> Move the UTMIPLL initialization code form clk-tegra.c file
[+ Ard, Arnd]
On Wed, Jun 15, 2016 at 11:34:10AM -0400, Christopher Covington wrote:
> From: Tomasz Nowicki
>
> Some platforms may not be fully compliant with the generic PCI config
> operations. For these cases we implement a way to use custom map and
> accessor functions. The algorithm travers
This patchset factorizes the legacy and new SMI probing and abstracts
the switch register accesses. This simplifies adding support for new
chips or alternative register accesses.
This will allow us to use a compatible chip info to describe how to
access the SMI device and its switch ID register at
Add DAPM support and updated rx51 accordingly.
As a consequence:
- the exported function tpa6130a2_stereo_enable is not needed anymore
- the mutex is dealt in the DAPM
- the power state is tracked by the DAPM
Signed-off-by: Lars-Peter Clausen
[koike: port for upstream]
Signed-off-by: Helen Koike
Add tpa6130a2 controls by the component API and update rx51 accordingly
Signed-off-by: Lars-Peter Clausen
[koike: port for upstream]
Signed-off-by: Helen Koike
Tested-By: Sebastian Reichel
Reviewed-By: Sebastian Reichel
---
Changes since v1:
- Remove prefix from snd_kcontrol_new in tpa6130a2
Use regmap instead of open-coding IO access and caching
Signed-off-by: Lars-Peter Clausen
[koike: port for upstream]
Signed-off-by: Helen Koike
[On N900]
Tested-By: Sebastian Reichel
---
Changes since v1:
- Add tested-by from Sebastian
sound/soc/codecs/tpa6130a2.c | 166
Hi Daniel,
On 6/16/2016 2:26 PM, Daniel Lezcano wrote:
The init functions do not return any error. They behave as the following:
- panic, thus leading to a kernel crash while another timer may work and
make the system boot up correctly
or
- print an error and let the caller unawa
The MDIO device probe and remove functions are respectively incrementing
and decrementing the bus refcount themselves. Since these bus level
actions are out of the device scope, remove them.
Signed-off-by: Vivien Didelot
Acked-by: Andrew Lunn
---
drivers/net/dsa/mv88e6xxx.c | 3 ---
1 file chan
On Mon, Jun 20, 2016 at 11:38:18AM -0300, Arnaldo Carvalho de Melo wrote:
> Em Mon, Jun 20, 2016 at 11:29:13AM +0800, Wangnan (F) escreveu:
> > On 2016/6/17 0:48, Arnaldo Carvalho de Melo wrote:
> > >Em Thu, Jun 16, 2016 at 08:02:41AM +, Wang Nan escreveu:
> > >>With '--dry-run', 'perf record'
Hi Duc,
On 06/20/2016 05:42 AM, Lorenzo Pieralisi wrote:
> On Fri, Jun 17, 2016 at 02:37:02PM -0700, Duc Dang wrote:
>> On Thu, Jun 16, 2016 at 10:48 AM, Lorenzo Pieralisi
>> wrote:
>>> On Wed, Jun 15, 2016 at 11:34:11AM -0400, Christopher Covington wrote:
From: Tomasz Nowicki
pci
On Mon, Jun 20, 2016 at 9:14 AM, Oleg Nesterov wrote:
> On 06/20, Andy Lutomirski wrote:
>>
>> On Mon, Jun 20, 2016 at 8:24 AM, Oleg Nesterov wrote:
>> >
>> > How about the simple change below for now? IIRC 32-bit task can't use
>> > "syscall" so if syscall_get_nr() >= 0 then even the wrong TS_CO
On 2016-06-18 12:31, Stephan Mueller wrote:
Am Samstag, 18. Juni 2016, 10:44:08 schrieb Theodore Ts'o:
Hi Theodore,
At the end of the day, with these devices you really badly need a
hardware RNG. We can't generate randomness out of thin air. The only
thing you really can do requires user sp
Hi Tomasz,
On 06/20/2016 06:02 AM, Tomasz Nowicki wrote:
The series builds the PCI/MSI domain stack based on initial IORT driver
which is added in first place. As a reference please see IORT spec:
http://infocenter.arm.com/help/topic/com.arm.doc.den0049b/DEN0049B_IO_Rema
pping_Table.pdf
Tested
On Tue, Jun 21, 2016 at 01:29:41AM +0800, Anthony Wong wrote:
> On 20 June 2016 at 18:20, Pali Rohár wrote:
> >
> > On Monday 20 June 2016 03:16:36 Christoph Hellwig wrote:
> > > On Sun, Jun 19, 2016 at 01:43:46AM +0200, Pali Roh??r wrote:
> > > > I do not understand it... Why Canonical is hidden
On Fri, Jun 17, 2016 at 09:12:20PM -0700, Guenter Roeck wrote:
> On 06/17/2016 06:08 PM, Brian Norris wrote:
> >On Fri, Jun 17, 2016 at 02:41:51PM -0700, Guenter Roeck wrote:
> >>On Fri, Jun 17, 2016 at 12:58:12PM -0700, Brian Norris wrote:
> >>>+int cros_ec_cmd_xfer_status(struct cros_ec_device *e
On Mon, Jun 20, 2016 at 12:52 AM, Hans-Christian Noren Egtvedt
wrote:
>
> please pull newly rebased to 4.7-rc4 tag
Yeah, I didn't pull the last time you send this, and it keeps getting
just worse, so I won't be pulling this time either.
I'm not taking 600+ lines of coding style changes during th
Hello,
On Mon, Jun 20, 2016 at 03:38:41PM +0200, Dmitry Vyukov wrote:
> > Sorry for the late reply but now when thinking about the patch I don't
> > think it is quite right. Writeback can happen from other contexts than just
> > the worker one (e.g. kswapd can do writeback, or in some out-of-memor
On 06/20/2016 07:22 PM, Ray Jui wrote:
[ ... ]
-static void __init kona_timer_init(struct device_node *node)
+static int __init kona_timer_init(struct device_node *node)
{
u32 freq;
struct clk *external_clk;
if (!of_device_is_available(node)) {
pr_info("Kona Timer v1 m
Hello.
On 06/20/2016 06:43 PM, Arnd Bergmann wrote:
The newly added support for R8A7792 causes build failures
because we try to call rcar_gen2_clocks_init but that is not
built into the kernel:
arch/arm/mach-shmobile/built-in.o: In function `rcar_gen2_timer_init':
:(.init.text+0x3b0): undefine
On Mon 20 Jun 07:48 PDT 2016, Srinivas Kandagatla wrote:
> Thanks Bjorn for this patch,
>
> I will start playing with patch soon, but here are few comments.
>
> On 17/06/16 18:17, Bjorn Andersson wrote:
> >From: Bjorn Andersson
> >
> >This initial hack powers the q6v5, boots and authenticate th
Eduardo, Rui,
On Fri, Jun 03, 2016 at 10:25:31AM +0100, Javi Merino wrote:
> When the devfreq cooling device was designed, it was an oversight not to
> pass a pointer to the struct devfreq as the first parameters of the
> callbacks. The design patterns of the kernel suggest it for a good
> reason
On Tue, Jun 07, 2016 at 09:34:09PM +0800, Chris Chiu wrote:
> When performing a warm reboot from a system which does not correctly
> support ELAN I2C touchpads, the touchpad will sometimes enter standard
> mouse mode, cursor then never respond to touchpad event, and making the
> driver discard the
On 2016-06-18 10:45, Konstantin Khlebnikov wrote:
On Wed, Jun 15, 2016 at 5:47 PM, Austin S. Hemmelgarn
wrote:
On 2016-06-14 15:03, Konstantin Khlebnikov wrote:
I don't like the idea of this patchset.
All limitations are context dependent and that context changes rapidly.
You'll never dump e
Hi,
On Mon, Jun 20, 2016 at 09:46:57AM -0400, Javier Martinez Canillas wrote:
> On 06/18/2016 01:09 PM, Guenter Roeck wrote:
> > On 06/17/2016 06:08 PM, Brian Norris wrote:
> >> On Fri, Jun 17, 2016 at 02:41:51PM -0700, Guenter Roeck wrote:
> >>> On Fri, Jun 17, 2016 at 12:58:12PM -0700, Brian Nor
Am Montag, 20 Juni 2016, 10:26:05 schrieb Dave Young:
> kexec_buf should go within #ifdef for kexec file like struct
> purgatory_info
>
> Other than that it looks good.
Great! Here it is.
--
[]'s
Thiago Jung Bauermann
IBM Linux Technology Center
kexec_file: Generalize kexec_add_buffer.
Peter Zijlstra writes:
> Could either of you comment on the below patch?
>
> All atomic functions that return a value should imply full memory
> barrier semantics -- this very much includes a compiler barrier / memory
> clobber.
I wonder if it is possible to find a case where this makes a real
d
On Monday 20 June 2016 19:37:57 Dmitry Torokhov wrote:
> On Tue, Jun 21, 2016 at 01:29:41AM +0800, Anthony Wong wrote:
> > On 20 June 2016 at 18:20, Pali Rohár wrote:
> > > On Monday 20 June 2016 03:16:36 Christoph Hellwig wrote:
> > > > On Sun, Jun 19, 2016 at 01:43:46AM +0200, Pali Roh??r wrote:
On 20 June 2016 at 18:20, Pali Rohár wrote:
>
> On Monday 20 June 2016 03:16:36 Christoph Hellwig wrote:
> > On Sun, Jun 19, 2016 at 01:43:46AM +0200, Pali Roh??r wrote:
> > > I do not understand it... Why Canonical is hidden and don't communicate
> > > with rest of world? Otherwise touchpads coul
Sudeep Holla writes:
> This series add support for SCPI based device device power state
> management using genpd.
>
> Regards,
> Sudeep
>
> v1[1]->v2:
> - Fixed the endianness handling in scpi_device_get_power_state
> as spotted by Tixy
> - Renamed scpi_pd.c to scpi_pm_domain.
Hi Lee,
On Mon, Jun 20, 2016 at 09:00:51AM +0100, Lee Jones wrote:
> On Fri, 17 Jun 2016, Doug Anderson wrote:
> > On Fri, Jun 17, 2016 at 1:06 AM, Lee Jones wrote:
> > >> Probably the reason for all of these non-kernel-isms is that this
> > >> isn't a kernel file. From the top of the file:
> >
The init functions do not return any error. They behave as the following:
- panic, thus leading to a kernel crash while another timer may work and
make the system boot up correctly
or
- print an error and let the caller unaware if the state of the system
Change that by converting t
In the MDIO probing function, dev is already assigned to &mdiodev->dev
and np is already assigned to mdiodev->dev.of_node, so use them.
Signed-off-by: Vivien Didelot
Reviewed-by: Andrew Lunn
---
drivers/net/dsa/mv88e6xxx.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git
Hi Andrew, David,
Andrew Lunn writes:
> On Mon, Jun 20, 2016 at 12:03:37PM -0400, Vivien Didelot wrote:
>> When the SMI address of the switch chip is zero, the chip assumes to be
>> the only one on the SMI master bus and thus responds to all its known
>> SMI devices addresses (port registers, Gl
The mv88e6xxx_table array and the mv88e6xxx_lookup_info function are
static, so remove the table and size arguments from the lookup function.
Signed-off-by: Vivien Didelot
Reviewed-by: Andrew Lunn
---
drivers/net/dsa/mv88e6xxx.c | 16 ++--
1 file changed, 6 insertions(+), 10 deletio
On 20/06/16 18:50, Kevin Hilman wrote:
"Jon Medhurst (Tixy)" writes:
On Thu, 2016-06-16 at 18:59 +0100, Sudeep Holla wrote:
On 16/06/16 18:47, Jon Medhurst (Tixy) wrote:
On Thu, 2016-06-16 at 11:38 +0100, Sudeep Holla wrote:
[...]
+enum scpi_power_domain_state {
+ SCPI_PD_STATE_ON
This patch fixes 5 style problems reported by checkpatch:
WARNING: suspect code indent for conditional statements (8, 24)
#492: FILE: drivers/net/dsa/mv88e6xxx.c:492:
+ if (phydev->link)
+ reg |= PORT_PCS_CTRL_LINK_UP;
CHECK: Logical continuations should be
"Jon Medhurst (Tixy)" writes:
> On Thu, 2016-06-16 at 18:59 +0100, Sudeep Holla wrote:
>>
>> On 16/06/16 18:47, Jon Medhurst (Tixy) wrote:
>> > On Thu, 2016-06-16 at 11:38 +0100, Sudeep Holla wrote:
>> > [...]
>> >> +enum scpi_power_domain_state {
>> >> + SCPI_PD_STATE_ON = 0,
>> >> + SCPI_PD_ST
The mixed assignments, allocations and registrations in the probe code
make it hard to follow the logic and figure out what is DSA or chip
specific.
Extract the struct dsa_switch related code in a simple
mv88e6xxx_register_switch helper function.
For symmetry in the code, add a mv88e6xxx_unregist
On 06/20/16 08:43, Greg KH wrote:
> On Sun, Jun 19, 2016 at 09:12:29AM +0200, Hans de Bruin wrote:
>> On 06/08/2016 03:43 AM, Greg KH wrote:
>>> I'm announcing the release of the 4.4.13 kernel.
>>>
>>
>> Hi,
>>
>> I tried to compile 4.4.13 using my 4.4.7 config file and ran in to this:
>>
>> LD
The MDIO device probe and remove functions are respectively incrementing
and decrementing the bus refcount themselves. Since these bus level
actions are out of the device scope, remove them.
Signed-off-by: Vivien Didelot
Acked-by: Andrew Lunn
---
drivers/net/dsa/mv88e6xxx.c | 3 ---
1 file chan
Hi Daniel,
On 6/20/2016 10:48 AM, Daniel Lezcano wrote:
The init functions do not return any error. They behave as the following:
- panic, thus leading to a kernel crash while another timer may work and
make the system boot up correctly
or
- print an error and let the caller unaw
This patch introduces a separate GPIO driver for Intel WhiskeyCove PMIC.
This driver is based on gpio-crystalcove.c.
Signed-off-by: Ajay Thomas
Signed-off-by: Bin Gao
---
Changes in v3:
- Fixed the year in copyright line(2015-->2016).
- Removed DRV_NAME macro.
- Added kernel-doc for regmap_ir
On Wed, Feb 03, 2016 at 11:22:47AM +0100, Ingo Molnar wrote:
>
> * Andy Lutomirski wrote:
>
> > On Jan 31, 2016 11:42 PM, "Ingo Molnar" wrote:
> > >
> > >
> > > * r...@redhat.com wrote:
> > >
> > > > (v3: address comments raised by Frederic)
> > > >
> > > > Running with nohz_full introduces a
On 06/19, Andy Lutomirski wrote:
>
> Something's clearly buggy there,
The usage of __X32_SYSCALL_BIT doesn't look right too. Nothing serious
but still.
Damn, initially I thought I have found the serious bug in entry_64.S
and it took me some time to understand why my exploit doesn't work ;)
So I l
On Sun, Jun 19, 2016 at 5:26 PM, Deepa Dinamani wrote:
> The series is aimed at getting rid of CURRENT_TIME and CURRENT_TIME_SEC
> macros.
This version now looks ok to me.
I do have a comment (or maybe just a RFD) for future work.
It does strike me that once we actually change over the inode t
On 20/06/16 18:56, Kevin Hilman wrote:
Sudeep Holla writes:
This series add support for SCPI based device device power state
management using genpd.
Regards,
Sudeep
v1[1]->v2:
- Fixed the endianness handling in scpi_device_get_power_state
as spotted by Tixy
- Rena
From: Brian Norris
The output tap delay controls helps maintain the hold requirements for
eMMC. The exact value is dependent on the SoC and other factors, though
it isn't really an exact science. But the default of 0 is not very good,
as it doesn't give the eMMC much hold time, so let's bump up t
On Mon, Jun 20, 2016 at 09:52:00AM +0100, Lee Jones wrote:
> > > > > +static struct trip_config_map str3_trip_config[] = {
> > > > > + {
> > > > > + .irq_reg = BXTWC_THRM2IRQ,
> > > > > + .irq_mask = 0x10,
> > > > > + .irq_en = BXTWC_MTHRM2IRQ,
> > > > > +
In commit 802ac39a5566 ("mmc: sdhci-of-arasan: fix set_clock when a phy
is supported") we added code to power the PHY off and on whenever the
clock was changed but we avoided doing the power cycle code when the
clock was low speed. Let's now do it always.
Although there may be other reasons for p
Previous PHY code waited a fixed amount of time for the DLL to lock at
power on time. Unfortunately, the time for the DLL to lock is actually
a bit more dynamic and can be longer if the card clock is slower.
Instead of waiting a fixed 30 us, let's now dynamically wait until the
lock bit gets set.
The theme of this series of patches is to try to allow running the eMMC
at 150 MHz on the rk3399 SoC, though the changes should still be correct
and have merit on their own. The motivation for running at 150 MHz is
that doing so improves signal integrity and (with some eMMC devices)
doesn't affect
Some SD/eMMC PHYs (like the PHY from Arasan that is designed to work
with arasan,sdhci-5.1) need to know the card clock in order to function
properly. Let's add the ability to expose this clock. Any PHY that
needs to know the clock rate can add a reference and query the clock
rate.
At the moment
As of an earlier change in this series ("Documentation: mmc:
sdhci-of-arasan: Add ability to export card clock") the SDHCI driver
used on Rockchip SoCs can now expose its clock. Let's now specify that
the PHY can use it.
Letting the PHY get access to this clock means it can adjust
phyctrl_frqsel
Previous changes in this series allowed exposing the card clock from the
rk3399 SDHCI device and allowed consuming the card clock in the rk3399
eMMC PHY. Hook things up in the main rk3399 dtsi file.
Signed-off-by: Douglas Anderson
Tested-by: Heiko Stuebner
---
Changes in v3:
- Add collected tag
In the the earlier change in this series ("Documentation: mmc:
sdhci-of-arasan: Add soc-ctl-syscon for corecfg regs") we can see the
mechansim for specifying a syscon to properly set corecfg registers in
sdhci-of-arasan. Now let's use this mechanism to properly set
corecfg_baseclkfreq on rk3399.
The "phyctrl_frqsel" is described in the Arasan datasheet [1] as "the
frequency range of DLL operation". Although the Rockchip variant of
this PHY has different ranges than the reference Arasan PHY it appears
as if the functionality is similar. We should set this phyctrl field
properly.
Note: as
Greg KH writes:
> Hi,
>
> I've finally gotten off my butt and made my quilt trees of patches into
> a "semi-proper" git tree to make it easier for people to test them.
>
> I'm now pushing the patches I accept into the stable queues into the git
> tree here:
> git://git.kernel.org/pub/scm/li
On Sun, Jun 19, 2016 at 03:36:28PM +0530, Raveendra Padasalagi wrote:
> The patch adds devicetree binding document for broadcom's
> iproc-static-adc controller driver.
>
> Signed-off-by: Raveendra Padasalagi
> Reviewed-by: Ray Jui
> Reviewed-by: Scott Branden
> ---
> .../bindings/iio/adc/brcm,
Em Mon, Jun 20, 2016 at 09:22:11AM -0700, Alexei Starovoitov escreveu:
> On Mon, Jun 20, 2016 at 11:38:18AM -0300, Arnaldo Carvalho de Melo wrote:
> > Doing:
> > perf bcc -c foo.c
> > Looks so much simpler and similar to an existing compile source code
> > into object file workflow (gcc's, an
Am Montag, 20. Juni 2016, 10:56:53 schrieb Douglas Anderson:
> The "phyctrl_frqsel" is described in the Arasan datasheet [1] as "the
> frequency range of DLL operation". Although the Rockchip variant of
> this PHY has different ranges than the reference Arasan PHY it appears
> as if the functional
On 6/20/16 12:13 PM, Arnaldo Carvalho de Melo wrote:
'perf cc' seems sensible, and has the added bonus of being one letter
shorter :-)
perf is now a general front-end to a compiler?
Am Montag, 20. Juni 2016, 10:56:39 schrieb Douglas Anderson:
> The theme of this series of patches is to try to allow running the eMMC
> at 150 MHz on the rk3399 SoC, though the changes should still be correct
> and have merit on their own. The motivation for running at 150 MHz is
> that doing so
On Mon, Jun 13 2016 at 6:57pm -0400,
Mike Snitzer wrote:
> On Mon, Jun 13 2016 at 6:21pm -0400,
> Toshi Kani wrote:
>
> > This patch-set adds DAX support to device-mapper dm-linear devices
> > used by LVM. It works with LVM commands as follows:
> > - Creation of a logical volume with all DA
On Mon, Jun 20, 2016 at 05:56:40PM +0200, Arnd Bergmann wrote:
> A recent change accidentally introduced a 64-bit division in torture_shutdown,
> which fails to build on 32-bit architectures:
>
> kernel/built-in.o: In function `torture_shutdown':
> :(.text+0x4b29a): undefined reference to `__aeabi
On Monday 06 June 2016 13:32:31 Hans de Goede wrote:
> Hi,
>
> On 06-06-16 13:23, Pali Rohár wrote:
> > This patch series cleanup usage of alps_model_data table.
> >
> > Pali Rohár (5):
> > Input: alps - move ALPS_PROTO_V6 out of alps_model_data table
> > Input: alps - move ALPS_PROTO_V4 out
Hello Brian,
On 06/20/2016 02:10 PM, Brian Norris wrote:
> Hi,
>
> On Mon, Jun 20, 2016 at 10:44:55AM -0700, Brian Norris wrote:
>> On Mon, Jun 20, 2016 at 09:46:57AM -0400, Javier Martinez Canillas wrote:
>>> On 06/18/2016 01:09 PM, Guenter Roeck wrote:
On 06/17/2016 06:08 PM, Brian Norris
On rk3399 we'd like to be able to properly set corecfg registers in the
Arasan SDHCI component. Specify the syscon to enable that.
Signed-off-by: Douglas Anderson
Tested-by: Heiko Stuebner
---
Changes in v3:
- Add collected tags
Changes in v2: None
arch/arm64/boot/dts/rockchip/rk3399.dtsi |
Port I/O space does not exist in ARM64 and is not mapped. Attempts to
access it on ARM systems cause stack traces and worse.
Signed-off-by: Tony Camuso
---
drivers/char/ipmi/ipmi_si_intf.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/char/ipmi/ipmi_si_intf.c b/drivers/char/ip
Hi,
[auto build test WARNING on net-next/master]
url:
https://github.com/0day-ci/linux/commits/Vivien-Didelot/net-dsa-mv88e6xxx-probe-compatible/20160621-020115
config: tile-allyesconfig (attached as .config)
compiler: tilegx-linux-gcc (GCC) 4.6.2
reproduce:
wget
https://git.kernel.o
There's no reason to store the return value of rockchip_emmc_phy_power()
in a variable nor to check it. Just return it.
Signed-off-by: Douglas Anderson
Acked-by: Kishon Vijay Abraham I
Reviewed-by: Shawn Lin
Tested-by: Heiko Stuebner
---
Changes in v3:
- Add collected tags
Changes in v2:
- M
From: Shawn Lin
Signal integrity analysis has suggested we set these values. Do this in
power_on(), so that they get reconfigured after suspend/resume.
Signed-off-by: Shawn Lin
Signed-off-by: Brian Norris
Signed-off-by: Douglas Anderson
Acked-by: Kishon Vijay Abraham I
Tested-by: Heiko Stueb
From: Shawn Lin
According to the databook, 10.2us is the max time for dll to be ready to
work. However in testing, some chips need 20us for dll to be ready. This
patch adds some extra margin for dllrdy to be ready, fixing our
-ETIMEDOUT issues.
Signed-off-by: Shawn Lin
Signed-off-by: Brian Norr
Some SD/eMMC PHYs (like the PHY from Arasan that is designed to work
with arasan,sdhci-5.1) need to know the card clock frequency in order to
function properly. Physically in a SoC this clock is exported from the
SDHCI IP block to the PHY IP block and the PHY needs to know the speed.
Let's export
I would like to introduce the latent_entropy gcc plugin. This plugin
mitigates the problem of the kernel having too little entropy during and
after boot for generating crypto keys.
This plugin mixes random values into the latent_entropy global variable
in functions marked by the __latent_entropy a
Am Montag, 20. Juni 2016, 13:07:32 schrieb Austin S. Hemmelgarn:
Hi Austin,
> On 2016-06-18 12:31, Stephan Mueller wrote:
> > Am Samstag, 18. Juni 2016, 10:44:08 schrieb Theodore Ts'o:
> >
> > Hi Theodore,
> >
> >> At the end of the day, with these devices you really badly need a
> >> hardware
From: Brian Norris
Some of the spacing was wrong (spaces instead of tabs), and due to
longer entries added later, the columns weren't aligned. Let's get
everything consistent.
Signed-off-by: Brian Norris
Signed-off-by: Douglas Anderson
Acked-by: Kishon Vijay Abraham I
Reviewed-by: Heiko Stueb
Signed-off-by: Emese Revfy
---
scripts/Makefile.gcc-plugins | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/scripts/Makefile.gcc-plugins b/scripts/Makefile.gcc-plugins
index 5e22b60..da7f86c 100644
--- a/scripts/Makefile.gcc-plugins
+++ b/scripts/Makefile.gcc-plugins
@@ -19,7
Hi,
[auto build test WARNING on net-next/master]
url:
https://github.com/0day-ci/linux/commits/Vivien-Didelot/net-dsa-mv88e6xxx-probe-compatible/20160621-020115
config: sparc64-allyesconfig (attached as .config)
compiler: sparc64-linux-gnu-gcc (Debian 5.3.1-8) 5.3.1 20160205
reproduce:
On Monday, June 20, 2016 11:21:05 AM CEST Paul E. McKenney wrote:
> On Mon, Jun 20, 2016 at 05:56:40PM +0200, Arnd Bergmann wrote:
>
> @@ -446,9 +447,9 @@ EXPORT_SYMBOL_GPL(torture_shuffle_cleanup);
> * Variables for auto-shutdown. This allows "lights out" torture runs
> * to be fully script
This plugin mitigates the problem of the kernel having too little entropy
during and after boot for generating crypto keys.
It creates a local variable in every marked function. The value of
this variable is modified by randomly chosen operations (add, xor and rol)
and random values (gcc generates
The latent_entropy gcc attribute can be only on functions and variables.
If it is on a function then the plugin will instrument it. If the attribute
is on a variable then the plugin will initialize it with a random value.
The variable must be an integer, an integer array type or a structure
with in
When extra_latent_entropy is passed on the kernel command line,
entropy will be extracted from up to the first 4GB of RAM while the
runtime memory allocator is being initialized.
Based on work created by the PaX Team.
Signed-off-by: Emese Revfy
---
Documentation/kernel-parameters.txt | 5 +
On Tue, Jun 21, 2016 at 12:30:25AM +0800, Chen-Yu Tsai wrote:
> >> >>> +®_aldo1 {
> >> >>> + regulator-always-on;
> >> >>> + regulator-min-microvolt = <300>;
> >> >>> + regulator-max-microvolt = <300>;
> >> >>> + regulator-name = "aldo1";
> >> >>
> >> >> What is this
Hi,
[auto build test WARNING on net-next/master]
url:
https://github.com/0day-ci/linux/commits/Vivien-Didelot/net-dsa-mv88e6xxx-probe-compatible/20160621-020115
config: m68k-allyesconfig (attached as .config)
compiler: m68k-linux-gcc (GCC) 4.9.0
reproduce:
wget
https://git.kernel.org
On Mon, Jun 20, 2016 at 08:29:48PM +0200, Arnd Bergmann wrote:
> On Monday, June 20, 2016 11:21:05 AM CEST Paul E. McKenney wrote:
> > On Mon, Jun 20, 2016 at 05:56:40PM +0200, Arnd Bergmann wrote:
> >
> > @@ -446,9 +447,9 @@ EXPORT_SYMBOL_GPL(torture_shuffle_cleanup);
> > * Variables for auto-
On Mon, Jun 20, 2016 at 02:15:12PM +0200, Jiri Olsa wrote:
> Introducing idle enter/exit balance callbacks to keep
> balance.idle_cpus_mask cpumask of current idle cpus
> in system.
>
> It's used only when REBALANCE_AFFINITY feature is
> switched on. The code functionality of this feature
> is int
Add TI syscon reset controller binding. This will hook to the reset
framework and use syscon/regmap to set reset bits. This allows reset
control of individual SoC subsytems and devices with memory-mapped
reset registers in a common register memory space.
Signed-off-by: Andrew F. Davis
[s-a...@ti.
Add a reset-controller driver for performing reset management of
various devices present on the SoC, with the reset registers shared
between devices in a common register memory space. This driver uses
the syscon/regmap frameworks to actually implement the various reset
functionalities needed by the
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