Hi,
This series adds support for the Intel SPI serial flash controller found on
many recent Intel CPUs including Baytrail and Braswell. This driver makes
it possible to access the BIOS and other platform data which is stored on
the SPI serial flash. It is also possible to upgrade the BIOS using th
Many Intel CPUs including Haswell, Broadwell and Baytrail have SPI serial
flash host controller as part of the LPC device. This will populate an MFD
cell suitable for the SPI host controller driver if we know that the LPC
device has one.
Signed-off-by: Mika Westerberg
---
drivers/mfd/lpc_ich.c
Intel Apollo Lake SoC exposes serial SPI flash through the LPC device. The
SPI flash host controller is not discoverable through PCI config cycles
because P2SB (function 0 of the device 13) is hidden by the BIOS. We unhide
the device briefly in order to read BAR 0 of the SPI host controller.
Signe
Add support for the SPI serial flash host controller found on many Intel
CPUs including Baytrail and Braswell. The SPI serial flash controller is
used to access BIOS and other platform specific information. By default the
driver exposes a single read-only MTD device but with a module parameter
'int
When enabled, 'perf stat' will print count deltas, similar to what
'--interval-print' does. However, instead of printing every N
milliseconds, the delta will be output when perf receives a SIGUSR2
signal.
The perf inferior can, e.g. use a function like
void tell_perf(void)
{
kill(ge
Use the newly added linux/bitfield.h.
Signed-off-by: Jakub Kicinski
---
drivers/net/wireless/mediatek/mt7601u/dma.h | 2 -
drivers/net/wireless/mediatek/mt7601u/mt7601u.h | 5 +-
drivers/net/wireless/mediatek/mt7601u/util.h| 77 -
3 files changed, 4 insertions(+
Hi!
This set moves to a global header file macros which I find
very useful and worth popularising. The basic problem is
that since C bitfields are not very dependable accessing
subfields of registers becomes slightly inconvenient.
It is nice to have the necessary mask and shift operations
wrapped
Hi Miklos,
Did you get any time to look into the patch?
Its been more than two months.
On Thu, Apr 14, 2016 at 6:02 PM, Ashish Sangwan
wrote:
> *ping*
>
> Last time it bounced off the fuse mailing list.
>
> On Thu, Apr 7, 2016 at 5:18 PM, Ashish Sangwan
> wrote:
>> While sending the blocking d
RK3399 and RK3288 shared the same eDP IP controller, only some light
difference with VOP configure and GRF configure.
Also same misc fix to analogix_dp driver:
- Hotplug invalid which report by Dan Carpenter
- Make panel detect to an optional action
- correct the register bit define error in ANALO
There's a pair of "nub" devices on Pyra handheld PC
(https://pyra-handheld.com/), and there's driver for nub, which is going
to be reworked for upstreaming. While the device itself fits most to
"joystick" category, the computer itself lacks touchpad and mouse
buttons, and the existing driver is cap
The enum value of DP_IRQ_TYPE_HP_CABLE_IN is zero, but driver only
send drm hp event when the irq_type and the enum value is true.
if (irq_type & DP_IRQ_TYPE_HP_CABLE_IN || ...)
drm_helper_hpd_irq_event(dp->drm_dev);
So there would no drm hpd event when cable plug in, to fix that
just nee
There're an register define error in ANALOGIX_DP_PLL_REG_1 which introduced
by commit bcec20fd5ad6 ("drm: bridge: analogix/dp: add some rk3288 special
registers setting").
The PHY PLL input clock source is selected by ANALOGIX_DP_PLL_REG_1
BIT 0, not BIT 1.
Signed-off-by: Yakir Yang
Reviewed-by:
RK3399 and RK3288 shared the same eDP IP controller, only some light
difference with VOP configure and GRF configure.
Signed-off-by: Yakir Yang
Acked-by: Mark Yao
---
Changes in v3:
- Give the "rk3399-edp" a separate line for clarity in document (Tomasz,
reviewed at Google Gerrit)
[https:/
Some boards don't need to declare a panel device node, like the
display interface is DP monitors, so it's necessary to make the
panel detect to an optional action.
Signed-off-by: Yakir Yang
Acked-by: Mark Yao
---
Changes in v3:
- Add the acked flag from Mark.
Changes in v2: None
drivers/gpu/d
Rockchip VOP couldn't output YUV video format for eDP controller, so
when driver detect connector support YUV video format, we need to hack
it down to RGB888.
Signed-off-by: Yakir Yang
Acked-by: Mark Yao
---
Changes in v3:
- Hook the connector's color_formats in .get_modes directly. (Tomasz, rev
It's better to pass the connector to platform driver in .get_modes()
callback, just like what the .get_modes() helper function designed.
Signed-off-by: Yakir Yang
---
Changes in v3:
- Avoid to change any internal driver state in .mode_valid interface. (Tomasz,
reviewed at Google Gerrit)
[ht
The hardware IC designed that VOP must output the RGB10 video format to
eDP contoller, and if eDP panel only support RGB8, then eDP contoller
should cut down the video data, not via VOP contoller, that's why we need
to hardcode the VOP output mode to RGA10 here.
Signed-off-by: Yakir Yang
Acked-by
As vendor document indicate, when REF_CLK bit set 0, then DP
phy's REF_CLK should switch to 24M source clock.
But due to IC PHY layout mistaken, some chips need to flip this
bit(like RK3288), and unfortunately they didn't indicate in the
DP version register. That's why we have to make this little
C bitfields are problematic and best avoided. Developers
interacting with hardware registers find themselves searching
for easy-to-use alternatives. Common approach is to define
structures or sets of macros containing mask and shift pair.
Operations on the register are then performed as follows:
Rename RK3288_DP macros to ROCKCHIP_DP, prepare to add eDP
support for more Rockchip chips.
Signed-off-by: Yakir Yang
Reviewed-by: Stéphane Marchesin
Tested-by: Javier Martinez Canillas
---
Changes in v3:
- Correct the misspell of "marcos" in commit message (Dominik, reviewed at
Google Gerrit
eDP controller need to declare which vop provide the video source,
and it's defined in GRF registers.
But different chips have different GRF register address, so we need to
create a device data to declare the GRF messages for each chips.
Signed-off-by: Yakir Yang
Acked-by: Mark Yao
---
Changes
On 06/14/2016 11:52 AM, Neil Armstrong wrote:
Hi Daniel,
Hi Neil,
[ ... ]
+config OXNAS_RPS_TIMER
config OXNAS_RPS_TIMER "bla bla" if COMPILE_TEST
OK
Shoud I also add CLKSRC_OF ?
Yes, right.
+ bool
+ select CLKSRC_MMIO
+ help
+ This enables support for
On 14.06.2016 11:45, Dongdong Liu wrote:
Hi Duc
在 2016/6/14 17:00, Duc Dang 写道:
On Mon, Jun 13, 2016 at 10:51 PM, Dongdong Liu
wrote:
Hi Duc
在 2016/6/14 4:57, Duc Dang 写道:
On Mon, Jun 13, 2016 at 8:47 AM, Christopher Covington
wrote:
Hi Dongdong,
On 06/13/2016 09:02 AM, Dongdong Liu wr
On Mon, 13 Jun 2016 23:54:26 +0300 "Michael S. Tsirkin" wrote:
>
> Jesper, Jason, I know that both of you tested this,
> please post Tested-by tags for whatever was tested.
Yes, I tested this via "external" kernel modules, not your framework.
I have verified that this V8 patchset is equivalent,
On Mon, Jun 13, 2016 at 12:37:32PM -0400, Steven Rostedt wrote:
> The solution was to simply release the current (this_rq) lock and then
> take both locks.
>
> spin_unlock(&this_rq->lock);
> double_rq_lock(this_rq, busiest);
> What I could not understand about Gregory's patch is that
On Mon, 13 Jun 2016 23:54:31 +0300
"Michael S. Tsirkin" wrote:
> A simple array based FIFO of pointers. Intended for net stack which
> commonly has a single consumer/producer.
>
> Signed-off-by: Michael S. Tsirkin
Acked-by: Jesper Dangaard Brouer
--
Best regards,
Jesper Dangaard Brouer
On Mon, 13 Jun 2016 23:54:41 +0300
"Michael S. Tsirkin" wrote:
> A simple array based FIFO of pointers. Intended for net stack so uses
> skbs for type safety. Implemented as a set of wrappers around ptr_ring.
>
> Signed-off-by: Michael S. Tsirkin
Acked-by: Jesper Dangaard Brouer
Tested-by: J
On Tue, Jun 14, 2016 at 01:52:53PM +0800, Boqun Feng wrote:
> On Mon, Jun 13, 2016 at 12:45:23PM -0700, Davidlohr Bueso wrote:
> > On Fri, 03 Jun 2016, Pan Xinhui wrote:
> >
> > > The existing version uses a heavy barrier while only release semantics
> > > is required. So use atomic_sub_return_rel
On Mon, 13 Jun 2016 23:54:45 +0300
"Michael S. Tsirkin" wrote:
> This adds ring resize support. Seems to be necessary as
> users such as tun allow userspace control over queue size.
>
> If resize is used, this costs us ability to peek at queue without
> consumer lock - should not be a big deal a
On Mon, Jun 13, 2016 at 9:42 PM, Rafael J. Wysocki wrote:
> From: Rafael J. Wysocki
>
> Logan Gunthorpe reports that hibernation stopped working reliably for
> him after commit ab76f7b4ab23 (x86/mm: Set NX on gap between __ex_table
> and rodata). Most likely, what happens is that the page contai
Hi Matthias,
On Tue, 2016-06-14 at 12:17 +0200, Matthias Brugger wrote:
>
> On 14/06/16 09:44, Horng-Shyang Liao wrote:
> > Hi Matthias,
> >
> > On Wed, 2016-06-08 at 17:35 +0200, Matthias Brugger wrote:
> >>
> >> On 08/06/16 14:25, Horng-Shyang Liao wrote:
> >>> Hi Matthias,
> >>>
> >>> On Wed,
Hi,
On 07/06/16 21:56, Peter Zijlstra wrote:
> Previous patches changed the meaning of the return value of
> rt_mutex_slowunlock(); update comments and code to reflect this.
>
> Signed-off-by: Peter Zijlstra (Intel)
> ---
> kernel/futex.c | 12 ++--
> kernel/locking/r
On Tue, Jun 14, 2016 at 12:37:34PM +0100, Ben Hutchings wrote:
> On Tue, 2016-06-14 at 13:47 +0300, Ville Syrjälä wrote:
> > On Mon, Jun 13, 2016 at 07:36:37PM +0100, Ben Hutchings wrote:
> > > 3.16.36-rc1 review patch. If anyone has any objections, please let me
> > > know.
> >
> > Do not backp
On Tue, Jun 14, 2016 at 11:43:39AM +0100, Juri Lelli wrote:
> > [peterz: I should introduce more task state comparators like
> > rt_mutex_waiter_less, all PI prio comparisons already have this DL
> > exception, except this one]
> > +++ b/kernel/locking/rtmutex.c
> > @@ -488,7 +488,7 @@ static int
On Tue, Jun 14, 2016 at 12:11:52PM +0100, Matt Fleming wrote:
> On Thu, 09 Jun, at 07:15:50AM, Yuyang Du wrote:
> > attach_entity_load_avg() is called (indirectly) from:
> >
> > - switched_to_fair(): switch between classes to fair
> > - task_move_group_fair(): move between task groups
> > - enq
Signed-off-by: Octavian Purdila
---
Documentation/acpi/ssdt-overlays.txt | 91
1 file changed, 91 insertions(+)
create mode 100644 Documentation/acpi/ssdt-overlays.txt
diff --git a/Documentation/acpi/ssdt-overlays.txt
b/Documentation/acpi/ssdt-overlays.txt
Add support for ACPI reconfiguration notifiers to allow subsystems to
react to changes in the ACPI tables that happen after the initial
enumeration. This is similar with the way dynamic device tree
notifications work.
The reconfigure notifications supported for now are device add and
device remove
This patch adds supports for I2C device enumeration and removal via
ACPI reconfiguration notifications that are send as a result of an
ACPI table load or unload operation.
Signed-off-by: Octavian Purdila
---
drivers/i2c/i2c-core.c | 170 ++---
1 file c
Register the ACPI subsystem with configfs.
Signed-off-by: Octavian Purdila
---
Documentation/ABI/testing/configfs-acpi | 7 ++
MAINTAINERS | 1 +
drivers/acpi/Kconfig| 9
drivers/acpi/Makefile | 1 +
drivers/acpi/
New tables can be loaded by creating directories under /config/table/
and writing the AML code into the aml table attribute. Various table
attributes will be readable once the table is successfully loaded.
Unloading tables is not supported at the moment, but it can be easily
implemented once ACPI
This patch allows SSDTs to be loaded from EFI variables. It works by
specifying the EFI variable name containing the SSDT to be loaded. All
variables with the same name (regardless of the vendor GUID) will be
loaded.
Note that we can't use acpi_install_table and we must rely on the
dynamic ACPI ta
If the ACPI tables changes as a result of a dinamically loaded table and
a bus rescan is required the enumeration/visited flag are not
consistent.
I2C/SPI are not directly enumerated in acpi_bus_attach(), however the
visited flag is set. This makes it impossible to check if an ACPI device
has alre
This patch adds supports for SPI device enumeration and removal via
ACPI reconfiguration notifications that are send as a result of an
ACPI table load or unload operation.
Signed-off-by: Octavian Purdila
---
drivers/spi/spi.c | 94 ++-
1 file c
This patch set enables custom ACPI board configuration by adding
mechanisms in the Linux kernel for loading user defined SSDTs.
In order to support ACPI open-ended hardware configurations we need a
way to augment the ACPI configuration provided by the firmware
image. A common example is connecting
On Mon, 13 Jun 2016 23:54:50 +0300
"Michael S. Tsirkin" wrote:
> Update skb_array after ptr_ring API changes.
>
> Signed-off-by: Michael S. Tsirkin
Acked-by: Jesper Dangaard Brouer
Tested-by: Jesper Dangaard Brouer
Also did resize unit test:
https://github.com/netoptimizer/prototype-kernel
On 11.06.16 02:04, Schuyler Patton wrote:
On 06/08/2016 07:03 PM, Ivan Khoronzhuk wrote:
On 09.06.16 02:11, Schuyler Patton wrote:
On 06/08/2016 09:06 AM, Ivan Khoronzhuk wrote:
On 08.06.16 17:01, Ivan Khoronzhuk wrote:
Hi Schuyer,
On 07.06.16 18:26, Schuyler Patton wrote:
Hi,
On
On 13.06.16 11:22, Mugunthan V N wrote:
On Saturday 11 June 2016 04:34 AM, Schuyler Patton wrote:
On 06/08/2016 07:03 PM, Ivan Khoronzhuk wrote:
On 09.06.16 02:11, Schuyler Patton wrote:
On 06/08/2016 09:06 AM, Ivan Khoronzhuk wrote:
On 08.06.16 17:01, Ivan Khoronzhuk wrote:
Hi Sch
On Tue, Jun 14, 2016 at 11:21:09AM +0100, Juri Lelli wrote:
> > [XXX this next section is unparsable]
>
> Yes, a bit hard to understand. However, am I correct in assuming this
> patch and the previous one should fix this problem? Or are there still
> other races causing issues?
I think so; so the
On Tue, Jun 14, 2016 at 01:08:13PM +0100, Juri Lelli wrote:
> > + postunlock = rt_mutex_futex_unlock(&pi_state->pi_mutex, &wake_q);
> >
> > /*
> > * First unlock HB so the waiter does not spin on it once he got woken
> > +* up. Then wakeup the waiter by calling rt_mutex_postunlock(
On Tue, Jun 14, 2016 at 02:17:36PM +0300, Aleksei Mamlin wrote:
> From: Boris Brezillon
>
> Add NAND Flash controller node definition to the A10 SoC.
>
> Signed-off-by: Boris Brezillon
> Signed-off-by: Aleksei Mamlin
Applied, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, K
On Tue, Jun 14, 2016 at 02:17:38PM +0300, Aleksei Mamlin wrote:
> From: Boris Brezillon
>
> Add NAND Flash controller node definition to the A20 SoC.
>
> Signed-off-by: Boris Brezillon
> Signed-off-by: Aleksei Mamlin
Applied, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, K
On Tue, Jun 14, 2016 at 12:17:52PM +0200, Arnd Bergmann wrote:
> A recent commit made a few arrays 'const', but also added the
> same attribute to a function return type, where it makes no
> sense, and we get a warning when building with W=1:
>
> sound/soc/codecs/arizona.c:1725:27: error: type qua
Hi,
On Tue, Jun 14, 2016 at 02:17:35PM +0300, Aleksei Mamlin wrote:
> From: Boris Brezillon
>
> Define the NAND controller pin configs.
>
> Signed-off-by: Boris Brezillon
> Signed-off-by: Aleksei Mamlin
Unfortunately, we don't have any user for it at the moment.
Please re-submit it later wh
On Fri, Jun 10, 2016 at 03:23:33PM +0200, Gregory CLEMENT wrote:
> This commit adds the DT binding documentation for the the Xtal clock on
> Armada 3700 used in the Marvell Armada 3700 SoCs.
>
> Signed-off-by: Gregory CLEMENT
> ---
> .../bindings/clock/armada3700-xtal-clock.txt | 28
> +++
On 13.06.16 18:19, Andrew F. Davis wrote:
On 06/13/2016 03:22 AM, Mugunthan V N wrote:
On Saturday 11 June 2016 04:34 AM, Schuyler Patton wrote:
On 06/08/2016 07:03 PM, Ivan Khoronzhuk wrote:
On 09.06.16 02:11, Schuyler Patton wrote:
On 06/08/2016 09:06 AM, Ivan Khoronzhuk wrote:
O
On Fri, Jun 10, 2016 at 03:23:35PM +0200, Gregory CLEMENT wrote:
> This commit adds the DT binding documentation for the Time Base Generator
> clock used in the Marvell Armada 3700 SoCs.
>
> Signed-off-by: Gregory CLEMENT
> ---
> .../bindings/clock/armada3700-tbg-clock.txt| 27
> +++
On 14/06/16 14:32, Peter Zijlstra wrote:
> On Tue, Jun 14, 2016 at 01:08:13PM +0100, Juri Lelli wrote:
> > > + postunlock = rt_mutex_futex_unlock(&pi_state->pi_mutex, &wake_q);
> > >
> > > /*
> > >* First unlock HB so the waiter does not spin on it once he got woken
> > > + * up. Then wake
On Tue, Jun 14, 2016 at 01:36:11PM +0300, Adrian Hunter wrote:
> On 14/06/16 13:12, Wolfram Sang wrote:
> > On Tue, Jun 14, 2016 at 10:33:06AM +0200, Beata Baranowska wrote:
> >> From: Chuanxiao Dong
> >>
> >> When the enhanced area feature was not enabled, the related sysfs will
> >> have -EINVA
On Fri, Jun 10, 2016 at 03:23:37PM +0200, Gregory CLEMENT wrote:
> This commit adds the DT binding documentation for the peripheral clocks
> used in the Marvell Armada 3700 SoCs.
>
> Signed-off-by: Gregory CLEMENT
> ---
> .../bindings/clock/armada3700-periph-clock.txt | 70
> +++
On Fri, Jun 10, 2016 at 12:01:30PM -0500, Han Xu wrote:
> add the clocks and clock-names in DT property, gpmi-io clock is
> mandatory for all platforms, but some platforms, such as i.MX6Q may
> need more extra clocks for submodules. More details please refer to the
> SoC reference manual.
>
> Sign
Em Tue, Jun 14, 2016 at 01:40:47PM +1000, Michael Ellerman escreveu:
> On Fri, 2016-06-10 at 20:08 +0530, Naveen N. Rao wrote:
> > On 2016/06/10 10:36AM, Arnaldo Carvalho de Melo wrote:
> > > Em Fri, Jun 10, 2016 at 06:32:51PM +0530, Naveen N. Rao escreveu:
> > > > Convert ins__find() to a __weak f
On Fri, Jun 10, 2016 at 12:01:34PM -0500, Han Xu wrote:
> listed all supported chips in DT.
>
> Signed-off-by: Han Xu
> ---
> Documentation/devicetree/bindings/mtd/gpmi-nand.txt | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
Acked-by: Rob Herring
On Tue, 2016-06-14 at 15:08 +0300, Ville Syrjälä wrote:
> On Tue, Jun 14, 2016 at 12:37:34PM +0100, Ben Hutchings wrote:
> > On Tue, 2016-06-14 at 13:47 +0300, Ville Syrjälä wrote:
> > > On Mon, Jun 13, 2016 at 07:36:37PM +0100, Ben Hutchings wrote:
> > > > 3.16.36-rc1 review patch. If anyone has
On Tue, Jun 14, 2016 at 09:30:03AM +0100, Srinivas Kandagatla wrote:
> Move dma channel allocations to pcmops open and close functions. Reason
> to do this is that, lpass_platform_pcm_free() accesses snd_soc_pcm_runtime
> via substream->private data, However By this time runtimes are already
> free
On 2016/06/14 at 18:21, Juri Lelli wrote:
> Hi,
>
> On 07/06/16 21:56, Peter Zijlstra wrote:
>> From: Xunlei Pang
>>
>> A crash happened while I was playing with deadline PI rtmutex.
>>
>> BUG: unable to handle kernel NULL pointer dereference at 0018
>> IP: [] rt_mutex_get_top_
On Tue, Jun 14, 2016 at 10:09:34AM +0100, Juri Lelli wrote:
> I've got only nitpicks for the changelog. Otherwise the patch looks good
> to me (and yes, without it bw inheritance would be a problem).
So for bw inheritance I'm still not sure how to dead with the faxt that
the top_pi_waiter, while b
On Mon, Jun 13, 2016 at 07:33:59PM -0700, Duc Dang wrote:
> On Wed, Jun 8, 2016 at 12:48 PM, Rob Herring wrote:
> > On Mon, Jun 06, 2016 at 03:17:56PM -0500, Bjorn Helgaas wrote:
> >> The convention in these files is to use lowercase for "0x" prefixes and for
> >> the hex constants themselves, but
CC'ing lkml and Rusty to get opinions on this.
On Sat, Apr 23, 2016 at 3:18 PM, Lubomir Rintel wrote:
> On Wed, 2016-04-13 at 01:11 -0300, Lucas De Marchi wrote:
>> On Tue, Mar 29, 2016 at 7:27 AM, Lubomir Rintel
>> wrote:
>> >
>> > On Fri, 2016-03-04 at 02:02 -0300, Lucas De Marchi wrote:
>> >
On Di, 2016-06-14 at 12:13 +0200, Marc-André Lureau wrote:
> Hi
>
> On Tue, May 31, 2016 at 2:52 PM, Gerd Hoffmann wrote:
> > Pick up the correct source rectangle from framebuffer.
> > Without this multihead setups are not working correctly.
> >
> > Signed-off-by: Gerd Hoffmann
>
> Reviewed-by:
Peter Zijlstra wrote:
> That did occur to me as well; however I think it would be best to
> eradicate all forms of cascading entirely -- if at all possible.
Agreed.
>> to be replaced with __builtin_clz or similar:
> Problem is for the archs that don't have that, the 5 layer branch is
> trivial f
Hi,
On 13/06/2016 15:04, Chen-Yu Tsai wrote:
> Hi,
>
> On Mon, Jun 13, 2016 at 6:15 PM, Quentin Schulz
> wrote:
>> The Parrot Board is an evaluation board with an Allwinner R16 (assumed
>> to be close to an Allwinner A33), 4GB of NAND, 512MB of RAM, USB host
>
> You say NAND here, but you enabl
Use lowercase consistently and drop '0x' prefixes from unit addresses.
These could be squashed together; I just separated them for ease of
reviewing.
---
Bjorn Helgaas (2):
arm64: dts: apm: Use lowercase consistently for hex constants
arm64: dts: apm: Remove leading '0x' from unit add
On Tue, Jun 14, 2016 at 01:48:47PM +0100, Ben Hutchings wrote:
> On Tue, 2016-06-14 at 15:08 +0300, Ville Syrjälä wrote:
> > On Tue, Jun 14, 2016 at 12:37:34PM +0100, Ben Hutchings wrote:
> > > On Tue, 2016-06-14 at 13:47 +0300, Ville Syrjälä wrote:
> > > > On Mon, Jun 13, 2016 at 07:36:37PM +0100,
The convention in these files is to use lowercase for "0x" prefixes and for
the hex constants themselves, but a few changes didn't follow that
convention, which makes the file annoying to read.
Use lowercase consistently for the hex constants. No functional change
intended.
Signed-off-by: Bjorn
Unit addresses should not have a leading '0x'. Remove them.
Signed-off-by: Bjorn Helgaas
---
arch/arm64/boot/dts/apm/apm-shadowcat.dtsi | 32 ++--
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi
b/arch/arm64/b
On 2016-06-14 06:32, Stephen Rothwell wrote:
> Hi Kees,
>
> On Mon, 13 Jun 2016 16:57:15 -0700 Kees Cook wrote:
>>
>> On Mon, Jun 13, 2016 at 4:53 PM, Kees Cook wrote:
>>>
>>> Strange, I pulled these directly from linux-next. Michal had an
>>> auto-responder saying he was going to be out-of-offi
On Mon, Jun 13, 2016 at 3:49 PM, Meelis Roos wrote:
>> > Between 4.5.0 and 4.6.0-rc3, my Spar Enterprise T5120 has started
>> > showing the following messages during bootup:
> [...]
>>
>> got the same messages on my t5120 with kernel 4.6.1 :
> [...]
>> but 4.7.0-rc2+ (from git), does not have it,
On 14/06/16 20:53, Xunlei Pang wrote:
> On 2016/06/14 at 18:21, Juri Lelli wrote:
> > Hi,
> >
> > On 07/06/16 21:56, Peter Zijlstra wrote:
> >> From: Xunlei Pang
> >>
> >> A crash happened while I was playing with deadline PI rtmutex.
> >>
> >> BUG: unable to handle kernel NULL pointer derefer
Hi Jonsoo,
On Mon, Jun 13, 2016 at 9:43 PM, Geert Uytterhoeven
wrote:
> On Tue, Apr 12, 2016 at 6:51 AM, wrote:
>> From: Joonsoo Kim
>> To check whther free objects exist or not precisely, we need to grab a
>> lock. But, accuracy isn't that important because race window would be
>> even small
Hi,
[auto build test ERROR on mripard/sunxi/for-next]
[also build test ERROR on next-20160614]
[cannot apply to robh/for-next v4.7-rc3]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Aleksei
Hi,
still digesting this change, but I'll point out below why I think you
are hitting a NULL ptr dereference (discussed on IRC).
On 07/06/16 21:56, Peter Zijlstra wrote:
> With the introduction of SCHED_DEADLINE the whole notion that priority
> is a single number is gone, therefore the @prio argu
On Wed, Jun 8, 2016 at 2:02 AM, Jarkko Sakkinen
wrote:
> The register TPM_CRB_CTRL_REQ_0 contains bits goIdle and cmdReady for
> invoking the chip to suspend and resume. This commit implements runtime
> PM for tpm_crb by using these bits.
>
> The legacy ACPI start (SMI + DMA) based devices do not
On 2016/6/13 17:06, Arnd Bergmann wrote:
> On Monday, June 13, 2016 2:07:56 PM CEST Dongpo Li wrote:
>
>> +- reset-names: should contain the reset signal name "mac_reset"(required)
>> +and "phy_reset"(optional).
>
> Maybe just name the resets 'mac' and 'phy'? The '_reset' part is
> implied
On Tue, 14 Jun 2016 21:11:12 +0800
kbuild test robot wrote:
> Hi,
>
> [auto build test ERROR on mripard/sunxi/for-next]
> [also build test ERROR on next-20160614]
> [cannot apply to robh/for-next v4.7-rc3]
> [if your patch is applied to the wrong git tree, please drop us
On 14/06/16 14:54, Peter Zijlstra wrote:
> On Tue, Jun 14, 2016 at 10:09:34AM +0100, Juri Lelli wrote:
> > I've got only nitpicks for the changelog. Otherwise the patch looks good
> > to me (and yes, without it bw inheritance would be a problem).
>
> So for bw inheritance I'm still not sure how to
On Tue, Jun 14, 2016 at 8:59 PM, Quentin Schulz
wrote:
> Hi,
>
> On 13/06/2016 15:04, Chen-Yu Tsai wrote:
>> Hi,
>>
>> On Mon, Jun 13, 2016 at 6:15 PM, Quentin Schulz
>> wrote:
>>> The Parrot Board is an evaluation board with an Allwinner R16 (assumed
>>> to be close to an Allwinner A33), 4GB of
On 二, 2016-06-14 at 07:03 +, Kuninori Morimoto wrote:
> Hi Zhang
>
> >
> > >
> > > >
> > > > >
> > > > > struct thermal_zone_device
> > > > > *thermal_zone_device_register()
> > > > > {
> > > > > ...
> > > > > if (!tz->tzp || !tz->tzp->no_hwmon) {
> > > > > re
Am Montag, 13. Juni 2016, 10:10:10 schrieb Frank Wang:
> The newer SoCs (rk3366, rk3399) take a different usb-phy IP block
> than rk3288 and before, and most of phy-related registers are also
> different from the past, so a new phy driver is required necessarily.
>
> Signed-off-by: Frank Wang
> -
On 14.06.16 07:36:08, Heiko Carstens wrote:
> On Mon, Jun 13, 2016 at 06:29:14PM +0200, Robert Richter wrote:
> > Heiko,
> >
> > On 09.06.16 11:00:56, Heiko Carstens wrote:
> > > However I'm wondering if we shouldn't simply remove at least the s390
> > > specific hwswampler code from the oprofile
On Fri, Jun 10, 2016 at 11:23:53PM -0400, David Kershner wrote:
> This patchset is dependent on the previously-submitted patchset:
>
> staging: unisys: fix visorbus & visorinput issues raised by tglx
>
> This patchset moves drivers/staging/unisys/include to
> include/linux/visorbus, and mov
Am Montag, 13. Juni 2016, 10:38:39 schrieb Heiko Stübner:
> Am Montag, 13. Juni 2016, 10:10:09 schrieb Frank Wang:
> > Signed-off-by: Frank Wang
>
> looks really cool now, thanks for addressing all the review comments
>
> Reviewed-by: Heiko Stuebner
You've only added the very common "reg" prop
On 14/06/16 13:49, Kenneth Westfield wrote:
On Tue, Jun 14, 2016 at 09:30:03AM +0100, Srinivas Kandagatla wrote:
Move dma channel allocations to pcmops open and close functions. Reason
to do this is that, lpass_platform_pcm_free() accesses snd_soc_pcm_runtime
via substream->private data, Howev
On 06/10/2016 04:52 PM, Thomas Gleixner wrote:
Hi Thomas,
[ ... ]
+ now = local_clock();
+ prev = timings->timestamp;
+ timings->timestamp = now;
+
+ /*
+* If it is the first interrupt of the series, we can't
+* compute an interval, just store the timest
On Mon, Jun 13, 2016 at 05:02:15PM +0800, Huang, Ying wrote:
> Linus Torvalds writes:
>
> > On Sat, Jun 11, 2016 at 5:49 PM, Huang, Ying wrote:
> >>
> >> From perf profile, the time spent in page_fault and its children
> >> functions are almost same (7.85% vs 7.81%). So the time spent in page
>
On Fri, Jun 10, 2016 at 4:27 PM, Bastien Nocera wrote:
> On Fri, 2016-06-10 at 08:23 -0700, Srinivas Pandruvada wrote:
>> On Fri, 2016-06-10 at 17:04 +0200, Bastien Nocera wrote:
>> > >
>>
>> [...]
>>
>> > Are there any errors when setting the triggers?
>> >
>> Is there any debug option in this se
"Kani, Toshimitsu" writes:
>> I had dm-linear and md-raid0 support on my list of things to look at,
>> did you have raid0 in your plans?
>
> Yes, I hope to extend further and raid0 is a good candidate.
dm-flakey would allow more xfstests test cases to run. I'd say that's
more important than
On Tue, Jun 14, 2016 at 6:27 AM, Heiko Stübner wrote:
> Am Montag, 13. Juni 2016, 10:10:10 schrieb Frank Wang:
>> The newer SoCs (rk3366, rk3399) take a different usb-phy IP block
>> than rk3288 and before, and most of phy-related registers are also
>> different from the past, so a new phy driver
On Tue, Jun 14, 2016 at 04:19:08PM +0300, Aleksei Mamlin wrote:
> On Tue, 14 Jun 2016 21:11:12 +0800
> kbuild test robot wrote:
>
> > Hi,
> >
> > [auto build test ERROR on mripard/sunxi/for-next]
> > [also build test ERROR on next-20160614]
> > [cannot a
On Tue, 2016-06-14 at 12:43 +0200, Ingo Molnar wrote:
> * Andy Shevchenko wrote:
>
> > Add Power Management Unit driver to handle power states of South
> > Complex
> > devices on Intel Tangier. In the future it might be expanded to
> > cover North
> > Complex devices as well.
> >
> > With this d
Commit a168b8f1cde6 ("MIPS: mm: Add MIPS R6 instruction encodings") added
an incorrect definition of the redefined MIPSr6 cache instruction.
Executing any kernel code including this instuction results in a
reserved instruction exception and kernel panic.
Fix the instruction definition.
Fixes: a1
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