In preparation for supporting the at24cs EEPROM series add a new flag
to the at24 platform data. When set, it should tell the driver that
the chip has an additional read-only memory area that holds a factory
pre-programmed serial number.
Signed-off-by: Bartosz Golaszewski
---
include/linux/platf
Split at24_eeprom_write() into three smaller functions - one for the
i2c operations and two for the smbus extensions (separate routines for
block and byte transfers). Assign them in at24_probe() depending on
the bus capabilities.
Also: in order to avoid duplications move code adjusting the count
a
On 06/05/2016 08:16 AM, Mike Galbraith wrote:
>
> The internal bits are already swork_blah, rename source to match.
>
> Signed-off-by: Mike Galbraith
I don't mind the rename to keep things consistent. I merged the rename
into the original patch.
Sebastian
Use BIT() macro to replace the 0xXX constants in platform_data flags
definitions.
Signed-off-by: Bartosz Golaszewski
---
include/linux/platform_data/at24.h | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/include/linux/platform_data/at24.h
b/include/linux/platform_da
As part of the preparation for introducing support for more chips,
improve the readability of the device table by separating columns
with tabs.
Signed-off-by: Bartosz Golaszewski
---
drivers/misc/eeprom/at24.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
Split at24_eeprom_read() into two smaller functions - one for the
i2c operations and one for the smbus extensions. Assign them in
at24_probe() depending on the bus capabilities.
Also: in order to avoid duplications move the comments related to
offset calculations above the at24_translate_offset()
Chips from the at24cs EEPROM series have an additional read-only
memory area containing a factory pre-programmed serial number. In
order to access it, a dummy write must be executed before reading
the serial number bytes.
Chips from the at24mac familiy, apart from the serial number, have
a second
The first step in simplifying the read and write functions is to call
them via function pointers stored in at24_data. When we eventually
split the routines into smaller ones (depending on whether they use
smbus or i2c operations) we'll simply assign them to said pointers
instead of checking the fla
On 5 June 2016 at 11:35, Alexander Graf wrote:
> While the EFI spec mandates an RTC, not every implementation actually adheres
> to that rule (or can adhere to it - some systems just don't have an RTC).
>
> For those, we really don't want to probe the EFI RTC driver at all, because if
> we do we'd
On Mon, 06 Jun 2016, Keerthy wrote:
> Hi Lee Jones,
>
> On Tuesday 17 May 2016 04:19 PM, Lee Jones wrote:
> >On Tue, 17 May 2016, Keerthy wrote:
> >
> >>
> >>
> >>On Friday 13 May 2016 09:18 AM, Keerthy wrote:
> >>>The LP873X chip is a power management IC for Portable Navigation Systems
> >>>
On Fri, Jun 03, 2016 at 06:21:09PM -0400, Johannes Weiner wrote:
>On Thu, Jun 02, 2016 at 12:07:06PM -0400, Johannes Weiner wrote:
>> Hi,
>>
>> On Thu, Jun 02, 2016 at 02:45:07PM +0800, kernel test robot wrote:
>> > FYI, we noticed pixz.throughput -9.1% regression due to commit:
>> >
>> > commit
Align the arguments in broken lines with the arguments list's opening
brackets and make checkpatch.pl happy by converting 'unsigned' into
'unsigned int'.
Signed-off-by: Bartosz Golaszewski
---
drivers/misc/eeprom/at24.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git
[adding devicetree]
On Sun, Jun 05, 2016 at 11:20:29PM -0400, Bill Mills wrote:
> Keystone2 can do DMA coherency but only if:
> 1) DDR3A DMA buffers are in high physical addresses (0x8__)
> (DDR3B does not have this constraint)
> 2) Memory is marked outer shared
> 3) DMA Master marks t
We detected some problems using the smsc lan8720a in combination with
i.MX28 and tracked this down to commit 21009686662f ("net: phy: smsc: move
smsc_phy_config_init reset part in a soft_reset function")
With 2100968666 the generic soft reset is replaced by a specific function
which handles power d
In preparation for splitting at24_eeprom_write() & at24_eeprom_read()
into smaller, specialized routines move at24_read() below, so that it
won't be intertwined with the low-level EEPROM accessors.
Signed-off-by: Bartosz Golaszewski
---
drivers/misc/eeprom/at24.c | 64 +++
On 06/03/2016 03:56 AM, Cyril Bur wrote:
> On 1 June 2016 at 18:26, Anshuman Khandual
> wrote:
>
>> On 05/31/2016 04:42 AM, Michael Ellerman wrote:
>>> Hi Laurent,
>>>
>>> Sorry no. My next branch closed for 4.7 about 3 weeks ago.
>>>
>>> This series has been blocked for a long time on the gdb su
On Fri, 03 Jun 2016, Keerthy wrote:
> Hi Lee Jones,
>
> On Wednesday 11 May 2016 11:18 AM, Keerthy wrote:
> >mfd_add_devices enables parsing device tree nodes without compatibles
> >for child nodes. Replace of_platform_populate with mfd_add_devices.
> >
>
> A gentle ping on this patch.
Don't do
On mips and parisc:
drivers/bluetooth/btwilink.c: In function 'ti_st_open':
drivers/bluetooth/btwilink.c:174:21: warning: overflow in implicit constant
conversion [-Woverflow]
hst->reg_status = -EINPROGRESS;
drivers/nfc/nfcwilink.c: In function 'nfcwilink_open':
drivers/nf
On Fri, Jun 03, 2016 at 05:03:30PM -0400, Neil Leeder wrote:
> This adds a new dynamic PMU to the Perf Events framework to program
> and control the L2 cache PMUs in some Qualcomm Technologies SOCs.
>
> The driver exports formatting and event information to sysfs so it can
> be used by the perf us
On Fri, Jun 3, 2016 at 3:51 PM, Martin Kepplinger wrote:
> NXP took over Freescale, so add NXP to the driver descriptions
>
Is it worth to bother with these kind of changes? The part number
still remains the same.
We can add a new copyright notice from the new company and that's all.
Daniel.
>
On Monday, June 6, 2016 9:56:27 AM CEST Mark Rutland wrote:
> [adding devicetree]
>
> On Sun, Jun 05, 2016 at 11:20:29PM -0400, Bill Mills wrote:
> > Keystone2 can do DMA coherency but only if:
> > 1) DDR3A DMA buffers are in high physical addresses (0x8__)
> > (DDR3B does not have thi
This patch cleans up the peripheral id table for different ETMv4
implementations.
As per Cortex-A53 TRM, the ETM has following id values:
Peripheral ID0 0x5D0xFE0
Peripheral ID1 0xB90xFE4
Peripheral ID2 0x4B0xFE8
Peripheral ID3 0x000xFEC
where, PID2: has the following format:
This is a collection fixes / cleanups for the coresight driver.
Patches 1-5 are fixes, and the remaining patches are clean ups.
Changes since V2:
- Added a patch to limit the trace data
- Added a patch to fix tmc_read_unprepare_etr (another crash)
- Split the patch to remove erraneous dma_free
_coresight_build_path assumes that all the connections of a csdev
has the child_dev initialised. This may not be true if the particular
component is not supported by the kernel config(e.g TPIU) but is
present in the DT. In which case, building a path can cause a crash like
this :
Unable to handl
commit de5461970b3e9e194 ("coresight: tmc: allocating memory when needed")
removed the static allocation of buffer for the trace data in ETR mode in
tmc_probe. However it failed to remove the "devm_free_coherent" in
tmc_probe when the probe fails due to other reasons. This patch gets
rid of the inc
This is a cleanup patch.
coresight_device->conns holds an array to point to the devices
connected to the OUT ports of a component. Sinks, e.g ETR, do not
have an OUT port (nr_outport = 0), as it streams the trace to
memory via AXI.
At coresight_register() we do :
conns = kcalloc(csdev->n
At present the ETF or ETR gives out the entire device
buffer, even if there is less or even no trace data
available. This patch limits the trace data given out to
the actual trace data collected.
Cc: mathieu.poir...@linaro.org
Signed-off-by: Suzuki K Poulose
---
drivers/hwtracing/coresight/cores
When we encounter a timeout waiting for a status change via
coresight_timeout, the caller always print the offset which
was tried. This is pretty much useless as it doesn't specify
the bit position we wait for. Also, one needs to lookup the
TRM to figure out, what was wrong. This patch changes all
This patch cleans up the error handling path for tmc_probe
as a side effect of the removal of the spurious dma_free_coherent().
Signed-off-by: Suzuki K Poulose
---
drivers/hwtracing/coresight/coresight-tmc.c | 36 ++---
1 file changed, 17 insertions(+), 19 deletions(-)
d
Use the defined symbol rather than hardcoding the value to
check whether the TMC buffer is full.
Cc: Mathieu Poirier
Signed-off-by: Suzuki K Poulose
---
drivers/hwtracing/coresight/coresight-tmc-etr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/hwtracing/coresigh
At the end of the trace capture, we free the allocated memory,
resetting the drvdata->buf to NULL, to indicate that trace data
was collected and the next trace session should allocate the
memory in tmc_enable_etr_sink_sysfs.
The tmc_enable_etr_sink_sysfs, we only allocate memory if drvdata->vaddr
Hi Alex,
On 2016/1/6 0:18, Alexander Duyck wrote:
On Tue, Jan 5, 2016 at 1:40 AM, Michael S. Tsirkin wrote:
On Mon, Jan 04, 2016 at 07:11:25PM -0800, Alexander Duyck wrote:
The two mechanisms referenced above would likely require coordination with
QEMU and as such are open to discussion. I h
The newer SoCs (rk3366, rk3399) of Rock-chip take a different usb-phy
IP block than rk3288 and before, and most of phy-related registers are
also different from the past, so a new phy driver is required necessarily.
These series patches add phy-rockchip-inno-usb2.c and the corresponding
documentat
Signed-off-by: Frank Wang
---
Changes in v3:
- Added 'clocks' and 'clock-names' optional properties.
- Specified 'otg-port' and 'host-port' as the sub-node name.
Changes in v2:
- Changed vbus_host optional property from gpio to regulator.
- Specified vbus_otg-supply optional property.
- Spe
The newer SoCs (rk3366, rk3399) take a different usb-phy IP block
than rk3288 and before, and most of phy-related registers are also
different from the past, so a new phy driver is required necessarily.
Signed-off-by: Frank Wang
---
Changes in v3:
- Resolved the mapping defect between fixed val
On Thu, Jun 2, 2016 at 11:24 PM, Laurent Pinchart
wrote:
> On Wednesday 01 Jun 2016 15:27:59 Rob Herring wrote:
>> On Wed, Jun 1, 2016 at 2:50 PM, Geert Uytterhoeven wrote:
>> > When moving functionality from C code to DT, we're regularly faced with
>> > stable DT issues: old DTBs should keep on w
On Sat, 4 Jun 2016, kbuild test robot wrote:
> Hi,
>
> [auto build test ERROR on hid/for-next]
> [also build test ERROR on v4.7-rc1 next-20160603]
> [if your patch is applied to the wrong git tree, please drop us a note to
> help improve the system]
>
> url:
> https://github.com/0day-ci/lin
On 06/06/2016 11:05 AM, Cyrill Gorcunov wrote:
> On Wed, Jun 01, 2016 at 10:52:57AM +0300, Nikolay Borisov wrote:
>> This patch adds the necessary members to user_struct. The idea behind
>> the solution is really simple - user the userns pointers as keys into
>> a hash table which holds the inoti
This patch reworks the clock binding to avoid too much detail in DT.
Now we have only compatible string per type of clock
(remark from Rob https://lkml.org/lkml/2016/5/25/492)
Signed-off-by: Gabriel Fernandez
---
.../devicetree/bindings/clock/st/st,clkgen-mux.txt | 2 +-
.../devicetree/bindings
v2:
- Simpliflication of clock binding
remark from Rob https://lkml.org/lkml/2016/5/25/492
- Suppression of stih415-416 support for the clocks (in order
to help simplification of clock binding)
(others patchs for the machine and drivers will come)
This serie allows to increase
It is necessary to properly configure these clocks in order
to address 720p and 1080p HDMI resolution.
Signed-off-by: Vincent Abriou
Signed-off-by: Gabriel Fernandez
---
arch/arm/boot/dts/stih410.dtsi | 16 +---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/arch/arm
STiH415 and STiH416 platforms are no longer used.
these platforms will be deprecated for the next kernel.
Signed-off-by: Gabriel Fernandez
---
.../bindings/clock/st/st,clkgen-divmux.txt | 49 --
.../devicetree/bindings/clock/st/st,clkgen-mux.txt | 18 +-
.../devicetree/bindings/clock/s
For the same reason as commit 02d699f1f464 ("include/linux/kconfig.h:
ese macros which are already defined"), it is better to use macros
IS_BUILTIN() and IS_MODULE() for defining IS_REACHABLE().
Signed-off-by: Masahiro Yamada
---
include/linux/kconfig.h | 4 ++--
1 file changed, 2 insertions(+)
This patch configures the semi-synchronous mode of the video clocks
of clkgenD2.
Signed-off-by: Olivier Bideau
Signed-off-by: Gabriel Fernandez
---
.../devicetree/bindings/clock/st/st,flexgen.txt| 2 ++
drivers/clk/st/clk-flexgen.c | 37 --
2 files
This patch enables the synchronous clock mode for video clocks
on STiH407 board.
Signed-off-by: Olivier Bideau
Signed-off-by: Gabriel Fernandez
---
arch/arm/boot/dts/stih407-clock.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/stih407-clock.dtsi
b/ar
This patch enables the synchronous clock mode for video clocks
on STiH418 board.
Signed-off-by: Olivier Bideau
Signed-off-by: Gabriel Fernandez
---
arch/arm/boot/dts/stih418-clock.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/stih418-clock.dtsi
b/ar
This patch enables the synchronous clock mode for video clocks
on STiH410 board.
Signed-off-by: Olivier Bideau
Signed-off-by: Gabriel Fernandez
---
arch/arm/boot/dts/stih410-clock.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/stih410-clock.dtsi
b/ar
This patch is used in the clock driver to apply a clock propagation
flag on the audio clocks of STiH410
Signed-off-by: Olivier Bideau
Signed-off-by: Gabriel Fernandez
---
arch/arm/boot/dts/stih410-clock.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/s
Hi Peter,
On Mon, Jun 06, 2016 at 10:21:24AM +0200, Peter Zijlstra wrote:
> On Mon, Jun 06, 2016 at 09:37:41AM +0200, Christian Borntraeger wrote:
> > commit 26657848502b ("perf/core: Verify we have a single perf_hw_context
> > PMU") seems to
> > trigger the newly created warning on a z196.
> >
This patch is used in the clock driver to apply a clock propagation
flag on the audio clocks of STiH418
Signed-off-by: Olivier Bideau
Signed-off-by: Gabriel Fernandez
---
arch/arm/boot/dts/stih418-clock.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/s
This patch allows fine tuning of the quads FS for audio clocks
accuracy.
Signed-off-by: Olivier Bideau
Signed-off-by: Gabriel Fernandez
---
.../devicetree/bindings/clock/st/st,flexgen.txt| 2 ++
drivers/clk/st/clk-flexgen.c | 24 ++
2 files changed
It is necessary to properly configure these clocks in order
to address 720p and 1080p HDMI resolution.
Signed-off-by: Vincent Abriou
Signed-off-by: Gabriel Fernandez
---
arch/arm/boot/dts/stih407.dtsi | 16 +---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/arch/arm
This patch is used in the clock driver to apply a clock propagation
flag on the audio clocks of STiH407
Signed-off-by: Olivier Bideau
Signed-off-by: Gabriel Fernandez
---
arch/arm/boot/dts/stih407-clock.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/s
Use an algorithm instead of a table to compute clocks for fs660c32
synthesizer.
During a video playback we need to adjust audio & video frequencies.
A table can't cover all HDMI resolutions and audio adjustment.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/st/clkgen-fsyn.c | 180
On Monday 06 June 2016 02:25 PM, Lee Jones wrote:
On Mon, 06 Jun 2016, Keerthy wrote:
Hi Lee Jones,
On Tuesday 17 May 2016 04:19 PM, Lee Jones wrote:
On Tue, 17 May 2016, Keerthy wrote:
On Friday 13 May 2016 09:18 AM, Keerthy wrote:
The LP873X chip is a power management IC for Portable
Hi Matthias, Jassi,
On Fri, 2016-06-03 at 18:41 +0530, Jassi Brar wrote:
> On Fri, Jun 3, 2016 at 4:48 PM, Matthias Brugger
> wrote:
> > On 03/06/16 08:12, Horng-Shyang Liao wrote:
> >> On Thu, 2016-06-02 at 10:46 +0200, Matthias Brugger wrote:
>
> >>> I keep thinking about how to get rid of th
On Tue, 31 May 2016, Casey Schaufler wrote:
> Subject: [PATCH] LSM: Fix for security_inode_getsecurity and -EOPNOTSUPP
>
> Serge Hallyn pointed out that the current implementation of
> security_inode_getsecurity() works if there is only one hook
> provided for it, but will fail if there is more t
Hi Jassi, Lee,
On 24/05/16 17:12, Sudeep Holla wrote:
tdev->signal is not set NULL after it's freed. This will cause random
exceptions when the stale pointer is accessed after tdev->signal is
freed. Also, since tdev->signal allocation is skipped the next time
it's written, this leads to continuo
Hi Mel (who is out of the office today),
I initially reported this on the rt-users list, thinking at the time
that it was only showing up in -rt kernels, but that turned out to not
be the case, it just requires an enterprise config for some reason mm
folks will likely recognize instantly. I just
Keep earlycon related symbols only when CONFIG_SERIAL_EARLYCON is
enabled and the driver is built-in. This will be helpful to clean
up ifdefs surrounding earlycon code in serial drivers.
Signed-off-by: Masahiro Yamada
---
include/linux/serial_core.h | 8 +++-
1 file changed, 7 insertions(+
The !defined(MODULE) conditional has been added to the
OF_EARLYCON_DECLARE() define.
Now we can revert commit a2d3ea2f2399 ("serial: 8250/uniphier:
fix modular build").
Signed-off-by: Masahiro Yamada
---
drivers/tty/serial/8250/8250_uniphier.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion
The !defined(MODULE) conditional has been added to the
OF_EARLYCON_DECLARE() define.
This commit partially reverts commit 3f5921a60f74 ("serial:
8250/mediatek: fix building with SERIAL_8250=m").
Signed-off-by: Masahiro Yamada
---
drivers/tty/serial/8250/8250_mtk.c | 2 +-
1 file changed, 1 ins
The #if defined(CONFIG_SERIAL_EARLYCON) && !defined(MODULE)
conditional has been added to the OF_EARLYCON_DECLARE() define.
The same conditional can be dropped from 8250_ingenic.c because
the unused symbols will be marked as __maybe_unsed.
Also, the Kconfig dependency can become much simpler.
Sig
1/4: keep earlycon symbols only when CONFIG_SERIAL_EARLYCON is defined
and the driver is built-in.
2/4 thru 4/4: driver clean-ups.
(partially reverts build fixes by Arnd Bergmann)
Masahiro Yamada (4):
earlycon: mark earlycon code as __used iif the caller is built-in
seri
On Monday, June 6, 2016 2:09:07 AM CEST Build bot for Mark Brown wrote:
> arm-allmodconfig : PASS, 0 errors, 2 warnings, 0 section mismatches
>
> Warnings:
> ../drivers/gpu/drm/omapdrm/dss/dsi.c:1170:6: warning: unused variable
> 'r' [-Wunused-variable]
> ../drivers/gpu/drm/omapdr
The difference between the "#if" and "#else" is __used / __unused,
so factor it out to avoid code duplication.
Signed-off-by: Masahiro Yamada
---
include/linux/of.h | 13 ++---
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/include/linux/of.h b/include/linux/of.h
index c7
On Thu, 2 Jun 2016, Tyler Hicks wrote:
> The capability check should not be audited since it is only being used
> to determine the inode permissions. A failed check does not indicate a
> violation of security policy but, when an LSM is enabled, a denial audit
> message was being generated.
>
> Th
On Mon, Jun 06, 2016 at 10:27:24AM +0800, kernel test robot wrote:
>
> FYI, we noticed a -6.3% regression of unixbench.score due to commit:
>
> commit 5c0a85fad949212b3e059692deecdeed74ae7ec7 ("mm: make faultaround
> produce old ptes")
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/l
On Fri, Jun 03, 2016 at 05:03:32PM -0400, Neil Leeder wrote:
> Adds perf events support for L2 cache PMU.
>
> The L2 cache PMU driver is named 'l2cache' and can be used
> with perf events to profile L2 events such as cache hits
> and misses.
>
> Signed-off-by: Neil Leeder
> ---
> drivers/soc/qc
On Fri, 20 May 2016, Tetsuo Handa wrote:
> Mike Danese wrote:
> > The code is doing the equivalent of the kthread_run macro.
> >
> > Signed-off-by: Mike Danese
>
> Acked-by: Tetsuo Handa
Applied to
git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/linux-security.git next
--
James Morri
On Mon, Jun 06, 2016 at 08:20:38AM +0800, Yuyang Du wrote:
> Vincent reported that the first task to a new task group's cfs_rq will
> be attached in attach_task_cfs_rq() and once more when it is enqueued
> (see https://lkml.org/lkml/2016/5/25/388).
>
> Actually, it is worse. The sched avgs can be
On Mon, Jun 06, 2016 at 08:20:39AM +0800, Yuyang Du wrote:
> +static void task_move_group_fair(struct task_struct *p, bool fork)
> {
> - detach_task_cfs_rq(p);
> + /*
> + * Newly forked task should not be removed from any cfs_rq
That's a pointless comment; that's exactly what the cod
On Tue, 31 May, at 11:23:42AM, Matt Fleming wrote:
> Folks, please pull the following urgent patches which fix a boot crash
> when using the "noefi" parameter and the debug output on arm.
>
> The following changes since commit 1a695a905c18548062509178b98bc91e67510864:
>
> Linux 4.7-rc1 (2016-05
On 06/06/16 12:44, Arnd Bergmann wrote:
> On Monday, June 6, 2016 2:09:07 AM CEST Build bot for Mark Brown wrote:
>> arm-allmodconfig : PASS, 0 errors, 2 warnings, 0 section mismatches
>>
>> Warnings:
>> ../drivers/gpu/drm/omapdrm/dss/dsi.c:1170:6: warning: unused
>> variable 'r' [-Wunused
add ddrc clock setting, so we can do ddr frequency
scaling on rk3399 platform in future.
Signed-off-by: Lin Huang
---
Changes in v2:
- remove clk_ddrc_dpll_src from critical clock list
Changes in v1:
- remove ddrc source CLK_IGNORE_UNUSED flag
- move clk_ddrc and clk_ddrc_dpll_src to critical
On new rockchip platform(rk3399 etc), there have dcf controller to
do ddr frequency scaling, and this controller will implement in
arm-trust-firmware. We add a special clock-type to handle that.
Signed-off-by: Lin Huang
---
Changes in v2:
- use GENMASK instead val_mask
- use divider_recalc_rate(
on rk3399 platform, there is dfi conroller can monitor
ddr load, base on this result, we can do ddr freqency
scaling.
Signed-off-by: Lin Huang
Acked-by: Chanwoo Choi
---
Changes in v2:
- use clk_disable_unprepare and clk_enable_prepare
- remove clk_enable_prepare in probe
- remove rockchip_dfi_
rk3399 platform have dfi controller can monitor ddr load,
and dcf controller to handle ddr register so we can get the
right ddr frequency and make ddr controller happy work(which
will implement in bl31). So we do ddr frequency scaling with
following flow:
kernel
Signed-off-by: Lin Huang
---
Changes in v2:
- None
Changes in v1:
- None
include/dt-bindings/clock/rk3399-cru.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/clock/rk3399-cru.h
b/include/dt-bindings/clock/rk3399-cru.h
index 50a44cf..8a0f0442 100644
--- a/include/dt-b
On 06/06/16 13:08, Peter Ujfalusi wrote:
> On 06/06/16 12:44, Arnd Bergmann wrote:
>> On Monday, June 6, 2016 2:09:07 AM CEST Build bot for Mark Brown wrote:
>>> arm-allmodconfig : PASS, 0 errors, 2 warnings, 0 section mismatches
>>>
>>> Warnings:
>>> ../drivers/gpu/drm/omapdrm/dss/dsi.c:
when in ddr frequency scaling process, vop can not do
enable or disable operate, since dcf will base on vop vblank
time to do frequency scaling and need to get vop irq if there
have vop enabled. So need register to dmc notifier, and we can
get the dmc status.
Signed-off-by: Lin Huang
---
Changes
base on dfi result, we do ddr frequency scaling, register
dmc driver to devfreq framework, and use simple-ondemand
policy.
Signed-off-by: Lin Huang
---
Changes in v2:
- None
Changes in v1:
- move dfi controller to event
- fix set voltage sequence when set rate fail
- change Kconfig type from t
On Sun 2016-06-05 13:58:15, Paul Gortmaker wrote:
> While trying to convert a DMA driver from bool to tristate, we
> encountered the following:
>
> ERROR: "pm_clk_add_clk" [drivers/dma/tegra210-adma.ko] undefined!
> ERROR: "pm_clk_create" [drivers/dma/tegra210-adma.ko] undefined!
> ERROR: "pm_clk_
Am 2016-06-06 um 11:08 schrieb Daniel Baluta:
> On Fri, Jun 3, 2016 at 3:51 PM, Martin Kepplinger wrote:
>> NXP took over Freescale, so add NXP to the driver descriptions
>>
>
> Is it worth to bother with these kind of changes? The part number
> still remains the same.
I'm not sure either, that'
On Sun, Jun 05, 2016 at 07:00:21PM +0100, Sudip Mukherjee wrote:
> m32r allmodconfig build is failing with the error:
> ERROR: "bad_dma_ops" [sound/soc/atmel/snd-soc-atmel-pcm-pdc.ko] undefined!
>
> The code is using DMA but the related dependency is not mentioned in the
> Kconfig.
Rather than go
Enable the NFC and describe the NAND flash connected to this controller.
Signed-off-by: Aleksei Mamlin
---
arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts | 41 ++
1 file changed, 41 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts
b/arch/arm/boo
Add the full description of the Hynix H27UBG8T2BTR-BC NAND chip in the
nand_ids table so that we can later use the NAND ECC infos and ONFI timings
mode in controller drivers.
Signed-off-by: Aleksei Mamlin
---
drivers/mtd/nand/nand_ids.c | 4
1 file changed, 4 insertions(+)
diff --git a/dri
On Monday, June 6, 2016 6:40:59 PM CEST Masahiro Yamada wrote:
> 1/4: keep earlycon symbols only when CONFIG_SERIAL_EARLYCON is defined
> and the driver is built-in.
>
> 2/4 thru 4/4: driver clean-ups.
> (partially reverts build fixes by Arnd Bergmann)
>
>
>
Looks good to m
Enable the NFC and describe the NAND flash connected to this controller.
Signed-off-by: Aleksei Mamlin
---
arch/arm/boot/dts/sun4i-a10-marsboard.dts | 41 +++
1 file changed, 41 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10-marsboard.dts
b/arch/arm/boot/dts
An error was captured by the static checker. This patch fixes the issue.
introduced in:
Subject: ACPICA: ACPI 2.0, Interpreter: Fix MLC issues by switching to
new TermList grammar for table loading
Reported-by: Dan Carpenter
Signed-off-by: Lv Zheng
---
drivers/acpi/acpica/nsparse.c
From: Boris Brezillon
Add NAND Flash controller node definition to the A10 SoC.
Signed-off-by: Boris Brezillon
Signed-off-by: Aleksei Mamlin
---
arch/arm/boot/dts/sun4i-a10.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/d
From: Boris Brezillon
Define the NAND controller pin configs.
Signed-off-by: Boris Brezillon
Signed-off-by: Aleksei Mamlin
---
arch/arm/boot/dts/sun7i-a20.dtsi | 80
1 file changed, 80 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch
Hello,
This series adds the sunxi NAND Flash Controller nodes to dts.
The first 4 patches is Boris Brezillon's patches with dtsi changes.
The second 1 patch adds Hynix H27UBG8T2BTR-BC NAND chip definition.
The last 2 patches enables NAND on Marsboard A10 board and Wexler TAB7200
tablet.
Aleksei
On Monday, June 6, 2016 1:13:03 PM CEST Tomi Valkeinen wrote:
>
> >> 845cd86005ea [SUBMITTED 20160511] drm/omap: include linux/of.h where needed
>
> This one shouldn't be necessary, as there's d9e32ecda41b ("drm/omap: Fix
> missing includes").
>
Ok, I've dropped mine now, thanks for having a lo
On 06/06/16 11:41, Masahiro Yamada wrote:
The !defined(MODULE) conditional has been added to the
OF_EARLYCON_DECLARE() define.
This commit partially reverts commit 3f5921a60f74 ("serial:
8250/mediatek: fix building with SERIAL_8250=m").
Signed-off-by: Masahiro Yamada
---
Acked-by: Matthias
From: Boris Brezillon
Define the NAND controller pin configs.
Signed-off-by: Boris Brezillon
Signed-off-by: Aleksei Mamlin
---
arch/arm/boot/dts/sun4i-a10.dtsi | 80
1 file changed, 80 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch
From: Boris Brezillon
Add NAND Flash controller node definition to the A20 SoC.
Signed-off-by: Boris Brezillon
Signed-off-by: Aleksei Mamlin
---
arch/arm/boot/dts/sun7i-a20.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/d
On Mon, Jun 06, 2016 at 11:29:36AM +0200, Hendrik Brueckner wrote:
> > > Looks like perf_pmu_register does not like to be called twice (once for
> > > the counter
> > > and once for the sampling facility).
> >
> > Twice isn't the problem per se, its trying to register two PMUs for
> > perf_hw_co
On 06/06/2016 12:29 PM, Peter Zijlstra wrote:
> On Mon, Jun 06, 2016 at 11:29:36AM +0200, Hendrik Brueckner wrote:
>
Looks like perf_pmu_register does not like to be called twice (once for
the counter
and once for the sampling facility).
>>>
>>> Twice isn't the problem per se, its
'brightness' is usually an index into a table of duty_cycle values,
where the value at index 0 may well be non-zero
(tegra30-apalis-eval.dts and tegra30-colibri-eval-v3.dts are real-life
examples).
Thus brightness == 0 does not necessarily mean that the PWM output
will be inactive.
Check for 'duty_
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