Hi,
On Mon, May 02, 2016 at 12:59:48PM +0200, Arnd Bergmann wrote:
> The sun4i drm driver uses the clk-provider interfaces, which are not available
> when CONFIG_COMMON_CLK is disabled:
>
> drivers/gpu/drm/sun4i/sun4i_dotclock.c:19:16: error: field 'hw' has
> incomplete type
> struct clk_hw hw
Add register_rpmsg_driver helper macro that adds THIS_MODULE to
rpmsg_driver for the registering driver. We rename and modify
the existing register_rpmsg_driver to enable this.
Signed-off-by: Andrew F. Davis
---
drivers/rpmsg/virtio_rpmsg_bus.c | 8 +---
include/linux/rpmsg.h| 8
On Tue, May 03, 2016 at 05:23:28PM +0200, Arnd Bergmann wrote:
> The newly added sun4i drm driver prints a dma address using the %x
> format string, which cannot work when dma_addr_t is 64 bit,
> and gcc warns about this configuration:
>
> drm/sun4i/sun4i_backend.c: In function 'sun4i_backend_upda
On 4 May 2016 16:13:29 BST, "Andrew F. Davis" wrote:
>On 05/04/2016 05:02 AM, Jonathan Cameron wrote:
>> On 01/05/16 21:36, Andrew F. Davis wrote:
>>> Locking the two gain stages to the same setting adds no value for
>us,
>>> so initialize them as unlocked and remove the sysfs for unlocking
>the
On Wed, May 04, 2016 at 03:17:33PM +0200, Olliver Schinagl wrote:
> There are 3 kinds of OLinuXino Lime2 boards.
> One without any on board storage, one with NAND storage and one with
> eMMC storage. This patch adds the eMMC variant of boards.
>
> eMMC storage is different from a regular SD card i
Switch from dma_request_channel to allow passing dma channel
information from DT rather than hardcoding a value.
Also provide a handle to the GPMC's dev so it can be used to parse the DMA
channel information within the GPMC's DT node.
Performance Numbers via mtd_speedtest now that EDMA based pref
This patchset includes the required patches to enable NAND DMA prefetch
support when using the EDMA.
This patchset depends on my previous patchset to enable NAND DMA prefetch
using the SDMA and Roger's GPMC and NAND rework. Both of these patchsets
are apart of Boris' NAND next patch. Therefore, th
Add additional details to the GPMC NAND documentation to clarify
what is needed to enable NAND DMA prefetch.
Signed-off-by: Franklin S Cooper Jr
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt | 7 ++-
Documentation/devicetree/bindings/mtd/gpmc-n
This patch introduces the module_rpmsg_driver macro which is a
convenience macro for rpmsg driver modules similar to
module_platform_driver. It is intended to be used by drivers which
init/exit section does nothing but register/unregister the rpmsg driver.
By using this macro it is possible to elim
Hi,
On Wed, May 04, 2016 at 08:34:04AM -0500, Seth Forshee wrote:
> On Wed, May 04, 2016 at 01:21:46AM +0200, Djalal Harouni wrote:
> > This RFC tries to explore how to support filesystem operations inside
> > user namespace using only VFS and a per mount namespace solution. This
> > allows to tak
An rpmsg_driver does not need to set an owner, it will be populated by
the driver core.
Signed-off-by: Andrew F. Davis
---
Documentation/rpmsg.txt | 1 -
samples/rpmsg/rpmsg_client_sample.c | 1 -
2 files changed, 2 deletions(-)
diff --git a/Documentation/rpmsg.txt b/Documentation/r
On Wed, May 04, 2016 at 01:20:36PM -0500, David Lechner wrote:
> On 05/04/2016 01:10 PM, Bin Liu wrote:
> >Hi,
> >
> >On Thu, Apr 14, 2016 at 01:35:14PM -0500, David Lechner wrote:
> >>The initial use for this is for PHYs that have a mode related to USB OTG.
> >>There are several SoCs (e.g. TI OMAP
arch_pick_mmap_layout is only called by fs/exec.c which is always built into
kernel, it looks the EXPORT_SYMBOL_GPL is pointless and no architectures export
it other than ARM64.
Signed-off-by: Yang Shi
---
arch/arm64/mm/mmap.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm64/mm/mm
On 05/04, Eric W. Biederman wrote:
>
> Cc'd Oleg as he tends to be deeply involved with this class of locking.
>
> Mateusz Guzik writes:
>
> > proc_pid_limits takes ->sighand lock prior to accessing rlimits, but it
> > serves no purpose as it does not prevent modifications.
Well. I agree this all
On Thu, Apr 07, 2016 at 11:43:33AM +0200, Borislav Petkov wrote:
> I guess we can do something like this:
>
>if (likely(static_cpu_has(X86_FEATURE_POPCNT)))
>asm volatile(POPCNT32
> : "="REG_OUT (res)
> : REG_IN (w));
On Wed, May 4, 2016 at 8:17 AM, Bjorn Helgaas wrote:
>
> What mess do you mean? The fact that you could only use
> pcibios_bus_to_resource() for MEM, and something else for IO? Even
> if we could only use pcibios_bus_to_resource() for MEM, that sounds
> like an improvement, not a mess.
I means
From: Naveen Kaje
Hi Sricharan,
I tested these changes. They did not cause any regressions on QDF2432. Note
that QDF2432 does not use DMA mode.
I based my patches (http://marc.info/?l=linux-i2c&m=146231797008963&w=2 and
http://marc.info/?l=linux-i2c&m=146231798708969&w=2) on top of these fixes.
On 03/05/16 10:28, Dan Haab wrote:
> Luxul XAP-1510 is an AP device based on BCM4708 SoC. It uses flash
> memory connected to the SPI controller.
Looks fine, except one nit:
> diff --git a/arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts
> b/arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts
> new file mo
Hi Andrew,
On 05/04/2016 01:34 PM, Andrew F. Davis wrote:
> This patch introduces the module_rpmsg_driver macro which is a
> convenience macro for rpmsg driver modules similar to
> module_platform_driver. It is intended to be used by drivers which
> init/exit section does nothing but register/unre
On 05/04/2016 01:34 PM, Andrew F. Davis wrote:
> An rpmsg_driver does not need to set an owner, it will be populated by
> the driver core.
spi_drivers in patch subject??
regards
Suman
>
> Signed-off-by: Andrew F. Davis
> ---
> Documentation/rpmsg.txt | 1 -
> samples/rpmsg/rpmsg_c
On 05/04/2016 01:34 PM, Andrew F. Davis wrote:
> Add register_rpmsg_driver helper macro that adds THIS_MODULE to
> rpmsg_driver for the registering driver. We rename and modify
> the existing register_rpmsg_driver to enable this.
>
> Signed-off-by: Andrew F. Davis
With the multi-trace comment fr
On 05/04/2016 01:55 PM, Suman Anna wrote:
> On 05/04/2016 01:34 PM, Andrew F. Davis wrote:
>> An rpmsg_driver does not need to set an owner, it will be populated by
>> the driver core.
>
> spi_drivers in patch subject??
>
copy/paste error, this is all based on my SPI patches that do this same
th
Hi,
On Wed, May 04, 2016 at 04:49:50PM +0200, Yegor Yefremov wrote:
> On Tue, May 3, 2016 at 4:35 PM, Bin Liu wrote:
> > Hi,
> >
> > On Tue, May 03, 2016 at 04:25:58PM +0200, Yegor Yefremov wrote:
> >> On Tue, May 3, 2016 at 3:48 PM, Bin Liu wrote:
> >> > Hi,
> >> >
> >> > On Tue, May 03, 2016 a
On 05/04/2016 01:54 PM, Suman Anna wrote:
> Hi Andrew,
>
> On 05/04/2016 01:34 PM, Andrew F. Davis wrote:
>> This patch introduces the module_rpmsg_driver macro which is a
>> convenience macro for rpmsg driver modules similar to
>> module_platform_driver. It is intended to be used by drivers which
Hello.
On 05/04/2016 09:56 PM, Bin Liu wrote:
yes, it also works with that reset and go to finish:
diff --git a/drivers/usb/musb/musb_host.c b/drivers/usb/musb/musb_host.c
index c3d5fc9..8cd98e7 100644
--- a/drivers/usb/musb/musb_host.c
+++ b/drivers/usb/musb/musb_host.c
@@ -1599,6 +1599,10 @@
On 05/04/2016 01:44 PM, Luck, Tony wrote:
I've verified that the 'ce_count' is correctly incrementing with bad dimms.
Did you re-test on at least one of the previous 3 generations of CPUs supported
by this driver? All would be nice, but the bulk of the opportunities for
cut&paste
errors seem
On Wed, May 04, 2016 at 11:29:57AM -0700, H. Peter Anvin wrote:
>
> We don't care about UB, we care about gcc, and to a lesser extent
> LLVM and ICC. If bitops.h doesn't do the right thing, we need to
> fix bitops.h.
I'm going to suggest that we treat the ro[rl]{32,64}() question as
separable fr
CHANGES FROM RFCv4:
==
(https://lkml.org/lkml/2016/4/7/87)
* Removing the RFC since I think this is getting ready.
* Rebase to latest tip.git.
* Rename vm_deinit to vm_destroy.
* Replace svm_vcpu_avic_enabled() with kvm_vcpu_apicv_active().
* Fix the cluster logical APIC
From: Suravee Suthikulpanit
Rename kvm_apic_get_reg to kvm_lapic_get_reg to be consistent with
the existing kvm_lapic_set_reg counterpart.
Signed-off-by: Suravee Suthikulpanit
---
arch/x86/kvm/ioapic.c | 2 +-
arch/x86/kvm/lapic.c | 58 +--
arc
Adding function pointers in struct kvm_x86_ops for processor-specific
layer to provide hooks for when KVM initialize and destroy VM.
Signed-off-by: Suravee Suthikulpanit
---
arch/x86/include/asm/kvm_host.h | 3 +++
arch/x86/kvm/x86.c | 5 +
2 files changed, 8 insertions(+)
diff
Adding new function pointer in struct kvm_x86_ops, and calling them
from the kvm_arch_vcpu[blocking/unblocking].
Signed-off-by: Suravee Suthikulpanit
Reviewed-by: Paolo Bonzini
---
arch/x86/include/asm/kvm_host.h | 17 +++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --g
When enable AVIC:
* Do not intercept CR8 since this should be handled by AVIC HW.
* Also, we don't need to sync cr8/V_TPR and APIC backing page.
Signed-off-by: Suravee Suthikulpanit
---
arch/x86/kvm/svm.c | 16
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git
This patch introduces a new mechanism to inject interrupt using AVIC.
Since VINTR is not supported when enable AVIC, we need to inject
interrupt via APIC backing page instead.
This patch also adds support for AVIC doorbell, which is used by
KVM to signal a running vcpu to check IRR for injected in
From: Suravee Suthikulpanit
When a vcpu is loaded/unloaded to a physical core, we need to update
host physical APIC ID information in the Physical APIC-ID table
accordingly.
Also, when vCPU is blocking/un-blocking (due to halt instruction),
we need to make sure that the is-running bit in set acc
From: Radim Krčmář
AVIC has a use for kvm_vcpu_wake_up.
Signed-off-by: Radim Krčmář
Tested-by: Suravee Suthikulpanit
Reviewed-by: Paolo Bonzini
---
include/linux/kvm_host.h | 1 +
virt/kvm/kvm_main.c | 19 +--
2 files changed, 14 insertions(+), 6 deletions(-)
diff --gi
Adding kvm_x86_ops hooks to allow APICv to do post state restore.
This is required to support VM save and restore feature.
Signed-off-by: Suravee Suthikulpanit
---
arch/x86/include/asm/kvm_host.h | 1 +
arch/x86/kvm/lapic.c| 2 ++
arch/x86/kvm/svm.c | 10 ++
3
From: Suravee Suthikulpanit
Since AVIC only virtualizes xAPIC hardware for the guest, this patch
disable x2APIC support in guest CPUID.
Signed-off-by: Suravee Suthikulpanit
---
arch/x86/kvm/svm.c | 12
1 file changed, 12 insertions(+)
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kv
Exporting LAPIC utility functions and macros for re-use in SVM code.
Signed-off-by: Suravee Suthikulpanit
Reviewed-by: Radim Krčmář
---
arch/x86/kvm/lapic.c | 127 +--
arch/x86/kvm/lapic.h | 29
2 files changed, 82 insertions(+), 74
From: Suravee Suthikulpanit
This patch introduces VMEXIT handlers, avic_incomplete_ipi_interception()
and avic_unaccelerated_access_interception() along with two trace points
(trace_kvm_avic_incomplete_ipi and trace_kvm_avic_unaccelerated_access).
Signed-off-by: Suravee Suthikulpanit
---
arch/
Introduce new AVIC VMCB registers.
Signed-off-by: Suravee Suthikulpanit
Reviewed-by: Paolo Bonzini
---
arch/x86/include/asm/svm.h | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/svm.h b/arch/x86/include/asm/svm.h
index 6136d99..4711fa4 100644
--
This patch introduces AVIC-related data structure, and AVIC
initialization code.
There are three main data structures for AVIC:
* Virtual APIC (vAPIC) backing page (per-VCPU)
* Physical APIC ID table (per-VM)
* Logical APIC ID table (per-VM)
Currently, AVIC is disabled by default. Use
Hi,
On Wed, May 04, 2016 at 10:02:16PM +0300, Sergei Shtylyov wrote:
> Hello.
>
> On 05/04/2016 09:56 PM, Bin Liu wrote:
>
> yes, it also works with that reset and go to finish:
>
> diff --git a/drivers/usb/musb/musb_host.c
> b/drivers/usb/musb/musb_host.c
> >>>
138295373ccf ("ftrace: mmiotrace update, #2") added this use of
pci_resource_to_user():
+static int mmio_print_pcidev(struct trace_seq *s, const struct pci_dev *dev)
+{
...
+ /*
+* XXX: is pci_resource_to_user() appropriate, since we are
+* supposed to interpret t
On Wed, May 04, 2016 at 03:47:29PM +0200, Peter Zijlstra wrote:
> Traditionally kmap_atomic() disables preemption; and the reason is that
> the returned pointer must stay valid. This had a side effect in that it
> also disabled pagefaults.
A lowmem page should never change its page_address(), so t
://svtronics.com/5432
Reported-by: Tony Lindgren
Signed-off-by: Nishanth Menon
---
Based on next-20160504
This should fix regression reported for mmcsd such as that seen in:
https://storage.kernelci.org/next/next-20160504/arm-omap2plus_defconfig/lab-baylibre-seattle/boot-omap5-uevm_rootfs:mmc.txt
http
On Thu 05-05-16 00:14:51, Joonsoo Kim wrote:
> 2016-05-04 18:04 GMT+09:00 Michal Hocko :
> > On Wed 04-05-16 15:27:48, Joonsoo Kim wrote:
> >> On Wed, Apr 20, 2016 at 03:47:27PM -0400, Michal Hocko wrote:
> > [...]
> >> > +bool compaction_zonelist_suitable(struct alloc_context *ac, int order,
> >>
On Wed, May 4, 2016 at 5:10 PM, Prarit Bhargava wrote:
>
>
> On 05/04/2016 01:48 AM, Lv Zheng wrote:
>> From: Prarit Bhargava
>>
>> ACPICA commit 7a3bd2d962f221809f25ddb826c9e551b916eb25
>>
>> Set the mutex owner thread ID.
>> Original patch from: Prarit Bhargava
>>
>> Link: https://github.com/a
Hi,
This is a call for presentations for the Tracing Summit which will be
held in Berlin, Germany, on October 12th, 2016, at the Maritim Hotel
Berlin. This event is co-located with Embedded Linux Conference 2016.
The Tracing Summit is organized by the Linux Foundation Diagnostic and
Monitoring Wo
On Thursday 28 April 2016 16:06:42 Douglas Anderson wrote:
> This series picks patches from various different places to produce what
> I consider the best solution to getting consistent mmc and mmcblk
> ordering.
>
> Why consistent ordering and why not just use UUIDs? IMHO consistent
> ordering s
On a system with a 4 socket (NUMA) system where a large number of
application threads were all trying to read from /dev/urandom, this
can result in the system spending 80% of its time contending on the
global urandom spinlock. The application should have used its own
PRNG, but let's try to help it
The CRNG is faster, and we don't pretend to track entropy usage in the
CRNG any more.
Signed-off-by: Theodore Ts'o
---
crypto/chacha20_generic.c | 61 --
drivers/char/random.c | 283 +++---
include/crypto/chacha20.h | 1 +
lib/Makefile
From: Stephan Mueller
The Hyper-V Linux Integration Services use the VMBus implementation for
communication with the Hypervisor. VMBus registers its own interrupt
handler that completely bypasses the common Linux interrupt handling.
This implies that the interrupt entropy collector is not trigger
By using a CRNG to replace the urandom pool, we address a number of
complaints which Stephan Mueller has been concerned about. We now use
a much more aggressive interrupt sampling system to quickly initialize
a CRNG which gets used in place of the original non-blocking pool.
This tends to get init
Signed-off-by: Theodore Ts'o
---
drivers/char/random.c | 35 +--
1 file changed, 33 insertions(+), 2 deletions(-)
diff --git a/drivers/char/random.c b/drivers/char/random.c
index 897c75e..028d085 100644
--- a/drivers/char/random.c
+++ b/drivers/char/random.c
@@ -8
struct timespec is not y2038 safe.
Even though timespec might be sufficient to represent
timeouts, use struct timespec64 here as the plan is to
get rid of all timespec reference in the kernel.
The patch transitions the common functions:
poll_select_set_timeout() and select_estimate_accuracy()
to u
Hi
On 2016-05-04, Linus Torvalds wrote:
> On Tue, May 3, 2016 at 9:39 PM, Stefan Lippers-Hollmann wrote:
> >
> > Just as a cross-check, this (incomplete, but au0828, cx231xx and em28xx
> > aren't needed/ loaded on my system) crude revert avoids the problem for
> > me on v4.6-rc6-113-g83858a7.
>
When check for capabilities recognize slave support by eother DMA_SLAVE or
DMA_CYCLIC bit set. If we don't do that the user can't get a normally worked
DMA support for engines that doesn't have one of the mentioned bits set.
Signed-off-by: Andy Shevchenko
---
drivers/dma/dmaengine.c | 4 ++--
1
There are two patches, first of which is an urgent fix to prevent a regression
when UART driver can't acquire DMA channel due to DMA engine which doesn't
support DMA_CYCLIC.
Andy Shevchenko (2):
dmaengine: slave means at least one of DMA_SLAVE, DMA_CYCLIC
dmaengine: rename cmd_pause to cmd_sus
Rename cmd_pause to cmd_suspend to be clear that latter capability reflects
pause AND resume.
Signed-off-by: Andy Shevchenko
---
drivers/dma/dmaengine.c | 4 ++--
drivers/tty/serial/8250/8250_dma.c| 2 +-
include/linux/dmaengine.h | 4 ++--
sound/soc/soc-generic-dma
On Wed, May 4, 2016 at 2:46 PM, Borislav Petkov wrote:
> On Thu, Apr 07, 2016 at 11:43:33AM +0200, Borislav Petkov wrote:
>> I guess we can do something like this:
>>
>>if (likely(static_cpu_has(X86_FEATURE_POPCNT)))
>>asm volatile(POPCNT32
>> :
On 05/04/2016 12:31 PM, Brian Gerst wrote:
>>
>> - asm (ALTERNATIVE("call __sw_hweight32", POPCNT32, X86_FEATURE_POPCNT)
>> -: "="REG_OUT (res)
>> -: REG_IN (w));
>> + if (likely(static_cpu_has(X86_FEATURE_POPCNT))) {
>> + asm volati
On Wed, 4 May 2016 14:17:13 -0500
Bjorn Helgaas wrote:
> 138295373ccf ("ftrace: mmiotrace update, #2") added this use of
> pci_resource_to_user():
>
> +static int mmio_print_pcidev(struct trace_seq *s, const struct pci_dev
> *dev)
> +{
> ...
> + /*
> +* XXX: is pci_resou
On 03/05/16 02:57, Arnd Bergmann wrote:
>> +static const struct pcie_cfg_data generic_cfg = {
>> +.offsets= pcie_offsets,
>> +.type = GENERIC,
>> +};
>
> The way you access the config space here seems very indirect. I'd
> suggest instead writing two sets of pci_ops, with
On Thu 05-05-16 00:30:35, Joonsoo Kim wrote:
> 2016-05-04 18:21 GMT+09:00 Michal Hocko :
[...]
> > Do we really consume 512B of stack during reclaim. That sounds more than
> > worrying to me.
>
> Hmm...I checked it by ./script/stackusage and result is as below.
>
> shrink_zone() 128
> shrink_zone
On Wed, May 04, 2016 at 12:33:24PM -0700, H. Peter Anvin wrote:
> Most likely not. It would be nice to have some more uniform solution to
> that. I'm wondering if we could use the -Wa option to load some kind of
> macro package.
Lemme try out some old compilers first, I'm guessing 3.2 won't know
On Thu 05-05-16 00:45:45, Joonsoo Kim wrote:
> 2016-05-05 0:30 GMT+09:00 Joonsoo Kim :
> > 2016-05-04 18:21 GMT+09:00 Michal Hocko :
> >> On Wed 04-05-16 11:14:50, Joonsoo Kim wrote:
> >>> On Tue, May 03, 2016 at 10:53:56AM +0200, Michal Hocko wrote:
> >>> > On Tue 03-05-16 14:23:04, Joonsoo Kim wr
On Thu 02-05-16 03:00:00, Michal Hocko wrote:
> So I have given this a try (not tested yet) and it doesn't look terribly
> complicated. It is hijacking vmstat for a purpose it wasn't intended for
> originally but creating a dedicated kenrnel threads/WQ sounds like an
> overkill to me. Does this hel
On Wed, May 04, 2016 at 03:09:27PM +0200, Krzysztof Hałasa wrote:
> Bjorn Helgaas writes:
>
> > It looks like 498a92d42596 merely fixed a warning, at the expense of
> > breaking DMA on Cavium. Reverting it would bring the warning back, but
> > that's better than broken DMA.
>
> Perhaps we shoul
When driver unbinds while media_ioctl is in progress, cdev_put() fails with
when app exits after driver unbinds.
Add devnode struct device kobj as the cdev parent kobject. cdev_add() gets
a reference to it and releases it in cdev_del() ensuring that the devnode
is not deallocated as long as the ap
On 05/04/2016 01:39 PM, Bin Liu wrote:
Have you already tested this? I never tried changing mode via sysfs, but
by quickly reviewing the code, I am wondering how it works. the core
only calls ops->set_mode() but nothing else. To really switch the mode,
the driver has to talk to the root hub, and
On Wed 04-05-16 10:13:06, Tim Chen wrote:
> On Wed, 2016-05-04 at 14:45 +0200, Michal Hocko wrote:
> > On Tue 03-05-16 14:00:39, Tim Chen wrote:
> > [...]
> > >
> > > include/linux/swap.h | 29 ++-
> > > mm/swap_state.c | 253 +-
> > > mm/swapfile.c| 215
On 05/04/2016 12:41 PM, Borislav Petkov wrote:
> On Wed, May 04, 2016 at 12:33:24PM -0700, H. Peter Anvin wrote:
>> Most likely not. It would be nice to have some more uniform solution to
>> that. I'm wondering if we could use the -Wa option to load some kind of
>> macro package.
>
> Lemme try o
On 05/04/2016 02:20 PM, Nishanth Menon wrote:
[...]
> @@ -551,6 +590,8 @@
>
> ldo9_reg: ldo9 {
> /* VCC_DV_SDIO: vdds_sdcard */
> + vin-supply = <&vmmcsdio_fixed>;
> +
There is an extra white
On Wednesday 04 May 2016 12:36:17 Florian Fainelli wrote:
> On 03/05/16 02:57, Arnd Bergmann wrote:
> >> +static const struct pcie_cfg_data generic_cfg = {
> >> + .offsets= pcie_offsets,
> >> + .type = GENERIC,
> >> +};
> >
> > The way you access the config space here seems ver
On Wed, May 4, 2016 at 12:24 PM, Deepa Dinamani wrote:
> struct timespec is not y2038 safe.
> Even though timespec might be sufficient to represent
> timeouts, use struct timespec64 here as the plan is to
> get rid of all timespec reference in the kernel.
>
> The patch transitions the common funct
On 04/05/16 12:56, Arnd Bergmann wrote:
> On Wednesday 04 May 2016 12:36:17 Florian Fainelli wrote:
>> On 03/05/16 02:57, Arnd Bergmann wrote:
+static const struct pcie_cfg_data generic_cfg = {
+ .offsets= pcie_offsets,
+ .type = GENERIC,
+};
>>>
>>> The way
> >> I missed that Alexander already landed patches that reduce header size
> >> to 16 bytes.
> >> It is not OK to increase them again. Please leave state as bitfield
> >> and update it with CAS (if we introduce helper functions for state
> >> manipulation, they will hide the CAS loop, which is nic
> I verified that at least the memory sizes, ie the 'size_mb' files
> are correct on the old h/w. I don't have bad dimms atm to test
> the old h/w error paths though. That said this driver does get a
> lot indirect testing here (just from being loaded), - so I would
> likely find out if there were
Instead of checking for i2c parent adapters for every lock/unlock, simply
override the locking for muxes to always lock/unlock the parent adapter
directly.
Signed-off-by: Peter Rosin
---
drivers/i2c/i2c-core.c | 21 +++--
drivers/i2c/i2c-mux.c | 30 ++
Signed-off-by: Peter Rosin
---
Documentation/i2c/i2c-topology | 370 +
MAINTAINERS| 1 +
2 files changed, 371 insertions(+)
create mode 100644 Documentation/i2c/i2c-topology
diff --git a/Documentation/i2c/i2c-topology b/Documentation
Tested-by: Antti Palosaari
Reviewed-by: Antti Palosaari
Signed-off-by: Peter Rosin
---
drivers/media/dvb-frontends/rtl2832.c | 30 --
drivers/media/dvb-frontends/rtl2832_priv.h | 1 -
2 files changed, 31 deletions(-)
diff --git a/drivers/media/dvb-frontends/rt
Tested-by: Antti Palosaari
Reviewed-by: Antti Palosaari
Signed-off-by: Peter Rosin
---
drivers/media/dvb-frontends/rtl2832_sdr.c | 302 +-
1 file changed, 132 insertions(+), 170 deletions(-)
diff --git a/drivers/media/dvb-frontends/rtl2832_sdr.c
b/drivers/media/dvb
The root i2c adapter lock is then no longer held by the i2c mux during
accesses behind the i2c gate, and such accesses need to take that lock
just like any other ordinary i2c accesses do.
So, declare the i2c gate mux-locked, and zap the regmap overrides
that makes the i2c accesses unlocked and use
From: Antti Palosaari
The root i2c adapter lock is then no longer held by the i2c mux during
accesses behind the i2c gate, and such accesses need to take that lock
just like any other ordinary i2c accesses do.
So, declare the i2c gate mux-locked, and zap the code that makes the
i2c accesses unlo
On Wed, May 04, 2016 at 07:22:54PM +0200, Philipp Zabel wrote:
> Hi Thierry,
>
> Am Mittwoch, den 04.05.2016, 16:40 +0200 schrieb Thierry Reding:
> > From: Thierry Reding
> >
> > Starting with commit 0b52297f2288 ("reset: Add support for shared reset
> > controls") there is a reference count for
On Wed, May 04, 2016 at 02:17:15PM -0500, Bin Liu wrote:
> Hi,
>
> On Wed, May 04, 2016 at 10:02:16PM +0300, Sergei Shtylyov wrote:
> > Hello.
> >
> > On 05/04/2016 09:56 PM, Bin Liu wrote:
> >
> > yes, it also works with that reset and go to finish:
> >
> > diff --git a
The root i2c adapter lock is then no longer held by the i2c mux during
accesses behind the i2c gate, and such accesses need to take that lock
just like any other ordinary i2c accesses do.
So, declare the i2c gate mux-locked, and zap the code that makes the
unlocked i2c accesses and just use ordina
On 05/04/2016 12:41 PM, Odzioba, Lukasz wrote:
> Do you see any advantages of dropping THP from pagevecs over this solution?
It's a more foolproof solution. Even with this patch, there might still
be some corner cases where the draining doesn't occur. That "two
minutes" might be come 20 or 200 u
With a i2c topology like the following
GPIO ---| -- BAT1
| v /
I2C -+--+ MUX
| \
EEPROM -- BAT2
there is a locking problem with the GPIO controller since it i
I understand how reading /proc or /sys can be a bottleneck, but this
proposed method using a system call is the wrong way to do this.
Why not use netlink like other systems do which allows a message
based response which allows for future changes (no fixed datastructures),
and is message based.
Ge
Add i2c_lock_bus() and i2c_unlock_bus(), which call the new lock_bus and
unlock_bus ops in the adapter. These funcs/ops take an additional flags
argument that indicates for what purpose the adapter is locked.
There are two flags, I2C_LOCK_ROOT_ADAPTER and I2C_LOCK_SEGMENT, but they
are both implem
On Wed, May 04, 2016 at 12:49:17PM -0700, H. Peter Anvin wrote:
> Sigh. Doesn't look like -Wa is going to help due to the lack of the
> equivalent of an -include option in gas.
So much for the register "freedom" - I'll resurrect the hardcoded insn
bytes. :-\
Unless my gcc friends have some other
From: Kangjie Lu
Date: Tue, 3 May 2016 16:46:24 -0400
> The stack object “map” has a total size of 32 bytes. Its last 4
> bytes are padding generated by compiler. These padding bytes are
> not initialized and sent out via “nla_put”.
>
> Signed-off-by: Kangjie Lu
Applied.
From: Kangjie Lu
Date: Tue, 3 May 2016 16:35:05 -0400
> The stack object “info” has a total size of 12 bytes. Its last byte
> is padding which is not initialized and leaked via “put_cmsg”.
>
> Signed-off-by: Kangjie Lu
Applied.
Hi!
I have a pair of boards with this i2c topology:
GPIO ---| -- BAT1
| v /
I2C -+--B---+ MUX
| \
EEPROM -- BAT2
(B denotes the boundary between the boar
The CM109 driver reported key press events of volume up / down and
record / playback mute buttons, but no release events. Report those events
properly by handling volume and mute keys seperately. For the record and
playback mute buttons, only presses are registered by the CM109, therefore
simulate
On Wed, May 04, 2016 at 11:23:20AM -0600, Stephen Warren wrote:
> On 05/04/2016 08:40 AM, Thierry Reding wrote:
> > From: Thierry Reding
> >
> > Starting with commit 0b52297f2288 ("reset: Add support for shared reset
> > controls") there is a reference count for reset control assertions. The
> >
Am Mittwoch, 4. Mai 2016, 15:25:48 schrieb Theodore Ts'o:
Hi Theodore,
> The CRNG is faster, and we don't pretend to track entropy usage in the
> CRNG any more.
>
> Signed-off-by: Theodore Ts'o
> ---
> crypto/chacha20_generic.c | 61 --
> drivers/char/random.c | 283
>
On Wed, May 04, 2016 at 11:14:50AM -0600, Stephen Warren wrote:
> On 05/04/2016 08:39 AM, Thierry Reding wrote:
> > From: Thierry Reding
> >
> > There are three EHCI controllers on Tegra SoCs, each with its own reset
> > line. However, the first controller contains a set of UTMI configuration
> >
> -Original Message-
> From: rjwyso...@gmail.com [mailto:rjwyso...@gmail.com] On Behalf Of
> Rafael J. Wysocki
> Sent: Wednesday, May 4, 2016 2:23 PM
> To: Prarit Bhargava
> Cc: Lv Zheng ; Rafael J. Wysocki
> ; Rafael J. Wysocki ; Len
> Brown ; Lv Zheng ; Linux
> Kernel Mailing List ; ACPI
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