Re: [PATCH v3 2/2] cgroup: allow management of subtrees by new cgroup namespaces

However, I agree with James that this patchset isn't ideal (it was my first rough attempt). I think I'll get to work on properly virtualising /sys/fs/cgroup, which will allow for a new cgroup namespace to modify subtrees (but without allowing for cgroup escape) -- by pinning what pid namespace the

Re: [PATCH v7 16/24] i2c: allow adapter drivers to override the adapter locking

Hi! On 2016-05-03 23:38, Wolfram Sang wrote: > On Wed, Apr 20, 2016 at 05:17:56PM +0200, Peter Rosin wrote: >> Add i2c_lock_bus() and i2c_unlock_bus(), which call the new lock_bus and >> unlock_bus ops in the adapter. These funcs/ops take an additional flags >> argument that indicates for what pur

Re: [PATCH v3 09/11] serial: 8250_lpss: move Quark code from PCI driver

On Wed, May 4, 2016 at 12:51 PM, Bryan O'Donoghue wrote: > On Wed, 2016-05-04 at 12:42 +0300, Andy Shevchenko wrote: >> On Wed, May 4, 2016 at 12:31 PM, Bryan O'Donoghue >> wrote: >> > Andy, >> > >> > If you are going to start removing working PCI devices from the PCI >> > config table in favour

Re: [PATCH] rtc: rv3029: hide unused i2c device table

On 04/05/2016 at 11:50:02 +0200, Arnd Bergmann wrote : > The added support for SPI mode made it possible to configure the driver > when I2C is disabled, leaving an unused device table: > > drivers/rtc/rtc-rv3029c2.c:794:29: error: 'rv3029_id' defined but not used > [-Werror=unused-variable] > >

Re: [RFC PATCH 0/0] VFS:userns: support portable root filesystems

Hi Josh, Thanks for the reply! I'll resend this RFC soon, as it seems that I receive from mailing lists but can't send... probably some filters... my domain was dead for a short period... On Tue, May 03, 2016 at 05:41:07PM -0700, Josh Triplett wrote: > On Wed, May 04, 2016 at 01:21:46AM +0200, Dj

Re: [PATCH 2/3] x86/sysfb_efi: Fix valid BAR address range check

* Matt Fleming wrote: > On Wed, 04 May, at 08:35:24AM, Ingo Molnar wrote: > > > > * Matt Fleming wrote: > > > > > From: Wang YanQing > > > > > > We can't just break out when meet start is equal to zero, > > > > Hm, wot? > > The existing code treats address 0x0 as invalid for a PCI BAR ran

Re: [PATCH v7 2/2] memory: atmel-ebi: add DT bindings documentation

2016-05-03 21:11 GMT+02:00 Rob Herring : > On Tue, May 3, 2016 at 11:51 AM, Boris Brezillon > wrote: >> Hi Rob, >> >> On Tue, 3 May 2016 11:40:19 -0500 >> Rob Herring wrote: >> >>> On Thu, Apr 28, 2016 at 02:03:27PM +0200, Boris Brezillon wrote: >>> > The EBI (External Bus Interface) is used to a

Re: [PATCH 2/3] x86/sysfb_efi: Fix valid BAR address range check

On Wed, 04 May, at 12:23:40PM, Ingo Molnar wrote: > > * Matt Fleming wrote: > > > On Wed, 04 May, at 08:35:24AM, Ingo Molnar wrote: > > > > > > * Matt Fleming wrote: > > > > > > > From: Wang YanQing > > > > > > > > We can't just break out when meet start is equal to zero, > > > > > > Hm, w

[PATCH] rtc:add support for maxim rtc max6916

From: venkat-prashanth This is a patch to add support for maxim rtc max6916 Signed-off-by:Venkat Prashanth B U --- Kconfig | 9 Makefile | 6 +++ rtc-max6916.c | 133 ++ 3 files changed, 148 insertions(+) create mode 1

Re: [PATCH] fix infoleak in mm

On Tue, May 03, 2016 at 04:36:08PM -0400, Kangjie Lu wrote: > The stack object “si” has a total size of 128; however, only 20 > bytes are initialized. The remaining uninitialized bytes are sent > to userland via send_signal > > Signed-off-by: Kangjie Lu > --- > arch/arm64/mm/fault.c | 1 + > 1 f

RE:high speed fully automatic flatbed die cutting machine and rotary die cutting tools/rotary die cutting system

Hello, friends This is SKM MACHINE CO.,LTD is a professional manufacturer which specialized in high speed fully automatic flatbed die cutting machine and rotary die cutting tools/rotary die cutting system.SKM is mainly engaged in R&D,manufacturing,marketing and customer service in die cutting a

Re: [BUG] x86/efi: MMRs no longer properly mapped after switch to isolated page table

On Tue, May 03, 2016 at 01:47:51PM -0500, Alex Thorlton wrote: > I think this will work for us, for the most part. Only issue is that > the efi_call_virt macro is only accessible from inside > runtime-wrappers.c. If we could pull that macro (and whatever else it > needs) up to the header file, I

Re: sched: tweak select_idle_sibling to look for idle threads

On Tue, May 03, 2016 at 11:11:53AM -0400, Chris Mason wrote: > > + if (cpu_rq(cpu)->cfs.nr_running > 1) > > + return 1; > > The nr_running check is interesting. It is supposed to give the same > benefit as your "do we have anything idle?" variable, but without having > to con

kmap_atomic and preemption

Hi, I was staring at some recent ARC highmem crashes and see that kmap_atomic() disables preemption even when page is in lowmem and call returns right away. This seems to be true for other arches as well. arch/arc/mm/highmem.c: void *kmap_atomic(struct page *page) { int idx, cpu_idx;

Re: [PATCH] infoleak fix1 in signal

On 05/03, Kangjie Lu wrote: > > The stack object “info” has a total size of 128 bytes; however, > only 28 bytes are initialized. The remaining uninitialized bytes > are sent to userland via send_signal. Not really, please see copy_siginfo_to_user(), case(__SI_CHLD). All members copied to user-spac

Re: [PATCH] usb: gadget: f_fs: Fix kernel panic for SuperSpeed

Hi, Jim Lin writes: >>> In f_fs.c >>> " >>> static int __ffs_data_do_os_desc(enum ffs_os_desc_type type, >>>struct usb_os_desc_header *h, void *data, >>>unsigned len, void *priv) >>> { >>> struct ffs_data *ffs = priv; >>> u8 length; >>> >>>

Re: [PATCH] infoleak fix2 in signal

On 05/03, Kangjie Lu wrote: > > The stack object “info” has a total size of 128 bytes; however, > only 32 bytes are initialized. The remaining uninitialized bytes > are sent to userland via send_signal. The same, afaics. We do not send the uninitialized bytes to userland. Oleg.

[PATCH] coresight: Handle build path error

Enabling a component via sysfs (echo 1 > enable_source), would trigger building a path from the enabled sources to the sink. If there is an error in the process (e.g, sink not enabled or the device (CPU corresponding to ETM) is not online), we never report failure, except for leaving a message in t

Re: [PATCH] usb: dwc3: usb/dwc3: fake dissconnect event when turn off pullup

Hi, John Youn writes: >> John Youn writes: "Du, Changbin" writes: > Hi, Balbi, > > The step to reproduce this issue is: > 1) connect device to a host and wait its enumeration. > 2) trigger software disconnect by calling function > usb_gadget_disconnect(), which

Re: [PATCH v3] sunxi-irq: Fix Kconfig dependency on GENERIC_IRQ_CHIP

Hi Maxime, On 02/05/16 07:48, Maxime Ripard wrote: > Hi, > > On Mon, Apr 25, 2016 at 02:04:52AM +0100, Andre Przywara wrote: >> The Allwinner NMI irqchip driver requires GENERIC_IRQ_CHIP, but >> we can't select it directly, because there is no specific Kconfig entry >> for the driver. Compiling t

Re: [PATCH] usb: xhci-mtk: fixup mouse wakeup failure during system suspend

Hi, On Wed, 2016-05-04 at 11:03 +0300, Felipe Balbi wrote: > Hi, > > chunfeng yun writes: > > On Tue, 2016-05-03 at 12:33 +0300, Felipe Balbi wrote: > >> Hi, > >> > >> chunfeng yun writes: > >> >> chunfeng yun writes: > >> >> > On Thu, 2016-04-21 at 10:04 +0800, Chunfeng Yun wrote: > >> >> >>

Re: [PATCH v3 09/11] serial: 8250_lpss: move Quark code from PCI driver

On Wed, 2016-05-04 at 13:03 +0300, Andy Shevchenko wrote: > On Wed, May 4, 2016 at 12:51 PM, Bryan O'Donoghue > wrote: > > On Wed, 2016-05-04 at 12:42 +0300, Andy Shevchenko wrote: > > > On Wed, May 4, 2016 at 12:31 PM, Bryan O'Donoghue > > > wrote: > > > > Andy, > > > > > > > > If you are going

Re: [PATCH v3 2/2] nvmem: mxs-ocotp: remove nvmem regmap dependency

Am 02.05.2016 um 20:36 schrieb Srinivas Kandagatla: > Regmap raw accessors are bus specific implementations, using regmap raw > apis in nvmem breaks nvmem providers based on regmap mmio. > This patch moves to nvmem support in the driver to use callback > instead of regmap, which is what the nvmem c

Re: [PATCH v2] lib/mpi: Fix kernel unaligned access in mpi_write_to_sgl

On (05/04/16 10:32), Herbert Xu wrote: > > Please base it on cryptodev. > Looks like this got fixed in cryptodev by commit cece762f6f3c ("lib/mpi: mpi_write_sgl(): fix out-of-bounds stack access") Thanks, --Sowmini

Re: [PATCH 0/6] Intel Secure Guard Extensions

Hi! > Good morning, I hope everyone's day is starting out well. :-). Rainy day here. > > > In the TL;DR department I would highly recommend that anyone > > > interested in all of this read MIT's 170+ page review of the > > > technology before jumping to any conclusions :-) > > > Would you h

Re: [PATCH v3] mmc: sdhci-of-arasan: fix set_clock when a phy is supported

On 4 May 2016 at 03:43, Shawn Lin wrote: > commit 61b914eb81f8 ("mmc: sdhci-of-arasan: add phy support for > sdhci-of-arasan") introduce phy support for arasan. According to > the vendor's databook, we should make sure the phy is in poweroff > status before we configure the clk stuff. Otherwise it

Re: [PATCH v2] mmc: sdhci-of-arasan: fix set_clock when a phy is supported

On 4 May 2016 at 11:24, Shawn Lin wrote: > 在 2016/5/4 16:35, Heiko Stuebner 写道: >> >> Am Mittwoch, 4. Mai 2016, 09:48:55 schrieb Shawn Lin: >>> >>> 在 2016/4/28 18:38, Ulf Hansson 写道: On 28 April 2016 at 10:38, Shawn Lin wrote: > > commit 61b914eb81f8 ("mmc: sdhci-of-arasan: add

Re: [PATCH v2] mmc: omap: Use dma_request_chan() for requesting DMA channel

On 4 May 2016 at 10:23, Peter Ujfalusi wrote: > With the new dma_request_chan() the client driver does not need to look for > the DMA resource and it does not need to pass filter_fn anymore. > By switching to the new API the driver can now support deferred probing > against DMA. > > Signed-off-by:

[PATCH] reset: allow to pass NULL pointer to reset_control_put()

Currently, reset_control_put() just returns for error pointer, but not for NULL pointer. This is not reasonable. Passing NULL pointer should be allowed as well to make failure path handling easier. Signed-off-by: Masahiro Yamada --- drivers/reset/core.c | 2 +- 1 file changed, 1 insertion(+),

[PATCH 5/5] ia64/unaligned: Silence another GCC warning about an uninitialised variable

arch/ia64/kernel/unaligned.c: In function 'ia64_handle_unaligned': arch/ia64/kernel/unaligned.c:1385:16: warning: 'u.l' may be used uninitialized in this function [-Wmaybe-uninitialized] opcode = (u.l >> IA64_OPCODE_SHIFT) & IA64_OPCODE_MASK; ^ Signed-off-by: Matt Fleming

[PATCH 4/5] ia64/traps: Silence GCC warning about uninitialised variable

arch/ia64/kernel/traps.c: In function 'ia64_fault': arch/ia64/kernel/traps.c:433:17: warning: 'siginfo.si_code' may be used uninitialized in this function [-Wmaybe-uninitialized] struct siginfo siginfo; Cc: Tony Luck Cc: Fenghua Yu Cc: Bjorn Helgaas Signed-off-by: Matt Fleming --- ar

[PATCH 0/5] ia64: Fix compiler warnings

I routinely build ia64 kernels when merging EFI patches and for a while now I've seen a bunch of warnings from GCC. These patches silence those warnings, with the first patch fixing an actual bug but the rest just making GCC happier. NOTE: None of these patches have been runtime tested. Matt Fle

[PATCH 2/5] ia64/PCI: Remove unused 'addr' and fix build warning

Ever since commit 240504adaf07 ("ia64/PCI: Keep CPU physical (not virtual) addresses in shadow ROM resource") 'addr' has been unused, resulting in the following compiler warning, arch/ia64/sn/kernel/io_acpi_init.c: In function 'sn_acpi_slot_fixup': arch/ia64/sn/kernel/io_acpi_init.c:429:16: wa

[PATCH 3/5] ia64: Reduce stack usage by iterating over nodemask

GCC complains about sn2_global_tlb_purge() because of the large stack required by the function, arch/ia64/sn/kernel/sn2/sn2_smp.c: In function 'sn2_global_tlb_purge': arch/ia64/sn/kernel/sn2/sn2_smp.c:319:1: warning: the frame size of 2176 bytes is larger than 2048 bytes [-Wframe-larger-than=

[PATCH 1/5] ia64/PCI: Fix incorrect PCI resource end address

commit f976721e826e ("ia64/PCI: Use ioremap() instead of open-coded equivalent") introduced the following compiler warning, arch/ia64/sn/kernel/io_init.c: In function 'sn_io_slot_fixup': arch/ia64/sn/kernel/io_init.c:189:19: warning: 'addr' may be used uninitialized in this function [-Wmaybe-

Re: [PATCH v3 09/11] serial: 8250_lpss: move Quark code from PCI driver

On Wed, 2016-05-04 at 12:01 +0100, Bryan O'Donoghue wrote: > On Wed, 2016-05-04 at 13:03 +0300, Andy Shevchenko wrote: > > > > On Wed, May 4, 2016 at 12:51 PM, Bryan O'Donoghue > > wrote: > > > > > > The default may be set to SERIAL_8250 but, without the QRK > > > specific > > > entry in 8250_pc

RE: [PATCH v8 0/7] KVM PCIe/MSI passthrough on ARM/ARM64: kernel part 3/3: vfio changes

Tested-by: Yehuda Yitschak Tested on Armada-7040 using an intel IXGBE (82599ES). > -Original Message- > From: linux-arm-kernel [mailto:linux-arm-kernel- > boun...@lists.infradead.org] On Behalf Of Eric Auger > Sent: Thursday, April 28, 2016 11:29 > To: eric.au...@st.com; eric.au...@lin

Re: [PATCH] reset: allow to pass NULL pointer to reset_control_put()

On Wednesday 04 May 2016 20:17:51 Masahiro Yamada wrote: > Currently, reset_control_put() just returns for error pointer, > but not for NULL pointer. This is not reasonable. > > Passing NULL pointer should be allowed as well to make failure path > handling easier. > > Signed-off-by: Masahiro Yam

Re: [PATCH v8 0/7] KVM PCIe/MSI passthrough on ARM/ARM64: kernel part 3/3: vfio changes

Hi Yehuda, On 05/04/2016 01:17 PM, Yehuda Yitschak wrote: > > Tested-by: Yehuda Yitschak Many thanks for the T-b! I'am about to submit a small update on part I & III today (v9), taking into account Alex' last comments. MSI layer part (II) is left unchanged (v8). The way I am going to report the

Re: [PATCH] reset: allow to pass NULL pointer to reset_control_put()

Hi Arnd, 2016-05-04 20:24 GMT+09:00 Arnd Bergmann : > On Wednesday 04 May 2016 20:17:51 Masahiro Yamada wrote: >> Currently, reset_control_put() just returns for error pointer, >> but not for NULL pointer. This is not reasonable. >> >> Passing NULL pointer should be allowed as well to make failur

Re: [Xen-devel] efi_enabled(EFI_PARAVIRT) use

On Tue, 03 May, at 09:45:22AM, Shannon Zhao wrote: > > +static int __init fdt_find_uefi_params(unsigned long node, const char > > *uname, > > + int depth, void *data) > > +{ > > + struct param_info *info = data; > > + int i; > > + > > + for (i = 0; i < ARRAY_

Re: [PATCH v6 00/21] Add HiSilicon RoCE driver

On 2016/5/4 2:48, Leon Romanovsky wrote: > On Thu, Apr 28, 2016 at 08:09:35PM +0800, Lijun Ou wrote: >> The HiSilicon Network Substem is a long term evolution IP which is >> supposed to be used in HiSilicon ICT SoCs. HNS (HiSilicon Network >> Sybsystem) also has a hardware support of performing RDM

[PATCH v9 1/8] iommu: Add iommu_domain_msi_geometry and DOMAIN_ATTR_MSI_GEOMETRY

Introduce a new DOMAIN_ATTR_MSI_GEOMETRY domain attribute. It enables to query the aperture of the IOVA window dedicated to MSIs and test whether the MSIs must be mapped with the IOMMU-MSI API. x86 IOMMUs will typically expose an MSI aperture matching the 1MB region [FEE0_h - FEF0_000h] corres

[PATCH v9 5/8] iommu/msi-iommu: iommu_msi_[get,put]_doorbell_iova

iommu_msi_get_doorbell_iova allows to iommu map an MSI doorbell contiguous physical region onto a reserved contiguous IOVA region. The physical region base address does not need to be iommu page size aligned. iova pages are allocated and mapped so that they cover all the physical region. This mappi

[PATCH v9 3/8] iommu: introduce an msi cookie

This opaque pointer will enable to store information about msi iommu mappings. Signed-off-by: Eric Auger --- v7 -> v8: remove spinlock and RB tree v5 -> v6: - initialize reserved_binding_list - use a spinlock instead of a mutex --- include/linux/iommu.h | 1 + 1 file changed, 1 insertion(+) d

[PATCH v9 7/8] iommu/msi-iommu: iommu_msi_msg_pa_to_va

Introduce iommu_msi_msg_pa_to_va whose role consists in detecting whether the device's MSIs must to be mapped into an IOMMU. It case it must, the function overrides the MSI msg originally composed and replaces the doorbell's PA by a pre-allocated and pre-mapped reserved IOVA. In case the correspond

[PATCH v9 8/8] iommu/arm-smmu: get/put the msi cookie

For IOMMU_DOMAIN_UNMANAGED type we now also get the msi cookie in both arm-smmu and arm-smmu-v3. This initializes resources for MSI doorbell mapping. Signed-off-by: Eric Auger --- drivers/iommu/arm-smmu-v3.c | 16 drivers/iommu/arm-smmu.c| 15 +++ 2 files changed

[PATCH v9 4/8] iommu/msi-iommu: initialization

iommu_get/put_msi_cookie allocates/frees the resource used to store and ref count the MSI doorbell mappings. iommu_msi_set_aperture initializes the iova domain used for MSI IOVA allocation and sets the iommu domain's msi geometry. The implementation relies on dma-iommu API and iova API. New msi f

[PATCH v9 6/8] iommu/msi-iommu: iommu_msi_domain

This function checks whether - the device belongs to a non default iommu domain - this iommu domain requires the MSI address to be mapped. If those conditions are met, the function returns the iommu domain to be used for mapping the MSI doorbell; else it returns NULL. Signed-off-by: Eric Auger

Re: [lkp] [sched/fair] 41e0d37f7a: divide error: 0000 [#1] SMP

On Wed, May 4, 2016 at 2:53 AM, Wanpeng Li wrote: > 2016-05-03 21:33 GMT+08:00 Rafael J. Wysocki : >> On Tue, May 3, 2016 at 11:25 AM, Wanpeng Li wrote: >>> 2016-05-03 17:19 GMT+08:00 Wanpeng Li : 2016-05-03 16:32 GMT+08:00 Peter Zijlstra : > On Tue, May 03, 2016 at 09:10:51AM +0800, ker

[PATCH v9 2/8] iommu/arm-smmu: initialize the msi geometry and advertise iommu-msi support

On ARM, MSI write transactions from device upstream to the smmu are conveyed through the iommu. Therefore target physical addresses must be mapped and DOMAIN_ATTR_MSI_GEOMETRY advertises the support of the IOMMU-MSI API. Signed-off-by: Eric Auger --- v8 -> v9: - reword the title and patch descri

[PATCH v9 0/8] KVM PCIe/MSI passthrough on ARM/ARM64: kernel part 1/3: iommu changes

This series introduces the msi-iommu api used to: - allocate/free resources for MSI IOMMU mapping - set the MSI iova window aperture - map/unmap physical addresses onto MSI IOVAs. - determine whether an msi needs to be iommu mapped - overwrite an msi_msg PA address with its pre-allocated/mapped IO

Re: [lkp] [sched/fair] 41e0d37f7a: divide error: 0000 [#1] SMP

On Wed, May 4, 2016 at 2:58 AM, Wanpeng Li wrote: > 2016-05-03 20:15 GMT+08:00 Rafael J. Wysocki : >> On Tue, May 3, 2016 at 10:32 AM, Peter Zijlstra wrote: >>> On Tue, May 03, 2016 at 09:10:51AM +0800, kernel test robot wrote: FYI, we noticed the following commit: https://git.kern

Re: [lkp] [sched/fair] 41e0d37f7a: divide error: 0000 [#1] SMP

2016-05-04 19:41 GMT+08:00 Rafael J. Wysocki : > On Wed, May 4, 2016 at 2:53 AM, Wanpeng Li wrote: >> 2016-05-03 21:33 GMT+08:00 Rafael J. Wysocki : >>> On Tue, May 3, 2016 at 11:25 AM, Wanpeng Li wrote: 2016-05-03 17:19 GMT+08:00 Wanpeng Li : > 2016-05-03 16:32 GMT+08:00 Peter Zijlstra

Re: [PATCH] efi/capsule: Make efi_capsule_pending() lockless

On Wed, 04 May, at 11:30:31AM, Borislav Petkov wrote: > > Hmmm, so panic() does bust_spinlocks() and efi_capsule_pending() could > look at oops_in_progress which is set by bust_spinlocks() and that would > probably solve the panic case but maybe the normal reboot case would > still hang... But e

Re: [lkp] [sched/fair] 41e0d37f7a: divide error: 0000 [#1] SMP

2016-05-04 19:44 GMT+08:00 Rafael J. Wysocki : > On Wed, May 4, 2016 at 2:58 AM, Wanpeng Li wrote: >> 2016-05-03 20:15 GMT+08:00 Rafael J. Wysocki : >>> On Tue, May 3, 2016 at 10:32 AM, Peter Zijlstra >>> wrote: On Tue, May 03, 2016 at 09:10:51AM +0800, kernel test robot wrote: > FYI, w

[PATCH V3 1/4] soc/tegra: pmc: Use BIT macro for register field definition

Use BIT macro for register field definition and make constant as U when using in shift operator like (3 << 30) to (3U << 30) Signed-off-by: Laxman Dewangan --- Changes from V1: - Remove the indenting of line which is not for BIT macro usage. Changes from V2: - None --- drivers/soc/tegra/pmc.c |

[PATCH V3 0/4] soc/tegra: Add support for IO pads power and voltage control

The IO pins of Tegra SoCs are grouped for common control of IO interface like setting voltage signal levels and power state of the interface. The group is generally referred as IO pads. The power state and voltage control of IO pins can be done at IO pads level. Tegra124 onwards IO pads support th

[PATCH V3 3/4] soc/tegra: pmc: Add support for IO pads power state and voltage

The IO pins of Tegra SoCs are grouped for common control of IO interface like setting voltage signal levels and power state of the interface. The group is generally referred as IO pads. The power state and voltage control of IO pins can be done at IO pads level. Tegra generation SoC supports the p

[PATCH V3 4/4] soc/tegra: pmc: Register PMC child devices as platform device

Power Management Controller(PMC) of Tegra does the multiple chip power related functionality for internal and IO interfacing. Some of the functionalities are power gating of IP blocks, IO pads voltage and power state configuration, system power state configurations, wakeup controls etc. Different

Re: [PATCH] rtc:add support for maxim rtc max6916

On Wed, May 04, 2016 at 03:30:17AM -0700, venkat.prashanth2...@gmail.com wrote: > From: venkat-prashanth > > This is a patch to add support for > maxim rtc max6916 > Signed-off-by:Venkat Prashanth B U > --- > Kconfig | 9 > Makefile | 6 +++ > rtc-max6916.c | 133 >

[PATCH V3 2/4] soc/tegra: pmc: Correct type of variable for tegra_pmc_readl()

The function tegra_pmc_readl() returns the u32 type data and hence change the data type of variable where this data is stored to u32 type. Signed-off-by: Laxman Dewangan --- Changes from V1: -This is new in series as per discussion on V1 series to use u32 for tegra_pmc_readl. Changes from V2: -

[PATCH v9 2/7] vfio/type1: vfio_find_dma accepting a type argument

In our RB-tree we now have slots of different types (USER and RESERVED). It becomes useful to be able to search for dma slots of a specific type or any type. This patch proposes an implementation for that modality and also changes the existing callers using the USER type. Signed-off-by: Eric Auger

[PATCH v9 4/7] vfio: allow reserved msi iova registration

The user is allowed to register a reserved MSI IOVA range by using the DMA MAP API and setting the new flag: VFIO_DMA_MAP_FLAG_MSI_RESERVED_IOVA. This region is stored in the vfio_dma rb tree. At that point the iova range is not mapped to any target address yet. The host kernel will use those iova

[PATCH v9 1/7] vfio: introduce a vfio_dma type field

We introduce a vfio_dma type since we will need to discriminate different types of dma slots: - VFIO_IOVA_USER: IOVA region used to map user vaddr - VFIO_IOVA_RESERVED: IOVA region reserved to map host device PA such as MSI doorbells Signed-off-by: Eric Auger --- v6 -> v7: - add VFIO_IOVA_ANY

[PATCH v9 5/7] vfio/type1: also check IRQ remapping capability at msi domain

On x86 IRQ remapping is abstracted by the IOMMU. On ARM this is abstracted by the msi controller. vfio_safe_irq_domain allows to check whether interrupts are "safe" for a given device. They are if the device does not use MSI or if the device uses MSI and the msi-parent controller supports IRQ remap

[PATCH v9 0/7] KVM PCIe/MSI passthrough on ARM/ARM64: kernel part 3/3: vfio changes

This series allows the user-space to register a reserved IOVA domain. This completes the kernel integration of the whole functionality on top of part 1 (v9) & 2 (v8). It also depends on [PATCH 1/3] iommu: Add MMIO mapping type series, http://comments.gmane.org/gmane.linux.kernel.iommu/12869 We re

[PATCH v9 6/7] iommu/arm-smmu: do not advertise IOMMU_CAP_INTR_REMAP

Do not advertise IOMMU_CAP_INTR_REMAP for arm-smmu(-v3). Indeed the irq_remapping capability is abstracted on irqchip side for ARM as opposed to Intel IOMMU featuring IRQ remapping HW. So to check IRQ remapping capability, the msi domain needs to be checked instead. This commit needs to be applie

[PATCH v9 7/7] vfio/type1: return MSI geometry through VFIO_IOMMU_GET_INFO capability chains

This patch allows the user-space to retrieve the MSI geometry. The implementation is based on capability chains, now also added to VFIO_IOMMU_GET_INFO. The returned info comprise: - whether the MSI IOVA are constrained to a reserved range (x86 case) and in the positive, the start/end of the aper

[PATCH 1/2] dt-bindings: pci: add DT binding for Axis ARTPEC-6 PCIe controller

From: Niklas Cassel This commit adds the Device Tree binding documentation that allows to describe the PCIe controller found in the Axis ARTPEC-6 SoC. Signed-off-by: Niklas Cassel --- .../devicetree/bindings/pci/axis,artpec6-pcie.txt | 45 ++ 1 file changed, 45 insertions(

Re: [lkp] [sched/fair] 41e0d37f7a: divide error: 0000 [#1] SMP

On Wed, May 4, 2016 at 1:51 PM, Wanpeng Li wrote: > 2016-05-04 19:44 GMT+08:00 Rafael J. Wysocki : >> On Wed, May 4, 2016 at 2:58 AM, Wanpeng Li wrote: >>> 2016-05-03 20:15 GMT+08:00 Rafael J. Wysocki : On Tue, May 3, 2016 at 10:32 AM, Peter Zijlstra wrote: > On Tue, May 03, 2016

[PATCH v9 3/7] vfio/type1: bypass unmap/unpin and replay for VFIO_IOVA_RESERVED slots

Before allowing the end-user to create VFIO_IOVA_RESERVED dma slots, let's implement the expected behavior for removal and replay. As opposed to user dma slots, IOVAs are not systematically bound to PAs and PAs are not pinned. VFIO just initializes the IOVA "aperture". IOVAs are allocated outside o

[PATCH] spi: zynqmp: disable clocks in error paths

The if pclk enable fails the refclk is not disabled. Fix the same. Signed-off-by: Shubhrajyoti Datta --- drivers/spi/spi-zynqmp-gqspi.c |3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/drivers/spi/spi-zynqmp-gqspi.c b/drivers/spi/spi-zynqmp-gqspi.c index aab9b49..18aeac

[PATCH] intel_pstate: Fix intel_pstate_get()

From: Rafael J. Wysocki After commit 8fa520af5081 "intel_pstate: Remove freq calculation from intel_pstate_calc_busy()" intel_pstate_get() calls get_avg_frequency() to compute the average frequency, which is problematic for two reasons. First, intel_pstate_get() may be invoked before the driver

Re: [RFC PATCH] livepatch: allow removal of a disabled patch

On Tue, 3 May 2016, Josh Poimboeuf wrote: > On Tue, May 03, 2016 at 09:39:48PM -0500, Josh Poimboeuf wrote: > > On Wed, May 04, 2016 at 12:31:12AM +0200, Jiri Kosina wrote: > > > On Tue, 3 May 2016, Josh Poimboeuf wrote: > > > > > > > > 1. Do we really need a completion? If I am not missing somet

Re: [PATCH] usb: xhci-mtk: fixup mouse wakeup failure during system suspend

Hi, chunfeng yun writes: >> chunfeng yun writes: >> > On Tue, 2016-05-03 at 12:33 +0300, Felipe Balbi wrote: >> >> Hi, >> >> >> >> chunfeng yun writes: >> >> >> chunfeng yun writes: >> >> >> > On Thu, 2016-04-21 at 10:04 +0800, Chunfeng Yun wrote: >> >> >> >> Click mouse after xhci suspend c

[PATCH 2/2] pci: host: new driver for Axis ARTPEC-6 PCIe controller

From: Niklas Cassel The Axis ARTPEC-6 SoC integrates a PCIe controller from Synopsys. This commit adds a new driver that provides the small glue needed to use the existing Designware driver to make it work on the Axis ARTPEC-6 SoC. Signed-off-by: Niklas Cassel --- MAINTAINERS

Re: [PATCH v3] sunxi-irq: Fix Kconfig dependency on GENERIC_IRQ_CHIP

On 04/05/16 11:44, Andre Przywara wrote: > Hi Maxime, > > On 02/05/16 07:48, Maxime Ripard wrote: >> Hi, >> >> On Mon, Apr 25, 2016 at 02:04:52AM +0100, Andre Przywara wrote: >>> The Allwinner NMI irqchip driver requires GENERIC_IRQ_CHIP, but >>> we can't select it directly, because there is no sp

Re: [RFT PATCH 1/3] usb: misc: usb3503: Fix HUB mode after bootloader initialization

On 05/03/2016 08:00 PM, Rob Herring wrote: > On Mon, May 02, 2016 at 11:55:01AM +0100, Mark Brown wrote: >> On Mon, May 02, 2016 at 11:49:12AM +0200, Krzysztof Kozlowski wrote: >> >>> This VDD regulator supply actually is not a usb3503 USB HUB regulator >>> supply... but a supply to the LAN attache

Re: [PATCH v2 3/6] mmc: core: implement enhanced strobe support

On 29 April 2016 at 04:47, Shawn Lin wrote: > Controllers use data strobe line to latch data from devices > under hs400 mode, but not for cmd line. So since emmc 5.1, JEDEC > introduces enhanced strobe mode for latching cmd response from > emmc devices to host controllers. This new feature is opti

Re: [lkp] [sched/fair] 41e0d37f7a: divide error: 0000 [#1] SMP

2016-05-04 19:56 GMT+08:00 Rafael J. Wysocki : > On Wed, May 4, 2016 at 1:51 PM, Wanpeng Li wrote: >> 2016-05-04 19:44 GMT+08:00 Rafael J. Wysocki : >>> On Wed, May 4, 2016 at 2:58 AM, Wanpeng Li wrote: 2016-05-03 20:15 GMT+08:00 Rafael J. Wysocki : > On Tue, May 3, 2016 at 10:32 AM, Pet

Re: [PATCH] iio: mma8452: add support for oversampling ratio

Am 2016-04-25 um 14:08 schrieb Martin Kepplinger: > This adds the following sysfs files according to the iio ABI: > > -rw-r--r--4096 in_accel_oversampling_ratio > -r--r--r--4096 in_accel_oversampling_ratio_available > > Internally, the device knows about 4 different power modes that diffe

[PATCH v7 15/21] IB/hns: Add PD operations support

This patch added the verbs to operate PD. It mainly includes the functions of allocating PD and deallocating PD. Signed-off-by: Wei Hu Signed-off-by: Nenglong Zhao Signed-off-by: Lijun Ou --- drivers/infiniband/hw/hns/hns_roce_device.h | 17 drivers/infiniband/hw/hns/hns_roce_main.c

Re: [PATCH v9 7/7] vfio/type1: return MSI geometry through VFIO_IOMMU_GET_INFO capability chains

Hi Alex, On 05/04/2016 01:54 PM, Eric Auger wrote: > This patch allows the user-space to retrieve the MSI geometry. The > implementation is based on capability chains, now also added to > VFIO_IOMMU_GET_INFO. If you prefer we could consider this patch outside of the main series since it brings ext

Re: [PATCH v7 16/24] i2c: allow adapter drivers to override the adapter locking

Hi Peter, thanks for the detailed explanation! > So maybe there should be only one flag, e.g. I2C_LOCK_ROOT_ADAPTER? > I.e. perhaps leave the future for later? I think this makes the current code easier understandable at this point, but I'll leave the decision to you. I am fine with both. Maybe

[PATCH v7 09/21] IB/hns: Add hca support

This patch mainly setup hca for RoCE. It will do a series of initial works, as follows: 1. init uar table, allocate uar resource 2. init pd table 3. init cq table 4. init mr table 5. init qp table Signed-off-by: Wei Hu Signed-off-by: Nenglong Zhao Signed-off-by: Lijun Ou ---

[PATCH v7 10/21] IB/hns: Add process flow to init RoCE engine

This patch mainly initialized the RoCE engine. It is absolutely necessary to run RoCE. It mainly includes that configure DMAE user, initialize doorbell and raq operations, enable port. Signed-off-by: Wei Hu Signed-off-by: Nenglong Zhao Signed-off-by: Lijun Ou --- drivers/infiniband/hw/hns/hns_

[PATCH v7 04/21] IB/hns: Add RoCE engine reset function

This patch mainly added reset flow of RoCE engine in RoCE driver. It is necessary when RoCE is loaded and removed. Signed-off-by: Wei Hu Signed-off-by: Nenglong Zhao Signed-off-by: Lijun Ou --- drivers/infiniband/hw/hns/hns_roce_device.h | 7 drivers/infiniband/hw/hns/hns_roce_hw_v1.c |

[PATCH v7 11/21] IB/hns: Add IB device registration

This patch registered IB device when loaded, and unregistered IB device when removed. Signed-off-by: Wei Hu Signed-off-by: Nenglong Zhao Signed-off-by: Lijun Ou --- drivers/infiniband/hw/hns/hns_roce_main.c | 48 +++ 1 file changed, 48 insertions(+) diff --git a/dr

[PATCH v7 01/21] net: hns: Add reset function support for RoCE driver

It added reset function for RoCE driver. RoCE is a feature of hns. In hip06 SoC, in RoCE reset process, it's needed to configure dsaf channel reset, port and sl map info. Reset function of RoCE is located in dsaf module, we only call it in RoCE driver when needed. Signed-off-by: Wei Hu Signed-off

[PATCH v7 17/21] IB/hns: Add QP operations support

This patch was implementing for queue pair operations. QP Consists of a Send Work Queue and a Receive Work Queue. Send and receive queues are always created as a pair and remain that way throughout their lifetime. A Queue Pair is identified by its Queue Pair Number. QP operations as follows: 1.

[PATCH v7 06/21] IB/hns: Add initial cmd operation

This patch added the operation for cmd, and added some functions for initializing eq table and selecting cmd mode. Signed-off-by: Wei Hu Signed-off-by: Nenglong Zhao Signed-off-by: Lijun Ou --- drivers/infiniband/hw/hns/hns_roce_cmd.c| 96 + drivers/infiniband/h

[PATCH v7 20/21] IB/hns: Kconfig and Makefile for RoCE module

This patch added Kconfig and Makefile for building RoCE module. Signed-off-by: Wei Hu Signed-off-by: Nenglong Zhao Signed-off-by: Lijun Ou --- drivers/infiniband/Kconfig | 1 + drivers/infiniband/hw/Makefile | 1 + drivers/infiniband/hw/hns/Kconfig | 10 ++ drivers/infin

[PATCH v7 18/21] IB/hns: Add CQ operations support

This patch was implementing for Completion Queue(CQ) operations. A CQ can be used to multiplex work completions from multiple work queues across queue pairs on the same HCA. CQ as the notification mechanism for Work Request completions. CQ operations as follows: 1. create CQ. CQ are created thr

[PATCH v7 07/21] IB/hns: Add event queue support

This patch added event queue support for RoCE driver. It is used for RoCE interrupt. RoCE includes 32 synchronous event irqs, 1 asynchronous event irq and 1 common overflow irq. Signed-off-by: Wei Hu Signed-off-by: Nenglong Zhao Signed-off-by: Lijun Ou --- drivers/infiniband/hw/hns/hns_roce_cm

[PATCH v7 13/21] IB/hns: Add interface of the protocol stack registration

This patch mainly added the function module which netif notify registered the protocol stack. It includes interface functions as follows: 1. The executive called interface of RoCE when the netlink event that registered protocol stack was generated 2. The executive called interface of

[PATCH v7 21/21] MAINTAINERS: Add maintainers for HiSilicon RoCE driver

This patch added maintainers for RoCE driver. Signed-off-by: Wei Hu Signed-off-by: Lijun Ou --- MAINTAINERS | 8 1 file changed, 8 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index ecbb2f6..51658a2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -10012,6 +10012,14 @@ W: htt

[PATCH v7 00/21] Add HiSilicon RoCE driver

The HiSilicon Network Substem is a long term evolution IP which is supposed to be used in HiSilicon ICT SoCs. HNS (HiSilicon Network Sybsystem) also has a hardware support of performing RDMA with RoCEE. The driver for HiSilicon RoCEE(RoCE Engine) is a platform driver and will support mulitple versi

[PATCH v7 08/21] IB/hns: Add icm support

This patch mainly added icm support for RoCE. It initializes icm which managers the relative memory blocks for RoCE. The data structures of RoCE will be located in it. For example, CQ table, QP table and MTPT table so on. Signed-off-by: Wei Hu Signed-off-by: Nenglong Zhao Signed-off-by: Lijun Ou

[PATCH v7 03/21] IB/hns: Add initial main frame driver and get cfg info

This patch mainly added the initial bare main driver. It could get the relative configure information of net node. Signed-off-by: Wei Hu Signed-off-by: Nenglong Zhao Signed-off-by: Lijun Ou --- drivers/infiniband/hw/hns/hns_roce_device.h | 49 drivers/infiniband/hw/hns/hns_roce_main.

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