On Mon, Apr 18, 2016 at 9:55 AM, Luis R. Rodriguez wrote:
>
> On Apr 18, 2016 7:48 AM, "Oded Gabbay" wrote:
>>
>> On Wed, Apr 13, 2016 at 1:07 AM, Luis R. Rodriguez
>> wrote:
>> > On Mon, Apr 11, 2016 at 03:52:43PM +0200, Christian König wrote:
>> >> Am 11.04.2016 um 15:39 schrieb Oded Gabbay:
>
On Mon, Apr 18, 2016 at 02:02:51PM +0800, Baolin Wang wrote:
>
> If the crypto hardware engine can support bulk data
> encryption/decryption, so the engine driver can select bulk mode to
> handle the requests. I think it is a totally driver things, not in
> dmcrypt. The dmcrypt can not get the har
On Fri, Apr 15, 2016 at 06:23:33PM +0200, Nicolas Ferre wrote:
> From: Boris Brezillon
>
> All modes exposed by simple panels should be tagged as driver defined
> modes.
> Moreover, if a panel supports only one mode, this mode is obviously the
> preferred one.
>
> Doing this also fix a problem o
On Tue, Apr 05, 2016 at 05:05:14PM +0300, Roger Quadros wrote:
> The OTG state machine needs a mechanism to start and
> stop the gadget controller. Add usb_gadget_start()
> and usb_gadget_stop().
>
> Introduce usb_otg_add_gadget_udc() to allow controller drivers
> to register a gadget controller t
Hi Arnd,
cc linux-m68k
On Sun, Apr 17, 2016 at 11:37 PM, Arnd Bergmann wrote:
> On Wednesday 02 March 2016 11:22:04 Geert Uytterhoeven wrote:
>> On Wed, Mar 2, 2016 at 10:48 AM, Arnd Bergmann wrote:
>> > Every new architecture has to add itself to the growing list of those
>> > that do not supp
On Thu, Apr 30, 2015 at 04:38:36PM +0200, Boris Brezillon wrote:
> drm_display_mode_from_videomode() is already calling drm_mode_set_name() on
> the provided mode.
>
> Signed-off-by: Boris Brezillon
> ---
> drivers/gpu/drm/panel/panel-simple.c | 1 -
> 1 file changed, 1 deletion(-)
Applied, wit
Al Viro writes:
Hi, Viro,
> On Mon, Apr 18, 2016 at 10:08:37AM +0800, Huang, Ying wrote:
>
>> Could you provide a debug branch in your tree for that?
>
> Done - vfs.git#T1 and vfs.git#T2 resp.
The compare result between T1 and T2 is as follow:
==
there are 2 points will cause could not call mmc_request_done()
and eventually cause the caller thread blocked.
A. if card was busy, cancel_delayed_work() will return false because
the delay work has not been scheduled, in this case, need put
mod_delayed_work() in front of msdc_cmd_is_ready()
B.
On Sat, Apr 16, 2016 at 10:19:33PM +0200, Arnd Bergmann wrote:
> After the PM support has been added to this driver, we get
> a harmless warning when that support is disabled at compile
> time:
>
> drivers/thermal/tegra/soctherm.c:641:12: error: 'soctherm_resume' defined but
> not used [-Werror=u
On Tue, Apr 05, 2016 at 05:05:16PM +0300, Roger Quadros wrote:
> This is the a_set_b_hnp_enable flag in the OTG state machine
> diagram and must be set when the A-Host has successfully set
> the b_hnp_enable feature of the OTG-B-Peripheral attached to it.
>
> When this bit changes we kick our OTG
On 18 April 2016 at 15:04, Herbert Xu wrote:
> On Mon, Apr 18, 2016 at 02:02:51PM +0800, Baolin Wang wrote:
>>
>> If the crypto hardware engine can support bulk data
>> encryption/decryption, so the engine driver can select bulk mode to
>> handle the requests. I think it is a totally driver things
On 04/18/2016 01:55 AM, kbuild test robot wrote:
Hi Daniel,
[auto build test ERROR on net-next/master]
url:
https://github.com/0day-ci/linux/commits/Daniel-Borkmann/bpf-trace-add-BPF_F_CURRENT_CPU-flag-for-bpf_perf_event_output/20160418-063147
config: m68k-allyesconfig (attached as .config
On 04/13/2016 09:44 AM, Songjun Wu wrote:
> Add driver for the Image Sensor Controller. It manages
> incoming data from a parallel based CMOS/CCD sensor.
> It has an internal image processor, also integrates a
> triple channel direct memory access controller master
> interface.
>
> Signed-off-by:
On Mon, Apr 18, 2016 at 03:21:16PM +0800, Baolin Wang wrote:
>
> I don't think so, the dm-crypt can not send maximal requests at some
> situations. For example, the 'cbc(aes)' cipher, it must be handled
> sector by sector (IV is dependency for each sector), so the dm-crypt
> can not send maximal re
Hi, Mark
On Tuesday, April 12, 2016 11:48 AM, Mark Brown wrote:
> On Tue, Apr 12, 2016 at 10:44:11AM +0800, Pingbo Wen wrote:
>
> Please fix your mail client to word wrap within paragraphs at something
> substantially less than 80 columns. Doing this makes your messages much
> easier to read and
On Sat, Apr 16, 2016 at 08:08:50AM +, Shardar Mohammed wrote:
[...]
> > > if (!(msg->flags & I2C_M_RD))
> > > tegra_i2c_fill_tx_fifo(i2c_dev);
> > >
> > > - int_mask = I2C_INT_NO_ACK | I2C_INT_ARBITRATION_LOST;
> > > if (i2c_dev->hw->has_per_pkt_xfer_complete_irq)
> > >
On 15.04.2016 18:24, Alexandre Belloni wrote:
> On 15/04/2016 at 11:26:02 +0100, Mark Brown wrote :
>> On Fri, Apr 15, 2016 at 11:16:27AM +0200, Wadim Egorov wrote:
>>
>>> This patch just renames the rk808 driver so we can reuse this driver
>>> to add more regulator devices from the RK8XX PMIC fa
On Sat, Apr 16, 2016 at 08:08:50AM +, Shardar Mohammed wrote:
> Thanks for the review, updated with comments inline with Shardar.
>
> > On Fri, Apr 15, 2016 at 06:51:47PM +0530, Shardar Shariff Md wrote:
> > > From: Shardar Shariff Md
> > >
> > > To summarize the issue observed in error cases
On 04/18/2016 07:40 AM, tiffany lin wrote:
>
> snipped.
>
>>> +
>>> +void mtk_vcodec_dec_set_default_params(struct mtk_vcodec_ctx *ctx)
>>> +{
>>> + struct mtk_q_data *q_data;
>>> +
>>> + ctx->m2m_ctx->q_lock = &ctx->dev->dev_mutex;
>>> + ctx->fh.m2m_ctx = ctx->m2m_ctx;
>>> + ctx->fh.ctrl
On Sun, Apr 3, 2016 at 1:54 PM, Jonathan Cameron wrote:
> On 03/04/16 09:52, Peter Rosin wrote:
>> From: Peter Rosin
>>
>> The root i2c adapter lock is then no longer held by the i2c mux during
>> accesses behind the i2c gate, and such accesses need to take that lock
>> just like any other ordina
On Mon, Apr 18, 2016 at 12:04:42PM +0530, Shardar Shariff Md wrote:
> To summarize the issue observed in error cases:
>
> SW Flow: For i2c message transfer, packet header and data payload is posted
> and then required error/packet completion interrupts are enabled later.
>
> HW flow: HW process t
On S2MPS11 and S2MPS14 devices the default implementation of
set_voltage_time_sel() for LDO regulators was not doing anything useful
because users did not provide ramp delay in Device Tree so the
set_voltage_time_sel() exited with status 0. This could be seen in
dmesg, e.g. on Odroid XU4:
[1.4
The bindings like s2mps11,buck6-ramp-enable or s2mps11,buck2-ramp-delay
where ignored. They were never parse by s2mps11 regulator driver. Also
the values used in these bindings were equal to default reset values of
S2MPS11 device. It is safe to remove them.
Signed-off-by: Krzysztof Kozlowski
---
Hi Peter,
On Mon, 18 Apr 2016 14:22:09 +0800
Peter Pan wrote:
> Hi Boris,
>
> On Fri, Mar 25, 2016 at 4:35 PM, Boris Brezillon
> wrote:
> > Hi Peter,
> >
> > On Mon, 14 Mar 2016 02:47:55 +
> > Peter Pan wrote:
> >
> >> From: Brian Norris
> >>
> >> Currently nand_bbt.c is tied with struc
Hi Linus,
please pull from the 'for-linus' branch of
git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux.git for-linus
to receive the following updates:
A couple of bug fixes.
Gerald Schaefer (1):
s390/dcssblk: fix possible deadlock in remove vs. per-device attributes
Heiko
On Tue, Apr 05, 2016 at 05:05:07PM +0300, Roger Quadros wrote:
> The OTG core will use struct otg_hcd_ops to interface
> with the HCD controller.
>
> The main purpose of this interface is to avoid directly
> calling HCD APIs from the OTG core as they
> wouldn't be defined in the built-in symbol ta
On Fri, 15 Apr 2016, Andy Shevchenko wrote:
> On Wed, 2016-03-30 at 16:54 +0300, Heikki Krogerus wrote:
> > Hi,
> >
> > On Wed, Mar 30, 2016 at 04:35:46PM +0300, Andy Shevchenko wrote:
> > >
> > > From: Heikki Krogerus
> > >
> > > All configurations are lost and the registers will have
> > > d
On Tue, Apr 05, 2016 at 05:05:08PM +0300, Roger Quadros wrote:
> Move otg_fsm into usb_otg and use usb_otg wherever possible
> in the usb_otg APIs.
>
> Signed-off-by: Roger Quadros
Acked-by: Peter Chen
> ---
> drivers/usb/chipidea/ci.h| 1 -
> drivers/usb/chipidea/core.c | 12 +
Hello,
On 2016-04-16 00:04, Javier Martinez Canillas wrote:
The exynos5 I2C controller driver always prepares and enables a clock
before using it and then disables unprepares it when the clock is not
used anymore.
But this can cause a possible ABBA deadlock in some scenarios since a
driver that
On Sat, Apr 16, 2016 at 11:33:04PM +0200, Wolfram Sang wrote:
> On Thu, Mar 24, 2016 at 08:59:16PM +0200, Irina Tirdea wrote:
> > Share the ACPI companion for the platform device with the
> > i2c adapter, so that the adapter has access to the properties
> > defined in ACPI tables.
> >
> > Signed-o
Hello Minchan,
sorry, it took me so long to return back to testing.
I collected extended stats (perf), just like you requested.
- 3G zram, lzo; 4 CPU x86_64 box.
- fio with perf stat
4 streams8 streams per-cpu
=
On 18 April 2016 at 15:24, Herbert Xu wrote:
> On Mon, Apr 18, 2016 at 03:21:16PM +0800, Baolin Wang wrote:
>>
>> I don't think so, the dm-crypt can not send maximal requests at some
>> situations. For example, the 'cbc(aes)' cipher, it must be handled
>> sector by sector (IV is dependency for eac
Add support for the Artesyn MVME7100 Single Board Computer.
The MVME7100 is a 6U form factor VME64 computer with:
- A two e600 cores Freescale MPC8641D CPU
- 2 GB of DDR2 onboard memory
- Four Gigabit Ethernets
- Five 16550 compatible UARTs
- One USB 2.0 port
- Two PCI/PCI
Hi,
Rajesh Bhagat writes:
>>-Original Message-
>>From: Rajesh Bhagat [mailto:rajesh.bha...@nxp.com]
>>Sent: Monday, March 14, 2016 2:41 PM
>>To: ba...@ti.com
>>Cc: gre...@linuxfoundation.org; linux-...@vger.kernel.org; linux-
>>ker...@vger.kernel.org; linux-o...@vger.kernel.org; Sriram D
On Fri, Apr 15, 2016 at 12:37:06PM +0100, Will Deacon wrote:
> You can remove stop_lock altogether now, right? I also wonder whether
> it would be worth printing out which CPUs are still online in the case where
> we fail to stop all the secondaries?
Sorry, I've been a bit offline. Yes, the stop_l
Arnd Bergmann wrote:
> The new MACsec driver uses the AES crypto algorithm, but can be configured
> even if CONFIG_CRYPTO is disabled, leading to a build error:
>
> warning: (MAC80211 && MACSEC) selects CRYPTO_GCM which has unmet direct
> dependencies (CRYPTO)
> warning: (BT && CEPH_LIB && INET
On Mon, Apr 18, 2016 at 03:58:59PM +0800, Baolin Wang wrote:
>
> That depends on the hardware engine. Some cipher hardware engines
> (like xts(aes) engine) can handle the intermediate values (IV) by
> themselves in one bulk block, which means we can increase the size of
> the request by merging req
On Tue, Apr 05, 2016 at 05:05:09PM +0300, Roger Quadros wrote:
> This is to prevent missing symbol build error if OTG is
> enabled (built-in) and HCD core (CONFIG_USB) is module.
>
> Signed-off-by: Roger Quadros
Acked-by: Peter Chen
> ---
> drivers/usb/chipidea/otg_fsm.c | 7 +++
> dri
On 17 April 2016 at 21:14, Alexander Kuleshov wrote:
> From: 0xAX
>
> The memblock_add_region() and memblock_reserve_region do not nothing specific
> before the call of the memblock_add_range(), only print debug output.
>
> We can do the same in the memblock_add() and memblock_reserve() since bot
Hi Mauro, hi kernel-doc authors,
Am 12.04.2016 um 15:58 schrieb Mauro Carvalho Chehab :
> Em Fri, 8 Apr 2016 17:12:27 +0200
> Markus Heiser escreveu:
>
>> Hi kernel-doc authors,
>>
>> motivated by this MT, I implemented a toolchain to migrate the kernel’s
>> DocBook XML documentation to reST
On Tue, Apr 05, 2016 at 05:05:11PM +0300, Roger Quadros wrote:
> Let's use CONFIG_USB_OTG as a single config option to enable
> USB OTG and the OTG FSM. This makes things a lot less confusing.
>
> Update all users of CONFIG_USB_OTG_FSM to CONFIG_USB_OTG.
>
> Signed-off-by: Roger Quadros
> ---
>
On 18 April 2016 at 16:04, Herbert Xu wrote:
> On Mon, Apr 18, 2016 at 03:58:59PM +0800, Baolin Wang wrote:
>>
>> That depends on the hardware engine. Some cipher hardware engines
>> (like xts(aes) engine) can handle the intermediate values (IV) by
>> themselves in one bulk block, which means we c
Hi,
Pavel Machek writes:
>> >>> +#define DEFAULT_SDP_CUR_LIMIT(500 - DEFAULT_CUR_PROTECT)
>> >>
>> >> According to the spec we should always be talking about unit loads (1
>> >> unit load is 100mA for HS/FS/LS and 150mA for SS). Also, this will not
>> >> work for SS capable ports and SS
Hi,
In most cases, many codecs already supports jack detection,
previouslly, we need to create a customized machine driver every time.
Hence, the simple-card need to support use them dynamically via
parse dts file for better flexibility.
Xing Zheng (3):
ASoC: jack: Add a jack detect c
This patch add a callback when a codec have the jack detect feature.
Signed-off-by: Xing Zheng
---
include/sound/soc.h |6 ++
sound/soc/soc-jack.c |8
2 files changed, 14 insertions(+)
diff --git a/include/sound/soc.h b/include/sound/soc.h
index 02b4a21..ff105a4 100644
--
This patch tell soc-jack that this codec supports jack detection.
Signed-off-by: Xing Zheng
---
sound/soc/codecs/da7219.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/sound/soc/codecs/da7219.c b/sound/soc/codecs/da7219.c
index 81c0708..5a8ff1e 100644
--- a/sound/soc/codecs/da7219.c
In most cases, many codecs already supports jack detection, previouslly,
we need to create a customized machine driver every time.
Hence, the simple-card need to support use them dynamically via parse dts
file for better flexibility.
Signed-off-by: Xing Zheng
---
.../devicetree/bindings/sound/
On Mon, Apr 18, 2016 at 04:14:48PM +0800, Baolin Wang wrote:
> On 18 April 2016 at 16:04, Herbert Xu wrote:
> > On Mon, Apr 18, 2016 at 03:58:59PM +0800, Baolin Wang wrote:
> >>
> >> That depends on the hardware engine. Some cipher hardware engines
> >> (like xts(aes) engine) can handle the interm
Hi,
Pavel Machek writes:
> Hi!
>
>> > It's your HW :-) You tell me if it's really necessary. But, hey, if you
>> > get enumerated @500mA, this is the host telling you it _CAN_ give you
>> > 500mA. In that case, why wouldn't you ?
>
> Dunno, perhaps not to drain battery in host too quickly?
> Or
Hi, all,
>From 7dbacb179a4d5f9ac9d7e1b3733664b3b0fe23ae Mon Sep 17 00:00:00 2001
From: Wang Xiaoqiang
Date: Mon, 18 Apr 2016 14:58:15 +0800
Subject: [PATCH] tracing: Don't use the address of the buffer array name in
copy_from_user
Fix the problem as follows:
...
char buf[64];
...
Hi Hans,
On Mon, 2016-04-18 at 09:32 +0200, Hans Verkuil wrote:
> On 04/18/2016 07:40 AM, tiffany lin wrote:
> >
> > snipped.
> >
> >>> +
> >>> +void mtk_vcodec_dec_set_default_params(struct mtk_vcodec_ctx *ctx)
> >>> +{
> >>> + struct mtk_q_data *q_data;
> >>> +
> >>> + ctx->m2m_ctx->q_lock = &
On Wed, Apr 13, 2016 at 03:56:51PM +0200, Frederic Weisbecker wrote:
> @@ -4524,12 +4523,12 @@ decay_load_missed(unsigned long load, unsigned long
> missed_updates, int idx)
> * load[i]_n = (1 - 1/2^i)^n * load[i]_0
> *
> * see decay_load_misses(). For NOHZ_FULL we get to subtract and add
On Thu, 14 Apr 2016, Xunlei Pang wrote:
> We should deboost before waking the high-prio task such that
> we don't run two tasks with the 'same' priority.
No. This is fundamentaly broken.
T1 (prio 0) lock(X)
--> preemption
T2 (prio 10)lock(X)
boost(T1)
On 04/13/2016 03:42 PM, Linus Walleij wrote:
> On Sun, Apr 3, 2016 at 3:26 PM, Neil Armstrong
> wrote:
>
>> Add pinctrl and gpio control support to Oxford Semiconductor OXNAS SoC
>> Family.
>> This version supports the ARM926EJ-S based OX810SE SoC with 34 IO pins.
>>
>> Signed-off-by: Neil Arms
Hi
> -Original Message-
> From: Baolin Wang [mailto:baolin.w...@linaro.org]
> Sent: Monday, April 11, 2016 7:15 PM
> To: Jun Li
> Cc: ba...@kernel.org; gre...@linuxfoundation.org; s...@kernel.org;
> dbarysh...@gmail.com; dw...@infradead.org; peter.c...@freescale.com;
> st...@rowland.harva
On 18 April 2016 at 16:17, Herbert Xu wrote:
> On Mon, Apr 18, 2016 at 04:14:48PM +0800, Baolin Wang wrote:
>> On 18 April 2016 at 16:04, Herbert Xu wrote:
>> > On Mon, Apr 18, 2016 at 03:58:59PM +0800, Baolin Wang wrote:
>> >>
>> >> That depends on the hardware engine. Some cipher hardware engin
On Mon, Apr 18, 2016 at 04:28:46PM +0800, Baolin Wang wrote:
>
> What I meaning is if the xts engine can support bulk block, then the
> engine driver can select bulk mode to do encryption, but if their xts
> engine can not support bulk mode, which depends on hardware design,
> the engine driver ca
On Fri, 15 Apr 2016, Christoph Hellwig wrote:
> Set the affinity_mask before allocating vectors. And for now we also
> need a little hack after allocation, hopefully someone smarter than me
> can move this into the core code.
>
>
> + /* XXX: this should really move into the core IRQ allocat
On Sat, Apr 16, 2016 at 3:50 AM, Christoph Hellwig wrote:
>> - blk_queue_max_discard_sectors(brd->brd_queue, UINT_MAX);
>> + blk_queue_max_discard_sectors(brd->brd_queue, UINT_MAX >> 9);
>
> Shouldn't we fix the issue by capping to UINT_MAX >> 9 inside
> blk_queue_max_discard_sectors? Tha
memblock_remove() takes a phys_addr_t, which may be narrower than 64 bits,
causing a harmless warning:
drivers/firmware/efi/arm-init.c: In function 'reserve_regions':
include/linux/kernel.h:29:20: error: large integer implicitly truncated to
unsigned type [-Werror=overflow]
#define ULLONG_MAX (~
On Mon, 2016-04-18 at 03:53 +0100, Alexey Klimov wrote:
> This patch creates new driver that supports StreamLabs usb watchdog
> device. This device plugs into 9-pin usb header and connects to
> reset pin and reset button on common PC.
>
> USB commands used to communicate with device were reverse
>
On 18 April 2016 at 10:34, Arnd Bergmann wrote:
> memblock_remove() takes a phys_addr_t, which may be narrower than 64 bits,
> causing a harmless warning:
>
> drivers/firmware/efi/arm-init.c: In function 'reserve_regions':
> include/linux/kernel.h:29:20: error: large integer implicitly truncated t
On 18 April 2016 at 16:31, Herbert Xu wrote:
> On Mon, Apr 18, 2016 at 04:28:46PM +0800, Baolin Wang wrote:
>>
>> What I meaning is if the xts engine can support bulk block, then the
>> engine driver can select bulk mode to do encryption, but if their xts
>> engine can not support bulk mode, which
Add DT implementation for A72 and Atermis board.
Signed-off-by: Li Pengcheng
Signed-off-by: Li Zhong
---
drivers/hwtracing/coresight/coresight-etm4x.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c
b/drivers/hwtracing/coresight/cor
On 04/11/2016 11:34 AM, Anshuman Khandual wrote:
> On 04/07/2016 03:04 PM, kbuild test robot wrote:
>> > All errors (new ones prefixed by >>):
>> >
>> >mm/hugetlb.c: In function 'follow_huge_pud':
>> >>> >> mm/hugetlb.c:4360:3: error: implicit declaration of function
>> >>> >> 'pud_pa
On Mon, Apr 18, 2016 at 04:40:36PM +0800, Baolin Wang wrote:
>
> Simply to say, now there are many different hardware engines for
> different vendors, some engines can support bulk block but some can
> not (or no cipher hardware engine), then the dm-crypt can not know
> your hardware engine feature
On 04/07/2016 02:46 PM, kbuild test robot wrote:
> Hi Anshuman,
>
> [auto build test ERROR on powerpc/next]
> [also build test ERROR on v4.6-rc2 next-20160407]
> [if your patch is applied to the wrong git tree, please drop us a note to
> help improving the system]
>
> url:
> https://github.c
On 2016/04/18 at 16:23, Thomas Gleixner wrote:
> On Thu, 14 Apr 2016, Xunlei Pang wrote:
>> We should deboost before waking the high-prio task such that
>> we don't run two tasks with the 'same' priority.
> No. This is fundamentaly broken.
>
> T1 (prio 0) lock(X)
>
> --> preemption
>
We deleted a line of code and accidentally made the "return put_user()"
part of the if statement when it's supposed to be unconditional.
Fixes: 9f9a45beaa96 ('udp: do not expect udp headers on ioctl SIOCINQ')
Signed-off-by: Dan Carpenter
diff --git a/net/ipv4/udp.c b/net/ipv4/udp.c
index f186313
On Sat, Apr 16, 2016 at 02:58:58AM +0900, Masahiro Yamada wrote:
> As Documentation/arm64/booting.txt says, the cpu-release-addr
> location should be reserved.
>
> Signed-off-by: Masahiro Yamada
> ---
>
> arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi | 2 ++
> 1 file changed, 2 insertion
On Sun, 2016-04-17 at 21:35 +, Drokin, Oleg wrote:
> On Apr 17, 2016, at 10:11 AM, Panos Vlachos wrote:
> > Fixed one coding style issue in the
> > file router_proc.c (Lustre staging driver)
> Perhaps it's best to reference what the issue is.
> I.e. "Fix too long line in …"
> and then in the ac
On 18 April 2016 at 16:41, Herbert Xu wrote:
> On Mon, Apr 18, 2016 at 04:40:36PM +0800, Baolin Wang wrote:
>>
>> Simply to say, now there are many different hardware engines for
>> different vendors, some engines can support bulk block but some can
>> not (or no cipher hardware engine), then the
Am Sonntag, den 17.04.2016, 22:51 -0700 schrieb Andrey Smirnov:
> Use enumerated type instead of a boolean flag to specify the variant of
> the PCIe IP block (6Q, 6SX, etc). This patch has zero functional impact,
> however it makes the code easier to extend for the case of more than 2
> possible va
On 04/07/2016 11:07 AM, Anshuman Khandual wrote:
> This patch series enables HugeTLB page migration on POWER platform.
> This series has some core VM changes (patch 1, 2, 3) and some powerpc
> specific changes (patch 4, 5, 6, 7, 8, 9, 10). Comments, suggestions
> and inputs are welcome.
>
> Anshum
Hi Mark,
2016-04-18 17:45 GMT+09:00 Mark Rutland :
> On Sat, Apr 16, 2016 at 02:58:58AM +0900, Masahiro Yamada wrote:
>> As Documentation/arm64/booting.txt says, the cpu-release-addr
>> location should be reserved.
>>
>> Signed-off-by: Masahiro Yamada
>> ---
>>
>> arch/arm64/boot/dts/socionext/
Hi Jun,
On 18 April 2016 at 16:27, Jun Li wrote:
>> >>
>> >> But another issue is some users may need to get the charger type from
>> >> power supply by "power_supply_get_property()" function, we need to
>> >> integrate with the power supply things in the usb charger framework,
>> >> not user to
Use of_device_get_match_data() for getting matched data
instead of implementing this locally.
Signed-off-by: Laxman Dewangan
---
drivers/gpio/gpio-tegra.c | 50 +++
1 file changed, 24 insertions(+), 26 deletions(-)
diff --git a/drivers/gpio/gpio-tegra
NVIDIA's Tegra210 support the HW debounce in the GPIO
controller for all its GPIO pins.
Add support for setting debounce timing by implementing the
set_debounce callback of gpiochip.
Signed-off-by: Laxman Dewangan
---
drivers/gpio/gpio-tegra.c | 48 ++
Remove the file static device handle variable as this is just
required for prints. The required handle can be stored in
tegra_gpio_chip and hence it become redundancy.
Signed-off-by: Laxman Dewangan
---
drivers/gpio/gpio-tegra.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff
Am Sonntag, den 17.04.2016, 22:51 -0700 schrieb Andrey Smirnov:
> I.MX6+ has a dedicated bit for reseting PCIe core, which should be used
> instead of a regular reset sequence since using the latter will hang the
> SoC.
>
> This commit is based on c34068d48273e24d392d9a49a38be807954420ed from
> ht
Am Sonntag, den 17.04.2016, 22:51 -0700 schrieb Andrey Smirnov:
> I.MX6Quad Plus has a slightly different version of PCIe core than
> reqular i.MX6Quad.
>
> Signed-off-by: Andrey Smirnov
Under the assumption that the missing documentation for this compatible
is added in patch 2/3 in the next rev
On Mon, 18 Apr 2016, Xunlei Pang wrote:
> On 2016/04/18 at 16:23, Thomas Gleixner wrote:
> > On Thu, 14 Apr 2016, Xunlei Pang wrote:
> >> We should deboost before waking the high-prio task such that
> >> we don't run two tasks with the 'same' priority.
> > No. This is fundamentaly broken.
> >
> >
On Mon, Apr 18, 2016 at 05:55:14PM +0900, Masahiro Yamada wrote:
> 2016-04-18 17:45 GMT+09:00 Mark Rutland :
> > I take it that the code for the spin-table is not in RAM, and does not
> > need to be protected similarly?
>
> I use U-Boot to boot Linux for this board.
>
> The code for the spin-tabl
On Fri, Apr 15, 2016 at 11:54:08AM -0600, Al Stone wrote:
[...]
> > Understood, the point I wanted to make is that adding a list of methods
> > in acpi_object_usage.txt ("Use as needed") is not necessarily additional
> > information, you can add a pointer at ACPI specs (for that specific
> > purp
On Mon, Apr 18, 2016 at 12:16:10PM +0530, Vineet Gupta wrote:
> - timer frequency is derived from DT (no longer rely on top level
>DT "clock-frequency" probed early and exported by asm/clk.h)
>
> - TIMER0_IRQ need not be exported across arch code, confined to intc as
>it is property of s
On Fri, Apr 15, 2016 at 10:38:14PM +1000, Simon Horman wrote:
> On Fri, Apr 15, 2016 at 11:56:07AM +0200, Pablo Neira Ayuso wrote:
> > On Fri, Apr 15, 2016 at 10:57:48AM +1000, Stephen Rothwell wrote:
> > > Hi Simon,
> > >
> > > After merging the ipvs-next tree, today's linux-next build (powerpc
>
Hi Pavel,
On 04/15/2016 01:53 PM, Pavel Machek wrote:
Hi!
How about implementing patterns as a specific typer of triggers?
Let's say we have ledtrig-rgb-pattern:
Well, we'd need ledtrig-rgb-pattern-1, ledtrig-rgb-pattern-2, ... , as we
can have more than one rgb led. But yes.
Triggers can
On Sun, Apr 17, 2016 at 06:57:36PM -0700, Josh Triplett wrote:
> O_NOUMASK seems potentially useful to support implementation of umask
> entirely in userspace, which also addresses thread-safety. A program
> could read its process umask out at startup, handle umask entirely in
> userspace (includi
On Mon, Apr 18, 2016 at 01:43:51PM +1000, Stephen Rothwell wrote:
> In the future, please fix up all the current users of an interface
> *before* marking it deprecated. All these extra warnings just muddy the
> "real" warnings ...
Ideally but sadly all the issues are in the graphics stack and wh
On Wed, Apr 13, 2016 at 03:56:51PM +0200, Frederic Weisbecker wrote:
> @@ -4645,11 +4674,11 @@ void cpu_load_update_nohz(int active)
> void cpu_load_update_active(struct rq *this_rq)
> {
> unsigned long load = weighted_cpuload(cpu_of(this_rq));
> - /*
> - * See the mess around cpu_
On 23/03/16 00:51, Vladimir Zapolskiy wrote:
> The change fixes a check of gpio_to_desc() return value, the function
> returns either a valid pointer to struct gpio_desc or NULL, this makes
> IS_ERR() check invalid and may lead to a NULL pointer dereference in
> runtime.
>
> Signed-off-by: Vladi
On Fri, Apr 15, 2016 at 10:17:36AM -0600, Sagar Dharia wrote:
Please leave blank lines between paragraphs, it makes things much easier
to read than a wall of uninterrupted text.
> >>+ ret = devm_request_irq(&pdev->dev, dev->irq, msm_slim_interrupt,
> >>+ IRQF_TRIGGER_H
On Mon, Apr 18, 2016 at 04:17:30PM +0800, Xing Zheng wrote:
> This patch add a callback when a codec have the jack detect feature.
> +void snd_soc_jack_codec_detect(struct snd_soc_codec *codec,
> + struct snd_soc_jack *jack)
> +{
> + if (codec && codec->driver && co
Provide a small convenience wrapper that transmits
a DCS get_diagnostic_result command.
Signed-off-by: Vinay Simha BN
---
drivers/gpu/drm/drm_mipi_dsi.c | 25 +
include/drm/drm_mipi_dsi.h | 1 +
2 files changed, 26 insertions(+)
diff --git a/drivers/gpu/drm/drm_mipi
Provide a small convenience wrapper that transmits
a DCS get_display_mode command.
Signed-off-by: Vinay Simha BN
---
drivers/gpu/drm/drm_mipi_dsi.c | 24
include/drm/drm_mipi_dsi.h | 1 +
2 files changed, 25 insertions(+)
diff --git a/drivers/gpu/drm/drm_mipi_dsi.c
Hi Mark,
On Mon, 18 Apr 2016 11:03:31 +0800, Mark Yao wrote:
> We need to take care of the vop status when use
> rockchip_drm_crtc_mode_config, if vop is disabled,
> the function would failed, that is terrible.
>
> Save connector type and output mode on drm_display_mode->private_flags
> at encod
Hi Michał,
W dniu 07.04.2016 o 18:40, Michal Nazarewicz pisze:
On Thu, 7 Apr 2016, Michal Nazarewicz wrote:
This makes me suspect it’s not possible to link a function instance to
the same configuration twice, but now that I think about it, I’m not
quite sure what would happen if one did:
On ARMv8 support for AArch32 state is optional. Hence it is
not safe to check the AArch32 ID registers for sanity, which
could lead to false warnings. This patch makes sure that the
AArch32 state is implemented before we keep track of the 32bit
ID registers.
As per ARM ARM (D.1.21.2 - Support for
Add cpu_hwcap bit for keeping track of the support for 32bit EL0.
Tested-by: Yury Norov
Signed-off-by: Suzuki K Poulose
---
arch/arm64/include/asm/cpufeature.h |8 +++-
arch/arm64/kernel/cpufeature.c |9 +
2 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/a
Make sure we have AArch32 state available for running COMPAT
binaries and also for switching the personality to PER_LINUX32.
Signed-off-by: Yury Norov
[ Added cap bit, checks for HWCAP, personality ]
Signed-off-by: Suzuki K Poulose
Tested-by: Yury Norov
---
arch/arm64/include/asm/elf.h |
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