mem_cgroup_move_charge() invokes lru_add_drain_all() so that the pvec
pages can be moved too. lru_add_drain_all() schedules and flushes
work items on system_wq which depends on being able to create new
kworkers to make forward progress. Since 1ed1328792ff ("sched,
cgroup: replace signal_struct->g
From: Mike Christie
This patch has the xen block driver use bio->bi_op for REQ_OPs and rq_flag_bits
to bio->bi_rw.
Signed-off-by: Mike Christie
Reviewed-by: Christoph Hellwig
Reviewed-by: Hannes Reinecke
---
drivers/block/xen-blkback/blkback.c | 29 +
1 file chang
On Fri, Apr 15, 2016 at 11:22:36AM -0700, Stefano Stabellini wrote:
> On Thu, 14 Apr 2016, Guenter Roeck wrote:
> > Register with kernel restart handler instead of setting arm_pm_restart
> > directly.
> >
> > Select a high priority of 192 to ensure that default restart handlers
> > are replaced if
Set current email address to replace obsolete email addresses.
Signed-off-by: Frank Rowand
---
.mailmap |3 +++
1 file changed, 3 insertions(+)
Index: b/.mailmap
===
--- a/.mailmap
+++ b/.mailmap
@@ -48,6 +48,9 @@ Felix Kuhling
Hi Oleg,
On 04/15/2016 10:19 AM, Oleg Nesterov wrote:
> Hi,
>
> I am fingting with obscure pty bug in rhel6 which _might be_ explained
> by some hangup/reopen races, and this motivated me to look at upstream
> code which I can't understand too ;)
>
> Lets look at tty_open(),
>
> 2112
From: Mike Christie
This patch has the pm code use bio->bi_op for REQ_OPs and rq_flag_bits
to bio->bi_rw.
Signed-off-by: Mike Christie
Reviewed-by: Christoph Hellwig
Reviewed-by: Hannes Reinecke
---
kernel/power/swap.c | 31 +++
1 file changed, 19 insertions(+), 1
On Fri, Apr 15, 2016 at 11:27:50AM -0700, Gustavo Padovan wrote:
> 2016-04-15 Christian König :
> > Amdgpu also has an implementation for a fence collection which uses a a
> > hashtable to keep the fences grouped by context (e.g. only the latest fence
> > is keept for each context). See amdgpu_sync
From: Mike Christie
The bio users should now always be setting up the bio->bi_op. This patch
has us copy that to the struct request op field.
Signed-off-by: Mike Christie
Reviewed-by: Christoph Hellwig
Reviewed-by: Hannes Reinecke
---
block/blk-core.c | 2 ++
1 file changed, 2 insertions(+)
On Fri, Apr 15, 2016 at 02:25:49PM -0400, Vivien Didelot wrote:
> Move the number of databases to the info structure.
Isn't the number of databases a property of the family?
I would add a table indexed by family.
Andrew
From: Mike Christie
This patch has xfs use bio->bi_op for REQ_OPs and rq_flag_bits to bio->bi_rw.
Signed-off-by: Mike Christie
Reviewed-by: Christoph Hellwig
Reviewed-by: Hannes Reinecke
Acked-by: Dave Chinner
---
fs/xfs/xfs_aops.c | 3 +--
fs/xfs/xfs_buf.c | 27 +++--
From: Mike Christie
This patch has btrfs use the bio bi_op for REQ_OP and bi_rw for rq_flag_bits.
v5:
- Misset bi_rw to REQ_OP_WRITE in finish_parity_scrub
Signed-off-by: Mike Christie
Reviewed-by: Christoph Hellwig
Reviewed-by: Hannes Reinecke
---
fs/btrfs/check-integrity.c | 19 +-
From: Mike Christie
This patch has the dio code set the bio bi_op to a REQ_OP and bio op_flags
to rq_flag_bits.
It also begins to convert btrfs's dio_submit_t because of the dio submit_io
callout use. In the btrfs_submit_direct change, I OR'd the op and flag back
together. It is only temporary.
On 4/13/2016 11:05 PM, zengzhao...@163.com wrote:
From: Zhaoxiu Zeng
Signed-off-by: Zhaoxiu Zeng
---
arch/mips/include/asm/bitops.h | 7 +++
arch/tile/include/asm/bitops.h | 2 ++
2 files changed, 9 insertions(+)
Acked-by: Chris Metcalf [for tile]
--
Chris Metcalf, Mellanox Technolog
From: Mike Christie
It looks like dm stats cares about the data direction
(READ vs WRITE) and does not need the bio/request flags.
Commands like REQ_FLUSH, REQ_DISCARD and REQ_WRITE_SAME
are currently always set with REQ_WRITE, so the extra check for
REQ_DISCARD in dm_stats_account_io is not need
On Fri, Apr 15, 2016 at 11:59:00AM -0700, Gustavo Padovan wrote:
> 2016-04-15 Daniel Vetter :
> > On Thu, Apr 14, 2016 at 06:29:38PM -0700, Gustavo Padovan wrote:
> > > diff --git a/drivers/gpu/drm/drm_fops.c b/drivers/gpu/drm/drm_fops.c
> > > index aeef58e..38def49 100644
> > > --- a/drivers/gpu/d
From: Mike Christie
This patch has bcache use bio->bi_op for REQ_OPs and rq_flag_bits
to bio->bi_rw.
Signed-off-by: Mike Christie
Reviewed-by: Christoph Hellwig
Reviewed-by: Hannes Reinecke
---
drivers/md/bcache/btree.c | 2 ++
drivers/md/bcache/debug.c | 2 ++
drivers/md/bcache/io
From: Mike Christie
This patch has hfsplus use bio->bi_op for REQ_OPs and rq_flag_bits
to bio->bi_rw.
Signed-off-by: Mike Christie
Reviewed-by: Christoph Hellwig
Reviewed-by: Hannes Reinecke
---
fs/hfsplus/hfsplus_fs.h | 2 +-
fs/hfsplus/part_tbl.c | 5 +++--
fs/hfsplus/super.c | 6
> --- a/drivers/net/dsa/mv88e6xxx.c
> +++ b/drivers/net/dsa/mv88e6xxx.c
> @@ -2663,11 +2663,15 @@ int mv88e6xxx_setup_ports(struct dsa_switch *ds)
> int mv88e6xxx_setup_common(struct dsa_switch *ds)
> {
> struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
> + int id;
>
> ps->ds =
From: Mike Christie
This patch has btrfs's submit_one_bio callers set the bio->bi_op to a
REQ_OP and the bi_rw to rq_flag_bits.
The next patches will continue to convert btrfs,
so submit_bio_hook and merge_bio_hook
related code will be modified to take only the bio. I did
not do it in this patch
From: Mike Christie
This patch converts the simple bi_rw use cases in the block,
drivers, mm and fs code to set the bio->bi_op to a REQ_OP.
These should be simple one liner cases, so I just did them
in one patch. The next patches handle the more complicated
cases in a module per patch.
v5:
1. A
From: Mike Christie
This has submit_bh users pass in the operation and flags separately,
so submit_bh_wbc can setup bio->bi_op and bio-bi_rw on the bio that
is submitted.
Signed-off-by: Mike Christie
Reviewed-by: Christoph Hellwig
Reviewed-by: Hannes Reinecke
---
drivers/md/bitmap.c
On Fri, Apr 15, 2016 at 02:25:50PM -0400, Vivien Didelot wrote:
> We already have the product number and revision stored in the info
> structure and the switch private state.
>
> It is not necessary to clutter the header file with shifted product
> number for devices that we don't even support yet
i_rw.
>
> This patchset was made against linux-next from today April 15
> (git tag next-20160415).
>
> I put a git tree here:
> https://github.com/mikechristie/linux-kernel.git
> The patches are in the op branch.
>
> v7:
> 1. Fix broken feature_flush/fua use.
>
>
From: Ganapatrao Kulkarni
The erratum fixes the hang of ITS SYNC command by avoiding inter node
io and collections/cpu mapping on thunderx dual-socket platform.
This fix is only applicable for Cavium's ThunderX dual-socket platform.
This is based on NUMA v16 series.
Message-Id: <1460155828-8690
This lets call intel_crt_reset() in contexts where IRQs are disabled and
as such, can't hold the locks required to work with the connectors.
CC: sta...@vger.kernel.org
Signed-off-by: Lyude
---
drivers/gpu/drm/i915/intel_crt.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff
While VGA hotplugging worked(ish) before, it looks like that was mainly
because we'd unintentionally enable it in
valleyview_crt_detect_hotplug() when we did a force trigger. This
doesn't work reliably enough because whenever the display powerwell on
vlv gets disabled, the values set in VLV_ADPA ge
From: Mike Christie
This has callers of submit_bio/submit_bio_wait set the bio->bi_rw
instead of passing it in. This makes that use the same as
generic_make_request and how we set the other bio fields.
v5:
1. Missed crypto fs submit_bio_wait call.
v2:
1. Set bi_rw instead of ORing it. For clon
I will resend this with a proper version tag.
-Robert
On 15.04.16 21:15:34, Robert Richter wrote:
> From: Ganapatrao Kulkarni
>
> The erratum fixes the hang of ITS SYNC command by avoiding inter node
> io and collections/cpu mapping on thunderx dual-socket platform.
>
> This fix is only applic
On 04/15/2016 06:16 PM, Tony Lindgren wrote:
>> The hwmod checks the bits described by prcm.omap2. If two hwmods are set up
>> to
>> manage/monitor the same bits in PRCM, what will happen when the two driver
>> does pm_runtime?
>>
>> CM_ICLKEN_PER[0] = 1
>> McBSP2: runtime_get_sync()
>> CM_ICLKEN_
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to
enum nand_ecc_algo).
Signed-off-by: Rafał Miłecki
---
drivers/mtd/nand/bf5xx_nand.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/nand/bf5xx_nand.c b/drivers/mtd/nand/bf5xx_nand.c
index b38f414..37da423 100
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to
enum nand_ecc_algo).
Signed-off-by: Rafał Miłecki
Signed-off-by: Boris Brezillon
---
drivers/mtd/nand/davinci_nand.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to
enum nand_ecc_algo).
Signed-off-by: Rafał Miłecki
---
drivers/staging/mt29f_spinand/mt29f_spinand.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/staging/mt29f_spinand/mt29f_spinand.c
b/drivers/staging/mt29f_s
There isn't any difference between handling NAND_ECC_SOFT and
NAND_ECC_SOFT_BCH now. What matters is the new field called "algo".
Please note we're keeping backward DT compatibility. We are still
treating "soft_bch" value as the one setting Hamming algorithm, it's
just handled in of_get_nand_ecc_al
Commit d5c3d84657db ("net: phy: Avoid polling PHY with
PHY_IGNORE_INTERRUPTS") removed the last polling done on the phy. Since
then, the last actual poll done on the phy happens PHY_STATE_TIME seconds
(that is actually one second) after registering the phy. If the interface
is not UP by that time,
Now we have all drivers properly setting this new field we can start
using it and proceed with deprecating NAND_ECC_SOFT_BCH.
Signed-off-by: Rafał Miłecki
---
drivers/mtd/nand/nand_base.c | 98
1 file changed, 53 insertions(+), 45 deletions(-)
diff -
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to
enum nand_ecc_algo).
Signed-off-by: Rafał Miłecki
---
drivers/mtd/nand/nand_base.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index dd02c09..e1f3cf8 100644
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to
enum nand_ecc_algo).
Signed-off-by: Rafał Miłecki
---
arch/avr32/boards/atngw100/setup.c | 1 +
arch/avr32/boards/atstk1000/atstk1002.c | 1 +
include/linux/platform_data/atmel.h | 1 +
3 files changed, 3 insertions
Set it to value obtained from platform data with fallback to Hamming.
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to
enum nand_ecc_algo).
Signed-off-by: Rafał Miłecki
---
drivers/mtd/nand/atmel_nand.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/mtd/
This value should not be part of nand_ecc_modes_t as it specifies
algorithm not a mode. We successfully managed to introduce new "algo"
field which is respected now.
Signed-off-by: Rafał Miłecki
---
drivers/mtd/nand/fsmc_nand.c | 3 +--
drivers/mtd/nand/jz4780_nand.c | 1 -
drivers/mtd/nand/na
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to
enum nand_ecc_algo).
Signed-off-by: Rafał Miłecki
---
arch/cris/arch-v32/drivers/mach-a3/nandflash.c | 1 +
arch/cris/arch-v32/drivers/mach-fs/nandflash.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/cris/arch-
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to
enum nand_ecc_algo).
Signed-off-by: Rafał Miłecki
---
drivers/mtd/nand/hisi504_nand.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/nand/hisi504_nand.c b/drivers/mtd/nand/hisi504_nand.c
index 7bf844c..f9172
NAND core sets ECC algorithm in algo field now and it should be
preferred over the mode field. This also prepares driver for dropping
NAND_ECC_SOFT_BCH.
Signed-off-by: Rafał Miłecki
---
drivers/mtd/nand/fsmc_nand.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/driver
ANWALTKANZLEI:DR.GEMMA GUARRENO
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Tel: 0034 631 115 467
Email: gemmaguar...@outlook.es
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persцnliche Investment
On Fri, Apr 15, 2016 at 12:05:26PM -0700, James Bottomley wrote:
> On Fri, 2016-04-15 at 20:56 +0200, Denys Vlasenko wrote:
> > and now *many* users of qla2x00 and new-ish gcc are going to
> > very much notice it, as their kernels will start crashing reliably.
> >
> > The commits can be reverted,
v4.6-rc3
tools/perf then tools/perf_clean fails in the source tree:
*** output directory
"/home/all/SourceCode/linux/linux/tools/perf/tools/perf/" does not
exist. Stop.
https://bugzilla.kernel.org/show_bug.cgi?id=116411
The problem is that recursive/sub-makes effectively doing
O=$(O)/$(su
Thanks for looking at this; I've become lost in Makefile hell trying to
figure it out :)
On 15-04-2016 17:00, Arnaldo Carvalho de Melo wrote:
Em Fri, Apr 15, 2016 at 03:21:35PM +0100, TJ escreveu:
v4.6-rc3
tools/perf then tools/perf_clean fails in the source tree:
*** output directory
"/home/a
(Please keep me CC'd to all comments/responses)
I've tried a kernel upgrade from 3.4.2 to 4.4.0 and see a marked drop in
networking performance. Nothing was changed on the test systems, other than
the kernel itself (and kernel modules). The identical .config used to build
the 3.4.2 kernel was
On 15/04/16 12:56, Alexandre Belloni wrote:
> Commit d5c3d84657db ("net: phy: Avoid polling PHY with
> PHY_IGNORE_INTERRUPTS") removed the last polling done on the phy. Since
> then, the last actual poll done on the phy happens PHY_STATE_TIME seconds
> (that is actually one second) after registerin
On Thu, Apr 14, 2016 at 03:03:24PM -0600, Ross Zwisler wrote:
> With the new addition of the multi-order radix tree support we can simplify
> the DAX *sync PMD support a bit. Instead of manually checking to see if
> our index is covered by a PMD entry we can rely on the new radix tree to
> return
Fix problems in uapi definitions reported by Gabriel Laskar:
(see https://lkml.org/lkml/2016/4/5/205 for details)
- move public header file rio_mport_cdev.h to include/uapi/linux directory
- change types in data structures passed as IOCTL parameters
- improve parameter checking in some IOCTL servi
> "John" == John Garry writes:
John,
John> Could these also be applied to 4.6 fixes branch? Maybe I should
John> have explicitly asked.
Only taking critical patches for 4.6 at this point.
--
Martin K. Petersen Oracle Linux Engineering
On Mon, Mar 28, 2016 at 8:37 PM, Bjorn Andersson
wrote:
> From: Bjorn Andersson
>
> This introduces the peripheral image loader, for loading WCNSS firmware
> and boot the core on e.g. MSM8974. The firmware is verified and booted
> with the help of the Peripheral Authentication System (PAS) in
> T
This was just a random thought process I was having last night, and
wondered if it was possible.
We have a scenario with OpenGL where certain APIs hand large amounts
of data from the user to the API and when you return from the API call
the user can then free/overwrite/do whatever they want with t
On Fri, 15 Apr 2016 11:17:55 -0500, David Lechner said:
> I omitted this on purpose. For my use case, I am using the SPI as
> write-only,
So your SPI accesses are fire-and-forget, and nothing ever comes back?
Seems a very dangerous way to design the use case, with no feedback if
something suddenl
> "Tina" == Tina Ruchandani writes:
Tina> 'struct timeval' will have its tv_sec value overflow on 32-bit
Tina> systems in year 2038 and beyond. This patch replaces the use of
Tina> struct timeval for computing mpi_request.TimeStamp, and instead
Tina> uses ktime_t which provides 64-bit seconds
On Fri, 2016-04-15 at 21:54 +0200, Rafał Miłecki wrote:
> NAND core sets ECC algorithm in algo field now and it should be
> preferred over the mode field. This also prepares driver for dropping
> NAND_ECC_SOFT_BCH.
>
> Signed-off-by: Rafał Miłecki
> ---
> drivers/mtd/nand/fsmc_nand.c | 7 +--
Hi Andrew,
Andrew Lunn writes:
> On Fri, Apr 15, 2016 at 02:25:49PM -0400, Vivien Didelot wrote:
>> Move the number of databases to the info structure.
>
> Isn't the number of databases a property of the family?
No.
We've seen [1] for instance that 6061 and 6065 are both part of the 6065
famil
On Fri, 2016-04-15 at 13:23 -0700, Joe Perches wrote:
> Why not just add NAND_ECC_SOFT above the default case?
Nevermind, misread.
From: Andi Kleen
Everything the same as base Skylake, just a new model number.
Signed-off-by: Andi Kleen
---
arch/x86/events/intel/core.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index a7ec685657a5..8fddb0283111 100644
---
On Fri, Apr 15, 2016 at 04:24:26PM -0400, Vivien Didelot wrote:
> Hi Andrew,
>
> Andrew Lunn writes:
>
> > On Fri, Apr 15, 2016 at 02:25:49PM -0400, Vivien Didelot wrote:
> >> Move the number of databases to the info structure.
> >
> > Isn't the number of databases a property of the family?
>
>
> "Dan" == Dan Carpenter writes:
Dan> It's possible to use "err" without initializing it. If it happens
Dan> to be a 2 which is SCSI_DH_RETRY then that could cause a bug. Bart
Dan> Van Assche pointed out that we should probably re-initialize it for
Dan> every iteration through the retry loo
This patch adds support for asymmetric key type to AF_ALG.
It will work as follows: A new PF_ALG socket options are
added on top of existing ALG_SET_KEY and ALG_SET_PUBKEY, namely
ALG_SET_KEY_ID and ALG_SET_PUBKEY_ID for setting public and
private keys respectively. When these new options will be u
From: Stephan Mueller
Add the Makefile and Kconfig updates to allow algif_akcipher to be
compiled.
Signed-off-by: Stephan Mueller
Signed-off-by: Tadeusz Struk
---
crypto/Kconfig |9 +
crypto/Makefile |1 +
2 files changed, 10 insertions(+)
diff --git a/crypto/Kconfig b/crypt
Similar to algif_skcipher and algif_hash, algif_akcipher needs
to prevent user space from using the interface in an improper way.
This patch adds nokey ops handlers, which do just that.
Signed-off-by: Tadeusz Struk
---
crypto/algif_akcipher.c | 159 +-
First four patches are a resend of the v3 algif_akcipher from
Stephan Mueller, with minor changes after rebase on top of 4.6-rc1.
The next three patches add support for keys stored in system
keyring subsystem.
First patch adds algif_akcipher nokey hadlers.
Second patch adds generic sign, verify,
From: Stephan Mueller
For supporting asymmetric ciphers, user space must be able to set the
public key. The patch adds a new setsockopt call for setting the public
key.
Signed-off-by: Stephan Mueller
Signed-off-by: Tadeusz Struk
---
crypto/af_alg.c | 18 +-
include/c
From: Stephan Mueller
Add the flags for handling signature generation and signature
verification.
Also, the patch adds the interface for setting a public key.
Signed-off-by: Stephan Mueller
Signed-off-by: Tadeusz Struk
---
include/uapi/linux/if_alg.h |3 +++
1 file changed, 3 insertions(
From: "Cooper Jr., Franklin"
The prefetch engine sends a dma request once a FIFO threshold has
been met. No other requests are received until the previous request
is handled.
Starting a dma transfer (dma_async_issue_pending) results in any
previous event for the dma channel to be cleared. Theref
On Fri, Apr 15, 2016 at 11:36:52AM +0100, Paul Burton wrote:
> asm/pgtable-bits.h has grown to become an unreadable mess of #ifdef
> directives defining bits conditionally upon other bits all at the
> preprocessing stage, for no good reason.
>
> Instead of having quite so many #ifdef's, simply use
NAND DMA prefetch for SDMA based devices has been broken for awhile. This
patchset fixes it so SOCs that use the SDMA can make use of the NAND
DMA prefetch.
I've decided to split this patchset from the slightly larger patchset that
included EDMA support. Adding EDMA support will be added in a late
From: "Cooper Jr., Franklin"
Based on DMA documentation and testing using high memory buffer when doing
dma transfers can lead to various issues including kernel panics.
To workaround this simply use cpu copy.
Signed-off-by: Franklin S Cooper Jr
---
drivers/mtd/nand/omap2.c | 13 ++---
From: Stephan Mueller
This patch adds the user space interface for asymmetric ciphers. The
interface allows the use of sendmsg as well as vmsplice to provide data.
This version has been rebased on top of 4.6 and a few chackpatch issues
have been fixed.
Signed-off-by: Stephan Mueller
Signed-off
From: Amitoj Kaur Chawla
Date: Sat, 9 Apr 2016 17:27:45 +0530
> Replace deprecated create_singlethread_workqueue with
> alloc_ordered_workqueue.
>
> Work items include getting tx/rx frame sizes, resetting MPI processor,
> setting asic recovery bit so ordering seems necessary as only one work
> i
Hi Tomasz,
[auto build test ERROR on pci/next]
[also build test ERROR on v4.6-rc3 next-20160415]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/Tomasz-Nowicki/Support-for-generic-ACPI-based
On 15 April 2016 at 22:24, Joe Perches wrote:
> On Fri, 2016-04-15 at 13:23 -0700, Joe Perches wrote:
>> Why not just add NAND_ECC_SOFT above the default case?
>
> Nevermind, misread.
At least someone reviews it which is nice :)
--
Rafał
When building locktorture test into kernel image, it keeps printing out
stats information even though there is no lock type specified.
There is already verbose parameter to control print, but it is read-only,
so it can't be changed at runtime. Make verbose read-write and control
stats print.
Sign
Andy Lutomirski writes:
> On Fri, Apr 15, 2016 at 8:34 AM, Eric W. Biederman
> wrote:
>>
>> To recap the situation for those who have not been following closely.
>>
>> There are programs such as xen-create-image that run as root and setup
>> a chroot environment with:
>> "mknod dev/ptmx c 5 2"
>
On 15/04/2016 at 13:10:12 -0700, Florian Fainelli wrote :
> On 15/04/16 12:56, Alexandre Belloni wrote:
> > Commit d5c3d84657db ("net: phy: Avoid polling PHY with
> > PHY_IGNORE_INTERRUPTS") removed the last polling done on the phy. Since
> > then, the last actual poll done on the phy happens PHY_S
> "John" == John Garry writes:
John> This patchset introduces a workaround to a hw quirk in the
John> HiSilicon SAS controller v2 hw.
John> The quirk is as follows: When a SATA and SAS frame arrives at the
John> host at the same time the frames may be swapped under this
John> condition: SATA
> "James" == James Bottomley writes:
James> The STARGET_REMOVE state you added only applies to the case we're
James> trying to kill a target. In the natural operation case, which is
James> what everyone else is running into, we will try to remove a
James> running target when it has no more s
Hi Andrew,
Andrew Lunn writes:
>> -#define PORT_SWITCH_ID_6350 0x3710
>> -#define PORT_SWITCH_ID_6351 0x3750
>> -#define PORT_SWITCH_ID_6352 0x3520
>
> NACK
>
> These numbers are not obvious. PORT_SWITCH_ID_6320 i can
> understand. 0x1150 i have no idea what it is.
0x1150 is not even correct.
From: Ganapatrao Kulkarni
The erratum fixes the hang of ITS SYNC command by avoiding inter node
io and collections/cpu mapping on thunderx dual-socket platform.
This fix is only applicable for Cavium's ThunderX dual-socket platform.
This is based on NUMA v16 series.
Message-Id: <1460155828-8690
Vivien Didelot writes:
>>> + { MV88E6XXX_INFO(6165, 0x165, "Marvell 88E6165") },
>>
>> I think
>>
>>> + { MV88E6XXX_INFO(MV88E6XXX_FAMILY_6165, 0x165, "Marvell 88E6165") },
>>
>> is clearer. It is hard to know what these values mean unless you go
>> look at the macro.
>
> Same goes for the M
Hi,
On 11/04/2016 at 22:03:55 +0530, Sudip Mukherjee wrote :
> stmp3xxx_wdt_register() can fail as platform_device_alloc() or
> platform_device_add() can fail. Lets check for the return value from
> both platform_device_alloc() and platform_device_add() and return the
> error value accordingly whi
On 04/15/2016 09:05 PM, James Bottomley wrote:
> On Fri, 2016-04-15 at 20:56 +0200, Denys Vlasenko wrote:
>> On 04/15/2016 04:40 PM, James Bottomley wrote:
>>> On Fri, 2016-04-15 at 12:36 +0200, Denys Vlasenko wrote:
More info here:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70646
>>>
>
On Fri, 15 Apr 2016, Guenter Roeck wrote:
> On Fri, Apr 15, 2016 at 11:22:36AM -0700, Stefano Stabellini wrote:
> > On Thu, 14 Apr 2016, Guenter Roeck wrote:
> > > Register with kernel restart handler instead of setting arm_pm_restart
> > > directly.
> > >
> > > Select a high priority of 192 to en
With the new reinitialization method, configuring parity, different
frame lengths and different stop bit settings work as expected on
both CH340G and CH341A. This has been extensively tested with a
logic analyzer.
v2: only set mark/space when parity is enabled, simplifications,
patch termios HW f
Signed-off-by: Grigori Goronzy
---
drivers/usb/serial/ch341.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/serial/ch341.c b/drivers/usb/serial/ch341.c
index 1ab4384..db4b561 100644
--- a/drivers/usb/serial/ch341.c
+++ b/drivers/usb/serial/ch341.c
@@ -61,6 +61,
No functional change. The following adjustments were made to be more in
line with official coding style and to be more consistent.
Stop mixing tabs and spaces for alignment. Stop putting labels and
statements into the same line. Use braces consistently for a single
statement.
v2: drop most cha
BREAK2 seems to be a misnomer, the register configures various aspects
of the UART configuration.
Signed-off-by: Grigori Goronzy
---
drivers/usb/serial/ch341.c | 19 ++-
1 file changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/usb/serial/ch341.c b/drivers/usb/serial
Em Thu, Apr 14, 2016 at 12:14:18PM +1000, Stephen Rothwell escreveu:
> Hi all,
>
> After merging the tip tree, today's linux-next build (powerpc64le perf)
> failed like this:
>
> make[3]: *** No rule to make target
> '/home/sfr/next/perf/arch/x86/include/generated/asm/syscalls_64.c', needed by
No functional change. Remove explicit function name printing, it's
easy to use dynamic debug to print it every time, if required.
Fix capitalization and phrasing in some cases. Drop useless
information like a USB buffer pointer, which is not helpful.
Signed-off-by: Grigori Goronzy
---
drivers/
There are at least two hardware revisions, this may be helpful in
case compatibility issues need to be debugged.
Signed-off-by: Grigori Goronzy
---
drivers/usb/serial/ch341.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/serial/ch341.c b/drivers/usb/serial/ch341.c
index 2fbec4a
v2: use correct flag variable.
v3: fix compilation
Signed-off-by: Grigori Goronzy
---
drivers/usb/serial/ch341.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/usb/serial/ch341.c b/drivers/usb/serial/ch341.c
index e475677..7ca21a1 100644
--- a/drivers/usb/serial/ch341.c
Hi,
here's a hopefully final v4 of my ch341 patchset. Changelog below
this time, because it's cleary better this way. Please review.
v4:
- Fix parity even/odd mixup introduced in v3.
- Fix compilation errors of intermediate commits introduced in v3.
v3:
- Use u8 shorthand for unsigned char.
-
On Fri, 2016-04-15 at 15:02 -0500, Josh Poimboeuf wrote:
> On Fri, Apr 15, 2016 at 12:05:26PM -0700, James Bottomley wrote:
> > On Fri, 2016-04-15 at 20:56 +0200, Denys Vlasenko wrote:
> > > and now *many* users of qla2x00 and new-ish gcc are going to
> > > very much notice it, as their kernels wil
The status bit was found with USB captures of the Windows driver and
some luck. Tested on CH340G and CH341A.
v2: unify general status definitions
Signed-off-by: Grigori Goronzy
---
drivers/usb/serial/ch341.c | 26 +-
1 file changed, 21 insertions(+), 5 deletions(-)
dif
If the serial port hasn't been opened yet, no baud rate should be
set and RTS/DTR need to be deasserted.
Signed-off-by: Grigori Goronzy
---
drivers/usb/serial/ch341.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/usb/serial/ch341.c b/drivers/usb/serial/ch341.c
index 3ce2041..
This may fail, do not assume it always works.
Signed-off-by: Grigori Goronzy
---
drivers/usb/serial/ch341.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/usb/serial/ch341.c b/drivers/usb/serial/ch341.c
index c73808f..63df8ce 100644
--- a/drivers/usb/serial/ch341.
Check for B0 in a more idiomatic way and make sure to not enable
RTS/CTS hardware flow control in B0 as it may override the control
lines. Also make sure to only enable RTS/DTR if there's a transition
from B0.
v2: use c_cflag macros.
v3: rebase.
Signed-off-by: Grigori Goronzy
---
drivers/usb/s
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