Le 27/03/2016 21:48, Anup Patel a écrit :
> The Broadcom iProc SoCs have AHCI compliant SATA controller. This
> patch adds common compatible string for AHCI SATA controller on
> iProc SoCs.
>
> Signed-off-by: Anup Patel
> Acked-by: Rob Herring
Acked-by: Florian Fainelli
Tejun, should I queue
Commit aeefb36832e5 ("drm/exynos: gsc: add device tree support and remove
usage of static mappings") made the DRM_EXYNOS_GSC Kconfig symbol to only
be selectable if the exynos-gsc V4L2 driver isn't enabled, since both use
the same HW IP block.
But added the dependency as depends on !VIDEO_SAMSUNG_
Commit 254d4d111ee1 ("drm/exynos: Add dependency for G2D in Kconfig") made
the DRM_EXYNOS_G2D symbol to only be selectable if the s5p-g2d V4L2 driver
is not enabled, since both use the same HW IP block.
But added the dependency as depends on !VIDEO_SAMSUNG_S5P_G2D which isn't
correct since Kconfig
Hello Inki,
This patch series contains some fixes for the Kconfig symbol dependencies
of the Exynos DRM driver. They make sure that the Exynos DRM components
and the media platform drivers that makes use of the same HW IP block are
not enabled at the same time.
Best regards,
Javier
Javier Marti
Exynos DRM driver components are only enabled if other drivers that make
use of the same HW IP block are not enabled. That's the case for the G2D,
GSC, Mixer and HDMI drivers.
The FIMC is also shared by the DRM and a V4L2 driver, so the same has to
be added as a dependency for the Exynos FIMC DRM
Le 27/03/2016 21:48, Anup Patel a écrit :
> This patch adds support for Broadcom NS2 SATA3 PHY in existing
> Broadcom SATA3 PHY driver.
>
> Signed-off-by: Anup Patel
As mentioned before during the internal review, there is a lot of churn
done here to add NS2 support, which in itself could be a g
Signed-off-by: Bjorn Andersson
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 1afee408a923..d872ddc2d190 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++
From: Bjorn Andersson
Add the necessary nodes for USB gadget on MSM8974 and enable these for
Honami.
Signed-off-by: Bjorn Andersson
Signed-off-by: Bjorn Andersson
---
.../boot/dts/qcom-msm8974-sony-xperia-honami.dts | 8 +
arch/arm/boot/dts/qcom-msm8974.dtsi| 38 +++
One part of the efs memory region is used specifically for sharing file system
buffers between the apps and modem cpus (aka rmtfs), so better reflect this
split.
Signed-off-by: Bjorn Andersson
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
Hi Javier,
Thanks for your patch set.
Will merge them if there is no issue.
Thanks,
Inki Dae
2016년 03월 29일 10:28에 Javier Martinez Canillas 이(가) 쓴 글:
> Hello Inki,
>
> This patch series contains some fixes for the Kconfig symbol dependencies
> of the Exynos DRM driver. They make sure that the E
On Tue, Mar 22, 2016 at 2:12 PM, Ming Lei wrote:
> Hi,
>
> Interests[1] have been shown in multipage bvecs, so this patchset
> try to prepare for the support and do two things:
>
> 1) the 1st 4 patches use bvec iterator to implement iterate_bvec(),
> then we can drop the non-standard way for itera
FYI, we noticed the below changes on
https://github.com/0day-ci/linux
Laura-Abbott/mm-slub-Skip-CPU-slab-activation-when-debugging/20160329-065544
commit 923e73a1d7ab188f43f117b4c4eaf5e0ae345c37 ("mm/slub: Skip CPU slab
activation when debugging")
[5.788861] Key type id_legacy registered
[
Signed-off-by: Bjorn Andersson
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 32
1 file changed, 32 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
b/arch/arm/boot/dts/qcom-msm8974.dtsi
index d872ddc2d190..79c9cfcabf77 100644
--- a/arch/arm/boot/dts/q
This patch fixes a bug introduced by:
commit 3cbaa59069677920186dcf502632ca1df4329f80
Author: Peter Zijlstra
Date: Wed Feb 24 18:45:47 2016 +0100
perf: Fix ctx time tracking by introducing EVENT_TIME
This patch introduce a bug in the time tracking of events when multiplexing is
used.
Th
On Tue, Mar 15, 2016 at 11:08:00PM +, Pandruvada, Srinivas wrote:
> On Mon, 2016-03-14 at 11:12 -0700, Srikar Srimath Tirumala wrote:
> > Add a sysfs_notify on thermal_zone*/temp and cooling_device*/
> > cur_state whenever any trip is triggered or cur state is changed.
> >
> > This change allo
Hi Arnd, Olof
Two patches for UniPhier SMP updates.
Please get them into ASOC.
Masahiro Yamada (2):
ARM: uniphier: fix up cache ops broadcast of ACTLR
ARM: uniphier: initialize outer cache for secondary CPUs
arch/arm/include/asm/hardware/cache-uniphier.h | 5 +
arch/arm/mach-uniphie
Some parts of this outer cache need per-CPU initialization. The
registers for controlling active ways are banked for each CPU.
Each secondary CPU should activate ways at its boot-up. Otherwise,
the data in the outer cache are not refilled in case of cache miss
from secondary CPUs, making data ac
The Boot ROM of the UniPhier ARMv7 SoCs sets ACTLR (Auxiliary Control
Register) to different values for different secure states:
[1] Set ACTLR to 0x41 for Non-secure boot
[2] Set ACTLR to 0x40 for Secure boot
[1] is okay, but [2] is a problem. Because of commit 1b3a02eb4523
("ARMv7: Check whethe
On 07.03.2016 18:25, Alim Akhtar wrote:
> Hi Krzysztof,
>
> On 03/07/2016 09:44 AM, Krzysztof Kozlowski wrote:
>> On 26.02.2016 18:06, Alim Akhtar wrote:
>>> This patch adds tmu node, related temprature sensor and triping
>>> point data for Atlas cpu core found on exynos7 SoC.
>>>
>>> Signed-off-b
Hi Javier,
On 2016년 03월 29일 10:28, Javier Martinez Canillas wrote:
> Hello Inki,
>
> This patch series contains some fixes for the Kconfig symbol dependencies
> of the Exynos DRM driver. They make sure that the Exynos DRM components
> and the media platform drivers that makes use of the same HW I
On 28.03.2016 09:44, Chanwoo Choi wrote:
> You mean that separate patch1 include only the new clock id about both UART2
> and MMC2
> and the patch2/patch3 just use the new clock id as following:
>
> patch1 dt-bindings: Add the clock id of UART2 and MMC2 for Exynos3250
> patch2 clk: samsung: exyno
On 03/28/2016 03:53 PM, Laura Abbott wrote:
The per-cpu slab is designed to be the primary path for allocation in SLUB
since it assumed allocations will go through the fast path if possible.
When debugging is enabled, the fast path is disabled and per-cpu
allocations are not used. The current deb
On Mon, 2016-03-28 at 11:57 -0400, Rhyland Klein wrote:
> On 3/28/2016 6:05 AM, Daniel Kurtz wrote:
> > +Rhyland Klein who original wrote this code...
> >
> > On Mon, Mar 28, 2016 at 10:32 AM, YH Huang wrote:
> >>
> >> On Fri, 2016-03-25 at 11:06 +0800, Daniel Kurtz wrote:
> >>> On Thu, Mar 24, 2
在 2016/3/25 5:29, Heiko Stuebner 写道:
The emmc-phy is fully enclosed in the general register files (GRF).
Therefore as seen from the device-tree it shouldn't be a separate platform-
device but instead a sub-device of the GRF - using the simply-mfd mechanism.
The driver entered the kernel in the c
Similar to an earlier fix for the SAI clocks, the DCU clock hierarchy
mixes the bus clock with the display controllers pixel clock. Tests
have shown that the gates in CCM_CCGR3/9 registers do not control
the DCU pixel clock, but only the register access clock (bus clock).
Fix this by defining the
Add the ipg (bus) clock for the TCON modules (Timing Controller). This
module is required by the new DCU DRM driver, since the display signals
pass through TCON.
Signed-off-by: Stefan Agner
---
drivers/clk/imx/clk-vf610.c | 3 +++
include/dt-bindings/clock/vf610-clock.h | 4 +++-
2 f
This patchset adds the missing pieces to make the Freescale
DCU DRM driver work on Freescale Vybrid.
Foremost, it adds support for the timing controller (TCON)
module. The module is between the Display Controller and the
actual output pins. It allows to alter the timings for RAW
TFT displays, but
Add the dcu and tcon nodes to enable the Display Controller Unit
and Timing Controller in Vybrid's SoC level device-tree file.
Signed-off-by: Stefan Agner
---
arch/arm/boot/dts/vfxxx.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch
Add driver for the TCON (timing controller) module. The TCON module
is a separate module attached after the DCU (display controller
unit). Each DCU instance has its own, directly connected TCON
instance. The DCU's RGB and timing signals are passing through
the TCON module. TCON can provide timing s
Use the common clock framework to calculate the pixel clock
dividier. The previous implementation rounded down the calculated
factor. Thanks to the CLK_DIVIDER_ROUND_CLOSEST flag using the
common clock framework divider implementation improves the pixel
clock accuracy in some cases. Ontop of that i
Enable dcu node which is used by the DCU DRM driver. Assign the 5.7"
EDT panel with VGA resolution which Toradex sells often with the
evaluation board.
Signed-off-by: Stefan Agner
---
arch/arm/boot/dts/vf-colibri-eval-v3.dtsi | 16 +++
arch/arm/boot/dts/vf-colibri.dtsi | 33 +
Fix error handling during probe by reordering initialization and
adding a error path which disables clock again. Also disable the
clock on remove.
Signed-off-by: Stefan Agner
---
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 44 +++
1 file changed, 21 insertions(+), 23
The Vybrid DCU variant has two independent clock inputs, one
for the registers (IPG bus clock) and one for the pixel clock.
Support this distinction in the DCU DRM driver while staying
backward compatible with devices providing only a single clock
(e.g. LS1021a SoC's).
Signed-off-by: Stefan Agner
On 2016/3/28 14:41, Wang Nan wrote:
[SNIP]
To prevent this problem, we need to find a way to ensure the ring buffer
is stable during reading. ioctl(PERF_EVENT_IOC_PAUSE_OUTPUT) is
suggested because its overhead is lower than
ioctl(PERF_EVENT_IOC_ENABLE).
Add comment:
By carefully verifyi
On Tue, 16 Feb 2016 00:42:25 +0100 (CET)
Jiri Kosina wrote:
> Steven, I'd appreciate if you could tell me whether your Ack to
> "ftrace/module: remove ftrace module notifier" still holds even if
> module.c changes are not happening.
When threads get this busy, and I'm busy on other things, I
On 29 March 2016 at 08:32, Peter Chen wrote:
>
>>
>> On 28 March 2016 at 15:13, Peter Chen wrote:
>> > On Mon, Mar 28, 2016 at 02:51:40PM +0800, Baolin Wang wrote:
>> >> On 25 March 2016 at 15:09, Peter Chen wrote:
>> >> > On Thu, Mar 24, 2016 at 08:35:53PM +0800, Baolin Wang wrote:
>> >> >> Cur
Add new ioctl() to pause/resume ring-buffer output.
In some situations we want to read from ring buffer only when we
ensure nothing can write to the ring buffer during reading. Without
this patch we have to turn off all events attached to this ring buffer
to achieve this.
This patch is for suppor
在 2016年03月29日 01:25, David Daney 写道:
On 03/26/2016 11:06 PM, zhaoxiu.zeng wrote:
From: Zeng Zhaoxiu
There is nothing MIPS specific here. Why not put it in asm-generic or
some similar place where it can be shared by all architectures?
Also, are you sure __builtin_popcount() is available
Hi Daniel,
2016년 03월 28일 22:26에 Daniel Stone 이(가) 쓴 글:
> Hi Inki,
>
> On 28 March 2016 at 02:26, Inki Dae wrote:
>> 2016년 03월 25일 21:10에 Daniel Stone 이(가) 쓴 글:
>>> Second, really. Vulkan avoids implicit sync entirely, and exposes
>>> fence-like primitives throughout its whole API. These include
在 2016年03月28日 14:51, Sam Ravnborg 写道:
diff --git a/include/asm-generic/bitops/arch_parity.h
b/include/asm-generic/bitops/arch_parity.h
new file mode 100644
index 000..cddc555
--- /dev/null
+++ b/include/asm-generic/bitops/arch_parity.h
@@ -0,0 +1,39 @@
+#ifndef _ASM_GENERIC_BITOPS_ARCH_PARIT
Commit 271707b1d817 ("mtd: nand: denali: max_banks calculation
changed in revision 5.1") supported the new encoding of the "n_banks"
bits of the "features" register, but there is an unfortunate case
not covered by that commit.
Panasonic (its System LSI Business Division is now Socionext) bought
a
On 24.03.2016 15:40, Viresh Kumar wrote:
> The cpufreq-dt-platdev driver supports creation of cpufreq-dt platform
> device now, reuse that and remove similar code from platform code.
>
> Signed-off-by: Viresh Kumar
> ---
> arch/arm/mach-exynos/exynos.c| 25 -
> dr
In dwc2_hsotg_udc_start(), don't initialize the controller for device
mode unless we are actually in device mode.
Signed-off-by: John Youn
---
drivers/usb/dwc2/gadget.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.
Hi,
The following patch series addresses the core reset and force mode
delay problems we have been seeing on dwc2 for some platforms.
I think I have identified the source of the inconsistencies between
platforms and this series attempts to address them.
Basically everything stems from the IDDIG
Add a delay to the core soft reset function to account for the IDDIG
debounce filter.
If the current mode is host, either due to the force mode bit being
set (which persists after core reset) or the connector id pin, a core
soft reset will temporarily reset the mode to device and a delay from
the
From: Przemek Rudy
The host/device mode set with dr_mode should be kept all the time,
not being changed to OTG in gadget setup (by overriding CFGUSB_FORCEDEVMODE
and CFGUSB_FORCEHOSTMODE bits).
Signed-off-by: Przemek Rudy
Signed-off-by: John Youn
---
drivers/usb/dwc2/gadget.c | 23 +++
When a force mode bit is set and the IDDIG debounce filter is enabled,
there is a delay for the forced mode to take effect. This delay is due
to the IDDIG debounce filter and is variable depending on the platform's
PHY clock speed. To account for this delay we can poll for the expected
mode.
On a
On 29-03-16, 11:35, Krzysztof Kozlowski wrote:
> On 24.03.2016 15:40, Viresh Kumar wrote:
> > The cpufreq-dt-platdev driver supports creation of cpufreq-dt platform
> > device now, reuse that and remove similar code from platform code.
> >
> > Signed-off-by: Viresh Kumar
> > ---
> > arch/arm/mac
Hi all-
AFAICT something got rather screwed up in i915 land for 4.5.
$ git log --oneline --grep='Pretend cursor is always on' v4.5
drivers/gpu/drm/i915/
e2e407dc093f drm/i915: Pretend cursor is always on for ILK-style WM
calculations (v2)
$ git log --oneline --grep='Pretend cursor is always on'
Hello Seung-Woo,
Thanks a lot for your feedback.
On 03/28/2016 09:46 PM, Seung-Woo Kim wrote:
> Hi Javier,
>
> On 2016년 03월 29일 10:28, Javier Martinez Canillas wrote:
>> Hello Inki,
>>
>> This patch series contains some fixes for the Kconfig symbol dependencies
>> of the Exynos DRM driver. They
On Tue, 2016-03-29 at 10:27 +0800, Zeng Zhaoxiu wrote:
> 在 2016年03月28日 14:51, Sam Ravnborg 写道:
[]
> > Defining these as static inlines in asm-generic prevent an
> > architecture
> > from selecting between a more optimal asm version or the generic version
> > at run-time.
> > sparc would benefit fro
Hi Josh,
First bad commit (maybe != root cause):
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 1993b176a8224e371e0732ffada7ab9eb3b0912b
commit: c1d45c3abd49b5bf9447e435099c1b000dcde752 objtool: Support CROSS_COMPILE
date: 4 weeks ago
config: x86_64-r
On Mon, Mar 28, 2016 at 11:29:52AM +0200, Borislav Petkov wrote:
> On Mon, Mar 28, 2016 at 01:32:12PM +0800, Huang Rui wrote:
> > +
> > + get_online_cpus();
> > + this_cpu = get_cpu();
>
> What now?
>
> get_online_cpus() is enough.
>
Will remove get_cpu().
> > +
> > + /*
> > +* Choos
On Fri, Mar 25, 2016 at 01:37:17PM +0800, Wei Ni wrote:
> Hi, Eduardo
> Will you take this series, it seems no more comments.
Yeah, I am taking a look at it. Something is fishy about it. Patch 04
does not apply cleanly. Also, why did you split the patches into two
email threads, one which is 1-4 a
On Wed, Mar 16, 2016 at 04:58:26PM +0800, Wei Ni wrote:
> Handle clock enable/disable codes in one funcion
WARNING: 'funcion' may be misspelled - perhaps 'function'?
#48:
Handle clock enable/disable codes in one funcion
> soctherm_clk_enable(), so that the codes are more clear.
>
> Signed-off-
On Wed, Mar 16, 2016 at 04:58:15PM +0800, Wei Ni wrote:
> Add support for hardware critical thermal limits to the
> SOC_THERM driver. It use the Linux thermal framework to
> create critical trip temp, and set it to SOC_THERM hardware.
> If these limits are breached, the chip will reset, and if
> ap
On Mon, Mar 28, 2016 at 11:33:27AM +0200, Borislav Petkov wrote:
> On Mon, Mar 28, 2016 at 01:32:14PM +0800, Huang Rui wrote:
> >
> > return 0;
> > @@ -330,6 +446,9 @@ static int fam15h_power_init_data(struct pci_dev *f4,
> >
> > data->max_cu_acc_power = tmp;
> >
> > + /* set defaul
On Mon, Mar 28, 2016 at 08:04:41PM -0700, Eduardo Valentin wrote:
> On Fri, Mar 25, 2016 at 01:37:17PM +0800, Wei Ni wrote:
> > Hi, Eduardo
> > Will you take this series, it seems no more comments.
>
> Yeah, I am taking a look at it. Something is fishy about it. Patch 04
> does not apply cleanly.
This is just an example of a conversion of ACPI_INFO to a more
typical kernel use style. All of the other ACPI_ calls
would also need conversion.
Almost all logging functions and macros in the kernel are lower case
and nearly all use formats with terminating newlines.
ACPI uses upper case macros
From: Bjorn Andersson
The document defines the binding for a component that loads firmware for
and boots the Qualcomm WCNSS core.
Signed-off-by: Bjorn Andersson
Signed-off-by: Bjorn Andersson
---
Changes since v1:
- Dropped non-variable properties (crash reason, firmware name)
- Split wcnss a
Signed-off-by: Bjorn Andersson
---
Andy, this is only here for context, please apply separately.
Changes since v1:
- Added dts patches
arch/arm/boot/dts/qcom-apq8064.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi
b/arch/arm/boot/dts/qcom-apq8
From: Bjorn Andersson
Signed-off-by: Bjorn Andersson
Signed-off-by: Bjorn Andersson
---
Changes since v1:
- Added dts patches
.../boot/dts/qcom-msm8974-sony-xperia-honami.dts | 32 +++
arch/arm/boot/dts/qcom-msm8974.dtsi| 36 +-
2 files c
Signed-off-by: Bjorn Andersson
---
Andy, this is only here for context, please apply separately.
Changes since v1:
- Added dts patches
arch/arm/boot/dts/qcom-apq8064.dtsi | 49 +
1 file changed, 49 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064.d
Signed-off-by: Bjorn Andersson
---
Andy, this is only here for context, please apply separately.
Changes since v1:
- Added dts patches
arch/arm/boot/dts/qcom-apq8064.dtsi | 40 +
1 file changed, 40 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064.d
From: Bjorn Andersson
The Qualcomm WCNSS can crash by watchdog or a fatal software error. Add
these types to the list of remoteproc crash reasons.
Signed-off-by: Bjorn Andersson
Signed-off-by: Bjorn Andersson
---
Changes since v1:
- None
drivers/remoteproc/remoteproc_core.c | 2 ++
include/
This series introduces the remoteproc driver for controlling the Qualcomm
Wireless Connectivity Subsystem (WCNSS). The WCNSS is a builtin ARM9 inside the
Qualcomm SoC with an externally connected RF module (iris).
Supports booting and shutting down wcnss on 8064, 8974 and 8016. The driver
will cal
From: Bjorn Andersson
This introduces the peripheral image loader, for loading WCNSS firmware
and boot the core on e.g. MSM8974. The firmware is verified and booted
with the help of the Peripheral Authentication System (PAS) in
TrustZone.
Signed-off-by: Bjorn Andersson
Signed-off-by: Bjorn Ande
Signed-off-by: Bjorn Andersson
---
Changes since v1:
- Added dts patches
.../arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts | 4 ++
arch/arm/boot/dts/qcom-apq8064.dtsi| 57 ++
2 files changed, 61 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-son
From: Bjorn Andersson
Remote processors like the ones found in the Qualcomm SoCs does not have
a resource table passed to them, so make it optional by only populating
it if it does exist.
Signed-off-by: Bjorn Andersson
Signed-off-by: Bjorn Andersson
---
Changes since v1:
- None
drivers/remo
Hi Bjorn,
[auto build test ERROR on v4.6-rc1]
[also build test ERROR on next-20160329]
[cannot apply to robh/for-next]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/Bjorn-Andersson/ARM-dts-qc
>
> When creating a hugetlb mapping, attempt PUD_SIZE alignment if the
> following conditions are met:
> - Address passed to mmap or shmat is NULL
> - The mapping is flaged as shared
> - The mapping is at least PUD_SIZE in length
> If a PUD_SIZE aligned mapping can not be created, then fall back t
On 24.03.2016 15:40, Viresh Kumar wrote:
> Multiple platforms are using the generic cpufreq-dt driver now, and all
> of them are required to create a platform device with name "cpufreq-dt",
> in order to get the cpufreq-dt probed.
>
> Many of them do it from platform code, others have special driv
On Fri, 2016-03-25 at 17:24 +0100, Mike Galbraith wrote:
> On Fri, 2016-03-25 at 10:13 +0100, Mike Galbraith wrote:
> > On Fri, 2016-03-25 at 09:52 +0100, Thomas Gleixner wrote:
> > > On Fri, 25 Mar 2016, Mike Galbraith wrote:
> > > > On Thu, 2016-03-24 at 12:06 +0100, Mike Galbraith wrote:
> > > >
On 24.03.2016 15:40, Viresh Kumar wrote:
> The cpufreq-dt-platdev driver supports creation of cpufreq-dt platform
> device now, reuse that and remove similar code from platform code.
>
> Signed-off-by: Viresh Kumar
> ---
> arch/arm/mach-exynos/exynos.c| 25 -
> dr
On 29-03-16, 13:10, Krzysztof Kozlowski wrote:
> On 24.03.2016 15:40, Viresh Kumar wrote:
> > The cpufreq-dt-platdev driver supports creation of cpufreq-dt platform
> > device now, reuse that and remove similar code from platform code.
> >
> > Signed-off-by: Viresh Kumar
> > ---
> > arch/arm/mac
On 29-03-16, 09:48, Viresh Kumar wrote:
> On 29-03-16, 13:10, Krzysztof Kozlowski wrote:
> > On 24.03.2016 15:40, Viresh Kumar wrote:
> > > The cpufreq-dt-platdev driver supports creation of cpufreq-dt platform
> > > device now, reuse that and remove similar code from platform code.
> > >
> > > Si
From: Fu Wei
This can be a example of adding SBSA Generic Watchdog device node
into some dts files for the Soc which contains SBSA Generic Watchdog.
Acked-by: Arnd Bergmann
Signed-off-by: Suravee Suthikulpanit
Signed-off-by: Fu Wei
Reviewed-by: Guenter Roeck
---
Changelog:
v1 :Re-upstream it
Hello Javier,
On 2016년 03월 29일 11:41, Javier Martinez Canillas wrote:
> Hello Seung-Woo,
>
> Thanks a lot for your feedback.
>
> On 03/28/2016 09:46 PM, Seung-Woo Kim wrote:
>> Hi Javier,
>>
>> On 2016년 03월 29일 10:28, Javier Martinez Canillas wrote:
>>> Hello Inki,
>>>
>>> This patch series cont
Bit of previous discussion:
http://thread.gmane.org/gmane.linux.file-systems/101201/
The underlying issue is that we have no mechanism for invalidating a range of
the pagecache and then _keeping it invalidated_ while we Do Stuff.
The fallocate INSERT_RANGE/COLLAPSE_RANGE situation seems likely t
On 2016年03月29日 11:29, Eduardo Valentin wrote:
> On Mon, Mar 28, 2016 at 08:04:41PM -0700, Eduardo Valentin wrote:
>> On Fri, Mar 25, 2016 at 01:37:17PM +0800, Wei Ni wrote:
>>> Hi, Eduardo
>>> Will you take this series, it seems no more comments.
>>
>> Yeah, I am taking a look at it. Something is
Mapping the SMEM region as write combine makes the contiguous writes
in SMD perform better and also allows us to do unaligned read and writes
on ARM64.
Signed-off-by: Bjorn Andersson
---
drivers/soc/qcom/smem.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/soc/qco
From: Bjorn Andersson
Signed-off-by: Bjorn Andersson
Signed-off-by: Bjorn Andersson
---
.../boot/dts/qcom-msm8974-sony-xperia-honami.dts | 4 +++
arch/arm/boot/dts/qcom-msm8974.dtsi| 29 ++
2 files changed, 33 insertions(+)
diff --git a/arch/arm/boot/dts
By passing the smd channel reference to the callback, rather than the
smd device, we can open additional smd channels from sub-devices of smd
devices.
Also updates the two smd clients today found in mainline.
Signed-off-by: Bjorn Andersson
---
drivers/soc/qcom/smd-rpm.c| 9 ++---
drive
We need the signal from wcnss_ctrl indicating that the firmware is up
and running before we can communicate with the other components of the
chip. So make these other components children of the wcnss_ctrl device,
so they can be probed in order.
The process seems to take between 1/2-5 seconds, so t
This binding describes the control interface for the Qualcomm WCNSS.
Signed-off-by: Bjorn Andersson
---
Got a reviewed-by from Andy and acked-by from Rob on the WiFi part of this
binding. But during futher testing I spotted a timing issue, where the
wcnss_ctrl driver must finish the uploading of
On Mon, Jan 11, 2016 at 1:02 AM, Eugene Krasnikov wrote:
> Better late than never! Looks good to me.
>
Unfortunately I ran into an issue with ordering of operations between
the WiFi driver and the wcnss_ctrl driver. So an updated series is on
the way, but this depends on changes to the wcnss_ctrl
On Tue, Mar 29, 2016 at 02:05:07AM +, Wang Nan wrote:
> Add new ioctl() to pause/resume ring-buffer output.
>
> In some situations we want to read from ring buffer only when we
> ensure nothing can write to the ring buffer during reading. Without
> this patch we have to turn off all events att
On 29.03.2016 13:19, Viresh Kumar wrote:
> On 29-03-16, 09:48, Viresh Kumar wrote:
>> On 29-03-16, 13:10, Krzysztof Kozlowski wrote:
>>> On 24.03.2016 15:40, Viresh Kumar wrote:
The cpufreq-dt-platdev driver supports creation of cpufreq-dt platform
device now, reuse that and remove simila
"single skb allocation failure" happens when system is under heavy
memory pressure. Add __GFP_REPEAT to skb allocation call so kernel
attempts to reclaim pages and retry the allocation.
Signed-off-by: Wei-Ning Huang
---
drivers/net/wireless/marvell/mwifiex/sdio.c | 12
1 file chang
remove parenthesis around the CONST | CONST.
It will be also fixed checkpatch.pl warning about
"Alignment should match open parenthesis" becasue
parenthesis were removed by this patch.
Signed-off-by: Daeseok Youn
---
drivers/staging/dgnc/dgnc_neo.c | 26 +-
1 file changed
fix checkpatch.pl warning about
'Logical continuations should be on the previous line'
Signed-off-by: Daeseok Youn
---
drivers/staging/dgnc/dgnc_neo.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/staging/dgnc/dgnc_neo.c b/drivers/staging/dgnc/dgnc_neo.c
index
fix checkpatch.pl warning about 'line over 80 characters'.
I just moved all line comment to above if statement.
Signed-off-by: Daeseok Youn
---
drivers/staging/dgnc/dgnc_neo.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/staging/dgnc/dgnc_neo.c b/drive
On 2016年03月29日 11:04, Eduardo Valentin wrote:
> On Fri, Mar 25, 2016 at 01:37:17PM +0800, Wei Ni wrote:
>> Hi, Eduardo
>> Will you take this series, it seems no more comments.
>
> Yeah, I am taking a look at it. Something is fishy about it. Patch 04
> does not apply cleanly. Also, why did you sp
On Tue, Mar 29, 2016 at 10:01:24AM +0800, Wangnan (F) wrote:
>
>
> On 2016/3/28 14:41, Wang Nan wrote:
>
> [SNIP]
>
> >
> >To prevent this problem, we need to find a way to ensure the ring buffer
> >is stable during reading. ioctl(PERF_EVENT_IOC_PAUSE_OUTPUT) is
> >suggested because its overhea
Fix the dynamic array length in printing the thermal_power_allocator
trace event.
CC: Javi Merino
CC: Daniel Kurtz
Signed-off-by: Ricky Liang
---
include/trace/events/thermal_power_allocator.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/trace/events/thermal_
On Mon, Mar 28, 2016 at 08:25:46PM -0800, Kent Overstreet wrote:
> Bit of previous discussion:
> http://thread.gmane.org/gmane.linux.file-systems/101201/
>
> The underlying issue is that we have no mechanism for invalidating a range of
> the pagecache and then _keeping it invalidated_ while we Do
On Tue, Mar 29, 2016 at 09:12:56AM +0800, Huang, Ying wrote:
> Darren Hart writes:
>
> > On Mon, Mar 21, 2016 at 04:42:47PM +0800, Huang, Ying wrote:
> >> Thomas Gleixner writes:
> >>
> >> > On Mon, 21 Mar 2016, Huang, Ying wrote:
> >> >> > FYI, we noticed 25.6% performance improvement due to
On Tue, 2016-03-29 at 10:58 +1100, Balbir Singh wrote:
> On 24/03/16 22:04, Michael Ellerman wrote:
> > diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
> > index 290559df1e8b..3cb46a3b1de7 100644
> > --- a/arch/powerpc/kernel/irq.c
> > +++ b/arch/powerpc/kernel/irq.c
> > @@ -66,6
Tim Harvey writes:
> ok - I'll respond there as I agree with the patch but not the wording
> of the commit (It's Gateworks 'Ventana' using IMX6 not Laguna and we
> do define the polarity properly as active-low in Ventana dt's).
Right, it's Ventana of course (I had been working with Laguna boards
On Mon, Mar 28, 2016 at 09:41:09PM +0200, Gabriele Mazzotta wrote:
> 2016-03-28 20:56 GMT+02:00 Darren Hart :
> > On Mon, Mar 28, 2016 at 07:58:09PM +0200, Gabriele Mazzotta wrote:
> >> 2016-03-28 19:33 GMT+02:00 Darren Hart :
> >> > On Thu, Mar 24, 2016 at 12:24:56PM +0100, Gabriele Mazzotta wrote
401 - 500 of 564 matches
Mail list logo
