I am announcing the release of the Linux 3.19.8-ckt17 kernel.
The updated 3.19.y-ckt tree can be found at:
git://kernel.ubuntu.com/ubuntu/linux.git linux-3.19.y
and can be browsed at:
http://kernel.ubuntu.com/git/ubuntu/linux.git/log/?h=linux-3.19.y
The diff from v3.19.8-ckt16 is posted
diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt
b/Documentation/devicetree/bindings/arm/omap/omap.txt
index 4f6a82c..cbe35b3 100644
--- a/Documentation/devicetree/bindings/arm/omap/omap.txt
+++ b/Documentation/devicetree/bindings/arm/omap/omap.txt
@@ -23,6 +23,7 @@ Optional proper
While testing the tracer preemptoff, I hit this strange trace:
# cmd pid | time | caller
# \ / | \| /
<...>-259 0...10us : schedule <-worker_thread
<...>-259 0d..10us : rcu_note_context_switch <-__schedule
<...>-259 0
Two things wrong with this submission:
1) You need to provide an initial "[PATCH net-next 0/3] ..." header posting
explaining at a high level what this patch series is about and how it is
implemented and why.
2) The net-next tree is closed at this time because we are in the merge window,
From: Arnd Bergmann
Date: Mon, 21 Mar 2016 09:30:59 +0100
> The change to use the generic DMA engine API in the smc911x
> driver has led to a harmless warning about unused local variables:
>
> smsc/smc911x.c: In function 'smc911x_probe':
> smsc/smc911x.c:1796:20: error: unused variable 'param'
>
On Wed, Mar 16, 2016 at 05:21:56PM +0300, Kirill A. Shutemov wrote:
> > FYI, with a dummy ->migratepage() which returns only -EINVAL UBIFS does no
> > longer explode upon page migration.
> > Tomorrow I'll do more tests to make sure.
>
> Could you check if something like this would fix the issue.
>
On Thu, Mar 17, 2016 at 01:33:51PM +0200, Laurent Pinchart wrote:
> The good news is that, given that no code uses this new API at the moment,
> there isn't much to audit. The patch series implements the resource mapping
> for arch/arm only, and makes use of it in the rcar-dmac driver only. Would
[I am sorry I haven't responded sooner but I was busy with other stuff]
On Sun 20-03-16 20:07:39, Ebru Akagunduz wrote:
> Currently khugepaged makes swapin readahead to improve
> THP collapse rate. This patch checks vm statistics
> to avoid workload of swapin, if unnecessary. So that
> when system
On 21 March 2016 at 13:40, Rob Herring wrote:
> On Sat, Mar 19, 2016 at 12:00:22AM +0800, Chen-Yu Tsai wrote:
>> Hi,
>>
>> On Fri, Mar 18, 2016 at 11:37 PM, Alexandre TORGUE
>> wrote:
>> > +- clocks: Must contain a phandle for each entry in clock-names.
>> > +- clock-names: Should be "stmmaceth"
Hi Uwe,
On 03/21/2016 02:54 PM, Uwe Kleine-König wrote:
>>
>> Two things:
>> - I suppose that in such hypothetical case the dependency on GPIOLIB
>> would be required and thus be there
>
> I don't agree. There are bugs out there, and maybe the reason is as
> simple as "the implementor of the re
On Wed, Mar 16, 2016 at 01:02:13PM -0400, Chris Metcalf wrote:
> diff --git a/scripts/mod/modpost.c b/scripts/mod/modpost.c
> index 48958d3cec9e..37afd721ec99 100644
> --- a/scripts/mod/modpost.c
> +++ b/scripts/mod/modpost.c
> @@ -887,8 +887,8 @@ static void check_section(const char *modname, stru
On Tue, Mar 15, 2016 at 12:42:44PM -0700, Darrick J. Wong wrote:
> #include
> #include
> #include
> +#include
Maybe keep this before asm/uaccess.h
> +long blkdev_fallocate(struct file *file, int mode, loff_t start, loff_t len)
should be marked static.
> + /* We haven't a primitive fo
On Mon 21-03-16 23:58:32, Sergey Senozhatsky wrote:
> Hello Jan,
>
> On (03/21/16 15:32), Jan Kara wrote:
> [..]
> > > we have 2 spin locks in vprintk_emit() -- logbuf_lock and sem->lock. and N
> > > CPUs can concurrently lockup on those two locks, which already makes a
> > > single static pointer
From: Yisen Zhuang
Date: Mon, 21 Mar 2016 19:06:32 +0800
> From: Kejian Yan
>
> The current upstreaming code fails to ping other IPv6 net device, because
> the enet receives the multicast packets with the src mac addr whick is the
On Tue, Mar 15, 2016 at 09:37:25AM -0700, Jaegeuk Kim wrote:
> I agree that I must follow FS convention here.
> But, in order to make this clear out, could you please elaborate why this is
> not
> allowed?
>
> I wrote this patch totally based on per-file encryption in which users cannot
> access
From: Yisen Zhuang
Date: Mon, 21 Mar 2016 19:06:34 +0800
> + (void)hns_mac_set_promisc(mac_cb, (u8)!!en);
This cast to void is unnecssary.
> +static void hns_gmac_set_uc_match(void *mac_drv, u16 en)
> +{
> + struct mac_driver *drv = (struct mac_driver *)mac_drv;
Casts from void pointer
On 03/19/2016 08:11 PM, Heiner Kallweit wrote:
Am 18.03.2016 um 14:10 schrieb Jacek Anaszewski:
On 03/17/2016 08:53 PM, Heiner Kallweit wrote:
Am 17.03.2016 um 14:41 schrieb Jacek Anaszewski:
Hi Heiner,
On 03/13/2016 06:14 PM, Heiner Kallweit wrote:
Add basic support for RGB triggers. Trigge
On Wed, Mar 16, 2016 at 01:02:13PM -0400, Chris Metcalf wrote:
> diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
> index 9f7c21c22477..d569ae7fde37 100644
> --- a/arch/x86/kernel/process.c
> +++ b/arch/x86/kernel/process.c
> @@ -298,7 +298,7 @@ void arch_cpu_idle(void)
> /*
>
On 03/21/2016 10:34 AM, Michal Hocko wrote:
On Fri 11-03-16 17:10:11, Chris Metcalf wrote:
In commit f01f17d3705b ("mm, vmstat: make quiet_vmstat lighter")
the quiet_vmstat() function became asynchronous, in the sense that
the vmstat work was still scheduled to run on the core when the
function
On Tue, 8 Mar 2016 12:15:12 +0100
Boris Brezillon wrote:
> sg_alloc_table_from_buf() provides an easy solution to create an sg_table
> from a virtual address pointer. This function takes care of dealing with
> vmallocated buffers, buffer alignment, or DMA engine limitations (maximum
> DMA transf
Am Montag, 21. März 2016, 16:13:40 schrieb Heiko Stübner:
> Hi,
>
> Am Montag, 21. März 2016, 21:24:32 schrieb Feng Xiao:
> > 在 2016/3/21 17:58, Viresh Kumar 写道:
> > > On 21-03-16, 10:54, Heiko Stübner wrote:
> > >> I hadn't seen that yet ... nice that cpufreq-dt now also supports
> > >> clusters
On Wed, Mar 16, 2016 at 03:47:07PM -0400, Jessica Yu wrote:
> Mark the module as a livepatch module so that the module loader can
> appropriately identify and initialize it.
>
> Signed-off-by: Jessica Yu
> ---
> samples/livepatch/livepatch-sample.c | 1 +
> 1 file changed, 1 insertion(+)
>
> di
From: Andi Kleen
Correctly document what is implemented for :ppp on Intel CPUs in
recent kernels.
Signed-off-by: Andi Kleen
---
tools/perf/Documentation/perf-list.txt | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/tools/perf/Documentation/perf-list.txt
b/tools/perf/
From: Andi Kleen
Document some undocumented features for specifying events in the perf
list manpage:
- Event groups
- Leader sampling
- How to specify raw PMU events in the new syntax
Signed-off-by: Andi Kleen
---
tools/perf/Documentation/perf-list.txt | 49 ++
From: Thor Thayer
Force L2 cache dependency instead of forcing selection of
L2 cache.
Signed-off-by: Thor Thayer
---
v2/3 No change
---
drivers/edac/Kconfig |5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index 37755e6..6c
From: Thor Thayer
Move the device structs and defines to altera_edac.h in preparation
for adding the Arria10 L2 cache ECC.
Signed-off-by: Thor Thayer
---
v2: Split original patch into smaller patches. Move private data
and defines into header file.
v3: Commented description above defines.
-
From: Thor Thayer
Add the device tree entries needed to support the Altera L2
cache EDAC on the Arria10 chip.
Signed-off-by: Thor Thayer
---
v2 Match register value (l2-ecc@ffd06010)
v3 Set ecc_manager to beginning of system_manager. Add sysman
phandle. Move IRQs into ecc_manager from childr
From: Thor Thayer
Addition of the Arria10 L2 Cache ECC handling. Addition
of private data structure for Arria10 L2 cache ECC and
the probe function for it.
The Arria10 ECC device IRQs are in a shared register so
the ECC Manager parent/child relationship requires a
different probe function.
Signe
From: Thor Thayer
Enable ECC for Arria10 L2 cache on machine startup. The ECC has to be
enabled before data is stored in memory otherwise the ECC will fail
on reads.
Use DT_MACHINE to select Arria10 L2 cache function.
Signed-off-by: Thor Thayer
Acked-by: Dinh Nguyen
---
v2: Split into 2 separa
From: Thor Thayer
In preparation for the Arria10 peripheral ECCs, a register
offset from the ECC base was added to the private data
structure to index to the error injection register.
Signed-off-by: Thor Thayer
---
v2: Split large patch into smaller patches. Add an ECC
error inject offset t
From: Thor Thayer
In preparation for the Arria10 peripheral ECCs, the
ECC Enable mask is used in place of hard coded masks
in the check dependency functions.
Signed-off-by: Thor Thayer
---
v3: This change added.
---
drivers/edac/altera_edac.c |9 +++--
1 file changed, 7 insertions(+),
Hello,
On 03/18/2016, 09:52 PM, Tejun Heo wrote:
> On Thu, Mar 17, 2016 at 01:00:13PM +0100, Jiri Slaby wrote:
I have not done that yet, but today, I see:
destroy_workqueue: name='req_hci0' pwq=88002f590300
wq->dfl_pwq=88002f591e00 pwq->refcnt=2 pwq->nr_active=0 delayed_work
From: Thor Thayer
In preparation for the Arria10 peripheral ECCs, the
platform device parameter is removed from the check_deps()
functions because it is not needed and makes the Arria10
check_deps() cleaner.
Signed-off-by: Thor Thayer
---
v3: This change added.
---
drivers/edac/altera_edac.c
From: Thor Thayer
Add the device tree bindings needed to support the Altera L2
cache on the Arria10 chip. Since all the peripherals share
IRQs, the IRQ fields are now in the ecc_manager.
Signed-off-by: Thor Thayer
---
v2 Correct spelling of Arria10 in patch title.
v3 Major restructuring change
On 03/21/2016 03:08 AM, Mark Rutland wrote:
[adding LAKML]
On Mon, Mar 21, 2016 at 04:07:47PM +0800, Chen Feng wrote:
Hi Mark,
Hi,
With 68234df4ea7939f98431aa81113fbdce10c4a84b
arm64: kill flush_cache_all()
The documented semantics of flush_cache_all are not possible to provide
for arm64 (s
On 03/21/2016 11:38 AM, Peter Zijlstra wrote:
On Wed, Mar 16, 2016 at 01:02:13PM -0400, Chris Metcalf wrote:
diff --git a/scripts/mod/modpost.c b/scripts/mod/modpost.c
index 48958d3cec9e..37afd721ec99 100644
--- a/scripts/mod/modpost.c
+++ b/scripts/mod/modpost.c
@@ -887,8 +887,8 @@ static void
On Mon, Mar 14, 2016 at 05:10:00PM -0400, Jeff Moyer wrote:
> dio_bio_complete turns all errors into -EIO. This is historical,
> since you used to only get 1 bit precision for errors (BIO_UPTODATE).
> Now that we get actual error codes, we can return the appropriate
> code to userspace. File syst
On 3/19/2016 6:42 AM, David Miller wrote:
There is a merge conflict against the RDMA tree pull wrt the mlx4 driver,
which I don't know how to resolve.
Can you please point on the conflict ? is it still open that needs our
input ?
This version refactors how the EDAC is configured for Arria10 since
the ECC hardware is significantly different than Cyclone5 and Arria5.
Since all the IRQs are shared, a new probe function based on the
xgene codebase was used.
[PATCHv3 1/9] EDAC: Altera L2 Kconfig change from select to depends
[
The description for the sk argument of the skb_fclone_busy function is
missing. Adding it.
Signed-off-by: Luis de Bethencourt
---
Hi,
I notice this when running make htmldocs. It gives the following warning:
.//include/linux/skbuff.h:923: warning: No description found for parameter 'sk'
Thanks,
On Mon, Mar 21, 2016 at 08:37:49AM +, He Kuang wrote:
> From: Wang Nan
>
> Store breakpoint single step state into pstate to fix the
> recursion issue on ARM64.
>
> Signed-off-by: Kaixu Xia
> Signed-off-by: Hanjun Guo
> ---
> arch/arm64/include/asm/debug-monitors.h | 9 ++
> arch/arm
osmetic one.
>
> All of the above applies analogously to evergreen_hpd_fini().
>
> Silence UBSAN by checking ->hpd.hpd for RADEON_HPD_NONE before oring it
> into the 'enabled' bitset in evergreen_hpd_init() or the 'disabled' bitset
> in evergreen_hpd_fini() r
On Tue, Mar 15, 2016 at 05:05:26PM -0400, J. Bruce Fields wrote:
> > That people get confused between the attr used by the xattr syscall
> > interface and the attr used to store things on disk or the protocol.
> > This has happened every time we have non-native support, e.g. XFS, NFS,
> > CIFS, ntf
From: Yisen Zhuang
Date: Mon, 21 Mar 2016 19:06:37 +0800
> diff --git a/drivers/net/ethernet/hisilicon/hns/hns_ethtool.c
> b/drivers/net/ethernet/hisilicon/hns/hns_ethtool.c
> index 3c4a3bc..f3a5e05 100644
> --- a/drivers/net/ethernet/hisilicon/hns/hns_ethtool.c
> +++ b/drivers/net/ethernet/hisi
>> a-node {
>> nvmem-cells = <&cell_a &cell_b>, ;
>> nvmem-cell-names = "some-data", "more-data";
>> };
>>
> Should have replied you long back :-)
No worries :-)
>>
>> and I want "more-data" to reference only one phandle, how would this be
>> handled?
>>
> yes this would f
Hi Linus,
I have another mixed bag of ARM-related perf patches here. It's about
25% CPU and 75% interconnect, but with drivers/bus/ languishing without
an obvious maintainer or tree, Olof and I agreed to keep all of these
PMU patches together. I suspect a whole load of code from drivers/bus/arm-*
From: Andi Kleen
v2: Minor updates to documentation requested in review.
v3: Update for new gcc and various improvements.
Signed-off-by: Andi Kleen
---
Documentation/x86/fsgs.txt | 109 +
1 file changed, 109 insertions(+)
create mode 100644 Documenta
This is a reworked version of my older fsgsbase patchkit.
Main changes:
- Ported to new entry/* code, which simplified it somewhat
- Now has a test program
- Fixed ptrace/core dump support
- Better documentation
- Some minor fixes improvement
This adds kernel support for some Intel instructions th
From: Andi Kleen
Every gs selector/index reload always paid an extra MFENCE
between the two SWAPGS. This was to work around an old
bug in early K8 steppings. All other CPUs don't need the extra
mfence. Patch the extra MFENCE only in for K8.
v2: Use set_cpu_bug()
v3: Use ALTERNATIVE directly
Sig
From: Andi Kleen
Add a simple tester. By default it runs 1 iterations,
but can also run forever with tfsgs_64 0
Signed-off-by: Andi Kleen
---
tools/testing/selftests/x86/Makefile | 3 +-
tools/testing/selftests/x86/tfsgs.c | 151 +++
2 files changed, 153
Hi Anurag,
On Wednesday 23 Sep 2015 15:12:36 Anurag Kumar Vulisha wrote:
> On Monday, September 21, 2015 9:27 PM Vinod Koul wrote:
> > On Thu, Aug 27, 2015 at 09:19:18PM +0530, Anurag Kumar Vulisha wrote:
> >> This VDMA is a soft ip, which can be programmed to support
> >> 32 bit addressing or gr
From: Andi Kleen
The kernel needs to explicitely enable RD/WRFSBASE to handle context
switch correctly. So the application needs to know if it can safely use
these instruction. Just looking at the CPUID bit is not enough because it
may be running in a kernel that does not enable the instructions.
From: Andi Kleen
Convert arch_prctl to use the new instructions to
change fs/gs if available, instead of using MSRs.
This is merely a small performance optimization,
no new functionality.
With the new instructions the syscall is really obsolete,
as everything can be set directly in ring 3. But
From: Andi Kleen
Introduction:
IvyBridge added four new instructions to directly write the fs and gs
64bit base registers. Previously this had to be done with a system
call to write to MSRs. The main use case is fast user space threading
and switching the fs/gs registers quickly there. Another u
From: Andi Kleen
The ptrace code for fs/gs base made some assumptions on
the state of fs/gs which are not true anymore on kernels
running with FSGSBASE.
With the new instructions it is very easy to access
the values, and they are always stored in the thread
struct. So just implement the straight
From: Andi Kleen
Add C intrinsics and assembler macros for the new rd/wr fs/gs base
instructions and for swapgs.
Very straight forward. Used in followon patch.
For assembler only a few standard registers used by entry_64.S
are defined.
v2: Use __always_inline
Signed-off-by: Andi Kleen
---
ar
From: Andi Kleen
Add FS/GS base dumping to the standard ELF_CORE_COPY_REGS macro
I think this is only used in some special cases, the majority
of core dumps seem to go through the getregs interface also
used by ptrace.
Signed-off-by: Andi Kleen
---
arch/x86/include/asm/elf.h | 11 +--
On 03/21/2016 11:42 AM, Peter Zijlstra wrote:
On Wed, Mar 16, 2016 at 01:02:13PM -0400, Chris Metcalf wrote:
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 9f7c21c22477..d569ae7fde37 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -298,7 +298,7
On Mon, Mar 21, 2016 at 12:34 AM, Ingo Molnar wrote:
>
> Furthermore, I'd reorganize the 'arch settings' section into 4 groups, the
> following way:
>
> 1) Options that are fundamentally only set on x86-32 kernels:
>
> 2) Options that are fundamentally only set on x86-64 kernels:
>
> 3) Bi-arch op
On Fri, 18 Mar 2016 16:56:41 -0700
"Paul E. McKenney" wrote:
> On Fri, Mar 18, 2016 at 02:00:11PM -0700, Josh Triplett wrote:
> > On Thu, Feb 25, 2016 at 04:56:38PM -0800, Paul E. McKenney wrote:
> > > On Thu, Feb 25, 2016 at 04:13:11PM +1100, Ross Green wrote:
> > > > On Wed, Feb 24, 2016 at 8:2
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When the function dev_get_phys_port_name was added it missed a description
for it's len argument. Adding it.
Fixes: db24a9044ee1 ("net: add support for phys_port_name")
Signed-off-by: Luis de Bethencourt
---
Hi,
Noticed this when running make htmldocs. It gives the following warning:
.//net/core
On Wed 2016-03-16 15:47:06, Jessica Yu wrote:
> Reuse module loader code to write relocations, thereby eliminating the need
> for architecture specific relocation code in livepatch. Specifically, reuse
> the apply_relocate_add() function in the module loader to write relocations
> instead of duplic
On Mon, Mar 21, 2016 at 12:15:12PM -0400, Chris Metcalf wrote:
> On 03/21/2016 11:42 AM, Peter Zijlstra wrote:
> >The most common idle function for x86 is: mwait_idle_with_hints(),
> >trouble is, its an inline, so I'm not sure adding __cpuidle to it does
> >anything.
>
> No, you're right, it woul
On Mon, Mar 21, 2016 at 11:25:09AM -0500, Christoph Lameter wrote:
> On Mon, 21 Mar 2016, Kirill A. Shutemov wrote:
>
> > PAGE_CACHE_{SIZE,SHIFT,MASK,ALIGN} macros were introduced *long* time ago
> > with promise that one day it will be possible to implement page cache with
> > bigger chunks than
On 20/03/2016 12:24, Jonathan Cameron wrote:
On 14/03/16 10:20, Marc Titinger wrote:
The user (or an init script) may setup RShunt via sysfs after the
driver was initialized, for instance based on the EEPROM contents
of a modular probe. The calibration register must be set accordingly.
Signed
On Fri, 2016-03-18 at 20:05 +0200, Ville Syrjälä wrote:
> On Fri, Mar 18, 2016 at 07:00:29PM +0100, Daniel Vetter wrote:
> >
> > On Fri, Mar 18, 2016 at 06:41:40PM +0200, Ville Syrjälä wrote:
> > >
> > > On Fri, Mar 18, 2016 at 06:12:35PM +0200, Ville Syrjälä wrote:
> > > >
> > > > On Fri, Mar 1
On 03/18/2016 06:15 PM, Rob Landley wrote:
On 03/18/2016 12:46 PM, David Daney wrote:
I am not going to comment on it any more, but [commenting more]
Yes you are. (And did then too.)
On 03/17/2016 07:32 PM, Rob Landley wrote:
[...]
As I explained last email, userspace uses the libc header,
On Mon, 21 Mar 2016, Kirill A. Shutemov wrote:
> PAGE_CACHE_{SIZE,SHIFT,MASK,ALIGN} macros were introduced *long* time ago
> with promise that one day it will be possible to implement page cache with
> bigger chunks than PAGE_SIZE.
>
> This promise never materialized. And unlikely will.
So we dec
"Kirill A. Shutemov" writes:
> [ text/plain ]
> On Mon, Mar 21, 2016 at 10:03:29AM +0530, Aneesh Kumar K.V wrote:
>> "Kirill A. Shutemov" writes:
>>
>> > [ text/plain ]
>> > On Fri, Mar 18, 2016 at 07:23:41PM +0530, Aneesh Kumar K.V wrote:
>> >> "Kirill A. Shutemov" writes:
>> >>
>> >> > [ te
> enabled. I have patch like below to fix it, but wanted to ask you if it
> would correct to have this in the
> original patch or should I sent a separate fix ? Sorry for the mess on this.
Once a patch is applied, it is in linux-next, so you need to send
incremental patches to fix things.
sig
On Mon, Mar 21, 2016 at 05:31:57PM +0100, Petr Mladek wrote:
> > diff --git a/kernel/livepatch/core.c b/kernel/livepatch/core.c
> > index 780f00c..2aa20fa 100644
> > --- a/kernel/livepatch/core.c
> > +++ b/kernel/livepatch/core.c
> > +static int klp_resolve_symbols(Elf_Shdr *relasec, struct module
The below annotates the two most used idle functions on x86
--- a/arch/x86/kernel/acpi/cstate.c
+++ b/arch/x86/kernel/acpi/cstate.c
@@ -152,7 +152,7 @@ int acpi_processor_ffh_cstate_probe(unsi
}
EXPORT_SYMBOL_GPL(acpi_processor_ffh_cstate_probe);
-void acpi_processor_ffh_cstate_enter(struct
On Wed 2016-03-16 15:47:04, Jessica Yu wrote:
> For livepatch modules, copy Elf section, symbol, and string information
> from the load_info struct in the module loader. Persist copies of the
> original symbol table and string table.
>
> Livepatch manages its own relocation sections in order to re
On Mon, 21 Mar 2016, Wei Yang wrote:
> On Sun, Mar 20, 2016 at 04:42:29PM +0100, Thomas Gleixner wrote:
> >On Sun, 20 Mar 2016, Wei Yang wrote:
> >
> >> hdr in struct dmar_drhd_unit is used to point the DMAR hardware unit copied
> >> at the end of struct dmar_drhd_unit. One zero-sized array may be
From: Michael Neuling
"96c4726f01cd cpufreq: powernv: Remove cpu_to_chip_id() from hot-path"
introduced 'core_to_chip_map' array to cache the chip-id of all cores.
Replace this with per_cpu variable that stores the pointer to the
chip-array. This removes the linear lookup and provides a neater an
On 21/03/16 16:12, Andrey Smirnov wrote:
a-node {
nvmem-cells = <&cell_a &cell_b>, ;
nvmem-cell-names = "some-data", "more-data";
};
Should have replied you long back :-)
No worries :-)
and I want "more-data" to reference only one phandle, how would this be
hand
On Mon, 21 Mar 2016, Kirill A. Shutemov wrote:
> We do have anon-THP pages on LRU. My huge tmpfs patchset also put
> file-THPs on LRU list.
So they are on the LRU as 4k units? Tried to look it up.
> > Will this actually work if we have really huge memory (100s of TB) where
> > almost everything
Create sysfs attributes to export throttle information in
/sys/devices/system/cpu/cpuX/cpufreq/throttle_stats directory. The
newly added sysfs files are as follows:
1)/sys/devices/system/cpu/cpuX/cpufreq/throttle_stats/turbo_stat
2)/sys/devices/system/cpu/cpuX/cpufreq/throttle_stats/sub-turbo_stat
On Mon, Mar 21, 2016 at 11:33:49AM +0100, Cyrille Pitchen wrote:
> This patch provides an alternative mean to support memory above 16MiB
> (128Mib) by replacing 3byte address op codes by their associated 4byte
> address versions.
>
> Using the dedicated 4byte address op codes doesn't change the in
On Mon, Mar 21, 2016 at 5:06 AM, Kirill A. Shutemov
wrote:
>
> This patch contains automated changes generated with coccinelle using
> script below. For some reason, coccinelle doesn't patch header files.
> I've called spatch for them manually.
Looks good.
Mind reminding me and re-sending the pa
On Monday 21 March 2016 11:52:54 Andreas Schwab wrote:
> Arnd Bergmann writes:
>
> > What exactly do you need to define F_GETLK64 for on LP64?
>
> To override the generic definitions.
Ok, got it. I misread that part as adding definitions for LP64, but it
is correctly removing the definitions f
On Mon, Mar 21, 2016 at 11:59:25AM -0500, Christoph Lameter wrote:
> On Mon, 21 Mar 2016, Kirill A. Shutemov wrote:
>
> > We do have anon-THP pages on LRU. My huge tmpfs patchset also put
> > file-THPs on LRU list.
>
> So they are on the LRU as 4k units? Tried to look it up.
One entry on LRU per
The patch
regulator: Remove unneded check for regulator supply
has been applied to the regulator tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hour
The current patches handle the autocalibration and the oscillator failure
for ABX80X RTC.
The autocalibration is handled using sysfs entries and the oscillator
failure bit is handled only for the XT Oscillator.
Mylene JOSSERAND (2):
rtc: abx80x: handle autocalibration
rtc: abx80x: handle the o
On Mon, Mar 21, 2016 at 10:02:23AM -0700, Linus Torvalds wrote:
> On Mon, Mar 21, 2016 at 5:06 AM, Kirill A. Shutemov
> wrote:
> >
> > This patch contains automated changes generated with coccinelle using
> > script below. For some reason, coccinelle doesn't patch header files.
> > I've called spa
The Texas Instruments TAS5720L/M device is a high-efficiency mono
Class-D audio power amplifier optimized for high transient power
capability to use the dynamic power headroom of small loudspeakers.
Its digital time division multiplexed (TDM) interface enables up to
16 devices to share the same bus
Handle the Oscillator Failure ('OF') bit from Oscillator Status register
(0x1D). This bit is cleared on set_time function and is read each time the
date/time is read, but only in case of XT Oscillator selection.
In RC mode, this bit is always set.
Signed-off-by: Mylene JOSSERAND
---
drivers/rtc/
Hey everyone,
This is a fairly simple change to disable the UV BAU by default (see
commit message for reasoning) and to add some documentation to
kernel-parameters.txt to explain the new parameter.
Let me know what you think!
Alex Thorlton (2):
Disable UV BAU by default
Add documentation for
This commit updates kernel-parameters.txt with some information about
the new "bau" parameter.
Signed-off-by: Alex Thorltlon
Cc: Jonathan Corbet
Cc: Hedi Berriche
Cc: linux-kernel@vger.kernel.org
---
Documentation/kernel-parameters.txt | 8
1 file changed, 8 insertions(+)
diff --git
For several years, the common practice has been to boot UVs with the
"nobau" parameter on the command line, to disable the BAU. We've
decided that it makes more sense to just disable the BAU by default in
the kernel, and provide the option to turn it on, if desired.
Signed-off-by: Alex Thorlton
On (03/21/16 16:33), Jan Kara wrote:
[..]
> > > And by calling wake_up_process() under logbuf_lock, you actually introduce
> > > recursion issues for printk_deferred() messages which are supposed to be
> > > working from under rq->lock and similar. So I think you have to keep this
> > > section out
Driver for TI's TAS5720L/M digital audio amplifiers. The driver should be
pretty standard except the optional interrupt-based fault reporting.
Some background on the fault reporting since that might be a discussion of
interest. The code should have that documented rather well but I wanted to
bring
Hi Brian,
Le 21/03/2016 18:01, Brian Norris a écrit :
> On Mon, Mar 21, 2016 at 11:33:49AM +0100, Cyrille Pitchen wrote:
>> This patch provides an alternative mean to support memory above 16MiB
>> (128Mib) by replacing 3byte address op codes by their associated 4byte
>> address versions.
>>
>> Usi
From: David Decotigny
By returning -ENOIOCTLCMD, sock_do_ioctl() falls back to calling
dev_ioctl(), which provides support for NIC driver ioctls, which
includes ethtool support. This is similar to the way ioctls are handled
in udp.c or tcp.c.
This removes the requirement that ethtool for example
On Mon, Mar 21, 2016 at 01:12:39PM -0400, Chris Metcalf wrote:
> I do see mwait used in the ACPI 4.0 Processor Aggregator Device driver, but
> this seems sufficiently far removed from regular cpuidle that I don't
> think it's appropriate to tag the power_saving_thread() function -
> the initial com
The autocalibration is separated in two bits to set in Oscillator
Control register (0x1c) :
- OSEL bit to select the oscillator type (XT or RC).
- ACAL bit to select the autocalibration type.
These functionnalities are exported in sysfs entries : "oscillator"
and "autocalibration". Respectively,
The Texas Instruments TAS5720L/M device is a high-efficiency mono
Class-D audio power amplifier optimized for high transient power
capability to use the dynamic power headroom of small loudspeakers.
Its digital time division multiplexed (TDM) interface enables up to
16 devices to share the same bus
On Sat, Mar 19, 2016 at 6:31 AM, Vladimir Zapolskiy wrote:
> syscon_regmap_lookup_by_phandle() returns either a valid pointer to
> struct regmap or ERR_PTR() error value, check for NULL is invalid and
> on error path may lead to oops, the change corrects the check.
>
> Signed-off-by: Vladimir Zapo
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