On 03/14/2016 05:27 AM, Finn Thain wrote:
> Decode all bits in the chip registers. They are all useful at times.
> Fix printk severity so that this output can be suppressed along with
> the other debugging output.
>
> Signed-off-by: Finn Thain
>
> ---
> drivers/scsi/NCR5380.c | 42 +++
On 03/12/2016 04:47 AM, David Matlack wrote:
I have not been able to trigger this bug on Linux 4.3, and suspect
it is due to this commit from Linux 4.2:
653f52c kvm,x86: load guest FPU context more eagerly
With this commit, as long as the host is using eagerfpu, the guest's
fpu is always loa
On 03/14/2016 05:27 AM, Finn Thain wrote:
> Signed-off-by: Finn Thain
>
> ---
> drivers/scsi/NCR5380.c | 12 +---
> drivers/scsi/NCR5380.h |4
> drivers/scsi/arm/oak.c |2 --
> drivers/scsi/dmx3191d.c |2 --
> drivers/scsi/dtc.c | 12 +++-
> driv
On 03/14/2016 05:27 AM, Finn Thain wrote:
> Signed-off-by: Finn Thain
>
> ---
> drivers/scsi/NCR5380.c |6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> Index: linux/drivers/scsi/NCR5380.c
> ===
> --- linux.orig/
On 03/14/2016 05:27 AM, Finn Thain wrote:
> Update kernel parameter documentation for atari_scsi, mac_scsi and
> g_NCR5380 drivers. Remove duplication.
>
> Signed-off-by: Finn Thain
>
> ---
> Documentation/scsi/g_NCR5380.txt | 17 ++-
> Documentation/scsi/scsi-parameters.txt
On 03/14/2016 05:27 AM, Finn Thain wrote:
> This setting does not need to be conditional on Atari ST or TT.
>
> Without TCQ support, cmd_per_lun == 2 is probably reasonable...
>
> Signed-off-by: Finn Thain
>
> ---
> drivers/scsi/atari_scsi.c |3 +--
> 1 file changed, 1 insertion(+), 2 dele
Majun,
On Mon, 14 Mar 2016, MaJun wrote:
First of all the prefix for irq chip drivers is not "Irq/".
Hint: git log drivers/irqchip
> From: Ma Jun
>
> For mbigen module, there is a special case that more than one mbigen
> device nodes use the same reg definition in DTS when these devices
> ex
On Mon, Mar 14, 2016 at 03:27:14PM +1100, Finn Thain wrote:
> The driver has a limit of eight LUs because of the byte-sized bitfield
> that is used for busy flags. Reject commands with LUN > 7.
Please just set the max_lun parameter in the host template, which will
take care of this.
On Mon, Mar 14, 2016 at 07:55:38AM +0100, Ard Biesheuvel wrote:
> On 13 March 2016 at 20:50, Andrew Pinski wrote:
> > +movkx13, 0xe353, lsl 16
> > +lsr x11, x11, 3
> > +movkx13, 0x9ba5, lsl 32
> > +movkx13, 0x20c4, lsl 48
> > + /* x13 = 0x20c49
I tried this patch on a Latitude with ACPI Device with DELLABCE and
this patch fixes the problem.
Tested-by: Alex Hung
On Sat, Mar 12, 2016 at 7:49 AM, Gabriele Mazzotta
wrote:
> Some BIOSes unconditionally send an ACPI notification to RBTN when the
> system is resuming from suspend. This makes
Fenguang,
On Mon, 14 Mar 2016, kbuild test robot wrote:
> Hi Thomas,
>
> FYI, the error/warning still remains.
> make.cross ARCH=m68k
>arch/m68k/include/asm/irq.h:25:17: error: expected identifier or '('
> before numeric constant
> #define NR_IRQS 0
> ^
W
On 03/14/2016 05:27 AM, Finn Thain wrote:
> The benefit of limiting can_queue to 1 is that atari_scsi shares the
> ST DMA chip more fairly with other drivers (e.g. falcon-ide).
>
> Unfortunately, this can limit SCSI bus utilization. On systems without
> IDE, atari_scsi should issue SCSI commands w
On 14/03/16 01:07, Rob Clark wrote:
> On Sun, Mar 13, 2016 at 5:12 PM, Kieran Bingham
> wrote:
>> On 04/02/16 05:09, Archit Taneja wrote:
>>>
>>>
>>> On 02/03/2016 07:55 PM, Luis Henriques wrote:
This fixes the following build failure:
drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.o: In
On 03/14/2016 05:27 AM, Finn Thain wrote:
> Fix various issues: Comments about bus errors are incorrect. The
> PDMA asm must return the size of the memory access that faulted so the
> transfer count can be adjusted accordingly. A phase change may cause a
> bus error but should not be treated as fai
Add the rk3036 SoCs to match driver for document since the emac driver
has supported the rk3036 SoCs.
This patch adds the rk3036/rk3066/rk3188 SoCS to compatible for rockchip
emac ducument. Also, that will suit for other SoCs in the future.
Signed-off-by: Caesar Wang
Cc: Rob Herring
Cc: devicet
Hi all,
This series patches are based on kernel 4.5-rc7+ version.
Linux version 4.5.0-rc7-next-20160311+ (wxt@nb) (...) #45 SMP Sun Mar 13
16:17:56
The history patch in here:
Patch-v1: https://lkml.org/lkml/2016/3/11/209
Patch-v2: https://lkml.org/lkml/2016/3/13/39
Verified on kylin board with m
This patch adds the following property for arc_emac.
1) phy-reset-gpios:
The phy-reset-gpio is an optional property for arc emac device tree boot.
Change the binding document to match the driver code.
2) phy-reset-duration:
Different boards may require different phy reset duration. Add property
p
This patch will make the driver more readability
The emac has the error and warnings if you run
'scripts/checkpatch.pl -f --subjective xxx' to check.
Let's clean up such trivial details.
Signed-off-by: Caesar Wang
Cc: Jiri Kosina
Cc: "David S. Miller"
Cc: Alexander Kochetkov
Cc: net...@vger.
From: Heiko Stuebner
The emac needs constant and very specific rate but the possible PLL-sources
are very limited, so we expect the PLL source to be set manually on per
board and don't want it to get changed in an automatic way later.
So add the necessary clock-id and disable reparenting on set_r
From: Xing Zheng
This patch adds the emac device node for rk3036 SoCs.
We need to let mac clock under the DPLL which is able to provide
the accurate 50MHz what mac_ref need, since that will cause some
unstable things if the cpufreq is working.
Signed-off-by: Xing Zheng
Signed-off-by: Caesar Wan
From: Xing Zheng
Associate the new clock id the clock.
Signed-off-by: Xing Zheng
Signed-off-by: Caesar Wang
Cc: Xing Zheng
Cc: Michael Turquette
Cc: Heiko Stuebner
Cc: Stephen Boyd
Cc: linux-...@vger.kernel.org
Cc: linux-rockc...@lists.infradead.org
---
Changes in v3:
- Add the Cc people
From: Xing Zheng
Add the node-id for the emac hclk to the binding header.
Signed-off-by: Xing Zheng
Signed-off-by: Caesar Wang
Cc: Xing Zheng
Cc: Michael Turquette
Cc: Heiko Stuebner
Cc: Stephen Boyd
Cc: linux-...@vger.kernel.org
Cc: linux-rockc...@lists.infradead.org
---
Changes in v3:
On (03/14/16 15:53), Minchan Kim wrote:
[..]
> On Thu, Mar 03, 2016 at 11:46:01PM +0900, Sergey Senozhatsky wrote:
> > zsmalloc knows the watermark after which classes are considered
> > to be ->huge -- every object stored consumes the entire zspage (which
> > consist of a single order-0 page). On
This patch adds to support the emac phy reset.
Different boards may require different phy reset duration. Add property
phy-reset-duration for emac driver, so that the boards that need
a longer reset duration can specify it in their device tree.
Signed-off-by: Heiko Stuebner
Signed-off-by: Caesar
From: Xing Zheng
Suitable PLLs for the emac on the rk3036 are difficult to find
and one of them is the (continuously changing) APLL. So in most
cases it will be necessary to select a PLL manually.
So add a clock-id for it.
Signed-off-by: Xing Zheng
Signed-off-by: Caesar Wang
Cc: Xing Zheng
Cc
On Mar 11 2016 or thereabouts, Dmitry Torokhov wrote:
> From: Benson Leung
>
> When resetting a device (especially after power loss) it is unlikely
> that the firmware will keep the contact tracking data for the previous
> touches and will be able to reconcile it with the new contacts, so
> let's
On Wednesday 09 March 2016 05:10 PM, Peter Zijlstra wrote:
> ---
> Subject: bitops: Do not default to __clear_bit() for __clear_bit_unlock()
>
> __clear_bit_unlock() is a special little snowflake. While it carries the
> non-atomic '__' prefix, it is specifically documented to pair with
> test_and
Hi Andrey,
See below for a quick review of the code.
I agree with Greg's comment why this is added to staging instead of
drivers/media/pci?
When you post the v2 patch, can you add the output of 'v4l2-compliance -s' to
the
cover letter? Please use the latest v4l2-compliance version from the
v4
On Fri, Mar 11, 2016 at 07:22:19PM +0100, Sebastian Andrzej Siewior wrote:
> after sending a few patches to the odin.com email address I noticed that
> it is no longer valid.
>
> Signed-off-by: Sebastian Andrzej Siewior
Reviewed-by: Johannes Thumshirn
--
Johannes Thumshirn
Below is the list of build error/warning regressions/improvements in
v4.5[1] compared to v4.4[2].
Summarized:
- build errors: +7/-23
- build warnings: +140/-160
JFYI, when comparing v4.5[1] to v4.5-rc7[3], the summaries are:
- build errors: +7/-13
- build warnings: +56/-95
Note that ther
On Fri, Mar 11, 2016 at 07:47:32AM -0800, Dan Williams wrote:
> In preparation for removing the ->driverfs_dev member of a gendisk, add
> an api that takes the parent device as a parameter to add_disk(). For
> now this maintains the status quo of WARN()ing on failure, but not
> return a error code
On Fri, Mar 11, 2016 at 07:47:45AM -0800, Dan Williams wrote:
> Now that all drivers that specify a ->driverfs_dev have been converted
> to device_add_disk(), the pointer can be removed from struct gendisk.
>
> Cc: Jens Axboe
> Cc: Christoph Hellwig
> Cc: Ross Zwisler
> Signed-off-by: Dan Willi
On 2016년 03월 14일 15:57, Krzysztof Kozlowski wrote:
> On 14.03.2016 11:04, Chanwoo Choi wrote:
>> From: Jaehoon Chung
>>
>> This patch adds MSHC (Mobile Storage Host Controller) dt node for Exynos3250
>> SoC. MSHC is an interface between the system and the eMMC device.
>>
>> Signed-off-by: Jaehoon
On Fri, Mar 11, 2016 at 07:47:38AM -0800, Dan Williams wrote:
> For block drivers that specify a parent device, convert them to use
> device_add_disk().
>
> This conversion was done with the following semantic patch:
>
> @@
> struct gendisk *disk;
> expression E;
> @@
>
> - d
On (03/14/16 08:11), Jan Kara wrote:
[..]
> > + if (!sync_print) {
> > + if (printk_thread && !in_panic) {
> > + /*
> > +* Wakeup the printing kthread and offload printing
> > +* to a schedulable context.
> > +
On (03/14/16 16:41), Sergey Senozhatsky wrote:
[..]
> you mean that __zs_compact() instead of just checking per-class
> zs_can_compact() should check global pool ratio and bail out if
> compaction of class Z has dropped the overall fragmentation ratio
> below some watermark?
>
> my logic was that
On 03/13/2016 01:14 AM, Olof Johansson wrote:
On Thu, Feb 25, 2016 at 10:34:14AM +0100, Lars Persson wrote:
The clock bindings for the main clock controller was changed to an
indexed controller style binding on request of the clk
maintainers. This updates the dtsi to use the new bindings.
Sig
On Mon, Mar 14, 2016 at 9:09 AM, Geert Uytterhoeven
wrote:
> JFYI, when comparing v4.5[1] to v4.5-rc7[3], the summaries are:
> - build errors: +7/-13
It's a good day...
> [1] http://kisskb.ellerman.id.au/kisskb/head/10047/ (all 262 configs)
> [3] http://kisskb.ellerman.id.au/kisskb/head/10011/
On 2016년 03월 14일 15:22, Krzysztof Kozlowski wrote:
> On 14.03.2016 11:04, Chanwoo Choi wrote:
>> This patch adds the MSHC2 (Mobile Storage Host Controller) Device Tree node
>> for
>> Exynos3250 SoC.
>>
>> Cc: Kukjin Kim
>> Cc: Krzysztof Kozlowski
>> Signed-off-by: Chanwoo Choi
>> Reviewed-by: K
On Mon, 14 Mar 2016, Joe Perches wrote:
> On Mon, 2016-03-14 at 06:19 +0100, Julia Lawall wrote:
> > On Sun, 13 Mar 2016, Joe Perches wrote:
> > > Loggng messages that emit function names have many different forms.
> > > Perhaps it'd be better for logging consistency and grep ease to
> > > exclu
On 14.03.2016 11:04, Chanwoo Choi wrote:
> From: Jaehoon Chung
>
> This patch adds MSHC (Mobile Storage Host Controller) dt node for
> Exynos3250 SoC. MSHC is an interface between the system and the SD card
>
> Signed-off-by: Jaehoon Chung
> Signed-off-by: Chanwoo Choi
> ---
> arch/arm/boot/d
Quoting Andy Lutomirski (l...@kernel.org):
> We used to have ptmx be owned by the inner uid and gid 0. Change
> this: if the owner and group are both mapped but are not both 0,
> then use the owner instead.
>
> For container-style namespaces (LXC, etc), this should have no
> effect -- UID 0 is wi
On 14.03.2016 11:04, Chanwoo Choi wrote:
> This patch adds PPMU (Platform Performance Monitoring Unit) Device Tree node
> for Exynos3250 based ARTIK5 module. The PPMU node is used to get the
> utilization of DMC0/DMC1/LEFTBUS/RIGHTBUS Block.
>
> Signed-off-by: Chanwoo Choi
> ---
> arch/arm/boot/
> -Original Message-
> From: Felipe Balbi [mailto:felipe.ba...@linux.intel.com]
> Sent: Monday, March 14, 2016 12:26 PM
> To: Rajesh Bhagat
> Cc: gre...@linuxfoundation.org; linux-...@vger.kernel.org; linux-
> ker...@vger.kernel.org; linux-o...@vger.kernel.org; Sriram Dash
> ; Rajesh Bha
From: Marcin Wojtas
Armada 38x network controller supports hardware buffer management (BM).
Since it is now enabled in mvneta driver, appropriate nodes can be added
to armada-38x.dtsi - for the actual common BM unit (bm@c8000) and its
internal SRAM (bm-bppi), which is used for indirect access to
Hi,
This is the sixth version of the API set for HW Buffer management (that was
initially submitted here:
http://thread.gmane.org/gmane.linux.kernel/2125152).
This version is just a rebasing onto the last net-next. I also added
the Tested-by flag from Sebastian Careba : "The patch set applies
suc
From: Marcin Wojtas
Some SRAM users may require non-bufferable access to the memory, which is
impossible, because devm_ioremap_wc() is used for setting sram->virt_base.
This commit adds optional flag 'no-memory-wc', which allow to choose remap
method, using DT property. Documentation is updated
From: Marcin Wojtas
Buffer manager (BM) is a dedicated hardware unit that can be used by all
ethernet ports of Armada XP and 38x SoC's. It allows to offload CPU on RX
path by sparing DRAM access on refilling buffer pool, hardware-based
filling of descriptor ring data and better memory utilization
This basic implementation allows to share code between driver using
hardware buffer management. As the code is hardware agnostic, there is
few helpers, most of the optimization brought by the an HW BM has to be
done at driver level.
Tested-by: Sebastian Careba
Signed-off-by: Gregory CLEMENT
---
From: Marcin Wojtas
Since mvneta driver supports using hardware buffer management (BM), in
order to use it, board files have to be adjusted accordingly. This commit
enables BM on:
* A385-DB-AP - each port has its own pool for long and common pool for
short packets,
* A388-ClearFog - same as above
From: Marcin Wojtas
Armada XP network controller supports hardware buffer management (BM).
Since it is now enabled in mvneta driver, appropriate nodes can be added
to armada-xp.dtsi - for the actual common BM unit (bm@c) and its
internal SRAM (bm-bppi), which is used for indirect access to bu
Now that the hardware buffer management framework had been introduced,
let's use it.
Tested-by: Sebastian Careba
Signed-off-by: Gregory CLEMENT
---
drivers/net/ethernet/marvell/Kconfig | 1 +
drivers/net/ethernet/marvell/mvneta.c| 18 +++--
drivers/net/ethernet/marvell/mvneta_bm.c |
Allow Openblock AX3 using hardware buffer management with mvneta.
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
b/arch/a
From: Marcin Wojtas
This commit enables finding appropriate mbus window and obtaining its
target id and attribute for given physical address in two separate
routines, both for IO and DRAM windows. This functionality
is needed for Armada XP/38x Network Controller's Buffer Manager and
PnC configura
From: Marcin Wojtas
Since mvneta driver supports using hardware buffer management (BM), in
order to use it, board files have to be adjusted accordingly. This commit
enables BM on AXP-DB and AXP-GP in same manner - because number of ports
on those boards is the same as number of possible pools, ea
On 2016년 03월 14일 17:34, Krzysztof Kozlowski wrote:
> On 14.03.2016 11:04, Chanwoo Choi wrote:
>> This patch adds PPMU (Platform Performance Monitoring Unit) Device Tree node
>> for Exynos3250 based ARTIK5 module. The PPMU node is used to get the
>> utilization of DMC0/DMC1/LEFTBUS/RIGHTBUS Block.
>
Hi Arnd,
I forgot to add you in CC for this patch.
What is your opinion about it?
Gregory
On lun., mars 14 2016, Gregory CLEMENT
wrote:
> From: Marcin Wojtas
>
> Some SRAM users may require non-bufferable access to the memory, which is
> impossible, because devm_ioremap_wc() is used for se
Harry reported, that he's able to trigger a system freeze with cpu hot
unplug. The freeze turned out to be a live lock caused by recent changes in
irq_force_complete_move().
When fixup_irqs() and from there irq_force_complete_move() is called on the
dying cpu, then all other cpus are in stop machi
Enable multi-master mode in I2C_CNFG reg based on hw features.
Using single/multi-master mode bit introduced for Tegra210,
whereas multi-master mode is enabled by default in HW for T124 and
earlier Tegra SOC. Enabling this bit doesn't explicitly start
treating the bus has having multiple masters, b
- Document the usage "nvidia,multimaster-mode" property
for enabling multimaster mode.
- Add compatible string for Tegra 210 SOC.
Signed-off-by: Shardar Shariff Md
---
Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt | 4
1 file changed, 4 insertions(+)
diff --git a/Documentati
Sun, Mar 13, 2016 at 10:21:34PM IST, vivien.dide...@savoirfairelinux.com wrote:
>Rework the netdev event handler, similar to what the Mellanox Spectrum
>driver does, to easily welcome more events later (for example
>NETDEV_PRECHANGEUPPER) and use netdev helpers (such as
>netif_is_bridge_master).
>
On 03/11/2016 08:30 AM, Minchan Kim wrote:
Procedure of page migration is as follows:
First of all, it should isolate a page from LRU and try to
migrate the page. If it is successful, it releases the page
for freeing. Otherwise, it should put the page back to LRU
list.
For LRU pages, we have us
On 2016년 03월 14일 17:31, Krzysztof Kozlowski wrote:
> On 14.03.2016 11:04, Chanwoo Choi wrote:
>> From: Jaehoon Chung
>>
>> This patch adds MSHC (Mobile Storage Host Controller) dt node for
>> Exynos3250 SoC. MSHC is an interface between the system and the SD card
>>
>> Signed-off-by: Jaehoon Chung
On Sun, 13 Mar 2016, Clark Williams wrote:
> I'm hitting the WARN_ON(wakes > 2) in $SUBJECT when resuming from suspend on
> my laptop (quad-core i7 with HT on). Looks like the warning gets hit 36 times
> on resume. E.g.:
>
> Call Trace:
> [] dump_stack+0x65/0x85
> [] warn_slowpath_common+0x82
On Fri, Mar 11, 2016 at 11:52:38AM +0100, Anna-Maria Gleixner wrote:
> The cpumf_pmu_notfier() hotplug callback lacks handling of the
> CPU_DOWN_FAILED case. That means, if CPU_DOWN_PREPARE failes, the PMC
> of the CPU is not setup again. Furthermore the CPU_ONLINE_FROZEN case
> will never be proce
On Sat, Mar 12, 2016 at 04:35:00PM +0100, Wolfram Sang wrote:
> On Mon, Mar 07, 2016 at 04:10:45PM +0100, Jan Glauber wrote:
> > Cleanup only without functional change.
>
> I like most of the changes, but there are still some functional changes
> left.
>
> > -static int octeon_i2c_stop(struct oct
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On 03/14/2016 12:25 PM, Suravee Suthikulpanit wrote:
On 03/07/2016 10:36 PM, Paolo Bonzini wrote:
On 04/03/2016 21:46, Suravee Suthikulpanit wrote:
+static void svm_deliver_avic_intr(struc
Ваш пароль закінчується протягом наступних 24 годин, щоб уникнути цього
натисніть на лінк HTTP: // пошта service-bg.dudaone.com/~~HEAD=pobj
представити свої дані, щоб оновити свій обліковий запис електронної
пошти на 2016 рік: для перевірки вашої електронної пошти та отримав нові
повідомлення ,
Ваш пароль закінчується протягом наступних 24 годин, щоб уникнути цього
натисніть на лінк HTTP: // пошта service-bg.dudaone.com/~~HEAD=pobj
представити свої дані, щоб оновити свій обліковий запис електронної
пошти на 2016 рік: для перевірки вашої електронної пошти та отримав нові
повідомлення ,
The clock binding for the main clock controller was changed to an
indexed controller style binding on request of the clk
maintainers. This updates the dtsi to use the new bindings.
Signed-off-by: Lars Persson
---
v2: Use numerical clock indexes to enable merge before the clock driver bindings
are
On Mon, Mar 14, 2016 at 02:14:33PM +0530, Shardar Shariff Md wrote:
> Enable multi-master mode in I2C_CNFG reg based on hw features.
> Using single/multi-master mode bit introduced for Tegra210,
> whereas multi-master mode is enabled by default in HW for T124 and
> earlier Tegra SOC. Enabling this
On Mon, 2016-03-14 at 08:21 +0100, Hans Verkuil wrote:
> On 03/14/2016 08:12 AM, tiffany lin wrote:
> > Hi Hans,
> >
> > After change to use "v4l-utils.git master branch", "V4l2-compliance
> > -d /dev/video1" fail on "fail: v4l2-test-buffers.cpp(555):
> > check_0(crbufs.reserved, sizeof(crbufs.res
On Fri, 11 Mar 2016, Dmitry Torokhov wrote:
> From: Benson Leung
>
> When resetting a device (especially after power loss) it is unlikely
> that the firmware will keep the contact tracking data for the previous
> touches and will be able to reconcile it with the new contacts, so
> let's release
Some freescale QorIQ platforms require to disable receiver detection
in P3 for correct detection of USB devices. If GUSB3PIPECTL(DISRXDETINP3)
is set, Core will change PHY power state to P2 and then perform receiver
detection. After receiver detection, Core will change PHY power state to
P3. Same q
Adds disable receiver detection in P3 quirk in DWC3 driver.
Rajesh Bhagat (2):
usb: dwc3: add disable receiver detection in P3 quirk
Documentation: dt: dwc3: Add snps,dis_rxdet_inp3_quirk property
Documentation/devicetree/bindings/usb/dwc3.txt | 2 ++
drivers/usb/dwc3/core.c
On 03/14/2016 10:04 AM, tiffany lin wrote:
> On Mon, 2016-03-14 at 08:21 +0100, Hans Verkuil wrote:
>> On 03/14/2016 08:12 AM, tiffany lin wrote:
>>> Hi Hans,
>>>
>>> After change to use "v4l-utils.git master branch", "V4l2-compliance
>>> -d /dev/video1" fail on "fail: v4l2-test-buffers.cpp(555):
>
On Fri 11-03-16 18:06:59, Yuriy M. Kaminskiy wrote:
[...]
> And also tried with memcg:
> t=/sys/fs/cgroup/memory/test1;mkdir $t;echo 0 >$t/tasks;
> echo 48M >$t/memory.limit_in_bytes; su testuser [...]
> and it has not helped at all (rather opposite, it ended up with killed
> init and kernel pa
Franklin, Tony,
On 11/03/16 17:39, Franklin S Cooper Jr. wrote:
>
>
> On 03/11/2016 07:52 AM, Roger Quadros wrote:
>> Franklin,
>>
>> On 11/03/16 01:56, Franklin S Cooper Jr wrote:
>>> The dma channel information is located within the GPMC node which is the
>>> NAND's parent node. The NAND drive
On Mon, Mar 07, 2016 at 05:19:17PM +0530, Sudip Mukherjee wrote:
> The variable p is a data structure which is used by the driver core
> internally and it is not expected that busses will be directly accessing
> these driver core internal only data.
>
> Signed-off-by: Sudip Mukherjee
> ---
>
> R
On Sat, Mar 12, 2016 at 04:37:15PM +0100, Wolfram Sang wrote:
> On Mon, Mar 07, 2016 at 04:10:46PM +0100, Jan Glauber wrote:
> > From: David Daney
> >
> > Use resource start and size directly.
> >
> > Signed-off-by: David Daney
> > Signed-off-by: Jan Glauber
>
> What about converting to devm_
On 12/03/2016 10:19, Jonathan Cameron wrote:
On 11/03/16 14:52, Marc Titinger wrote:
The user (or an init script) may setup RShunt via sysfs after the
driver was initialized, for instance based on the EEPROM contents
of a modular probe. The calibration register must be set accordingly.
Signed
Dear all,
This is the fourth version of the UCS1002 driver, a Programmable USB Port
Power Controller with Charger Emulation.
Any comments are welcome. Thanks in advance.
Enric Balletbo i Serra (2):
devicetree: Add UCS1002 USB Port Power Controller binding
power: ucs1002: Add support for Prog
The UCS1002-2 provides a USB port power switch for precise control of up
to 2.5 amperes continuous current.
You can add support to your board with current binding.
Example:
ucs1002: ucs1002@57 {
compatible = "microchip,ucs1002";
reg = <0x57>;
};
Signed-off-by:
The UCS1002-2 provides a USB port power switch for precise control of up
to 2.5 amperes continuous current with over-current limit (OCL), dynamic
thermal management, latch or auto-recovery (low test current) fault
handling, selectable active low or high enable, under- and over-voltage
lockout, back
On Thu, 2016-03-03 at 04:26:53 UTC, Michael Ellerman wrote:
> Move the logic to work out the kernel toc pointer into a header. This is
> a good cleanup, and also means we can use it elsewhere in future.
>
> Reviewed-by: Kamalesh Babulal
> Reviewed-by: Torsten Duwe
> Signed-off-by: Michael Ellerm
Add snps,dis_rxdet_inp3_quirk property which disables receiver detection
in PHY P3 power state.
Signed-off-by: Sriram Dash
Signed-off-by: Rajesh Bhagat
---
Documentation/devicetree/bindings/usb/dwc3.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/
On Mon, Mar 14, 2016 at 10:18:19AM +0100, Thierry Reding wrote:
> On Mon, Mar 07, 2016 at 05:19:17PM +0530, Sudip Mukherjee wrote:
> > The variable p is a data structure which is used by the driver core
> > internally and it is not expected that busses will be directly accessing
> > these driver co
> This doesn't work. I see a number of these WARN_ON()s trigger and I
> think the reason is that i2c_init() always fails now. The cause seems to
> be that i2c_init() calls i2c_add_driver(&dummy_driver), which will now
> always fail, because is_register is set to true *after* that call. There
> is
Hi David,
Thank you for updating the series.
I'll review it this week.
Just one comment on __kprobes. Nowadays kprobes already using
NOKPROBE_SYMBOL() instead of that, since __kprobes moves all
functions into another section and will mess up symbol table.
In asm code, maybe you can reuse _ASM_NOK
24.02.2016 22:10, Mathieu OTHACEHE пишет:
Add support for :
- CP-102E: 2 ports RS232 PCIE card
- CP-102EL: 2 ports RS232 PCIE card
- CP-132EL: 2 ports RS422/485 PCIE card
- CP-114EL: 4 ports RS232/422/485 PCIE card
- CP-104EL-A: 4 ports RS232 PCIE card
- CP-168EL-A: 8 ports RS232 PCIE card
- CP-
On Mon, Mar 14, 2016 at 10:28:10AM +0100, Wolfram Sang wrote:
>
> > This doesn't work. I see a number of these WARN_ON()s trigger and I
> > think the reason is that i2c_init() always fails now. The cause seems to
> > be that i2c_init() calls i2c_add_driver(&dummy_driver), which will now
> > always
>From: "David A. Long"
>
>Add HAVE_REGS_AND_STACK_ACCESS_API feature for arm64.
>
>Signed-off-by: David A. Long
Looks good for me.
Reviewed-by: Masami Hiramatsu
Thanks,
>---
> arch/arm64/Kconfig | 1 +
> arch/arm64/include/asm/ptrace.h | 31 +++
> arch/arm64/kernel/ptra
Hi
On 03/09/2016 11:00 PM, Radim Krčmář wrote:
2016-03-09 12:10+0100, Paolo Bonzini:
On 08/03/2016 22:54, Radim Krčmář wrote:
2016-03-07 16:36+0100, Paolo Bonzini:
On 04/03/2016 21:46, Suravee Suthikulpanit wrote:
+static void svm_deliver_avic_intr(struct kvm_vcpu *vcpu, int vec)
+{
+
On Mon, Mar 14, 2016 at 12:19:14PM +1000, Dave Airlie wrote:
> On 11 March 2016 at 23:45, Rafael J. Wysocki wrote:
> > On Friday, March 11, 2016 12:58:15 PM Mika Westerberg wrote:
> >> On Thu, Mar 10, 2016 at 09:57:09PM +0100, Rafael J. Wysocki wrote:
> >> > > It doesn't seem to do any runtime PM,
This patch adds initial pin configuration using pinctrl subsystem
to reduce leakage power-consumption of gpio pins in normal state.
All pins included in this patch are NC (not connected) pin.
Cc: Kukjin Kim
Cc: Krzysztof Kozlowski
Signed-off-by: Chanwoo Choi
Reviewed-by: Krzysztof Kozlowski
--
On 2016年03月09日 05:09, Eduardo Valentin wrote:
> On Tue, Mar 08, 2016 at 11:24:39AM +0800, Wei Ni wrote:
>>
>>
>> On 2016年03月07日 16:23, Wei Ni wrote:
>>> There had a build error in previous patch.
>>> Fixed it in this version.
>>> Please review it.
>>
>> Add CC: linux...@vger.kernel.org
>>
Hi Rui
On 14.03.2016 17:48, Chanwoo Choi wrote:
> On 2016년 03월 14일 17:31, Krzysztof Kozlowski wrote:
>> On 14.03.2016 11:04, Chanwoo Choi wrote:
>>> From: Jaehoon Chung
>>>
>>> This patch adds MSHC (Mobile Storage Host Controller) dt node for
>>> Exynos3250 SoC. MSHC is an interface between the system an
>
>> - if (pcie_port_runtime_suspend_allowed(dev))
>> + if (pcie_port_runtime_suspend_allowed(dev)) {
>> + pm_runtime_allow(&dev->dev);
>
> PCI drivers typically have left this decision up to the userspace. I'm
> wondering whether it is good idea to deviate from that here? Of co
Hi,
On 03/09/2016 06:10 PM, Paolo Bonzini wrote:
+
>>>+ if (vcpu->mode == IN_GUEST_MODE) {
>>>+ wrmsrl(SVM_AVIC_DOORBELL,
>>>+ __default_cpu_present_to_apicid(vcpu->cpu));
>>>+ } else {
>>>+ kvm_vcpu_kick(vcpu);
>>>+ }
>> >
>And what about
> [...]
>
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