Hello,
On Tue, Feb 09, 2016 at 09:04:18AM -0800, Linus Torvalds wrote:
> On Tue, Feb 9, 2016 at 8:50 AM, Tejun Heo wrote:
> > idk, not doing so is likely to cause subtle bugs which are difficult
> > to track down. The problem with -stable is 874bbfe6 being backported
> > without the matching tim
On Mon, Feb 08, 2016 at 06:33:37PM +, Jonathan Cameron wrote:
> On 06/02/16 22:23, Ksenija Stanojevic wrote:
> > Move mxs-lradc driver from drivers/staging/iio/adc to drivers/iio/adc.
> >
> > Signed-off-by: Ksenija Stanojevic
> Given the input elements in here, cc'ing linux-input and Dmitry.
Hello, Mike.
On Tue, Feb 09, 2016 at 06:04:04PM +0100, Mike Galbraith wrote:
> workqueue: schedule WORK_CPU_UNBOUND work on wq_unbound_cpumask CPUs
>
> WORK_CPU_UNBOUND work items queued to a bound workqueue always run
> locally. This is a good thing normally, but not when the user has
> asked u
Hi Linus:
This push fixes the following issues:
API:
* Fix async algif_skcipher, it was broken by recent fixes.
* Fix potential race condition in algif_skcipher with ctx.
* Fix potential memory corruption in algif_skcipher.
* Add missing lock to crypto_user when doing an alg dump.
Drivers:
* m
On Tue, 2016-02-09 at 12:54 -0500, Tejun Heo wrote:
> Hello, Mike.
>
> On Tue, Feb 09, 2016 at 06:04:04PM +0100, Mike Galbraith wrote:
> > workqueue: schedule WORK_CPU_UNBOUND work on wq_unbound_cpumask
> > CPUs
> >
> > WORK_CPU_UNBOUND work items queued to a bound workqueue always run
> > locall
On 02/05/2016 05:11 PM, Joonsoo Kim wrote:
> Yeah, it seems wrong to me. :)
> Here goes fix.
Doesn't apply for me, even after fixing the most obvious line wraps.
Seems like the version in mmotm is still your original patch and
Andrew's hotfix?
We have two reports of drivers broken in v4.3 by Jiang's change,
991de2e59090 ("PCI, x86: Implement pcibios_alloc_irq() and
pcibios_free_irq()").
It would be best to fix the problem instead of reverting 991de2e59090, but
I don't have time to do that myself, and we haven't heard from Jiang, so
the
991de2e59090 appeared in v4.3. Олег reported that the Elcus-1553 TA1-PCI
driver worked in v4.2 but not v4.3 and bisected it to 991de2e59090. Sunjin
reported that the RocketRAID 272x driver worked in v4.2 but not v4.3. In
both cases, booting with "pci=routirq" is a workaround.
I think the proble
On Thu, Feb 04, 2016 at 06:28:49PM +0100, Tomasz Nowicki wrote:
> Currently we have two platforms (x86 & ia64) capable of PCI ACPI host
> bridge initialization. They both use sysdata to pass down parent
> device reference and both rely on NULL parent in pci_create_root_bus()
> to validate sysdata c
On 2/9/16, Ville Syrjälä wrote:
> BTW I'm not at all convinced about the current live status bit defines
> we have for g4x. Supposedly someone tested them and found that they
> don't match the spec, but IIRC when I tried them on one g4x machine
> here, they did match the spec (well, at least for t
On Tue, 2016-02-09 at 18:56 +0100, Mike Galbraith wrote:
> On Tue, 2016-02-09 at 12:54 -0500, Tejun Heo wrote:
> > Hello, Mike.
> >
> > On Tue, Feb 09, 2016 at 06:04:04PM +0100, Mike Galbraith wrote:
> > > workqueue: schedule WORK_CPU_UNBOUND work on wq_unbound_cpumask
> > > CPUs
> > >
> > > WORK
On Tue, Feb 9, 2016 at 9:51 AM, Tejun Heo wrote:
>>
>> (a) actually dequeue timers and work queues that are bound to a
>> particular CPU when a CPU goes down.
>>
> This goes the same for work items and timers. If we want to do
> explicit dequeueing or flushing of cpu-bound stuff on cpu down, we'
On Tue, Feb 09, 2016 at 05:01:34PM +0100, Jan Kara wrote:
> On Tue 09-02-16 10:43:53, Jan Kara wrote:
> > On Mon 08-02-16 12:55:24, Dan Williams wrote:
> > > On Mon, Feb 8, 2016 at 12:18 PM, Dave Chinner wrote:
> > > [..]
> > > >> Setting aside the current block zeroing problem you seem to assumin
On Tuesday 09 February 2016 09:12 PM, Lee Jones wrote:
On Sat, 30 Jan 2016, Laxman Dewangan wrote:
+ Normal mode also called as active mode on which all step-down
+ regulators, all linear regulators, GPIOs, and the 32kHz
+ oscillator are in normal active mode.
From: Kelly Zytaruk
It is not neccessary to check for PCI_EXP_TYPE in sriov_init(). There appears
to be no reason for the check.
Some AMD GPUs have hardware support for grapics SRIOV.
If the GPU has a display output then the GPU needs to support Legacy VGA
operation.
If CLASS_CODE = VGA then
Hi Bjorn,
On Tue, Feb 09, 2016 at 11:00:06AM -0600, Bjorn Helgaas wrote:
> Hi Lorenzo,
>
> On Mon, Feb 01, 2016 at 10:25:57AM +, Lorenzo Pieralisi wrote:
> > The [0 - 64k] ACPI PCI IO port resource boundary check in:
> >
> > acpi_dev_ioresource_flags()
> >
> > is currently applied blindly i
On 09:43-20160209, Nishanth Menon wrote:
> On Tue, Feb 9, 2016 at 8:54 AM, Jassi Brar wrote:
[..]
> Let me prototype this as part of of_xlate and see if I can pull the
> qinst data back out.. obviously one negative will be that I will
> register *all* valid channels as part of prob
> -Original Message-
> From: Robin Murphy [mailto:robin.mur...@arm.com]
> Sent: Tuesday, February 09, 2016 5:05 AM
> To: robh...@kernel.org; frowand.l...@gmail.com; grant.lik...@linaro.org;
> devicet...@vger.kernel.org
> Cc: marc.zyng...@arm.com; mark.rutl...@arm.com; david.da...@cavium.c
On Tue, 2016-02-09 at 18:11 +0100, Frederic Weisbecker wrote:
> On Tue, Feb 02, 2016 at 12:19:46PM -0500, r...@redhat.com wrote:
> > From: Rik van Riel
> >
> > After removing __acct_update_integrals from the profile,
> > native_sched_clock remains as the top CPU user. This can be
> > reduced by o
On Tue, Feb 09, 2016 at 05:34:19PM +, Gabriele Paoloni wrote:
> From: gabriele paoloni
>
> This patch modifies the current Hip05/Hip06 PCIe host
> controller driver to add support for ECAM compliant
> platforms.
> This is needed in preparation for the ACPI based driver
> to allow both DT and
On 02/09, Masahiro Yamada wrote:
> 2016-02-09 19:11 GMT+09:00 Dinh Nguyen :
>
> >
> > Yes, .get_parent call back is define when num_parents = 1. If you take a
> > look at socfpga.dtsi, the main_pll of type "altr,socfpga-pll-clk" only
> > has 1 parent, osc1. But the periph_pll and sdram_pll, also o
I l
On Tue, Feb 9, 2016 at 9:24 AM, Jan Kara wrote:
> Hello,
>
> I was thinking about current issues with DAX fault locking [1] (data
> corruption due to racing faults allocating blocks) and also races which
> currently don't allow us to clear dirty tags in the radix tree due to races
> between f
On 02/09, Masahiro Yamada wrote:
> Before commit b3d192d5121f ("clk: simplify __clk_init_parent()"),
> __clk_init_parent() called .get_parent() only for multi-parent
> clocks. That commit changed the behavior to call .get_parent()
> if available even for single-parent clocks and root clocks.
>
>
The patch
regulator: qcom-saw: Add support for SAW regulators
has been applied to the regulator tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours
On Tue, Feb 09, 2016 at 04:17:33PM +, Robin Murphy wrote:
> On 09/02/16 16:08, Mark Rutland wrote:
> [...]
>
> having msi-map-mask clash with a nonzero rid-base, as that's another
> thing one can easily get wrong.
>
> [...]
>
> + if (rid_base & ~map_mask) {
> +
On Tue, Feb 09, 2016 at 07:01:21PM +0200, Heikki Krogerus wrote:
> The purpose of this class is to provide unified interface
> for user space to get the status and basic information about
> USB Type-C Connectors in the system, control data role
> swapping, and when USB PD is available, also power r
On Tue, Feb 09, 2016 at 07:01:22PM +0200, Heikki Krogerus wrote:
> USB Type-C Connector System Software Interface (UCSI) is a
> specification that defines registers and data structures
> used to interface with the USB Type-C connectors on a system.
>
> The specification is public and available at:
On Tue, Feb 09, 2016 at 07:01:23PM +0200, Heikki Krogerus wrote:
> Driver for ACPI enumerated UCSI devices.
What does this mean?
What does the driver do? Why would we care?
>
> Signed-off-by: Heikki Krogerus
> ---
> drivers/usb/type-c/Kconfig | 10
> drivers/usb/type-c/Makefile
On Tue, Feb 09, 2016 at 07:36:41PM +0200, Ville Syrjälä wrote:
> On Tue, Feb 09, 2016 at 07:03:51PM +0200, Ville Syrjälä wrote:
> > On Tue, Feb 09, 2016 at 04:39:21PM +, Sharma, Shashank wrote:
> > > Hi Nick,
> > >
> > > Sonika is OOO for this week.
> > > AFAIK about this issue, looks like t
On Tue, Feb 09, 2016 at 10:17:46PM +0530, Amit Pundir wrote:
> On 9 February 2016 at 04:50, Greg Kroah-Hartman
> wrote:
> > On Tue, Feb 09, 2016 at 02:07:02AM +0530, Amit Pundir wrote:
> >> Please ignore this one too. I should have build tested these patches
> >> individually and not in particular
Hello, Mike.
On Tue, Feb 09, 2016 at 07:02:35PM +0100, Mike Galbraith wrote:
> > It doesn't do anything unless the user twiddles the mask to exclude
> > certain (think no_hz_full) CPUs, so there are no clueless victims.
>
> (a plus: testers/robots can twiddle mask to help find bugs, _and_
> nohz_
On 02/09/2016 09:41 AM, Manoj Kumar wrote:
>> Yeah, I can see how that is confusing. Since, all three possible valid
>> crq message types have the first bit set I think this was originally a
>> cute hack to grab anything that was likely valid. Then in
>> ibmvscsi_handle_crq() we explicitly match th
On 02/09, Sudip Mukherjee wrote:
> On Mon, Feb 08, 2016 at 05:07:08PM -0800, Stephen Boyd wrote:
> > On 12/23, Sudip Mukherjee wrote:
> > > Add a helper function devm_add_action_or_reset() which will internally
> > > call devm_add_action(). But if devm_add_action() fails then it will
> > > execute
All Exynos SoCs have the same syscon reboot and poweroff device nodes so
there is no need to duplicate the same on each SoC dtsi and can be moved
to a common dtsi that can be included by all the SoCs dtsi files.
Signed-off-by: Javier Martinez Canillas
---
Hello,
The patch was tested on an Exyno
On Tue, Feb 09, 2016 at 05:34:20PM +, Gabriele Paoloni wrote:
> From: gabriele paoloni
>
> This patch adds specific quirks for PCI config space accessors,
> it uses _HID to decide whether to hook pci_ops or not.
If I understand correctly, this would mean that it's not actually ECAM
compliant
On Tue, Feb 09, 2016 at 11:31:27PM +0800, Chen-Yu Tsai wrote:
> Allwinner SoCs typically have a Mentor Graphics Inventra MUSB dual role
> controller for USB OTG.
>
> Now that the issue with MUSB and USB gadget registration order has been
> resolved, we can enable this driver in dual role mode. Thi
> -Original Message-
> From: Lijun Pan [mailto:lijun@freescale.com]
> Sent: Monday, February 08, 2016 5:40 PM
> To: gre...@linuxfoundation.org; a...@arndb.de; de...@driverdev.osuosl.org;
> linux-
> ker...@vger.kernel.org
> Cc: stuart.yo...@freescale.com; itai.k...@freescale.com;
> g
On Tue, Feb 9, 2016 at 6:11 PM, Vladimir Davydov wrote:
> On Sat, Feb 06, 2016 at 01:06:29PM +0300, Konstantin Khlebnikov wrote:
> ...
>> static int opt_list; /* list pages (in ranges) */
>> static int opt_no_summary; /* don't show summary */
>> static pid_t op
Hi,
Should this patch change the condition in pvclock_gtod_notify?
Currently it looks like we'll only request a masterclock update when
tsc is no longer a good clocksource.
On Mon, Feb 8, 2016 at 7:18 AM, Paolo Bonzini wrote:
> When an NTP server is running, it may adjust the time substantially
>
This change has been made with the goal that kernel functions should
return something more descriptive than -1 on failure.
A variable `err` has been introduced for storing error codes.
The return value of kzalloc on failure should return a -1 and not a
-ENOMEM. This was found using Coccinelle. A
On 9 February 2016 at 18:24, Jan Kara wrote:
> Hello,
>
> I was thinking about current issues with DAX fault locking [1] (data
> corruption due to racing faults allocating blocks) and also races which
> currently don't allow us to clear dirty tags in the radix tree due to races
> between faults an
On Tue, Feb 9, 2016 at 11:01 AM, Gautham R Shenoy
wrote:
> Hello Rafael,
>
> On Sun, Feb 07, 2016 at 03:50:31PM +0100, Rafael J. Wysocki wrote:
>> From: Rafael J. Wysocki
>>
>> Instead of using a per-CPU deferrable timer for queuing up governor
>> work items, register a utilization update callbac
The fb_rotate method in struct fb_ops is never actually invoked, and
it's been that way in the entire history of git (in fact, the last
occurrence of the string '->fb_rotate' vanished over 10 years ago,
with b4d8aea6d6, and that merely tested whether the callback
existed). So remove some dead code
From: David Daney
Per the subject, always select HANDLE_DOMAIN_IRQ, and implement
set_irq_regs() so that it actually works.
Signed-off-by: David Daney
---
arch/mips/Kconfig| 1 +
arch/mips/include/asm/irq_regs.h | 10 ++
2 files changed, 11 insertions(+)
diff --git a/
From: David Daney
Follow on patchs need to be able to distinguish the new models.
Signed-off-by: David Daney
---
arch/mips/cavium-octeon/executive/octeon-model.c | 82 +++-
arch/mips/include/asm/octeon/cvmx.h | 27 +++-
arch/mips/include/asm/octeon/octeon-f
From: David Daney
Follow-on patches for OCTEON III will increase the number of irqs to
potentially more than 256.
Increase the width of the octeon_irq_ciu_to_irq to int to be able to
handle this case. Remove the hacky code that verified that u8 would
not be overflowed.
Signed-off-by: David Dan
From: David Daney
Use the trigger type passed in to the function instead of reading it
back out of the irq_data.
Signed-off-by: David Daney
---
arch/mips/cavium-octeon/octeon-irq.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/cavium-octeon/octeon-irq.c
b/arch/
From: David Daney
Attempts to read the nonexistent registers results in bus errors.
Either use registers that exist, or don't do the access as appropriate.
Signed-off-by: David Daney
---
arch/mips/cavium-octeon/csrc-octeon.c | 13 +
arch/mips/cavium-octeon/setup.c | 34 ++
From: David Daney
Add irq_chip support for both IPI and "normal" interrupts of the CIU3
controller. Document the device tree binding for the CIU3.
Some functions are non-static as they will be used by follow-on
support for MSI-X.
Signed-off-by: David Daney
Acked-by: Rob Herring
Cc: Rob Herri
From: David Daney
OCTEON chips with the CIU3 interrupt controller use a different IPI
mechanism that previous models.
Add plat_smp_ops for the cn78xx and probing code to choose between the
two types of ops.
Signed-off-by: David Daney
---
arch/mips/cavium-octeon/setup.c | 4 +-
arch/mi
From: David Daney
These new members of the OCTEON III family have some new registers,
update some of the definitions for use in follow on patches.
Signed-off-by: David Daney
---
arch/mips/include/asm/octeon/cvmx-ciu3-defs.h | 353 ++
arch/mips/include/asm/octeon/cvmx-fpa-de
From: David Daney
The OCTEON III cn78xx and cn73xx family of SoCs has some architectural
differences from previous OCTEON processors.
Here we add support for the new interrupt controller and related IPI
machinery. This is enough to be able to boot an initrd based system
to a command prompt on t
On 02/09, Viresh Kumar wrote:
> This allows the OPP core to request/free the regulator resource,
> attached to a device OPP. The regulator device is fetched using the name
> provided by the driver, while calling: dev_pm_opp_set_regulator().
>
> This will work for both OPP-v1 and v2 bindings.
>
>
On 02/09, Viresh Kumar wrote:
> In few use cases (like: cpufreq), it is desired to get the maximum
> voltage latency for changing OPPs. Add support for that.
>
> Signed-off-by: Viresh Kumar
> ---
Reviewed-by: Stephen Boyd
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a
On 02/09, Viresh Kumar wrote:
> This adds a routine, dev_pm_opp_set_rate(), responsible for configuring
> power-supply and clock source for an OPP.
>
> The OPP is found by matching against the target_freq passed to the
> routine. This shall replace similar code present in most of the OPP
> users a
On 02/09, Viresh Kumar wrote:
> OPP core can handle the regulators by itself, and but it needs to know
> the name of the regulator to fetch. Add support for that.
>
> Signed-off-by: Viresh Kumar
> ---
Reviewed-by: Stephen Boyd
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora For
On 02/09, Viresh Kumar wrote:
> OPP layer manages it now and cpufreq-dt driver doesn't need it. But, we
> still need to check for availability of resources for deferred probing.
>
> Signed-off-by: Viresh Kumar
> ---
Reviewed-by: Stephen Boyd
--
Qualcomm Innovation Center, Inc. is a member of
On Tuesday 09 February 2016 17:51:06 Darren Hart wrote:
> On Tue, Feb 09, 2016 at 09:33:03AM +0100, Pali Rohár wrote:
> > On Monday 08 February 2016 13:42:10 Darren Hart wrote:
> > > Assuming the above is an accurate view, I don't see any reason to
> > > go beyond the minimal change to the existing
Ingo suggested we rename how we reference barriers A and B
regarding futex ordering guarantees. This patch replaces,
for both barriers, MB (A) with smp_mb(); (A), such that:
- We explicitly state that the barriers are SMP, and
- We standardize how we reference these across futex.c
helping reader
From: Mel Gorman
When dealing with key handling for shared futexes, we can drastically reduce
the usage/need of the page lock. 1) For anonymous pages, the associated futex
object is the mm_struct which does not require the page lock. 2) For inode
based, keys, we can check under RCU read lock if t
This is the continuation of the original patch, except with Ingo's
feedback about the ordering comments we have and how we reference
them throughout the code. Please consider for v4.6.
Thanks!
Changes from v5:
- Added patch 1 (Ingo).
Changes from v4:
- Integrated feedback from Hugh, specifically
> What I was going to propose, though, was to simplify the parsing by
> doing this:
>
> struct reg_range {
> const char * const names;
> unsigned flags;
> unsigned len;
> };
>
> which describes a bit slice of the register and then do this:
>
> const struct reg_range reg_descrip
Support for the new rx_nohandler statistic.
This code is designed to handle the case where the kernel reported statistic
structure is smaller than the larger structure in later releases (and vice
versa).
Signed-off-by: Stephen Hemminger
---
ip/ipaddress.c | 35 ++
From: Jake Oshins
This version incorporates feedback from Bjorn Helgaas and fixes a build
break reported by the kbuild test robot.
This is a resend of patches that enable PCI pass-through within Hyper-V
VMs. This patch series only includes those which were deemed appropriate
for being incorport
From: Jake Oshins
This patch introduces a new driver which exposes a root PCI bus whenever a
PCI Express device is passed through to a guest VM under Hyper-V. The
device can be single- or multi-function. The interrupts for the devices
are managed by an IRQ domain, implemented within the driver.
From: Jake Oshins
This patch adds an fwnode_handle to struct pci_sysdata, which is
used by the next patch in the series when trying to locate an
IRQ domain associated with a root PCI bus.
Signed-off-by: Jake Oshins
---
arch/x86/include/asm/pci.h | 15 +++
include/linux/pci.h
From: Jake Oshins
This patch adds a second way of finding an IRQ domain associated with
a root PCI bus. After looking to see if one can be found through
the OF tree, it attempts to look up the IRQ domain through an
fwnode_handle stored in the pci_sysdata struct.
Signed-off-by: Jake Oshins
---
From: Andrew Pinski
On ThunderX T88 pass 1.x through 2.1 parts, broadcast TLBI
instructions may cause the icache to become invalid if it contains
data for a non-current ASID.
This patch implements the workaround (which flushes the local icache
when switching the mm) by using code patching.
Sign
Hi Suman
On Tue, 9 Feb 2016, Suman Anna wrote:
> On 02/09/2016 02:49 AM, Paul Walmsley wrote:
> > On Mon, 8 Feb 2016, Suman Anna wrote:
> >> On 02/07/2016 08:48 PM, Paul Walmsley wrote:
> >>> On Tue, 2 Feb 2016, Kishon Vijay Abraham I wrote:
> >>>
> Paul, what do you think is the best way f
On Fri, Dec 11, 2015 at 09:39:58AM +0530, Vignesh R wrote:
> + if (spi_flash_read_supported(spi)) {
> + struct spi_flash_read_message msg;
> + int ret;
> +
> + msg.buf = buf;
> + msg.from = from;
> + msg.len = len;
> + msg
On Tuesday 09 February 2016 16:55:42 Karicheri, Muralidharan wrote:
>
> The descriptors are usable by different drivers, one driver may use it as
> buf ptr/ len, other for something else. So they should remain as generic
> and it is up to individual drivers to use it in whatever way it requires.
On Tue, Feb 09, 2016 at 09:41:44PM +0530, Aneesh Kumar K.V wrote:
> With next generation power processor, we are having a new mmu model
> [1] that require us to maintain a different linux page table format.
>
> Inorder to support both current and future ppc64 systems with a single
> kernel we need
subscribe
On Tue, Feb 09, 2016 at 11:17:59AM -0800, Luck, Tony wrote:
> There is a lot of bit counting and typing either way. My string
> format is visually compact, and looks quite similar to the eventual
> output.
Except if you have 64 all single bits and all defined. Then that thing:
+static char *cr4_
This patch adds a new waiter parameter to the mutex_optimistic_spin()
function to prepare it to be used by a waiter-spinner that doesn't
need to go into the OSQ as there can only be one waiter-spinner which
is the head of the waiting queue.
Signed-off-by: Waiman Long
---
kernel/locking/mutex.c |
Ding Tianhong reported a live-lock situation where a constant stream
of incoming optimistic spinners blocked a task in the wait list from
getting the mutex.
This patch attempts to fix this live-lock condition by enabling the
woken task in the wait queue to enter into an optimistic spinning
loop it
This patchset is a variant of PeterZ's "locking/mutex: Avoid spinner
vs waiter starvation" patch. The major difference is that the
waiter-spinner won't enter into the OSQ used by the spinners. Instead,
it will spin directly on the lock in parallel with the queue head
of the OSQ. So there will be a
On 02/08/2016 03:38 PM, Olof Johansson wrote:
On Mon, Feb 08, 2016 at 11:59:06AM -0600, Suravee Suthikulpanit wrote:
From: Suravee Suthikulpanit
Adding maintainers for AMD Seattle device tree.
Signed-off-by: Brijesh Singh
Signed-off-by: Suravee Suthikulpanit
Signed-off-by: Tom Lendacky
On Tue, 9 Feb 2016 11:29:16 -0800
David Daney wrote:
Hi David,
> From: Andrew Pinski
>
> On ThunderX T88 pass 1.x through 2.1 parts, broadcast TLBI
> instructions may cause the icache to become invalid if it contains
> data for a non-current ASID.
>
> This patch implements the workaround (wh
On 02/09/2016 11:52 AM, Marc Zyngier wrote:
On Tue, 9 Feb 2016 11:29:16 -0800
David Daney wrote:
Hi David,
From: Andrew Pinski
On ThunderX T88 pass 1.x through 2.1 parts, broadcast TLBI
instructions may cause the icache to become invalid if it contains
data for a non-current ASID.
This pa
Am seeing some DMAR error messages on reboot after a 'shutdown -r now'.
(Finally got annoyed enough to track it down while doing a git bisect)
Hardware: Dell Latitude E6530 laptop.
Working (booting from power-off state):
[0.027673] Freeing SMP alternatives memory: 28K (b5111000 -
ff
On Tue, 9 Feb 2016, Daniel Wagner wrote:
> > FWIW I think all the MIPS ABI flags stuff also needs to go outside the
> > conditional, because it's ABI agnostic. I'll make the right change myself
> > on top of your fixes. It'll remove a little bit of code duplication,
> > which is always welco
We need that for a custom hardware that needs the reverse reset
sequence.
Signed-off-by: Bernhard Walle
---
Changes compared to v1:
- Add documentation to 'phy-reset-gpios' that flags are ignored
as suggested by Andrew Lunn.
Documentation/devicetree/bindings/net/fsl-fec.txt | 7 ++-
dri
On Tuesday, February 09, 2016 02:01:39 AM Rafael J. Wysocki wrote:
> On Tue, Feb 9, 2016 at 1:39 AM, Steve Muckle wrote:
> > Hi Rafael,
> >
> > On 02/08/2016 03:06 PM, Rafael J. Wysocki wrote:
> >> Now that all review comments have been addressed in patch [3/3], I'm going
> >> to
> >> put this se
On Tue, 9 Feb 2016 11:59:10 -0800
David Daney wrote:
> On 02/09/2016 11:52 AM, Marc Zyngier wrote:
> > On Tue, 9 Feb 2016 11:29:16 -0800
> > David Daney wrote:
> >
> > Hi David,
> >
> >> From: Andrew Pinski
> >>
> >> On ThunderX T88 pass 1.x through 2.1 parts, broadcast TLBI
> >> instructions
There are a few instances of
for (i = 0; i < FOO; ++i) {
ret = do_stuff(i)
if (ret)
goto err;
}
...
err:
while (--i)
undo_stuff(i);
At best, this fails to undo_stuff for i==0, but if i==0 was the case
that failed, we'll end up with an "infinite" loop in the error path
This fails to undo the setup for pin==0; moreover, something
interesting happens if the setup failed already at pin==0.
Signed-off-by: Rasmus Villemoes
---
drivers/gpu/drm/i915/intel_i2c.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/driv
We need to use post-decrement to ensure that irq_dispose_mapping is
also called on priv->rxq[0]->irq_no; moreover, if one of the above for
loops failed already at i==0 (so we reach one of these labels with
that value of i), we'll enter an essentially infinite loop of
out-of-bounds accesses.
Signed
We need to use post-decrement to get percpu_counter_destroy() called
on &wb->stat[0]. Moreover, the pre-decremebt would cause infinite
out-of-bounds accesses if the setup code failed at i==0.
Signed-off-by: Rasmus Villemoes
---
mm/backing-dev.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(
If CPU_UP_PREPARE is called it is not guaranteed, that a previously allocated
and assigned hash has been freed already, but perf_event_init_cpu()
unconditionally allocates and assignes a new hash if the swhash is referenced.
By overwriting the pointer the existing hash is not longer accessible.
Ve
If CPU_DOWN_PREPARE fails the perf hotplug notifier is called for
CPU_DOWN_FAILED and calls perf_event_init_cpu(), which checks whether the
swhash is referenced. If yes it allocates a new hash and stores the pointer in
the per cpu data structure.
But at this point the cpu is still online, so there
The while loop after err_slaves should use post-decrement; otherwise
we'll fail to do the kfrees for i==0, and will run into out-of-bounds
accesses if the setup above failed already at i==0.
The predecrement in the --port is ok, since ->vlan_filter is
(bizarrely) 1-indexed. But I'm changing 'if' t
No functional change, just less confusing to read.
Signed-off-by: Thomas Gleixner
---
kernel/events/core.c | 21 ++---
1 file changed, 10 insertions(+), 11 deletions(-)
--- a/kernel/events/core.c
+++ b/kernel/events/core.c
@@ -6710,7 +6710,7 @@ static void swevent_hlist_releas
The following series fixes a few oddities in the core perf code related to cpu
hotplug namely memory leaks and pointless smp function calls to offline cpus.
Thanks,
tglx
If CPU_UP_PREPARE fails the perf hotplug code calls perf_event_exit_cpu(),
which is a pointless exercise. The cpu is not online, so the smp function
calls return -ENXIO. So the result is a list walk to call noops.
Remove it.
Signed-off-by: Thomas Gleixner
---
kernel/events/core.c |1 -
1 fi
The current code fails to call i2c_del_adapter on
dev_prev->gmbus[0].adapter, and if the for loop above failed already
at i==0, all hell breaks loose when we do the loop body for
i = -1,-2,...
Signed-off-by: Rasmus Villemoes
---
drivers/gpu/drm/gma500/intel_gmbus.c | 2 +-
1 file changed, 1 inse
It's perfectly valid to use the LTC3589 without an interrupt pin
connected to it. Currently, the driver probing fails when client->irq
is 0 (which means "no interrupt"). Don't register the interrupt
handler in that case but successfully finish the device probing instead.
Signed-off-by: Bernhard Wa
On Mon, 08 Feb 2016 22:50:39 +0100, "Rafael J. Wysocki" said:
> On Mon, Feb 8, 2016 at 10:44 PM, wrote:
> > My Dell Latitude laptopi on next-20160201 is throwing a similar error
> > at shutdown, except the traceback continues:
> >
> > mei_me_remove+0xbd/0xc0
> > pci_device_shutdown+0x32/0x50
> >
On Tue, 9 Feb 2016 12:12:29 +0100 Ingo Molnar wrote:
> > The conceptual problem is that if some piece of code does spin_lock_init()
> > or
> > DEFINE_SPINLOCK(), that lock isn't necessarily initialized yet.
>
> The conceptual problem is that the data structures are not build time
> initialize
On Tuesday, February 09, 2016 08:51:26 AM Viresh Kumar wrote:
> On 08-02-16, 22:36, Rafael J. Wysocki wrote:
> > On Mon, Feb 8, 2016 at 12:39 PM, Viresh Kumar
> > wrote:
> > > + ret = kobject_init_and_add(&dbs_data->kobj, &gov->kobj_type,
> > > + get_governo
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