Hello!
Here is a set of 3 patches what fix koops, memory leak and
rockchip EMAC hang. Tested on radxarock lite.
[PATCH 1/3] net: arc_emac: fix koops caused by sk_buff free
[PATCH 2/3] net: arc_emac: reset txbd_curr and txbd_dirty pointers
[PATCH 3/3] net: arc_emac: fix sk_buff leak
2016-02-09 16:07+0100, Paolo Bonzini:
> On 09/02/2016 15:05, Radim Krčmář wrote:
>> 2016-02-08 17:15+0100, Paolo Bonzini:
>>> int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
>>> + return true;
>>
>> Apart from int/bool mismatch, it returned 0 before and that was correct.
>>
>
> So that m
EMAC reset internal tx ring pointer to zero at statup.
txbd_curr and txbd_dirty can be different from zero.
That cause ethernet transfer hang (no packets transmitted).
In order to reproduce, run on device:
ifconfig eth0 down
ifconfig eth0 up
Signed-off-by: Alexander Kochetkov
---
CC: st
Hi Damien,
Le Tuesday 09 February 2016 à 10:08 -0500, Damien Riegel a écrit :
> On Tue, Feb 09, 2016 at 11:15:49AM +0100, Jean Delvare wrote:
> > This adds hardware dependency to 3 drivers for the Technologic Systems
> > TS-4800 board. Thanks to these dependencies, users of other systems
> > will
On Monday 08 February 2016 18:14:08 Gregory CLEMENT wrote:
> This series introduce the support of the Armada 3700 family: it is the
> first ARM64 SoC of the mvebu family submitted to the mainline!
>
> Currently there are two members of the Armada 3700 family, the only
> difference is the number of
EOImode1 is only used for the root controller and hence only the root
controller uses the eoimode1 functions for handling interrupts. However,
if the root controller supports EOImode1, then the EOImodeNS bit will be
set for all GICs, enabling EOImode1. This is not what we want and this
causes inter
On 02/09/2016 04:17 PM, Steven Rostedt wrote:
> On Tue, 09 Feb 2016 15:59:48 +0100
> Denys Vlasenko wrote:
>
>>> First, console_seq needs logbuf_lock protection. On some archs, this may
>>> hit every time as the console_seq is most likely in cache and isn't
>>> updating.
>>
>> We end up he
On Tue, Feb 09, 2016 at 03:18:05PM +, Eric Engestrom wrote:
> Commit 1eb8345 added a bunch of legitimate `const`, but added two on that
> line.
Already fixed
70c0616d5a84 ("drm/fb_cma_helper: remove duplicate const from drm_fb_cma_alloc")
>
> Signed-off-by: Eric Engestrom
> ---
> drivers/
Setting the affinity of an IRQ, it only applicable for the root
interrupt controller and so only populate this operator for the root
controller.
Signed-off-by: Jon Hunter
---
drivers/irqchip/irq-gic.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/irqchip
On Tuesday 09 February 2016 07:08:59 Guenter Roeck wrote:
> IS_ERR_VALUE() assumes that its parameter is an unsigned long.
> It can not be used to check if an unsigned int reflects an error.
> Doing so can result in the following build warning.
>
> drivers/tty/serial/digicolor-usart.c: In function
On Monday 08 February 2016 16:48:07 Joao Pinto wrote:
> On 2/8/2016 4:46 PM, Arnd Bergmann wrote:
> > On Monday 08 February 2016 16:43:33 Joao Pinto wrote:
> >> Hi,
> >> Ok, so what should be the retries and waiting time in your opinion?
> >> The most typical is:
> >>
> >> retries: 10
> >> delay: 1
On Tue, 09 Feb 2016, Eric Engestrom wrote:
> Commit 1eb8345 added a bunch of legitimate `const`, but added two on
> that line.
Too late, fixed in
commit 70c0616d5a8458ae9148d74309cede07ba2f5164
Author: Colin Ian King
Date: Wed Jan 20 10:59:34 2016 +
drm/fb_cma_helper: remove duplicat
On Fri, 2016-02-05 at 16:06 -0500, Tejun Heo wrote:
> On Fri, Feb 05, 2016 at 09:59:49PM +0100, Mike Galbraith wrote:
> > On Fri, 2016-02-05 at 15:54 -0500, Tejun Heo wrote:
> >
> > > What are you suggesting?
> >
> > That 874bbfe6 should die.
>
> Yeah, it's gonna be killed. The commit is there
On Tuesday 09 February 2016 07:57 PM, Lee Jones wrote:
+
+#define MFD_CELL_NAME(_name) \
+ { \
+ MFD_CELL_ALL(_name, NULL, NULL, 0, NULL, NULL) \
+ }
+
str
On Monday 08 February 2016 17:21:27 Gabriele Paoloni wrote:
> Hi Arnd
>
> > -Original Message-
> > From: Arnd Bergmann [mailto:a...@arndb.de]
> > Sent: 08 February 2016 16:30
> > To: Gabriele Paoloni
> > Cc: linux-arm-ker...@lists.infradead.org; Guohanjun (Hanjun Guo);
> > Wangzhou (B); li
On Tue, Feb 9, 2016 at 8:24 PM, Jassi Brar wrote:
> On Tue, Feb 9, 2016 at 6:01 PM, Nishanth Menon wrote:
>> On 02/08/2016 10:14 PM, Jassi Brar wrote:
>>
+
>>> I think we should get rid of consumer specifics from the provider node...
>>
>>
>> If I get rid of the consumer nodes, how do you p
On Tue, Feb 09, 2016 at 08:32:24PM +0530, Laxman Dewangan wrote:
> I have taken care of all your previous comment on this patch.
> Can you please review?
I don't have this patch. Possibly I deleted it since it was obvious
that the series was going to get yet another resend anyway, I really
don'
On Tue, 2016-02-09 at 13:50 +0100, Christoph Hellwig wrote:
> Jens,
>
> do you want a 'default y' patch or just a better description? I'd be
> happy to send either one.
Since it only appears to be SUSE and they've now been told, better
description is fine.
James
Allwinner SoCs typically have a Mentor Graphics Inventra MUSB dual role
controller for USB OTG.
Now that the issue with MUSB and USB gadget registration order has been
resolved, we can enable this driver in dual role mode. This requires the
NOP USB transceiver driver, which is also enabled.
Signe
On Mon, Feb 08, 2016 at 11:50:21PM -0500, Jessica Yu wrote:
> Put all actions that are performed after module->state is set to
> MODULE_STATE_COMING in complete_formation() into a separate function
> prepare_coming_module(). This prepares for the removal of ftrace and
> livepatch module coming noti
Herbert Xu wrote:
> > > If you can back them out, I'll apply them to my keys-next branch. Unless
> > > James is willing to rebase security/next on top of your crypto branch?
> > >
> >
> > I don't want to rebase my tree.
>
> OK, I've just reverted the patches and pushed it out.
Thanks. Can I
On Sat, 30 Jan 2016, Laxman Dewangan wrote:
> The MAXIM PMIC MAX77620 and MAX20024 are power management IC
> which supports RTC, GPIO, DCDC/LDO regulators, interrupt,
> watchdog etc.
>
> Add DT binding document for the different functionality of
> this device.
>
> Signed-off-by: Laxman Dewangan
On Tue, Feb 9, 2016 at 8:54 AM, Jassi Brar wrote:
> On Tue, Feb 9, 2016 at 6:01 PM, Nishanth Menon wrote:
>> On 02/08/2016 10:14 PM, Jassi Brar wrote:
>>
>> Thanks for the review.
>>
>>> On Fri, Feb 5, 2016 at 10:04 PM, Nishanth Menon wrote:
+
+ msgmgr: msgmgr@02a0 {
+
On Tue, 2016-02-09 at 13:08 +0100, Ingo Molnar wrote:
> * Borislav Petkov wrote:
>
> > On Tue, Feb 09, 2016 at 12:27:32PM +0100, Ingo Molnar wrote:
> > > Btw., IIRC GAS is being silly about .L, i.e. there's a difference
> > > between these
> > > two variants:
> > >
> > > .Lerror_entry_from_use
On Mon, Feb 08, 2016 at 11:50:22PM -0500, Jessica Yu wrote:
> In load_module(), the going notifiers are called during error handling when
> an error occurs after the coming notifiers have already been called.
> However, a module's state is still MODULE_STATE_COMING when the going
> notifiers are ca
On Mon, Feb 08, 2016 at 11:50:24PM -0500, Jessica Yu wrote:
> Remove the livepatch module notifier in favor of directly enabling and
> disabling patches to modules in the module loader. Hard-coding the
> function calls ensures that ftrace_module_enable() is run before
> klp_module_coming() during m
> -Original Message-
> From: David Miller [mailto:da...@davemloft.net]
> Sent: Tuesday, February 9, 2016 5:05 AM
> To: Haiyang Zhang
> Cc: net...@vger.kernel.org; KY Srinivasan ;
> o...@aepfle.de; vkuzn...@redhat.com; linux-kernel@vger.kernel.org;
> driverdev-de...@linuxdriverproject.org
On Mon, Feb 08, 2016 at 11:50:23PM -0500, Jessica Yu wrote:
> Remove the ftrace module notifier in favor of directly calling
> ftrace_module_enable() and ftrace_release_mod() in the module loader.
> Hard-coding the function calls directly in the module loader removes
> dependence on the module noti
* Kishon Vijay Abraham I [160208 21:13]:
> Hi Tony,
>
> On Tuesday 09 February 2016 01:21 AM, Tony Lindgren wrote:
> > Hi Kishon,
> >
> > * Tony Lindgren [151130 21:40]:
> >> Hi,
> >>
> >> Here are two fixes for rmmod and PM. These can be merged separately after
> >> the review from the MUSB re
Hi!
On 08.02.2016 18:46, EXT Paul Burton wrote:
> Commit c014d164f21d ("MIPS: Add platform callback before initializing
> the L2 cache") added a platform_early_l2_init function in order to allow
> platforms to probe for the CM before L2 initialisation is performed, so
> that CM GCRs are available
Le 09/02/2016 11:23, Christophe Leroy a écrit :
The main purpose of this patchset is to dramatically reduce the time
spent in DTLB miss handler. This is achieved by:
1/ Mapping RAM with 8M pages
2/ Mapping IMMR with a fixed 512K page
Change in v7:
* Don't include x_block_mapped() from compila
On Tue, 09 Feb 2016 16:24:29 +0100
Denys Vlasenko wrote:
> > We released all locks, why can't it be true? What prevents another task
> > on another CPU from coming into this section and updating everything?
>
> If we see that happening, it means another CPU started serving printk
> backlog. I
Hi,
On 02/09/2016 08:59 AM, Arnd Bergmann wrote:
> On Monday 08 February 2016 11:59:14 Suravee Suthikulpanit wrote:
>> +
>> + ipmi_kcs: kcs@e001 {
>> + status = "disabled";
>> + compatible = "ipmi-kcs";
>> + device
On 05/02/16 09:30, Juri Lelli wrote:
> On 04/02/16 16:46, Vincent Guittot wrote:
>> On 4 February 2016 at 16:44, Vincent Guittot
>> wrote:
>>> On 4 February 2016 at 15:13, Juri Lelli wrote:
On 04/02/16 13:35, Vincent Guittot wrote:
> On 4 February 2016 at 13:16, Juri Lelli wrote:
>
4.5-rc3 is affected as well:
===
kernel: [drm] Initialized drm 1.1.0 20060810
kernel: [drm] Memory usable by graphics device = 2048M
kernel: [drm] Replacing VGA console driver
kernel: [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
kernel: [drm] Driver supports precise vblank timestam
On Wed 2016-02-03 20:11:05, Jessica Yu wrote:
> This patchset removes livepatch's need for architecture-specific relocation
> code by leveraging existing code in the module loader to perform
> arch-dependent work. Specifically, instead of duplicating code and
> re-implementing what the apply_reloca
* Daniel Lezcano [160102 14:01]:
> On 01/02/2016 03:26 PM, Pali Rohár wrote:
> >Hello,
> >
> >due to this Daniel Lezcano commit (ARM: OMAP3: cpuidle - remove rx51
> >cpuidle parameters table)
> >
> >https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=231900afba52d6faddfb480c
* Keerthy [160208 19:38]:
>
>
> On Tuesday 09 February 2016 01:27 AM, Tony Lindgren wrote:
> >* Keerthy [160208 01:19]:
> >>OMAP5 has 3 thermal zones cpu, core and multimedia.
> >>On the other hand DRA7 has 5 thermal zones cpu, gpu, core, dspeve
> >>and iva. Currently cpu, core and multimedia a
On Tue, 9 Feb 2016, Petr Mladek wrote:
> On Wed 2016-02-03 20:11:09, Jessica Yu wrote:
> > Reuse module loader code to write relocations, thereby eliminating the need
> > for architecture specific relocation code in livepatch. Specifically, reuse
> > the apply_relocate_add() function in the module
On 8.2.2016 17:43, Suganath prabu Subramani wrote:
> Module parameter to enable/disable configuring
> affinity hint for msix vector.
> SMP affinity feature can be enabled/disabled by setting
> module parameter "smp_affinity_enable" to 1/0.
> By default this feature is enabled. (smp_affinity_enable
* Kishon Vijay Abraham I [160208 21:14]:
> Hi Tony,
>
> On Tuesday 09 February 2016 02:14 AM, Tony Lindgren wrote:
> > Hi Kishon,
> >
> > * Kishon Vijay Abraham I [160208 03:13]:
> >> Add a new hwmod flag to indicate custom reset handling and use it
> >> for devices that require custom reset ha
On Tue 09-02-16 10:43:53, Jan Kara wrote:
> On Mon 08-02-16 12:55:24, Dan Williams wrote:
> > On Mon, Feb 8, 2016 at 12:18 PM, Dave Chinner wrote:
> > [..]
> > >> Setting aside the current block zeroing problem you seem to assuming
> > >> that DAX will always be faster and that may not be true at
On Tuesday 09 February 2016 09:47:55 Brijesh Singh wrote:
> >
> > I see we don't have a binding file for this, can you add one please?
> >
> There is binding file ipmi.txt [1]. Am I missing something ?
>
> [1]
> http://lxr.free-electrons.com/source/Documentation/devicetree/bindings/ipmi.txt
So
On Tue, Feb 09, 2016 at 04:08:03PM +0100, Arnd Bergmann wrote:
> On Tuesday 09 February 2016 14:35:54 Mark Rutland wrote:
> > diff --git a/include/asm-generic/fixmap.h b/include/asm-generic/fixmap.h
> > index f9c27b6..e5255ff 100644
> > --- a/include/asm-generic/fixmap.h
> > +++ b/include/asm-gener
> -Original Message-
> From: Arnd Bergmann [mailto:a...@arndb.de]
> Sent: 09 February 2016 15:32
> To: linux-arm-ker...@lists.infradead.org
> Cc: Gabriele Paoloni; lorenzo.pieral...@arm.com; j...@redhat.com;
> t...@semihalf.com; linux-...@vger.kernel.org; Linuxarm; xuwei (O); linux-
> ker..
I have to found out that freezing can occur under kernel 3.2 too, but far less
common.
So the interesting question is why in newer kernels this will occur very often?
I could found a solution for the problem in the linked Blog.
When you disable Cool' n' Quiet the system is running stable with new
On Tue, Feb 09, 2016 at 10:07:58AM -0500, Steven Rostedt wrote:
> On Tue, 9 Feb 2016 14:54:26 +
> Will Deacon wrote:
>
>
> > Acked-by: Will Deacon
>
> Will,
Hi Steve,
> The patch looks good to me. Do you want to take it through your tree?
>
> It benefits mainline too as a rcu_read_lock(
Now the noltlbs kernel parameter is also applicable to PPC8xx
Signed-off-by: Christophe Leroy
---
v2: no change
v3: no change
v4: no change
v5: no change
v6: no change
v8: no change
Documentation/kernel-parameters.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documenta
The fixmap related functions try to map kernel pages that are
already mapped through Large TLBs. pte_offset_kernel() has to
return NULL for LTLBs, otherwise the caller will try to access
level 2 table which doesn't exist
Signed-off-by: Christophe Leroy
---
v3: new
v4: no change
v5: no change
v6:
On 02/09/2016 04:50 PM, Steven Rostedt wrote:
> One thing is to find the spamming code and fix that.
We can't rely that there won't be never-ending concurrent printks,
right? For one, in many setups user can cause printk flood.
I think we must ensure that printk does not livelock.
On Tue, Feb 09, 2016 at 03:56:55PM +, Stuart Yoder wrote:
>
> > -Original Message-
> > From: Marc Zyngier [mailto:marc.zyng...@arm.com]
> > Sent: Tuesday, February 09, 2016 6:06 AM
> > To: Robin Murphy ; robh...@kernel.org;
> > frowand.l...@gmail.com;
> > grant.lik...@linaro.org; devi
Add missing SPRN defines into reg_8xx.h
Some of them are defined in mmu-8xx.h, so we include mmu-8xx.h in
reg_8xx.h, for that we remove references to PAGE_SHIFT in mmu-8xx.h
to have it self sufficient, as includers of reg_8xx.h don't all
include asm/page.h
Signed-off-by: Christophe Leroy
---
v2:
Inlining of _dcache_range() functions has shown that the compiler
does the same thing a bit better with one insn less
Signed-off-by: Christophe Leroy
---
v2: new
v3: no change
v4: no change
v5: no change
v6: no change
v8: no change
arch/powerpc/kernel/misc_32.S | 5 ++---
1 file changed, 2 inse
Commit-ID: d12a72b844a49d4162f24cefdab30bed3f86730e
Gitweb: http://git.kernel.org/tip/d12a72b844a49d4162f24cefdab30bed3f86730e
Author: Andy Lutomirski
AuthorDate: Fri, 29 Jan 2016 11:42:58 -0800
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 13:36:10 +0100
x86/mm: Add a 'noinvpcid'
On Tuesday 09 February 2016 16:01:18 Mark Rutland wrote:
> That builds fine for me atop of for-next/pgtable, both 64-bit and
> 32-bit.
>
> GCC seems to treat enum fixed_addresses the same as unsigned. Only if I
> change the type of idx in fixmap.h (e.g. to char) do I get a conflict
> against parav
Commit-ID: 060a402a1ddb551455ee410de2eadd3349f2801b
Gitweb: http://git.kernel.org/tip/060a402a1ddb551455ee410de2eadd3349f2801b
Author: Andy Lutomirski
AuthorDate: Fri, 29 Jan 2016 11:42:57 -0800
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 13:36:10 +0100
x86/mm: Add INVPCID helpe
>-Original Message-
>From: David Laight [mailto:david.lai...@aculab.com]
>Sent: Tuesday, February 09, 2016 9:13 AM
>To: Strashko, Grygorii; net...@vger.kernel.org; David S . Miller; Arnd Bergmann
>Cc: Cooper Jr., Franklin; Nori, Sekhar; linux-kernel@vger.kernel.org; Kwok,
>WingMan;
>Karich
Commit-ID: 4142c3ebb685bb338b7d96090d8f90ff49065ff6
Gitweb: http://git.kernel.org/tip/4142c3ebb685bb338b7d96090d8f90ff49065ff6
Author: Rik van Riel
AuthorDate: Mon, 25 Jan 2016 17:07:39 -0500
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 14:47:18 +0100
sched/numa: Spread memory ac
Commit-ID: ce1143aa60273220a9f89012f2aaaed04f97e9a2
Gitweb: http://git.kernel.org/tip/ce1143aa60273220a9f89012f2aaaed04f97e9a2
Author: Andy Lutomirski
AuthorDate: Mon, 25 Jan 2016 23:06:49 -0800
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 14:36:43 +0100
x86/dmi: Switch dmi_remap
Commit-ID: fed0764fafd8e2e629a033c0f7df4106b0dcb7f0
Gitweb: http://git.kernel.org/tip/fed0764fafd8e2e629a033c0f7df4106b0dcb7f0
Author: Konrad Rzeszutek Wilk
AuthorDate: Mon, 25 Jan 2016 16:33:20 -0500
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 14:50:16 +0100
locking/atomics: Up
Commit-ID: a91bbe017552b80e12d712c85549b933a62c6ed4
Gitweb: http://git.kernel.org/tip/a91bbe017552b80e12d712c85549b933a62c6ed4
Author: Alexander Kuleshov
AuthorDate: Tue, 9 Feb 2016 19:44:54 +0600
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 14:55:48 +0100
x86/boot: Use proper ar
Commit-ID: dd7b6847670a84b7bb7c38f8e69b2f12059bca66
Gitweb: http://git.kernel.org/tip/dd7b6847670a84b7bb7c38f8e69b2f12059bca66
Author: Matthew Wilcox
AuthorDate: Mon, 25 Jan 2016 12:25:15 -0500
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 15:25:36 +0100
x86/mm: Honour passed pgpr
On Tue, Feb 09, 2016 at 04:11:56PM +0530, Bharat Kumar Gogada wrote:
> Modifying Xilinx AXI PCIe Host Bridge Soft IP driver to work on both
> Zynq and Microblaze Architectures.
> With these modifications drivers/pci/host/pcie-xilinx.c, will
> work on both Zynq and Microblaze Architectures.
>
> Sig
With next generation power processor, we are having a new mmu model
[1] that require us to maintain a different linux page table format.
Inorder to support both current and future ppc64 systems with a single
kernel we need to make sure kernel can select between different page
table format at runti
Commit-ID: 5ed73f40735c68d8a656b46d09b1885d3b8740ae
Gitweb: http://git.kernel.org/tip/5ed73f40735c68d8a656b46d09b1885d3b8740ae
Author: Andy Lutomirski
AuthorDate: Sun, 24 Jan 2016 14:38:07 -0800
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 15:42:55 +0100
x86/fpu: Fix FNSAVE usage
Commit-ID: 4ecd16ec7059390b430af34bd8bc3ca2b5dcef9a
Gitweb: http://git.kernel.org/tip/4ecd16ec7059390b430af34bd8bc3ca2b5dcef9a
Author: Andy Lutomirski
AuthorDate: Sun, 24 Jan 2016 14:38:06 -0800
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 15:42:55 +0100
x86/fpu: Fix math emulati
Commit-ID: a20d7297045f7fdcd676c15243192eb0e95a4306
Gitweb: http://git.kernel.org/tip/a20d7297045f7fdcd676c15243192eb0e95a4306
Author: Andy Lutomirski
AuthorDate: Sun, 24 Jan 2016 14:38:08 -0800
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 15:42:55 +0100
x86/fpu: Fold fpu_copy()
Commit-ID: 58122bf1d856a4ea9581d62a07c557d997d46a19
Gitweb: http://git.kernel.org/tip/58122bf1d856a4ea9581d62a07c557d997d46a19
Author: Andy Lutomirski
AuthorDate: Sun, 24 Jan 2016 14:38:10 -0800
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 15:42:56 +0100
x86/fpu: Default eagerfpu
Commit-ID: c6ab109f7e0eae3bae3bb10f8ddb0df67735c150
Gitweb: http://git.kernel.org/tip/c6ab109f7e0eae3bae3bb10f8ddb0df67735c150
Author: Andy Lutomirski
AuthorDate: Sun, 24 Jan 2016 14:38:09 -0800
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 15:42:56 +0100
x86/fpu: Speed up lazy FP
From: Karicheri, Muralidharan
> Sent: 09 February 2016 16:10
...
> >In reality the 'pad' fields ought to be renamed - since they aren't pads.
> >Perhaps they should be a union?
> No. At the end of the descriptor, host software can add scratchpad which is
> not modified by the hardware, but is used
Commit-ID: d8bced79af1db6734f66b42064cc773cada2ce99
Gitweb: http://git.kernel.org/tip/d8bced79af1db6734f66b42064cc773cada2ce99
Author: Andy Lutomirski
AuthorDate: Fri, 29 Jan 2016 11:42:59 -0800
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 13:36:11 +0100
x86/mm: If INVPCID is ava
Hi Mark,
[auto build test ERROR on next-20160209]
[also build test ERROR on v4.5-rc3]
[cannot apply to v4.5-rc3 v4.5-rc2 v4.5-rc1]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/Mark-Rutland
Hi,
On 02/09/2016 10:00 AM, Arnd Bergmann wrote:
>
> The important part for interrupt/reg/... names is that you must use exactly
> the
> names that are listed in the binding. If there is no name in there, it's
> better
> not to add the name property.
>
> The other point is that "ipmi_kcs" is a
Remove one instruction in mulhdu
Signed-off-by: Christophe Leroy
---
v2: new
v3: no change
v4: no change
v5: no change
v6: no change
v8: no change
arch/powerpc/kernel/misc_32.S | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/p
Commit-ID: 063fb3e56f6dd29b2633b678b837e1d904200e6f
Gitweb: http://git.kernel.org/tip/063fb3e56f6dd29b2633b678b837e1d904200e6f
Author: Andrey Ryabinin
AuthorDate: Mon, 11 Jan 2016 15:51:19 +0300
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 13:33:14 +0100
x86/kasan: Write protect
The patch
regmap: irq: dispose all virtual irq before removing domain
has been applied to the regmap tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hou
clear_pages() is never used expect by clear_page, and PPC32 is the
only architecture (still) having this function. Neither PPC64 nor
any other architecture has it.
This patch removes clear_pages() and moves clear_page() function
inline (same as PPC64) as it only is a few isns
Signed-off-by: Chris
flush/clean/invalidate _dcache_range() functions are all very
similar and are quite short. They are mainly used in __dma_sync()
perf_event locate them in the top 3 consumming functions during
heavy ethernet activity
They are good candidate for inlining, as __dma_sync() does
almost nothing but call
This simplification helps the compiler. We now have only one test
instead of two, so it reduces the number of branches.
Signed-off-by: Christophe Leroy
---
v2: new
v3: no change
v4: no change
v5: no change
v6: no change
v8: no change
arch/powerpc/mm/dma-noncoherent.c | 2 +-
1 file changed, 1 i
Commit 771168494719 ("[POWERPC] Remove unused machine call outs")
removed the call to setup_io_mappings(), so remove the associated
progress line message
Signed-off-by: Christophe Leroy
---
v2: no change
v3: no change
v4: no change
v5: no change
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v8: no change
arch/powerpc/mm/init_
On 09/02/16 16:08, Mark Rutland wrote:
[...]
having msi-map-mask clash with a nonzero rid-base, as that's another
thing one can easily get wrong.
[...]
+ if (rid_base & ~map_mask) {
+ dev_err(parent_dev,
+ "Invalid msi-map tra
This patch adds inline functions to use dcbz, dcbi, dcbf, dcbst
from C functions
Signed-off-by: Christophe Leroy
---
v2: new
v3: no change
v4: no change
v5: no change
v6: no change
v8: no change
arch/powerpc/include/asm/cache.h | 19 +++
1 file changed, 19 insertions(+)
diff --
* Pali Rohár [160208 13:11]:
>
> Tony, if you are going to take this patch, I would suggest to rename
> function name rx51_system_rev to rx51_set_system_rev as it says what
> function do (set system rev :-)).
Ivaylo can change it when reposting as the patch description is
missing.
Regards,
Tony
CPU6 ERRATA is now handled directly in mtspr(), so we can use the
standard set_dec() fonction in all cases.
Signed-off-by: Christophe Leroy
---
v2: no change
v3: no change
v4: no change
v5: no change
v6: no change
v8: no change
arch/powerpc/include/asm/time.h | 6 +-
arch/powerpc/kernel/he
On Tue, 9 Feb 2016 16:04:42 +
Will Deacon wrote:
> > The patch looks good to me. Do you want to take it through your tree?
> >
> > It benefits mainline too as a rcu_read_lock() is more efficient than
> > rwlocks. Although I will say this is a slow path anyway.
>
> I was thinking that Cat
There is no real need to have set_context() in assembly.
Now that we have mtspr() handling CPU6 ERRATA directly, we
can rewrite set_context() in C language for easier maintenance.
Signed-off-by: Christophe Leroy
---
v2: no change
v3: no change
v4: no change
v5: no change
v6: no change
v8: no chan
On PPC8xx, flushing instruction cache is performed by writing
in register SPRN_IC_CST. This registers suffers CPU6 ERRATA.
The patch rewrites the fonction in C so that CPU6 ERRATA will
be handled transparently
Signed-off-by: Christophe Leroy
---
v2: no change
v3: no change
v4: no change
v5: no ch
On recent kernels, with some debug options like for instance
CONFIG_LOCKDEP, the BSS requires more than 8M memory, allthough
the kernel code fits in the first 8M.
Today, it is necessary to activate CONFIG_PIN_TLB to get more than 8M
at startup, allthough pinning TLB is not necessary for that.
This
Murali Karicheri
Linux Kernel, Software Development
>-Original Message-
>From: David Laight [mailto:david.lai...@aculab.com]
>Sent: Tuesday, February 09, 2016 11:10 AM
>To: Karicheri, Muralidharan; Strashko, Grygorii; net...@vger.kernel.org; David
>S . Miller;
>Arnd Bergmann
>Cc: Coope
ioremap_base is not initialised and is nowhere used so remove it
Signed-off-by: Christophe Leroy
---
v2: no change
v3: fix comment as well
v4: no change
v5: no change
v6: no change
v8: no change
arch/powerpc/include/asm/nohash/32/pgtable.h | 2 +-
arch/powerpc/mm/mmu_decl.h |
MPC8xx has an ERRATA on the use of mtspr() for some registers
This patch includes the ERRATA handling directly into mtspr() macro
so that mtspr() users don't need to bother about that errata
Signed-off-by: Christophe Leroy
---
v2: no change
v3: no change
v4: no change
v5: no change
v6: no change
Commit-ID: 69e0210fd01ff157d332102219aaf5c26ca8069b
Gitweb: http://git.kernel.org/tip/69e0210fd01ff157d332102219aaf5c26ca8069b
Author: Andrey Ryabinin
AuthorDate: Mon, 11 Jan 2016 15:51:18 +0300
Committer: Ingo Molnar
CommitDate: Tue, 9 Feb 2016 13:33:14 +0100
x86/kasan: Clear kasan_ze
IMMR is now mapped by page tables so it is not
anymore necessary to PIN TLBs
Signed-off-by: Christophe Leroy
---
v2: no change
v3: no change
v4: no change
v5: no change
v6: no change
v8: no change
arch/powerpc/Kconfig.debug | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/powerpc/Kconfig
The main purpose of this patchset is to dramatically reduce the time
spent in DTLB miss handler. This is achieved by:
1/ Mapping RAM with 8M pages
2/ Mapping IMMR with a fixed 512K page
On a live running system (VoIP gateway for Air Trafic Control), over
a 10 minutes period (with 277s idle), we ge
Once the linear memory space has been mapped with 8Mb pages, as
seen in the related commit, we get 11 millions DTLB missed during
the reference 600s period. 77% of the misses are on user addresses
and 23% are on kernel addresses (1 fourth for linear address space
and 3 fourth for virtual address sp
x_mapped_by_bats() and x_mapped_by_tlbcam() serve the same kind of
purpose, and are never defined at the same time.
So rename them x_block_mapped() and define them in the relevant
places
Signed-off-by: Christophe Leroy
---
v2: no change
v3: Functions are mutually exclusive so renamed iaw Scott co
Now we have a 8xx specific .c file for that so put it in there
as other powerpc variants do
Signed-off-by: Christophe Leroy
---
v2: no change
v3: no change
v4: no change
v5: no change
v6: no change
v8: no change
arch/powerpc/mm/8xx_mmu.c | 17 +
arch/powerpc/mm/init_32.c | 19 --
Memory: 124428K/131072K available (3748K kernel code, 188K rwdata,
648K rodata, 508K init, 290K bss, 6644K reserved)
Kernel virtual memory layout:
* 0xfffdf000..0xf000 : fixmap
* 0xfde0..0xfe00 : consistent mem
* 0xfddf6000..0xfde0 : early ioremap
* 0xc900..0xfddf6000
This looks good but we should probably do the same for all return paths
when reference for port has been acquired.
Please see attached patch.
Thanks,
Harry
On 2016-02-01 11:08 AM, Insu Yun wrote:
In drm_dp_mst_allocate_vcpi, it returns true in two paths,
but in one path, there is no reference
On a live running system (VoIP gateway for Air Trafic Control), over
a 10 minutes period (with 277s idle), we get 87 millions DTLB misses
and approximatly 35 secondes are spent in DTLB handler.
This represents 5.8% of the overall time and even 10.8% of the
non-idle time.
Among those 87 millions DTL
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