On Sun, Nov 29, 2015 at 02:17:37PM +0100, Alban Bedel wrote:
> When of_pwm_get() is called without connection ID it returns
> -ENOENT when the 'pwms' property doesn't exists or is an empty entry.
> However when a connection ID is given and the 'pwm-names' property
> doesn't exists or doesn't contai
Hi Milo,
On Mon, 4 Jan 2016 13:28:25 +0900
Milo Kim wrote:
> Atmel AIC has common structure for SMR (Source Mode Register).
>
> bit[6:5] Interrupt source type
> bit[2:0] Priority level
> Other bits are unused.
>
> To update new priority value, bit[2:0] should be cleared first and then
>
The driver calls ehci_mem_init to allocate memory resources.
But these resources are not freed when ehci_halt fails.
This patch adds "ehci_mem_cleanup" in error handling code to fix this problem.
Signed-off-by: Jia-Ju Bai
---
drivers/usb/host/ehci-hcd.c |4 +++-
1 file changed, 3 insertion
The driver calls pci_set_mwi to enable memory-write-invalidate when it
is initialized, but does not call pci_clear_mwi when it is removed. Many
other drivers calls pci_clear_mwi when pci_set_mwi is called, such as
r8169, 8139cp and e1000.
This patch adds a function "ehci_pci_remove" to remove t
Hi Milo,
On Mon, 4 Jan 2016 13:28:26 +0900
Milo Kim wrote:
> Atmel AIC disables RTC interrupt on initialization. However, the controller
> doesn't need to do it. There are two reasons.
>
> * RTC driver disables interrupts on _probe()
> RTC_IDR is set to 0x1f which means all RTC interrupts are
On Mon, 4 Jan 2016 13:28:27 +0900
Milo Kim wrote:
> Atmel AIC disables RTT(Real Time Timer) interrupt on initialization.
> Alarm interrupt(ALMIEN) and RTT increment interrupt(RTTINCIEN) are used.
> However, the controller doesn't need to do it.
>
> * RTT driver disables interrupts on _probe().
>
On Fri, Jan 01, 2016 at 02:07:41PM +0100, Arnd Bergmann wrote:
> The newly added code for Fiji creates a correct compiler warning
> about invalid use of the do_div macro:
>
> In file included from powerplay/hwmgr/ppatomctrl.c:31:0:
> drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/ppevvmath.h: In fu
On Mon, Dec 28, 2015 at 10:47:12PM +0800, Geliang Tang wrote:
> Use dev_to_hdac_dev() instead of open-coding it.
>
> Signed-off-by: Geliang Tang
Reviewed-by: Vinod Koul
Thanks
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On Mon, Dec 28, 2015 at 10:47:13PM +0800, Geliang Tang wrote:
> Use dev_to_hdac_dev() and to_ehdac_device() instead of open-coding.
>
Reviewed-by: Vinod Koul
Thanks
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On Mon, Dec 28, 2015 at 10:47:11PM +0800, Geliang Tang wrote:
> dev_to_hdac is not used anymore so drop it.
No harm in keeping this for now as the systems using these will be coming
up and more users will be upstreamed...
>
> Signed-off-by: Geliang Tang
> ---
> sound/hda/ext/hdac_ext_bus.c | 2
On Fri, Jan 01, 2016 at 11:04:07PM +0100, Arnd Bergmann wrote:
> CONFIG_DRM_HDLCD is a tristate option that depends on the boolean
> CONFIG_DRM_ARM, which in turn depends on the tristate CONFIG_DRM.
> The effect of this is that a configuration with CONFIG_DRM=m
> and CONFIG_DRM_HDLCD=y can be chose
On Fri, Jan 01, 2016 at 03:39:17PM +0100, Arnd Bergmann wrote:
> The hdlcd_pm_suspend and hdlcd_pm_resume are intentionally unused
> when CONFIG_PM is not set in this driver, and we get a compiler warning
> for this:
>
> drivers/gpu/drm/arm/hdlcd_drv.c:521:12: warning: 'hdlcd_pm_suspend' defined
On Fri, Jan 01, 2016 at 03:38:53PM +0100, Arnd Bergmann wrote:
> The hdlcd driver has no build-time dependency on the SCPI clock
> and the bogus 'select' causes a warning when SCPI is disabled:
>
> warning: (DRM_HDLCD) selects COMMON_CLK_SCPI which has unmet direct
> dependencies (COMMON_CLK && (
On Fri, Jan 01, 2016 at 03:09:10PM +0100, Arnd Bergmann wrote:
> The newly added DRM_HDLCD driver tries to select DMA_CMA, but that is
> not necessarily possible, as not all configurations contain
> HAVE_DMA_CONTIGUOUS:
>
> warning: (DRM_HDLCD) selects DMA_CMA which has unmet direct dependencies
On Mon, 4 Jan 2016 13:28:28 +0900
Milo Kim wrote:
> One AIC IRQ chip can have 32 interrupt source.
> To enhance code readability, magic number is replaced with named constant,
> 'AIC_IRQS_PER_CHIP'.
>
> aic_hw_init() initializes vector registers up to total number of
> AIC interrupts. This magic
On Mon, 4 Jan 2016 13:28:29 +0900
Milo Kim wrote:
> Number of interrupts per each chip is determined when IRQ controller
> allocates IRQ chip by calling irq_alloc_domain_generic_chips().
> This number is fixed by atmel-aic-common part. The value is 32.
> So each AIC driver can use this value dire
Hi Allen,
On Mon, Dec 21, 2015 at 10:45 AM, Allen Hung wrote:
> On 12/18/2015 05:52 AM, Benjamin Tissoires wrote:
>> On Thu, Nov 26, 2015 at 3:21 PM, Jiri Kosina wrote:
>>> On Fri, 20 Nov 2015, Allen Hung wrote:
>>>
The usage Confidence is mandary to Windows Precision Touchpad devices. The
Hi Thomas,
On Tuesday 15 December 2015 08:58 PM, Tony Lindgren wrote:
> * Sekhar Nori [151215 06:26]:
>> Under some conditions, irq sorting procedure used
>> by INTC can go wrong resulting in a spurious irq
>> getting reported.
>>
>> If this condition is not handled, it results in
>> endless stre
Hi Kishon,
On 2016/1/4 15:45, Kishon Vijay Abraham I wrote:
Hi,
On Tuesday 29 December 2015 07:22 AM, Shawn Lin wrote:
This patch to add a generic PHY driver for ROCKCHIP eMMC PHY.
[...]
+
+struct rockchip_emmc_phy {
+ unsigned intreg_offset;
+ struct regmap *reg_base;
+
Am 27.12.2015 um 18:33 schrieb SF Markus Elfring:
> From: Markus Elfring
> Date: Sun, 27 Dec 2015 18:23:57 +0100
>
> This issue was detected by using the Coccinelle software.
>
> 1. Let us return directly if a call of the si2165_readreg8()
>function failed.
>
> 2. Reduce the scope for the l
Hi all,
Changes since 20151231:
Dropped tree: rdma (complex conflicts)
New trees: drm-vc4, bcm2835-dt, bcm2835-soc, bcm2835-drivers, bcm2835-defconfig
The ext4 tree gained a build failure so I used the version from
next-20151231.
The i2c tree still had its build failure for which I applied a p
Hi Lee,
On Thu, Dec 17, 2015 at 12:32 AM, Chen-Yu Tsai wrote:
> Hi everyone,
>
> This is v6 of the AXP223 PMIC series. v6 fixes the address of the AXP223
> in the DT. Hope this series makes it into 4.5, and we can then support
> even more AXP PMICs in 4.6+.
>
> Lee, can you take the first 7 patch
On Monday 04 January 2016 09:24:16 Thierry Reding wrote:
>
> Ugh... wouldn't it be much simpler to get rid of DRM_ARM? It seems like
> a completely superfluous option to me. I don't think we've ever had the
> equivalent of "vendor" Kconfig options in DRM, and I don't see why we'd
> need to start n
On Mon, 4 Jan 2016 13:28:32 +0900
Milo Kim wrote:
> AIC has one register access to enable/disable an interrupt.
> AIC5 requires two register accesses - SSR and IECR/IDCR.
> This patch unifies interrupt mask and unmask operations.
>
> Mask and unmask operations are moved into aic_common_of_init()
On Mon, Jan 4, 2016 at 8:50 AM, Aniroop Mathur wrote:
> On Jan 4, 2016 5:08 AM, "Peter Hutterer" wrote:
>>
>> On Sat, Jan 02, 2016 at 08:39:21PM -0800, Dmitry Torokhov wrote:
>> > On Thu, Dec 31, 2015 at 03:36:47AM +0530, Aniroop Mathur wrote:
>> > > This patch introduces concept to drop partial
On Mon, 4 Jan 2016 13:28:30 +0900
Milo Kim wrote:
> Structure, 'aic_reg_offset' describes for device specific register offset.
> Each offset is used for IRQ chip operation. AIC and AIC5 have different
> register values, but the structure can be shared.
>
> Please note that this is not complete p
On Fri, Jan 1, 2016 at 2:48 AM, Rafael J. Wysocki wrote:
> On Wednesday, December 30, 2015 09:55:35 PM Andy Shevchenko wrote:
>> On Wed, Dec 30, 2015 at 9:17 PM, Sinan Kaya wrote:
>> > On 12/30/2015 8:28 AM, Andy Shevchenko wrote:
>> >> Yep, I meant not to use an additional variable.
>> >>
>> >>>
On some platforms, the macb integration does not use the USRIO
register to configure the (R)MII port and clocks.
When the register is not implemented and the MACB error signal
is connected to the bus error, reading or writing to the USRIO
register can trigger some Imprecise External Aborts on ARM p
Hi Milo,
On Mon, 4 Jan 2016 13:28:24 +0900
Milo Kim wrote:
> This patch-set provides unified Atmel AIC (Advanced Interrupt Controller)
> driver. Currently, there are two AIC drivers, AIC and AIC5.
> Each driver consists of chip specific part (irq-atmel-aic.o or
> irq-atmel-aic5.o) and shared cod
On Wed 23-12-15 18:10:01, Robert Elliott wrote:
> Print the problematic value in messages about the filesystem
> block size.
>
> Normalize all of the blocksize messages that use "blocksize" to
> use "filesystem block size". This helps distinguish this block size
> from the underlying block device'
compile tested with: x86_64_defconfig +
CONFIG_STAGING=y, CONFIG_R8712U=m
Patch is against linux-next (localversion-next is -next-20160104)
drivers/staging/rtl8712/rtl871x_recv.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/staging/rtl8712/rtl871x_recv.c
b/drivers
On Wed, Dec 30, 2015 at 11:30 PM, Cong Wang wrote:
> On Wed, Dec 30, 2015 at 6:30 AM, Jacob Siverskog
> wrote:
>> On Wed, Dec 30, 2015 at 2:26 PM, Eric Dumazet wrote:
>>> How often can you trigger this bug ?
>>
>> Ok. I don't have a good repro to trigger it unfortunately, I've seen it just
>> a
Hi Zhang Qing,
On 12/31/2015 10:14 PM, zhangqing wrote:
make rtc-rk8xx.c compatible for all pmic chips.
for pmic chips(rk808\rk807\rk816\rk818) in the future.
The commit message will be better like this:
Rename the file to rtc-rk8xx.c to compatible other Rockchip PMIC chips
like rk807/rk816/rk8
In POWER8, OCC(On-Chip-Controller) can throttle the frequency of the
CPU when the chip crosses its thermal and power limits. Currently,
powernv-cpufreq driver detects and reports this event as a console
message. Some boxes may not sustain the max turbo frequency in all
conditions and can be throttl
Le 04/01/2016 10:01, Neil Armstrong a écrit :
> On some platforms, the macb integration does not use the USRIO
> register to configure the (R)MII port and clocks.
> When the register is not implemented and the MACB error signal
> is connected to the bus error, reading or writing to the USRIO
> regi
Replace the throttling event console messages to perf trace point
"power:powernv_throttle" and throttle counter stats which are
exported in sysfs in /sys/devices/system/cpu/cpufreq/chipN. The
newly added sysfs files are as follows:
1)/sys/devices/system/cpu/cpufreq/chip0/throttle_frequencies
Thi
This patch adds the powernv_throttle tracepoint to trace the CPU
frequency throttling event, which is used by the powernv-cpufreq
driver in POWER8.
Signed-off-by: Shilpasri G Bhat
CC: Ingo Molnar
CC: Steven Rostedt
---
No changes from v2.
Changes from v1:
- Export the tracepoint
include/trac
Hi, Toshi,
On 12/25/15 at 03:09pm, Toshi Kani wrote:
> Change to call walk_iomem_res_desc() for searching resource entries
> with the following names:
> "ACPI Tables"
> "ACPI Non-volatile Storage"
> "Persistent Memory (legacy)"
> "Crash kernel"
>
> Note, the caller of walk_iomem_res() with "G
These patches are labour intensive to review because you can't just do
it in the email client. Also you were not able to review it properly
yourself and introduced a bug.
I am often remove initializers but it's normally because I am changing
something else which makes it worthwhile. This patch i
Hi, Boris
On 12/27/15 at 11:24am, Borislav Petkov wrote:
> On Sun, Dec 27, 2015 at 10:12:57AM +0800, Minfei Huang wrote:
> > You can refer the below link that you may get a clue about GART. This is
> > the fisrt time kexec-tools tried to support to ignore GART region in 2nd
> > kernel.
> >
> > ht
On Fri, Jan 01, 2016 at 09:30:10PM +0100, SF Markus Elfring wrote:
> From: Markus Elfring
> Date: Fri, 1 Jan 2016 20:54:25 +0100
>
> Return directly if a memory allocation failed at the beginning.
>
> Signed-off-by: Markus Elfring
Acked-by: Stanislaw Gruszka
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Le 04/01/2016 10:02, Boris Brezillon a écrit :
> Hi Milo,
>
> On Mon, 4 Jan 2016 13:28:24 +0900
> Milo Kim wrote:
>
>> This patch-set provides unified Atmel AIC (Advanced Interrupt Controller)
>> driver. Currently, there are two AIC drivers, AIC and AIC5.
>> Each driver consists of chip specific
Btw, GCC misses a lot of uninitialized variable bugs. I have a Smatch
check which sometimes catches the bugs that GCC misses but you should
not rely on the tools here. These patches need to be reviewed manually.
And the "goto err" before the initialization makes everything more
complicated (that
On Wed, Dec 30, 2015 at 12:20:49PM +0100, Julia Lawall wrote:
> The il_sensitivity_ranges is never modified, so declare it as const.
>
> Done with the help of Coccinelle.
>
> Signed-off-by: Julia Lawall
Acked-by: Stanislaw Gruszka
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The original code is fine.
regards,
dan carpenter
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Please read the FAQ at http://www.tux.org/lkml/
On Fri, Jan 01, 2016 at 01:39:22PM +0100, Ard Biesheuvel wrote:
> The normalization pass in the sorting routine of the relative exception
> table serves two purposes:
> - it ensures that the address fields of the exception table entries are
> fully ordered, so that no ambiguities arise between en
The first patch introduces a new capability bit to disable usage of the
USRIO register on platform not implementing it thus avoiding some external
imprecise aborts on ARM based platforms.
The two last patchs adds a new macb variant compatible name using the
capability, the NPx name is temporary and
Declare a new SoC variant for NPx SoCs having USRIO_DISABLED as
capability bit.
Signed-off-by: Neil Armstrong
---
drivers/net/ethernet/cadence/macb.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/net/ethernet/cadence/macb.c
b/drivers/net/ethernet/cadence/macb.c
index fa53bc3
Add NPx macb variant for NPx SoCs.
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/net/macb.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/net/macb.txt
b/Documentation/devicetree/bindings/net/macb.txt
index 38c8e84..638cdde 100644
-
On some platforms, the macb integration does not use the USRIO
register to configure the (R)MII port and clocks.
When the register is not implemented and the MACB error signal
is connected to the bus error, reading or writing to the USRIO
register can trigger some Imprecise External Aborts on ARM p
On 4 January 2016 at 10:42, Heiko Carstens wrote:
> On Fri, Jan 01, 2016 at 01:39:22PM +0100, Ard Biesheuvel wrote:
>> The normalization pass in the sorting routine of the relative exception
>> table serves two purposes:
>> - it ensures that the address fields of the exception table entries are
>>
Hi,
On 31/12/2015 at 06:14:55 -0800, zhangqing wrote :
> make rtc-rk8xx.c compatible for all pmic chips.
> for pmic chips(rk808\rk807\rk816\rk818) in the future.
>
I'm not sure it is useful to do that renaming. It is usual to have one
driver that supports multiple chips named with the forst chip
perf probe through debuginfo__find_probes() in util/probe-finder.c
checks for the functions' frame descriptions in either .eh_frame section
of an ELF or the .debug_frame. The check is based on whether either one
of these sections is present. Depending on distro, toolchain defaults,
architetcutre, b
We allocate gcb to queue full block to the gc list,
but gcb allocation may fail, if that happens, the
block will not get reclaimed. So add the full block
direct to the gc list, omit the queuing step.
Signed-off-by: Wenwei Tao
---
drivers/lightnvm/rrpc.c | 47 ++---
On Dec 10 2015 or thereabouts, Dmitry Torokhov wrote:
> On Thu, Dec 10, 2015 at 9:08 AM, Benjamin Tissoires
> wrote:
> > On Dec 09 2015 or thereabouts, Dmitry Torokhov wrote:
> >> On Wed, Dec 9, 2015 at 5:23 PM, Dmitry Torokhov
> >> wrote:
> >> > On Thu, Nov 19, 2015 at 10:31 AM, Dmitry Torokhov
On Fri 01-01-16 15:21:54, Arnd Bergmann wrote:
> A new warning about a real bug has come up from a recent cleanup:
>
> fs/udf/inode.c: In function 'udf_setup_indirect_aext':
> fs/udf/inode.c:1927:28: warning: 'adsize' may be used uninitialized in this
> function [-Wmaybe-uninitialized]
>
> If th
On Mon, Jan 04, 2016 at 02:15:37PM +0800, Liguo Zhang wrote:
> Add a dt binding for the MT2701 soc.
>
> Signed-off-by: Liguo Zhang
This should probably go with the other patch via arm-soc, or?
In that case:
Acked-by: Wolfram Sang
signature.asc
Description: Digital signature
On Fri 01-01-16 08:53:37, Julia Lawall wrote:
> The qtree_fmt_operations structures are never modified, so declare them as
> const.
>
> Done with the help of Coccinelle.
>
> Signed-off-by: Julia Lawall
Thanks! I've merged the patch to my tree.
Since the register stride should always equal to 2^N, and bit rotation is
much faster than multiplication and division. So introducing the stride
order and using bit rotation to get the offset of the register from the
index to improve the performance.
Signed-off-by: Xiubo Li
---
drivers/base/reg
Please ignore the V1 series.
Changed in V2:
- Introduce regsiter stride order by continue supporting non power of two
strides.
Xiubo Li (3):
regmap: core: Introduce regsiter stride order
regcache: Introduce the index parsing API by stride order
regcache: flat: Introduce register strider or
On 20/12/15 22:12, kbuild test robot wrote:
Hi Daniel,
[auto build test ERROR on v4.4-rc5]
[also build test ERROR on next-20151218]
[cannot apply to tip/irq/core]
url:
https://github.com/0day-ci/linux/commits/Daniel-Thompson/irq-arm-Use-FIQ-for-NMI-backtrace-when-possible/20151221-045854
co
Here we introduce regcache_flat_get_index(), which using register
stride order and bit rotation, will save some memory spaces for
flat cache. Though this will also lost some access performance,
since the bit rotation is used to get the index of the cache array,
and this could be ingored for memory
On Fri, Jan 1, 2016 at 3:49 AM, Paul E. McKenney
wrote:
> On Wed, Dec 30, 2015 at 09:41:45AM -0800, Paul E. McKenney wrote:
>> On Wed, Dec 30, 2015 at 03:03:33PM +0800, Aaron Ma wrote:
>> > On Wed, Dec 30, 2015 at 7:42 AM, Paul E. McKenney
>> > wrote:
>
> [ . . . ]
>
>> > cfg80211: Calling CRDA t
Here introduces regcache_get_index_by_order() for regmap cache,
which uses the register stride order and bit rotation, to improve
the performance.
Signed-off-by: Xiubo Li
---
drivers/base/regmap/internal.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/base/regmap/internal.h b
Hi,
On Sat, Dec 19, 2015 at 11:57:03AM +0100, Hans de Goede wrote:
> >>+ memory {
> >>+ reg = <0x4000 0x8000>;
> >>+ };
> >
> >Is mainline u-boot usable ? If so, you can remove that node entirely.
>
> mainline u-boot works for me when cold-booting from a sdcard, so I conside
On 20/12/15 22:52, kbuild test robot wrote:
Hi Daniel,
[auto build test ERROR on v4.4-rc5]
[also build test ERROR on next-20151218]
[cannot apply to tip/irq/core]
url:
https://github.com/0day-ci/linux/commits/Daniel-Thompson/irq-arm-Use-FIQ-for-NMI-backtrace-when-possible/20151221-045854
co
On 03-01-16 16:18, Rafał Miłecki wrote:
> On 3 January 2016 at 10:36, Arend van Spriel wrote:
>> On 02-01-16 12:21, SF Markus Elfring wrote:
Did you look at the resulting assembly code for different target
architectures?
>>>
>>> Not yet. - Which execution system variants would you rec
Hi Ard,
On 30/12/15 15:26, Ard Biesheuvel wrote:
> KVM on arm64 uses a fixed offset between the linear mapping at EL1 and
> the HYP mapping at EL2. Before we can move the kernel virtual mapping
> out of the linear mapping, we have to make sure that references to kernel
> symbols that are accessed
On Wed, Dec 30, 2015 at 10:42:50AM +0100, Arnd Bergmann wrote:
> On Wednesday 30 December 2015 17:28:20 Rongrong Zou wrote:
> > >>
> > >
> > > config ARM64_INDIRECT_PIO
> > > bool
> > > help
> > > Any driver that provides indirect ISA I/O port access should
> > > select
> > >
Add a DT binding documentation of Video Encoder for the
MT8173 SoC from Mediatek.
Signed-off-by: Tiffany Lin
---
.../devicetree/bindings/media/mediatek-vcodec.txt | 58
1 file changed, 58 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/mediatek-v
==
Introduction
==
The purpose of this series is to add the driver for video codec hw
embedded in the Mediatek's MT8173 SoCs. Mediatek Video Codec is able to
handle video encoding of in a range of formats.
This RFC also include VPU driver. Mediatek Video Codec driver rely
Add h264 encoder driver for MT8173
Signed-off-by: Daniel Hsiao
Signed-off-by: Tiffany Lin
---
drivers/media/platform/mtk-vcodec/Makefile |3 +-
.../media/platform/mtk-vcodec/h264_enc/Makefile|6 +
.../platform/mtk-vcodec/h264_enc/venc_h264_if.c| 530
From: Andrew-CT Chen
Add v4l2 layer encoder driver for MT8173
Signed-off-by: Tiffany Lin
---
drivers/media/platform/Kconfig | 11 +
drivers/media/platform/Makefile|2 +
drivers/media/platform/mtk-vcodec/Makefile |8 +
drivers/media/plat
From: Andrew-CT Chen
Add a DT binding documentation of Video Processor Unit for the
MT8173 SoC from Mediatek.
Signed-off-by: Andrew-CT Chen
Signed-off-by: Tiffany Lin
---
.../devicetree/bindings/media/mediatek-vpu.txt | 27
1 file changed, 27 insertions(+)
create m
The VPU driver for hw video codec embedded in Mediatek's MT8173 SOCs.
It is able to handle video decoding/encoding of in a range of formats.
The driver provides with VPU firmware download, memory management and
the communication interface between CPU and VPU.
For VPU initialization, it will create
Add vp8 encoder driver for MT8173
Signed-off-by: Daniel Hsiao
Signed-off-by: Tiffany Lin
---
drivers/media/platform/mtk-vcodec/Makefile |2 +
drivers/media/platform/mtk-vcodec/venc_drv_if.c|3 +
drivers/media/platform/mtk-vcodec/vp8_enc/Makefile |6 +
.../platform/mtk-vc
Add video encoder node for MT8173
Signed-off-by: Tiffany Lin
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 37 ++
1 file changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index b3636cd..09f2
Add VPU drivers for MT8173
Signed-off-by: Andrew-CT Chen
Signed-off-by: Tiffany Lin
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 60a1284.
On 21.12.2015 07:10, NeilBrown wrote:
>
> hi,
> I became maintainer for md (Linux Software RAID) in late 2001 and on
> the whole it has been fun and a valuable experience. But I have been
> losing interest in recent years (https://lwn.net/Articles/511073/) and
> as was mentioned at the kernel
On 12/31/2015 05:40 AM, Wenwei Tao wrote:
This patch fix two issues in rrpc_lun_gc
1. prio_list is protected by rrpc_lun's lock not nvm_lun's, so
acquire rlun's lock instead of lun's before operate on the list.
2. we delete block from prio_list before allocating gcb, but gcb
allocation may fail
On 28/12/15 14:20, Thomas Petazzoni wrote:
> The new function platform_msi_domain_{alloc,free}_irqs are meant to be
> used in platform drivers, which can be built as modules. Therefore, it
> makes sense to export them to be used from kernel modules.
>
> Signed-off-by: Thomas Petazzoni
> ---
> dr
Hi Boris,
Happy New Year.
Thanks for the comments - I'll send out a new patchset today.
On 28/12/15 08:25, Boris Brezillon wrote:
Hi Harvey,
I found a few remaining issues. Once fixed you can add my
Reviewed-by: Boris Brezillon
On Thu, 24 Dec 2015 12:20:14 +
Harvey Hunt wrote:
From:
在 2016/1/4 18:11, Will Deacon 写道:
On Wed, Dec 30, 2015 at 10:42:50AM +0100, Arnd Bergmann wrote:
On Wednesday 30 December 2015 17:28:20 Rongrong Zou wrote:
config ARM64_INDIRECT_PIO
bool
help
Any driver that provides indirect ISA I/O port access should select
Hi Vishnu,
thanks for going through the pain of actually reading this patch!
On 04/01/16 06:34, Vishnu Patekar wrote:
> Hello Andre,
>
> On Fri, Jan 1, 2016 at 1:17 AM, Andre Przywara wrote:
>> Based on the Allwinner A64 user manual and on the previous sunxi
>> pinctrl drivers this introduces t
On Mon, 4 Jan 2016 15:03:50 +1000
Greg Ungerer wrote:
> If 68328serial.c is removed is there any point keeping the
> architecture support for 68328 platforms?
>
> The 68328serial.c provides pretty much the only type of console
> that can be used on these devices. They are largely useless
> witho
On 4 January 2016 at 11:08, Marc Zyngier wrote:
> Hi Ard,
>
> On 30/12/15 15:26, Ard Biesheuvel wrote:
>> KVM on arm64 uses a fixed offset between the linear mapping at EL1 and
>> the HYP mapping at EL2. Before we can move the kernel virtual mapping
>> out of the linear mapping, we have to make su
внимания;
Ваши сообщения превысил лимит памяти, который составляет 5 Гб, определенных
администратором, который в настоящее время работает на 10.9GB, Вы не сможете
отправить или получить новую почту, пока вы повторно не проверить ваш почтовый
ящик почты. Чтобы восстановить работоспособность Ваш
Change the phrase "handed off to the driver" to "handed off to the
device" as in the paragraph below.
Signed-off-by: Masahiro Yamada
---
Documentation/DMA-API.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/DMA-API.txt b/Documentation/DMA-API.txt
index 1e98
Hi, Michael
On 01/04/2016 12:57 PM, Michael Ellerman wrote:
[...]
>> Do you mean "tools/testing/selftest/Makefile"? I try to do it but I could not
>> get the objtree and srctree if it is called directly(objtree and srctree is
>> defined in toplevel Makefile)
>
> No I meant Makefile, the very top
Hi Anand,
On 2016-01-02 06:14, Anand Moon wrote:
Hi Krzysztof
On 14 December 2015 at 05:15, Krzysztof Kozlowski
wrote:
On 12.12.2015 13:32, Anand Moon wrote:
Hi Krzysztof,
I am just observing this deadlock om my Odroid U3.
This is not a deadlock yet, just a report from lockdep. Could be a
Le 04/01/2016 10:42, Neil Armstrong a écrit :
> Declare a new SoC variant for NPx SoCs having USRIO_DISABLED as
> capability bit.
>
> Signed-off-by: Neil Armstrong
> ---
> drivers/net/ethernet/cadence/macb.c | 6 ++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/net/ethernet/cad
During genpd_poweron, genpd->lock is acquired recursively for each
parent (master) domain, which are separate obejcts. This confuses
lockdep, which considers every operation on genpd->lock as being done on
the same lock class. This leads to the following false positive warning:
===
> These patches are labour intensive to review because you can't just do
> it in the email client.
Thanks for your general interest.
> Also you were not able to review it properly yourself and introduced
> a bug.
I admit that it can happen during my software development that I overlook
implemen
On Monday 04 January 2016 10:56:05 Jan Kara wrote:
> On Fri 01-01-16 15:21:54, Arnd Bergmann wrote:
> > A new warning about a real bug has come up from a recent cleanup:
> >
> > fs/udf/inode.c: In function 'udf_setup_indirect_aext':
> > fs/udf/inode.c:1927:28: warning: 'adsize' may be used uniniti
Andrew Morton writes:
> On Tue, 22 Dec 2015 17:32:30 +0100 Vitaly Kuznetsov
> wrote:
>
>> Currently, all newly added memory blocks remain in 'offline' state unless
>> someone onlines them, some linux distributions carry special udev rules
>> like:
>>
>> SUBSYSTEM=="memory", ACTION=="add", ATTR
[ Not sure if I have addressed all the correct people and mailing-lists ]
Hi,
while still digging into a llvmlinux issue with workqueue I saw that
the wrong optimization compiler-flag was used on x86 architecture and
acpi subsystem.
CLANG requires '-Oz' whereas GCC requires '-Os'.
As acpi-daemo
3c3bf11240 ("x86, mm: introduce vmem_altmap to augment
vmemmap_populate()")
Cc: Dan Williams
Signed-off-by: Sudip Mukherjee
---
m68k defconfig build log of next-20160104 is at:
https://travis-ci.org/sudipm-mukherjee/parport/jobs/100068521
arch/m68k/include/asm/page_mm.h | 3 +++
1 file c
This clock is required for loading the qdsp firmware.
Signed-off-by: Srinivas Kandagatla
---
Changes since v1:
fixed parent name as spotted by Georgi
drivers/clk/qcom/gcc-msm8916.c | 18 ++
include/dt-bindings/clock/qcom,gcc-msm8916.h | 1 +
2 files change
On 04/01/16 10:31, Ard Biesheuvel wrote:
> On 4 January 2016 at 11:08, Marc Zyngier wrote:
>> Hi Ard,
>>
>> On 30/12/15 15:26, Ard Biesheuvel wrote:
>>> KVM on arm64 uses a fixed offset between the linear mapping at EL1 and
>>> the HYP mapping at EL2. Before we can move the kernel virtual mapping
On 01/04/16 at 05:25pm, Dave Young wrote:
> Hi, Toshi,
>
> On 12/25/15 at 03:09pm, Toshi Kani wrote:
> > Change to call walk_iomem_res_desc() for searching resource entries
> > with the following names:
> > "ACPI Tables"
> > "ACPI Non-volatile Storage"
> > "Persistent Memory (legacy)"
> > "Cra
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