bpf_perf_event_output() outputs data through sample->raw_data. This
patch adds support to convert those data into CTF. A python script
then can be used to process output data from BPF programs.
Test result:
# cat ./test_bpf_output_2.c
/ BEGIN **/
A new syntax is appended into parser so user can pass predefined perf
events into BPF objects.
After this patch, BPF programs for perf are finally able to utilize
bpf_perf_event_read() introduced in commit 35578d7984003097af2b1e3
(bpf: Implement function bpf_perf_event_read() that get the selected
Checks BPF syscall number, turn off libbpf building on platform doesn't
correctly support sys_bpf instead of blocking compiling.
Reported-by: Naveen N. Rao
Acked-by: Jiri Olsa
Tested-by: Naveen N. Rao
Signed-off-by: Wang Nan
Cc: Arnaldo Carvalho de Melo
Cc: Sukadev Bhattiprolu
---
tools/bui
This patch introduce a new syntax to perf event parser:
# perf record -e './test_bpf_map_3.c/maps:channel.value[0,1,2,3...5]=101/'
usleep 2
By utilizing the basic facilities in bpf-loader.c which allow setting
different slots in a BPF map separately, the newly introduced syntax
allows perf to c
bpf__config_obj() is introduced as a core API to config BPF object
after loading. One configuration option of maps is introduced. After
this patch BPF object can accept configuration like:
maps:my_map.value=1234
(maps.my_map.value looks pretty. However, there's a small but hard
to fixed problem
From: He Kuang
This patch is useful when trying to pass a perf event to BPF map.
Before this patch we are unable to pass an event with config term to
BPF maps. For example:
# perf record -a -e cycles/no-inherit,period=0x7fff/ \
-e
'./test_bpf_map_2.c/maps:pmu_map.
bpf__apply_obj_config() is introduced as the core API to apply object
config options to all BPF objects. This patch also does the real work
for setting values for BPF_MAP_TYPE_PERF_ARRAY maps by inserting value
stored in map's private field into the BPF map.
This patch is required because we are n
> The 'end' tag is actually 0x0f, it's the representation as a
> small resource data type tag that's 0x78 (ie shifted by 3).
> This patch also adds helper functions to extract the resource
> data type tags for both large and small resource data types.
>
> Cc: Alexander Duyck
> Cc: Bjorn Helgaas
>
On Thu, Dec 17, 2015 at 12:29:03PM +0200, Michael S. Tsirkin wrote:
> +static inline __virtio16 virtio_load_acquire(bool weak_barriers, __virtio16
> *p)
> +{
> + if (!weak_barriers) {
> + rmb();
> + return READ_ONCE(*p);
> + }
> +#ifdef CONFIG_SMP
> + return smp
This patch adds the final step for BPF map configuration. A new syntax
is appended into parser so user can config BPF objects through '/' '/'
enclosed config terms.
After this patch, following syntax is available:
# perf record -e ./test_bpf_map_1.c/maps:channel.value=10/ ...
It would takes eff
Commit 71d6de64feddd4b45326fba2111b3006d9e0 ('perf test: Fix hist
testcases when kptr_restrict is on') solves a double free problem when
'perf test hist' calling setup_fake_machine(). However, the result is
still incorrect. For example:
$ ./perf test -v 'filtering hist entries'
25: Test filt
Commit a43eec304259a6c637f4014a6d4767159b6a3aa3 (bpf: introduce
bpf_perf_event_output() helper) add a helper to enable BPF program
output data to perf ring buffer through a new type of perf event
PERF_COUNT_SW_BPF_OUTPUT. This patch enable perf to create perf
event of that type. Now perf user can u
This patch introduces basic facilities to support config different
slots in a BPF map one by one.
array.nr_ranges and array.ranges are introduced into 'struct
parse_events_term', where ranges is an array of indices range (start,
length) which will be configured by this config term. nr_ranges
is th
On 17/12/15 10:48, Jon Hunter wrote:
> Add a driver for the Tegra-AGIC interrupt controller which is compatible
> with the ARM GIC-400 interrupt controller.
>
> The Tegra AGIC (Audio GIC) is part of the Audio Processing Engine (APE) on
> Tegra210 and can route interrupts to either the GIC for the
- Use WARN_ONCE in patch 06/16 'perf tools: Prevent calling machine__delete()
on
non-allocated machine' and add machine__exit() back.
- Introduce perf_evsel__is_bpf_output() in 15/16 and use it in 16/16.
- Resend PowerPC building breakage fix.
He Kuang (1):
perf tools: Support perf even
Hi Jon,
On 17/12/15 10:48, Jon Hunter wrote:
> Dynamically assign the irqchip structure for each GIC controller
> instance. This is necessary in order to populate the "dev" member
> of the irqchip structure for GIC instances that require runtime
> power management support. This also allows us to p
All hists test cases forget to reset err after using it to hold an
error code. If error occure in setup_fake_machine() it incorrectly
return TEST_OK.
This patch fixes it.
Signed-off-by: Wang Nan
Suggested-by: Namhyung Kim
Acked-by: Namhyung Kim
Cc: Arnaldo Carvalho de Melo
Cc: Jiri Olsa
Cc:
After this patch other directories can use this architecture detector
without directly including it from perf's directory. Libbpf would
utilize it to get proper $(ARCH) so it can receive correct uapi include
directory.
Signed-off-by: Wang Nan
Acked-by: Jiri Olsa
Tested-by: Naveen N. Rao
Cc: Arn
Copying perf to old kernel system results:
# perf test bpf
37: Test BPF filter :
37.1: Test basic BPF filtering : FAILED!
37.2: Test BPF prologue generation : Skip
However, in case when kernel doe
From: "Naveen N. Rao"
perf build is currently (v4.4-rc5) broken on powerpc:
bpf.c:28:4: error: #error __NR_bpf not defined. libbpf does not support
your arch.
# error __NR_bpf not defined. libbpf does not support your arch.
^
Fix this by including tools/scripts/Makefile.arch for the prope
Hi Xiangliang,
[auto build test WARNING on v4.4-rc5]
[also build test WARNING on next-20151217]
url:
https://github.com/0day-ci/linux/commits/Xiangliang-Yu/NTB-Add-AMD-PCI-Express-NTB-driver/20151217-113608
config: x86_64-randconfig-n0-12171710 (attached as .config)
reproduce:
# save
Am Donnerstag, den 17.12.2015, 11:28 +0100 schrieb David Jander:
> Hi all,
>
> I was investigating the source of abnormal irq-latency spikes on an i.MX6
> (ARM) board, and discovered this:
>
> # tracer: preemptirqsoff
> #
> # preemptirqsoff latency trace v1.1.5 on 4.4.0-rc4+
> #
Put a v3 in the subject.
There are still paths where this is not freed, so we need a v4. Take
your time, there is no rush.
> drivers/staging/rtl8192u/ieee80211/ieee80211_rx.c | 15 ++-
> 1 file changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/staging/rtl8192u/ieee8
To prevent futher commits calling machine__delete() on non-allocated
'struct machine' (which would cause memory corruption), this patch
enforces machine__init(), record whether a machine structure is
dynamically allocated or not, and warn if machine__delete() is called
on incorrect object.
Signed-
Tested with a HP AE311-60001 PCIe card. It used to repeat the same VPD every 4k
for 32k now only the 154 bytes are returned and lspci - reports that the
data up
to and including the end and that the check sum is good:
...
Capabilities: [74] Vital Product Data
Product N
Hello,
The following program triggers use-after-free in sixpack_close:
// autogenerated by syzkaller (http://github.com/google/syzkaller)
#include
#include
#include
#include
#include
#include
#include
int main()
{
int fd = open("/dev/ptmx", O_RDWR);
int opt = 0x7;
Hi Hannes,
[auto build test WARNING on pci/next]
[also build test WARNING on v4.4-rc5 next-20151217]
url:
https://github.com/0day-ci/linux/commits/Hannes-Reinecke/pci-Update-VPD-definitions/20151217-160050
base: https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git next
reproduce
Hi Lucas,
Thanks for reacting.
On Thu, 17 Dec 2015 12:03:10 +0100
Lucas Stach wrote:
> Am Donnerstag, den 17.12.2015, 11:28 +0100 schrieb David Jander:
> > Hi all,
> >
> > I was investigating the source of abnormal irq-latency spikes on an i.MX6
> > (ARM) board, and discovered this:
> >
> >
On Thu, Dec 17, 2015 at 01:01:29PM +1100, Stephen Rothwell wrote:
> between commit:
> f6251e80956d ("soc: qcom: documentation: Update SMD/RPM Docs")
> 9ee8373a1552 ("soc: qcom: smd-rpm: Add existing platform support")
> from the qcom tree and commit:
> 7a400585893e ("soc: qcom: documentat
On 17/12/2015 at 16:03:44 +1100, Stephen Rothwell wrote :
> Hi Alexandre,
>
> After merging the rtc tree, today's linux-next build (arm
> multi_v7_defconfig) failed like this:
>
> drivers/built-in.o: In function `rtc_time64_to_tm':
> sunxi_sid.c:(.text+0x366e54): undefined reference to `__aeabi_l
On Wed, Dec 16, 2015 at 12:42:29AM +0300, Yury Norov wrote:
> From: Andrew Pinski
>
> Reviewed-by: David Daney
> Signed-off-by: Philipp Tomsich
> Signed-off-by: Christoph Muellner
> Signed-off-by: Yury Norov
> Signed-off-by: Andrew Pinski
I already asked here to add a long patch description
Hi Maxime,
2015-12-16 11:39 GMT+01:00 Maxime Ripard :
> It looks mostly fine, however, please try to make only one thing in
> one patch.
>
> In this case, it would mean having one patch to add the DT property
> and support in the SPI core in a first one, and then add support for
> it in your drive
On Thu, Dec 17, 2015 at 12:32:53PM +0200, Michael S. Tsirkin wrote:
> Seems to give a speedup on my box but I'm less sure about this one. E.g. as
> xchng faster than mfence on all/most intel CPUs? Anyone has an opinion?
Would help if you Cc people who would actually know this :-)
Yes, we've rece
Am Donnerstag, den 17.12.2015, 12:20 +0100 schrieb David Jander:
> Hi Lucas,
>
> Thanks for reacting.
>
> On Thu, 17 Dec 2015 12:03:10 +0100
> Lucas Stach wrote:
>
> > Am Donnerstag, den 17.12.2015, 11:28 +0100 schrieb David Jander:
> > > Hi all,
> > >
> > > I was investigating the source of
Hi Xiangliang,
[auto build test WARNING on v4.4-rc5]
[also build test WARNING on next-20151217]
url:
https://github.com/0day-ci/linux/commits/Xiangliang-Yu/NTB-Add-AMD-PCI-Express-NTB-driver/20151217-113608
config: x86_64-randconfig-n0-12171710 (attached as .config)
reproduce:
# save
Hi guys,
We are working on making core dump behaviour isolated in
container. But the problem is, the /proc/sys/kernel/core_pattern
is a kernel wide setting, not belongs to a container.
So we want to add core_pattern into mnt namespace. What
do you think about it?
Yang
-
Hi Paul,
On 13 December 2015 10:59, Geert Uytterhoeven wrote:
>
> CC MODULE_AUTHOR
>
> On Sun, Dec 13, 2015 at 2:41 AM, Paul Gortmaker
> wrote:
> > The Kconfig currently controlling compilation of this code is:
> >
> > drivers/pci/host/Kconfig:config PCI_RCAR_GEN2_PCIE
> > drivers/pci/host/Kcon
Set DMA_MASK of usb platform device properly.
Signed-off-by: Sriram Dash
Signed-off-by: Ramneek Mehresh
---
drivers/usb/host/fsl-mph-dr-of.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 0c3826
On 16 December 2015 23:47 Alexandre Belloni wrote:
> Subject: Re: [PATCH V1] rtc: da9063: access ordering error during RTC
> interrupt system power on
>
> This seems mostly fine, however ...
Hi Alexandre,
Thanks for reviewing this.
> On 08/12/2015 at 16:28:39 +, Steve Twiss wrote :
> >
On Wed, Dec 16, 2015 at 12:42:33AM +0300, Yury Norov wrote:
> diff --git a/arch/arm64/include/asm/is_compat.h
> b/arch/arm64/include/asm/is_compat.h
> new file mode 100644
> index 000..476db90
> --- /dev/null
> +++ b/arch/arm64/include/asm/is_compat.h
> @@ -0,0 +1,62 @@
> +/*
> + * Copyright (
On Wed, 16 Dec 2015, Jessica Yu wrote:
> +++ Miroslav Benes [16/12/15 13:02 +0100]:
> > On Mon, 30 Nov 2015, Jessica Yu wrote:
> >
> > > Livepatch needs to utilize the symbol information contained in the
> > > mod_arch_specific struct in order to be able to call the s390
> > > apply_relocate_add(
On 17 December 2015 at 12:27, Lucas Stach wrote:
> Am Donnerstag, den 17.12.2015, 12:20 +0100 schrieb David Jander:
>> Hi Lucas,
>>
>> Thanks for reacting.
>>
>> On Thu, 17 Dec 2015 12:03:10 +0100
>> Lucas Stach wrote:
>>
>> > Am Donnerstag, den 17.12.2015, 11:28 +0100 schrieb David Jander:
>> >
Hi Balbi,
On 16/12/15 16:03, Felipe Balbi wrote:
>
> Hi
>
> Felipe Ferreri Tonello writes:
>> Hi all,
>>
>> On 01/12/15 18:30, Felipe F. Tonello wrote:
>>> Fixed all comments suggested by the linux-usb list.
>>>
>>> changes in v6:
>>> - Removed patches already applied in Balbi's tree
>>> - Cl
> This report is then followed by a dozen of other use-after-free reports.
>
> On commit edb42dc7bc0da0125ceacab810a553ce1f0cac8d (Dec 15).
>
> Thank you
sixpack_close does unregister_netdev(sp->dev), which frees sp as sp is
actually allocated via alloc_netdev()
Then deletes two timers within s
Adds a new property "spi-word-wait-ns" to the spi-bus binding that allows
SPI slave devices to set a wait time between the transmission of words.
Signed-off-by: Marcus Weseloh
---
Documentation/devicetree/bindings/spi/spi-bus.txt | 2 ++
drivers/spi/spi.c | 2 ++
Hi,
Perf test "Test object code reading" failed on ARM64 board and the test log is
here.
##
# perf test -v 21
...
File is: /tmp/oxygen_root-root/lib64/libc-2.19-2014.08.so
On file address is: 0x70c3c
Objd
Modifies the sun4i SPI master driver to make use of the
"spi-word-wait-ns" property. This specific SPI controller needs 3 clock
cycles to set up the delay, which makes the minimum non-zero wait time
on this hardware 4 clock cycles.
Signed-off-by: Marcus Weseloh
---
drivers/spi/spi-sun4i.c | 22 +
On Wed, Dec 16, 2015 at 12:42:34AM +0300, Yury Norov wrote:
> Reviewed-by: David Daney
> Signed-off-by: Philipp Tomsich
> Signed-off-by: Christoph Muellner
> Signed-off-by: Yury Norov
> Signed-off-by: Andrew Pinski
Long description missing.
> diff --git a/arch/arm64/include/asm/is_compat.h
Hi all,
This patch set adds a new property "spi-word-wait-ns" to the spi-bus
binding that allows SPI slave devices to set a wait time between the
transmission of words. Modifies the spi_device struct and slave device
probing to read and store the new property.
Also modifies the sun4i SPI master d
Hi Robert,
On 11/12/15 11:24, Robert Baldyga wrote:
> It seems that gitotious repository is no longer accessible, so we replace
> it with address to active repository.
>
> Signed-off-by: Robert Baldyga
> ---
> Documentation/usb/gadget-testing.txt | 2 +-
> 1 file changed, 1 insertion(+), 1 dele
On 17/12/2015 at 11:37:06 +, Opensource [Steve Twiss] wrote :
> On 16 December 2015 23:47 Alexandre Belloni wrote:
> > Subject: Re: [PATCH V1] rtc: da9063: access ordering error during RTC
> > interrupt system power on
> >
> > This seems mostly fine, however ...
>
> Hi Alexandre,
> Thanks fo
Hi Andreas,
On Tue, 15 Dec 2015 16:11:24 +0100, Andreas Werner wrote:
> here is the register dump of the tmp461.
Thanks.
> It seemse that we really cannot detect if it is a tmp461 or a tmp451.
> Also the magic "ID Register" offset 0xff is 0x00 for both devices.
I would use register 0x16, which
2015-12-07 18:43 GMT+09:00 Arnd Bergmann :
> On Monday 07 December 2015 18:38:44 Krzysztof Kozlowski wrote:
>> On 07.12.2015 18:14, Arnd Bergmann wrote:
>> > On Monday 07 December 2015 09:59:54 Krzysztof Kozlowski wrote:
>> >> For Odroid XU3-family enable the:
>> >> - PWM fan (to control the CPU f
These patches have been part of:
[PATCH v4 00/10] ACPI GIC Self-probing, GICv2m and GICv3 support
https://lkml.org/lkml/2015/7/29/234
Patches base on Suravee's ACPI GICv2m support:
https://lkml.org/lkml/2015/12/10/475
The following git branch contains submitted patches along with
the useful for t
gicv3_init_bases() is the only caller for its_init(),
also it is a __init function, so mark its_init() as __init too,
then recursively mark the functions called as __init.
This will help to introduce ITS initialization using ACPI tables as
we will use acpi_table_parse_entries family functions ther
After refactoring DT code, we let ACPI to build ITS PCI MSI domain
and do requester ID to device ID translation using IORT table.
We have now full PCI MSI domain stack, thus we can enable ITS initialization
from GICv3 core driver for ACPI scenario.
Signed-off-by: Tomasz Nowicki
---
drivers/irqc
On systems supporting GICv3 and above, in MADT GICC structures, the
field of GICR Base Address holds the 64-bit physical address of the
associated Redistributor if the GIC Redistributors are not in the
always-on power domain, so instead of init GICR regions via GIC
redistributor structure(s), init
Firmware agnostic code lands in separate function which do necessary
domain initialization based on unique domain handler.
Signed-off-by: Tomasz Nowicki
---
drivers/irqchip/irq-gic-v3-its-pci-msi.c | 43 +---
1 file changed, 28 insertions(+), 15 deletions(-)
diff --g
Isolate hardware abstraction (FDT) code to gic_of_init().
Rest of the logic goes to gic_init_bases() and expects well
defined data to initialize GIC properly. The same solution
is used for GICv2 driver.
This is needed for ACPI initialization later.
Signed-off-by: Tomasz Nowicki
Signed-off-by: Ha
IORT shows representation of IO topology for ARM based systems.
It describes how various components are connected together on
parent-child basis e.g. PCI RC -> SMMU -> ITS.
Initial support allows to:
- register ITS MSI chip along with ITS translation ID and domain token
- find registered domain to
Since we prepared ITS for being initialized different that via DT,
it is now possible to parse MADT and pass mandatory info to
firmware-agnostic ITS init call.
Note that we are using here IORT lib to keep track of allocated
domain handler which will be used to build PCI MSI domain on top
in the la
Signed-off-by: Hanjun Guo
Signed-off-by: Tomasz Nowicki
---
drivers/irqchip/irq-gic-v3-its.c | 82 +++---
drivers/irqchip/irq-gic-v3.c | 6 +--
include/linux/irqchip/arm-gic-v3.h | 2 +-
3 files changed, 52 insertions(+), 38 deletions(-)
diff --git a/dr
With the refator of gic_of_init(), GICv3/4 can be initialized
by gic_init_bases() with gic distributor base address and gic
redistributor region(s).
So get the redistributor region base addresses from MADT GIC
redistributor subtable, and the distributor base address from
GICD subtable to init GICv
From: Hanjun Guo
The gic_root_node defined in ITS driver is not actually
used, and the ITS driver seems will not use it in the
future, so just remove it.
Signed-off-by: Hanjun Guo
---
drivers/irqchip/irq-gic-v3-its.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/irqchip/irq-gic
On Thu, Dec 17, 2015 at 12:48:08PM +0100, Jean Delvare wrote:
> Hi Andreas,
>
> On Tue, 15 Dec 2015 16:11:24 +0100, Andreas Werner wrote:
> > here is the register dump of the tmp461.
>
> Thanks.
>
> > It seemse that we really cannot detect if it is a tmp461 or a tmp451.
> > Also the magic "ID Re
From: Ma Jun
Add the mbigen msi interrupt controller bindings document.
This patch based on Mark Rutland's patch
https://lkml.org/lkml/2015/7/23/558
Signed-off-by: Ma Jun
---
Documentation/devicetree/bindings/arm/mbigen.txt | 74 ++
1 files changed, 74 insertions(+), 0 d
From: Ma Jun
Add the interrupt controller chip operation functions of mbigen chip.
Signed-off-by: Ma Jun
---
drivers/irqchip/irq-mbigen.c | 81 ++
1 files changed, 81 insertions(+), 0 deletions(-)
diff --git a/drivers/irqchip/irq-mbigen.c b/drivers/ir
On Mon, Dec 14, 2015 at 11:27:22PM +0100, Arnd Bergmann wrote:
> On Monday 14 December 2015 14:52:06 Wolfram Sang wrote:
> > > > What about not ifdeffing the inline function and keep the build error
> > > > whenever someone uses it without I2C_SLAVE being selected?
> > >
> > > The inline function
From: Ma Jun
This patch set adds the driver of mbigen and binding document for Hisilicon
Mbigen chips.
Compared with previous version, this version changed much.
Because during the time between V3 and V4 of my patch, there are two
related patches were committed by Mr.Marc Zyngier and Mr. Mark R
Hi Mark,
Am Donnerstag, 17. Dezember 2015, 18:32:31 schrieb Mark yao:
> On 2015年12月17日 18:00, Heiko Stübner wrote:
> > Am Donnerstag, 17. Dezember 2015, 11:01:07 schrieb Mark Yao:
> >> The series of patches coverting drm rockchip to atomic API, do some
> >> cleanup and some fixes on atomic side.
From: Ma Jun
Mbigen means Message Based Interrupt Generator(MBIGEN).
Its a kind of interrupt controller that collects
the interrupts from external devices and generate msi interrupt.
Mbigen is applied to reduce the number of wire connected interrupts.
As the peripherals increasing, the interrup
adding Jan Stancek to the loop
jirka
On Thu, Dec 17, 2015 at 07:41:43PM +0800, xiakaixu wrote:
> Hi,
>
> Perf test "Test object code reading" failed on ARM64 board and the test log
> is here.
>
> ##
> # perf te
From: Ma Jun
For peripheral devices which connect to mbigen,mbigen is a interrupt
controller. So, we create irq domain for each mbigen device and add
mbigen irq domain into irq hierarchy structure.
Signed-off-by: Ma Jun
---
drivers/irqchip/irq-mbigen.c | 138 ++
gpiod_set_value(bp->reset_gpio, 0);
^
Add the proper header file to resolve it.
Fixes: 5833e0526820 ("net/macb: add support for resetting PHY using GPIO")
Cc: Gregory CLEMENT
Signed-off-by: Sudip Mukherjee
---
build log with next-20151217 is at:
https://travis-ci.org/sudi
Adding linux-gpio, so quoting in full.
On Thu, Dec 17, 2015 at 11:48 AM, Jon Hunter wrote:
> Some IRQ chips, such as GPIO controllers or secondary level interrupt
> controllers, may require require additional runtime power management
> control to ensure they are accessible. For such IRQ chips, i
Em Thu, Dec 17, 2015 at 10:37:14AM +0530, Naveen N. Rao escreveu:
> On 2015/12/17 09:29AM, Wang Nan wrote:
> > The whole thread is:
> >
> > [PATCH v3 0/3] perf build: PowerPC: Fix build breakage due to libbpf:
> > http://lkml.kernel.org/g/1450150557-127942-1-git-send-email-wangn...@huawei.com
> >
Em Thu, Dec 17, 2015 at 04:56:31PM +0900, Namhyung Kim escreveu:
> Hi Arnaldo,
>
> On Wed, Dec 16, 2015 at 09:17:59PM -0300, Arnaldo Carvalho de Melo wrote:
> > Em Wed, Dec 16, 2015 at 12:35:33AM +0900, Namhyung Kim escreveu:
> > > Hello,
> > >
> > > This is an attempt to improve perf to deal wit
Em Thu, Dec 17, 2015 at 05:14:25PM +0900, Namhyung Kim escreveu:
> The raw_data and raw_size fields are to provide tracepoint specific
> information. They will be used by dynamic sort keys later.
>
> Signed-off-by: Namhyung Kim
Ok, I'll update this in my local branch and test.
- Arnaldo
> ---
On Thu, 17 Dec 2015 12:39:20 +0100
Ulf Hansson wrote:
> On 17 December 2015 at 12:27, Lucas Stach wrote:
> > Am Donnerstag, den 17.12.2015, 12:20 +0100 schrieb David Jander:
> >> Hi Lucas,
> >>
> >> Thanks for reacting.
> >>
> >> On Thu, 17 Dec 2015 12:03:10 +0100
> >> Lucas Stach wrote:
> >>
>
>From 529ff00b556e110c6e801c39e94b06f559307136 Mon Sep 17 00:00:00 2001
From: Tetsuo Handa
Date: Thu, 17 Dec 2015 16:27:08 +0900
Subject: [PATCH] kernel/hung_task.c: use timeout diff when timeout is updated
When new timeout is written to /proc/sys/kernel/hung_task_timeout_secs,
khungtaskd is inte
We need few sysfs attributes to know different status of a watchdog device.
To do that, we need to associate .dev_groups with watchdog_class. So
convert it from pointer to static.
Putting this static struct in watchdog_dev.c, so that static device
attributes defined in that file can be attached to
This patch adds following attributes to watchdog device's sysfs interface
to read its different status.
* state - reads whether device is active or not
* identity - reads Watchdog device's identity string.
* timeout - reads current timeout.
* timeleft - reads timeleft before watchdog generates a r
- Original Message -
> From: "Jiri Olsa"
> To: "xiakaixu"
> Cc: "adrian hunter" , "Arnaldo Carvalho de Melo"
> , "Ingo Molnar"
> , "masami hiramatsu pt" ,
> linux-kernel@vger.kernel.org, "Wangnan
> (F)" , "Jan Stancek"
> Sent: Thursday, 17 December, 2015 1:09:26 PM
> Subject: Re: [
defined for mips so we need the definition of
MODULE_DEVICE_TABLE to compile successfully.
Fixes: c39dfebc7798 ("drivers/tty/serial: make serial/atmel_serial.c explicitly
non-modular")
Cc: Paul Gortmaker
Signed-off-by: Sudip Mukherjee
---
build log with next-20151217 is at:
https://
On 12/17/2015 12:45 AM, Seiichi Ikarashi wrote:
> On 2015-12-15 22:02, Prarit Bhargava wrote:
>> The MSR_PKG_POWER_INFO register (Intel ASDM, section 14.9.3
>> "Package RAPL Domain") provides a maximum time window which the
>> system can support. This window is read-only and is currently
>> not
memcg will come in handy in get_scan_count(). It can already be used for
getting swappiness immediately in get_scan_count() instead of passing it
around. The following patches will add more memcg-related values, which
will be used there.
Signed-off-by: Vladimir Davydov
Acked-by: Johannes Weiner
Hi,
This is v2 of the patch set introducing swap accounting to cgroup2. For
a detailed description and rationale please see patches 1 and 7.
v1 can be found here: https://lwn.net/Articles/667472/
v2 mostly addresses comments by Johannes. For the detailed changelog,
see individual patches.
Thank
mem_cgroup_lruvec_online() takes lruvec, but it only needs memcg. Since
get_scan_count(), which is the only user of this function, now possesses
pointer to memcg, let's pass memcg directly to mem_cgroup_online()
instead of picking it out of lruvec and rename the function accordingly.
Signed-off-by
Swap cache pages are freed aggressively if swap is nearly full (>50%
currently), because otherwise we are likely to stop scanning anonymous
when we near the swap limit even if there is plenty of freeable swap
cache pages. We should follow the same trend in case of memory cgroup,
which has its own s
The following patches will add more functions to the memcg section of
include/linux/swap.h. Some of them will need values defined below the
current location of the section. So let's move the section to the end of
the file. No functional changes intended.
Signed-off-by: Vladimir Davydov
Acked-by:
We don't scan anonymous memory if we ran out of swap, neither should we
do it in case memcg swap limit is hit, because swap out is impossible
anyway.
Signed-off-by: Vladimir Davydov
Acked-by: Johannes Weiner
---
Changes in v2:
- Do not check swap limit on the legacy hierarchy.
include/linux/s
The rationale of separate swap counter is given by Johannes Weiner.
Signed-off-by: Vladimir Davydov
---
Changes in v2:
- Add rationale of separate swap counter provided by Johannes.
Documentation/cgroup.txt | 33 +
1 file changed, 33 insertions(+)
diff --git a/
In the legacy hierarchy we charge memsw, which is dubious, because:
- memsw.limit must be >= memory.limit, so it is impossible to limit
swap usage less than memory usage. Taking into account the fact that
the primary limiting mechanism in the unified hierarchy is
memory.high while memory
Hi Ming,
On 17/12/15 03:52, Ming Lei wrote:
> On Wed, Dec 16, 2015 at 10:55 PM, Andre Przywara
> wrote:
>> Hi,
>>
>> On 15/12/15 13:39, Ming Lei wrote:
>>> On Tue, Dec 15, 2015 at 8:23 PM, Andre Przywara
>>> wrote:
Hi Ming,
thanks for the answer!
On 15/12/15 11:54, Min
Hi Ming,
On 17/12/15 03:52, Ming Lei wrote:
> On Wed, Dec 16, 2015 at 10:55 PM, Andre Przywara
> wrote:
>> Hi,
>>
>> On 15/12/15 13:39, Ming Lei wrote:
>>> On Tue, Dec 15, 2015 at 8:23 PM, Andre Przywara
>>> wrote:
Hi Ming,
thanks for the answer!
On 15/12/15 11:54, Min
On Wed, Dec 16, 2015 at 09:44:00AM -0700, Jim Davis wrote:
> Building with the attached random configuration file,
>
> ERROR: "i2c_parse_fw_timings" [drivers/i2c/busses/i2c-rcar.ko] undefined!
Thanks! I just sent a patch to fix it.
signature.asc
Description: Digital signature
the COMPILE_TEST
> option")
> Cc: Daniel Lezcano
> Signed-off-by: Sudip Mukherjee
A gentle ping. We still have the build failure with next-20151217. Build
log is at:
https://travis-ci.org/sudipm-mukherjee/parport/jobs/97388466
regards
sudip
--
To unsubscribe from this list: sen
Hi Tomasz,
[auto build test ERROR on v4.4-rc4]
[also build test ERROR on next-20151217]
[cannot apply to tip/irq/core v4.4-rc5]
url:
https://github.com/0day-ci/linux/commits/Tomasz-Nowicki/Introduce-ACPI-world-to-GICv3-ITS-irqchip/20151217-195910
config: i386-randconfig-s1-12171706 (attached
Precalculated hash for empty message are now present in hash headers.
This patch just use them.
Signed-off-by: LABBE Corentin
Tested-by: Tom Lendacky
Acked-by: Tom Lendacky
---
drivers/crypto/ccp/Kconfig | 2 ++
drivers/crypto/ccp/ccp-ops.c | 39 ---
2 fi
Precalculated hash for empty message are now present in hash headers.
This patch just use them.
Signed-off-by: LABBE Corentin
---
drivers/crypto/ux500/Kconfig | 2 ++
drivers/crypto/ux500/hash/hash_core.c | 20 ++--
2 files changed, 4 insertions(+), 18 deletions(-)
dif
101 - 200 of 834 matches
Mail list logo
