On Thu, Dec 10, 2015 at 05:58:20PM +, Juri Lelli wrote:
> On 10/12/15 15:30, Mark Brown wrote:
> > On Mon, Nov 23, 2015 at 08:06:31PM -0600, Rob Herring wrote:
> > > In other words, I want to see these numbers have a defined method
> > > of determining them and don't want to see random values
Address Space Layout Randomization (ASLR) provides a barrier to exploitation of
user-space processes in the presence of security vulnerabilities by making it
more difficult to find desired code/data which could help an attack. This is
done by adding a random offset to the location of regions in
From: dcashman
x86: arch_mmap_rnd() uses hard-coded values, 8 for 32-bit and 28 for
64-bit, to generate the random offset for the mmap base address.
This value represents a compromise between increased ASLR
effectiveness and avoiding address-space fragmentation. Replace it
with a Kconfig option,
From: dcashman
ASLR only uses as few as 8 bits to generate the random offset for the
mmap base address on 32 bit architectures. This value was chosen to
prevent a poorly chosen value from dividing the address space in such
a way as to prevent large allocations. This may not be an issue on all
pl
On 12/11/2015 09:35 AM, Chris Mason wrote:
On Thu, Dec 10, 2015 at 10:36:17AM -0600, Jon Christopherson wrote:
Dave Jones sent in a report about this with trinity too, I'm digging in
today. Since you can trigger this reliably, what was the last
known-good kernel for you?
-chris
Hello,
On Thu, Dec 10, 2015 at 06:01:59PM +, Juri Lelli wrote:
> On 10/12/15 15:59, Mark Brown wrote:
> > On Thu, Dec 10, 2015 at 02:15:04PM +, Dietmar Eggemann wrote:
> > > On 23/11/15 14:28, Juri Lelli wrote:
> > > > The new attribute shows up as:
> > > > /sys/devices/system/cpu/cpu*/cpu_capa
Andrey Ryabinin writes:
> On 12/11/2015 04:36 PM, Peter Zijlstra wrote:
>> On Fri, Dec 11, 2015 at 02:25:51PM +0100, Peter Zijlstra wrote:
>>> On Fri, Dec 11, 2015 at 03:55:18PM +0300, Andrey Ryabinin wrote:
Make 'r' 64-bit type to avoid overflow in 'r * LOAD_AVG_MAX'
on 32-bit systems:
On Fri, Dec 11, 2015 at 05:00:01PM +0300, Andrey Ryabinin wrote:
>
>
> On 12/11/2015 04:36 PM, Peter Zijlstra wrote:
> > On Fri, Dec 11, 2015 at 02:25:51PM +0100, Peter Zijlstra wrote:
> >> On Fri, Dec 11, 2015 at 03:55:18PM +0300, Andrey Ryabinin wrote:
> >>> Make 'r' 64-bit type to avoid overfl
On 11/12/15 11:39, Peter Zijlstra wrote:
> On Fri, Dec 11, 2015 at 03:30:33AM -0800, Paul Turner wrote:
>
>>> Blergh, all I've managed to far is to confuse myself further. Even
>>> something like the original (+- the EINTR) should work when we consider
>>> the looping, even when mixed with an occa
Vineet,
On 11/12/15 12:20, Vineet Gupta wrote:
> Hi Marc,
>
> On Friday 11 December 2015 04:53 PM, Marc Zyngier wrote:
>> On Fri, 11 Dec 2015 05:26:02 +
>>> I think we can make percpu irq API a bit easier to use.
>>>
>>> (1) First thing which request_percpu_irq() does is check for
>>> irq_set
On 12/11/2015 09:22 AM, Christoph Hellwig wrote:
> Hi Bart,
>
> thanks for all the reviews. I've updated the git branch with your
> suggestions and reviewed-by tags. I'm going to wait a little bit
> longer for other reviews to come in before reposting the series.
Indeed, thanks for all the catc
On Fri, Dec 11, 2015 at 7:08 PM, Tejun Heo wrote:
> Hello, Nikolay.
>
> On Fri, Dec 11, 2015 at 05:57:22PM +0200, Nikolay Borisov wrote:
>> So I had a server with the patch just crash on me:
>>
>> Here is how the queue looks like:
>> crash> struct workqueue_struct 0x8802420a4a00
>> struct wor
From: dcashman
arm: arch_mmap_rnd() uses a hard-code value of 8 to generate the
random offset for the mmap base address. This value represents a
compromise between increased ASLR effectiveness and avoiding
address-space fragmentation. Replace it with a Kconfig option, which
is sensibly bounded,
Hi Linus,
Please pull the arm64 fixes below. Thank you.
The following changes since commit 527e9316f8ec44bd53d90fb9f611fa752bb9:
Linux 4.4-rc4 (2015-12-06 15:43:12 -0800)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux tags/arm64-fixes
Le 11/12/2015 13:08, SF Markus Elfring a écrit :
How does the text length distribution look like for the used jump targets?
╔╤═══╗
║ length │ incidence ║
╠╪═══╣
║ 1 │ 2 ║
║ 2 │29 ║
║ 3 │ 10640 ║
║ 4 │ 3564 ║
║ 5 │
From: dcashman
arm64: arch_mmap_rnd() uses STACK_RND_MASK to generate the
random offset for the mmap base address. This value represents a
compromise between increased ASLR effectiveness and avoiding
address-space fragmentation. Replace it with a Kconfig option, which
is sensibly bounded, so tha
On Fri, Dec 11, 2015 at 12:42 AM, Paolo Bonzini wrote:
>
>
> On 11/12/2015 08:52, Ingo Molnar wrote:
>>
>> * Paolo Bonzini wrote:
>>>
>>> Reviewed-by: Paolo Bonzini
>>
>> Thanks. I've added your Reviewed-by to the 1/5 patch as well - to be able to
>> put
>> the whole series into the tip:x86/en
On Thu, Dec 10, 2015 at 03:52:46PM +0900, Hidehiro Kawai wrote:
> Now, multiple CPUs can receive external NMI simultaneously by
> specifying "apic_extnmi=all" as an boot option. When we take a
> crash dump by using external NMI with this option, we fail to save
> register values into the crash dum
The v3020_chip_ops structures are never modified, so declare them as const.
Done with the help of Coccinelle.
Signed-off-by: Julia Lawall
---
drivers/rtc/rtc-v3020.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/rtc/rtc-v3020.c b/drivers/rtc/rtc-v3020.c
i
* Yang Shi | 2015-12-10 10:58:51 [-0800]:
>When running some ptrace single step tests on x86-32 machine, the below problem
>is triggered:
>
>BUG: sleeping function called from invalid context at
>linux-rt/kernel/locking/rtmutex.c:917
>in_atomic(): 1, irqs_disabled(): 0, pid: 1041, name: dummy2
>I
Hi Matthew,
On 12/05/2015 09:48 AM, Mathieu Desnoyers wrote:
> Hi Michael,
>
> Please find the membarrier man groff file attached. I re-integrated
> some changes that went in initially only in the changelog text version
> back onto this groff source.
>
> Please let me know if you find any issue
On Wed, Dec 09, 2015 at 04:48:55PM -0800, Dan Williams wrote:
>
> Yes, still very much interested in this path. But the code will need
> to be around for quite awhile now that it has appeared in a released
> kernel and a released version of ndctl. So anything that makes the
> code more maintaina
On Fri, 11 Dec 2015 14:45:41 +
Russell King - ARM Linux wrote:
> On Fri, Dec 11, 2015 at 09:31:25AM -0500, Steven Rostedt wrote:
> > On Fri, 11 Dec 2015 12:09:03 +
> > Russell King wrote:
> >
> > > recordmcount edits the file in-place, which can cause problems when
> > > using ccache
On Wed, Dec 9, 2015 at 10:04 AM, Jeffy Chen wrote:
> The pinctrl of rk3228 is much the same as rk3288's, but
> without pmu.
>
> Signed-off-by: Jeffy Chen
Patch applied with Heiko's and Rob's Review/ACKs.
Yours,
Linus Walleij
--
To unsubscribe from this list: send the line "unsubscribe linux-ke
On Fri, Dec 11, 2015 at 2:30 AM, Jeffy Chen wrote:
> The pinctrl of rk3228 is much the same as rk3288's, but
> without pmu.
>
> Signed-off-by: Jeffy Chen
> Reviewed-by: Heiko Stuebner
> Acked-by: Rob Herring
>
> ---
>
> Changes in v2: None
Same as I applied then, I also added the same Review/
On 11 December 2015 at 06:36, Alexander Shishkin
wrote:
> Many instruction trace pmus out there support address range-based
> filtering, which would, for example, generate trace data only for a
> given range of instruction addresses, which is useful for tracing
> individual functions, modules or l
2mA drive strength is not enough when we connect multiple i2c devices
on the bus with different pull up resistors.
This issue was detected when multiple i2c devices connected on the other side
of level shifters on Linaro sensor board. Maxing up to 16mA made i2c much
stable.
Signed-off-by: Sriniv
This patch fixes the i2c bus number aliasing so that it matches with the
schematics bus naming.
Without this patch the user might would get bus numbers depending on
the order the devices are probed.
Signed-off-by: Srinivas Kandagatla
---
arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 3 +++
1 file
On Fri, 11 Dec 2015 18:35:59 +0100
Julia Lawall wrote:
> This bpf_verifier_ops structure is never modified, like the other
> bpf_verifier_ops structures, so declare it as const.
>
> Done with the help of Coccinelle.
Thanks, I'll add this to my 4.5 queue.
-- Steve
>
> Signed-off-by: Julia Law
Hi Andy,
Here are two i2c dt fixes which I have been using for long time on Landing team
tree.
Can you please consider fixes for v4.5.
Thanks,
srini
Srinivas Kandagatla (2):
arm64: dts: fix the i2c aliasing to match to schematics.
arm64: dts: set the default i2c pin drive strength to 16mA
On 11 December 2015 at 06:36, Alexander Shishkin
wrote:
> Newer versions of Intel PT support address ranges, which can be used to
> define IP address range-based filters or TraceSTOP regions. Number of
> ranges in enumerated via cpuid.
>
> This patch implements pmu callbacks and related low-level
Hi Eric,
Am 04.12.2015 um 18:45 schrieb Eric Anholt:
From: Alexander Aring
This patch adds support for several power domains on Raspberry Pi,
including USB (so it can be enabled even if the bootloader didn't do
it), and graphics.
This patch is the combined work of Eric Anholt (who wrote USB s
copy_to_user() and copy_from_user() functions expect the user space
pointers to be marked with __user. Sparse throws following warnings.
For copy_to_user():
warning: incorrect type in argument 1 (different address spaces)
expected void [noderef] *to
got void *buf
For copy_from_user():
warning:
On Fri, Dec 11, 2015 at 06:35:59PM +0100, Julia Lawall wrote:
> This bpf_verifier_ops structure is never modified, like the other
> bpf_verifier_ops structures, so declare it as const.
>
> Done with the help of Coccinelle.
>
> Signed-off-by: Julia Lawall
Acked-by: Alexei Starovoitov
Ingo, can
On 12/11/2015 06:35 PM, Julia Lawall wrote:
This bpf_verifier_ops structure is never modified, like the other
bpf_verifier_ops structures, so declare it as const.
Done with the help of Coccinelle.
Signed-off-by: Julia Lawall
Thanks Julia!
Acked-by: Daniel Borkmann
--
To unsubscribe from th
On Fri, Dec 11, 2015 at 10:09 AM, Jerry Hoemann wrote:
> On Wed, Dec 09, 2015 at 04:48:55PM -0800, Dan Williams wrote:
>> Yes, updating the acpi_evaluate_dsm() definition seems the best choice.
>>
>
> I have a patch for this. While not big (6 files), these files are
> outside of nvdimm and will h
On Fri, Dec 11, 2015 at 01:12:56PM -0500, Steven Rostedt wrote:
> On Fri, 11 Dec 2015 18:35:59 +0100
> Julia Lawall wrote:
>
> > This bpf_verifier_ops structure is never modified, like the other
> > bpf_verifier_ops structures, so declare it as const.
> >
> > Done with the help of Coccinelle.
>
On Fri, Dec 11, 2015 at 08:39:35PM +0800, pi3orama wrote:
> > static u64 (*bpf_ktime_get_ns)(void) =
> > (void *)5;
> > static int (*bpf_trace_printk)(const char *fmt, int fmt_size, ...) =
> > (void *)6;
> > static int (*bpf_get_smp_processor_id)(void) =
> > (void *)8;
> > static int (*
From: Markus Elfring
Date: Fri, 11 Dec 2015 19:12:34 +0100
A few update suggestions were taken into account from static
source code analysis.
Markus Elfring (2):
zram: Less checks in zram_bvec_write() after error detection
z2ram: Delete a jump label in z2_init()
drivers/block/z2ram.c
From: Markus Elfring
Date: Fri, 11 Dec 2015 18:20:59 +0100
This issue was detected by using the Coccinelle software.
A few checks could be repeated by the zram_bvec_write() function
at two places even if the passed variables contained a null pointer.
* This implementation detail could be improv
From: Markus Elfring
Date: Fri, 11 Dec 2015 18:48:14 +0100
This issue was detected by using the Coccinelle software.
* Let us return directly if a call of the function "register_blkdev" failed.
* Remove the jump label "err" then.
Signed-off-by: Markus Elfring
---
drivers/block/z2ram.c | 4 +-
Hi Andy,
Here are 3 patches for smem/hwspinlock which I have tested with QDSP on IFC6410.
Also a fix from Ivan which I think can be taken aswell.
Thanks,
srini
Ivan T. Ivanov (1):
ARM: dts: qcom: apq8064-ifc6410 Use hardware flow control for GSBI6
Srinivas Kandagatla (3):
arm: dts: apq8064
Destroy mc_io in error path in dprc_probe() only if the mc_io was
created in this function.
Signed-off-by: J. German Rivera
---
CHANGE HISTORY
Changes in v4: none
Changes in v3: none
Changes in v2:
- Addressed comment from Dan Carpenter:
* Renamed goto error labels to indicate what the goto
On Fri, Dec 11, 2015 at 01:36:01PM +, Jason Cooper wrote:
> +Josh
>
> Hey Arnd, Detlef,
>
> On Fri, Dec 11, 2015 at 12:10:55AM +0100, Arnd Bergmann wrote:
> > On Thursday 10 December 2015 23:00:24 Detlef Vollmann wrote:
> > > On 12/10/15 22:29, Arnd Bergmann wrote:
> > > > On Thursday 10 Dece
FSL-MC is a bus type different from PCI and platform, so it needs
its own member in the msi_desc's union.
Signed-off-by: J. German Rivera
---
CHANGE HISTORY
Changes in v4: none
Changes in v3: none
Changes in v2:
- Addressed comment from Jiang Liu
* Added a dedicated structure for FSL-MC in s
All the IRQs for DPAA2 objects in the same DPRC must use
the ICID of that DPRC, as their device Id in the GIC-ITS.
Thus, all these IRQs must share the same ITT table in the GIC.
As a result, a pool of IRQs with the same device Id must be
preallocated per DPRC (fsl-mc bus instance). So, the fsl-mc
b
This patch series addresses the following item from the TODO list
for the MC bus driver to exit staging:
* Interrupt support. For meaningful driver support we need
interrupts, and thus need message interrupt support by the bus
driver.
MC Bus MSI Support Architecture
==
Scan the corresponding DPRC container to get total count
of IRQs needed by all its child DPAA2 objects. Then,
preallocate a set of MSI IRQs with the DPRC's ICID
(GIT-ITS device Id) to populate the the DPRC's IRQ pool.
Each child DPAA2 object in the DPRC and the DPRC object itself
will allocate thei
Added platform-specific MSI support layer for FSL-MC devices.
Signed-off-by: J. German Rivera
---
CHANGE HISTORY
Changes in v4:
- Addressed comments from Marc Zyngier:
* Moved bus type check earlier in its_fsl_mc_msi_prepare()
* Removed its_dev_id variable
* Changed some assignments to kee
Since an FSL-MC bus is a new bus type that is neither PCI nor
PLATFORM, we need a new domain bus token to disambiguate the
IRQ domain for FSL-MC MSIs.
Signed-off-by: J. German Rivera
---
CHANGE HISTORY
Changes in v4: none
Changes in v3: none
Changes in v2: none
include/linux/irqdomain.h | 1
The DPRC built-in portal's mc_io is used to send commands to the MC
to program MSIs for MC objects. This is done by the
fsl_mc_msi_write_msg() callback, which is invoked by the generic MSI
layer with interrupts disabled. As a result, the mc_io used in
fsl_mc_msi_write_msg needs to be an atomic mc_i
THE MSI domain associated with a root DPRC object is
obtained form the device tree. Child DPRCs inherit
the parent DPRC MSI domain.
Signed-off-by: J. German Rivera
---
CHANGE HISTORY
Changes in v4:
- Addressed comments from Marc Zyngier:
* Changed call to fsl_mc_find_msi_domain() to match new
The interrupt handler for DPRC IRQs is added. DPRC IRQs are
generated for hot plug events related to DPAA2 objects in a given
DPRC. These events include, creating/destroying DPAA2 objects in
the DPRC, changing the "plugged" state of DPAA2 objects and moving
objects between DPRCs.
Signed-off-by: J.
Initialize/Cleanup ITS-MSI support for the MC bus driver at driver
init/exit time. Associate an MSI domain with each DPAA2 child device.
Signed-off-by: J. German Rivera
---
CHANGE HISTORY
Changes in v4: none
Changes in v3: none
Changes in v2: none
drivers/staging/fsl-mc/bus/mc-bus.c | 12 +++
From: "Ivan T. Ivanov"
GSBI6 UART module is connected to BT chip, which uses
hardware flow control lines. Enable them on SoC side.
Signed-off-by: Ivan T. Ivanov
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/
Created an MSI domain for the fsl-mc bus-- including functions
to create a domain, find a domain, alloc/free domain irqs, and
bus specific overrides for domain and irq_chip ops.
Signed-off-by: J. German Rivera
---
CHANGE HISTORY
Changes in v4:
- Addressed comments from Marc Zyngier:
* Re-imple
This patch adds the shared memory in the Device tree reserved memory
list so that kernel would not map it as normal memory.
Signed-off-by: Srinivas Kandagatla
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064.d
This patch adds support hwspinlock devicetree node.
Signed-off-by: Srinivas Kandagatla
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi
b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 09f0e27..829028a 10064
On 11/12/15 17:57, Morten Rasmussen wrote:
> On Fri, Dec 11, 2015 at 05:00:01PM +0300, Andrey Ryabinin wrote:
>>
>>
>> On 12/11/2015 04:36 PM, Peter Zijlstra wrote:
>>> On Fri, Dec 11, 2015 at 02:25:51PM +0100, Peter Zijlstra wrote:
On Fri, Dec 11, 2015 at 03:55:18PM +0300, Andrey Ryabinin wro
On Fri, Dec 11, 2015 at 01:10:29PM -0500, Steven Rostedt wrote:
> I ran it through most my tests (it's still running and is at 20 of 33
> tests). If there was anything wrong with this patch, I'm sure one of my
> tests would have crashed by now.
Thanks for testing.
> Do you want to take it, or sha
Hello.
On 12/11/2015 06:53 AM, Rob Herring wrote:
Sometimes there's a real OTG chip behind the USB ID signal mapped to a GPIO
pin: in my case it's Maxim Integrated MAX3355E which integrates Vbus charge
pump and comparators and passes thru the ID signal from an OTG connector.
This chip als
This patch adds support to qcom,smem device.
Signed-off-by: Srinivas Kandagatla
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi
b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 829028a..40dd6b4 100644
--- a/arch/ar
On Fri, 11 Dec 2015, Rob Herring wrote:
Hi Rob,
> > +Device Tree Example: Partial Reconfiguration with no Bridges
> > +
> > +
> > +Live Device Tree contains:
> > + fpgamgr@0 {
>
> Unit address should be ffd03000 here.
I'll clean up t
On Fri, Dec 11, 2015 at 10:27:30AM -0800, Josh Triplett wrote:
> On Fri, Dec 11, 2015 at 01:36:01PM +, Jason Cooper wrote:
> > +Josh
> >
> > Hey Arnd, Detlef,
> >
> > On Fri, Dec 11, 2015 at 12:10:55AM +0100, Arnd Bergmann wrote:
> > > On Thursday 10 December 2015 23:00:24 Detlef Vollmann wro
Well I can certainly send a patch but I wonder if simply using SRCU
for this one instance in Rik's original patch will not break anything
else. Rik, please provide your thoughts.
On Thu, Dec 10, 2015 at 9:26 PM, Paul E. McKenney
wrote:
> On Thu, Dec 10, 2015 at 03:57:09PM -0800, Ani Sinha wrote:
On Fri, 11 Dec 2015 18:33:27 +
Russell King - ARM Linux wrote:
> On Fri, Dec 11, 2015 at 01:10:29PM -0500, Steven Rostedt wrote:
> > I ran it through most my tests (it's still running and is at 20 of 33
> > tests). If there was anything wrong with this patch, I'm sure one of my
> > tests woul
On Fri, Dec 11, 2015 at 9:00 AM, Andy Shevchenko
wrote:
> On Wed, Dec 9, 2015 at 11:43 PM, Kees Cook wrote:
>> Several places in the kernel expect to use "on" and "off" for their
>> boolean signifiers, so add them to strtobool.
>>
>> Signed-off-by: Kees Cook
>> Cc: Rasmus Villemoes
>> Cc: Danie
Hi Mathieu,
On 12/10/2015 04:39 PM, Mathieu Desnoyers wrote:
> Expose a new system call allowing threads to register a userspace memory
> area where to store the current CPU number. Scheduler migration sets the
> TIF_NOTIFY_RESUME flag on the current thread. Upon return to user-space,
> a notify-r
On Fri, Dec 11, 2015 at 01:51:15PM -0500, Steven Rostedt wrote:
> On Fri, 11 Dec 2015 18:33:27 +
> Russell King - ARM Linux wrote:
>
> > On Fri, Dec 11, 2015 at 01:10:29PM -0500, Steven Rostedt wrote:
> > > I ran it through most my tests (it's still running and is at 20 of 33
> > > tests). If
On Fri 04 Dec 20:36 PST 2015, John Stultz wrote:
> This patch adds a dts file to support the Nexus7 2013
> device. Its based off of the qcom-apq8064-ifc6410.dts
> which is similar hardware.
>
> Also includes some comments and context folded in
> from Vinay Simha BN
>
> This is my first DTS subm
On Fri, Dec 11, 2015 at 10:18:59AM -0800, Dan Williams wrote:
> On Fri, Dec 11, 2015 at 10:09 AM, Jerry Hoemann wrote:
> > On Wed, Dec 09, 2015 at 04:48:55PM -0800, Dan Williams wrote:
> >> Yes, updating the acpi_evaluate_dsm() definition seems the best choice.
> >>
> >
> > I have a patch for this
On Tue, 2015-12-08 at 17:11 -0500, Joseph Salisbury wrote:
> Hello,
>
> Please consider including upstream commit
> e81107d4c6bd098878af9796b24edc8d4a9524fd
> in the next v3.13.y-ckt release. This commit was included mainline as of
> v4.3-rc5.
> It has been tested and confirmed to resolve
> ht
One thing I noticed in this section of code:
/* Handle all the breakpoints that were triggered */
for (i = 0; i < HBP_NUM; ++i) {
if (likely(!(dr6 & (DR_TRAP0 << i
continue;
... snip ...
if (bp->hw.info.t
On Fri, Dec 11, 2015 at 06:46:02PM +, Jason Cooper wrote:
> On Fri, Dec 11, 2015 at 10:27:30AM -0800, Josh Triplett wrote:
> > On Fri, Dec 11, 2015 at 01:36:01PM +, Jason Cooper wrote:
> > > +Josh
> > >
> > > Hey Arnd, Detlef,
> > >
> > > On Fri, Dec 11, 2015 at 12:10:55AM +0100, Arnd Ber
On Fri, 2015-12-11 at 11:33 +0800, Koro Chen wrote:
> From: PC Liao
>
> DPCM does not fully support symmetry attributes. soc_pcm_apply_symmetry()
> is skipped in soc_pcm_open() for DPCM, without being applied elsewhere.
> So HW parameters cannot be correctly limited, and user space can do
> playb
Hi Mark,
On 12/11/2015 11:41 AM, Mark Rutland wrote:
> Hi,
>
> On Fri, Dec 11, 2015 at 11:16:58AM -0500, Sinan Kaya wrote:
>> The Qualcomm Technologies HIDMA device has been designed to support
>> virtualization technology. The driver has been divided into two to follow
>> the hardware design.
>>
On Fri, Dec 11 2015 at 1:00pm -0500,
Nikolay Borisov wrote:
> On Fri, Dec 11, 2015 at 7:08 PM, Tejun Heo wrote:
> >
> > Hmmm... No idea why it didn't show up in the debug log but the only
> > way a workqueue could be in the above state is either it got
> > explicitly destroyed or somehow pwq re
Hey Josh,
On Fri, Dec 11, 2015 at 11:08:15AM -0800, Josh Triplett wrote:
> On Fri, Dec 11, 2015 at 06:46:02PM +, Jason Cooper wrote:
> > On Fri, Dec 11, 2015 at 10:27:30AM -0800, Josh Triplett wrote:
...
> > > No objection if you want to add it to the task list on
> > > tiny.wiki.kernel.org (o
On 12/04/2015 05:12 PM, Andy Lutomirski wrote:
> On Fri, Dec 4, 2015 at 7:08 AM, Michael Kerrisk (man-pages)
> wrote:
>> Hi Andy,
>>
>> I have applied your patch (below). Thanks for writing it.
>> But I have a question or two and a request.
>>
>> ===
>>
>> In the capabilities(7) page tehre is the
Dietmar Eggemann writes:
> On 11/12/15 17:57, Morten Rasmussen wrote:
>> On Fri, Dec 11, 2015 at 05:00:01PM +0300, Andrey Ryabinin wrote:
>>>
>>>
>>> On 12/11/2015 04:36 PM, Peter Zijlstra wrote:
On Fri, Dec 11, 2015 at 02:25:51PM +0100, Peter Zijlstra wrote:
> On Fri, Dec 11, 2015 at 03
On Fri, Dec 11, 2015 at 06:29:58PM +, Srinivas Kandagatla wrote:
> From: "Ivan T. Ivanov"
>
> GSBI6 UART module is connected to BT chip, which uses
> hardware flow control lines. Enable them on SoC side.
>
> Signed-off-by: Ivan T. Ivanov
Looks fine to me. Thanks for the patch.
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On Fri, Dec 11, 2015 at 06:33:09PM +, Srinivas Kandagatla wrote:
> This patch adds support to qcom,smem device.
>
> Signed-off-by: Srinivas Kandagatla
> ---
> arch/arm/boot/dts/qcom-apq8064.dtsi | 6 ++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-apq8064.dt
Acked-by: Tristan Schmelcher
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On Thu, Dec 10, 2015 at 02:39:15PM +0300, Vladimir Davydov wrote:
> memcg will come in handy in get_scan_count(). It can already be used for
> getting swappiness immediately in get_scan_count() instead of passing it
> around. The following patches will add more memcg-related values, which
> will be
On Fri, Dec 11, 2015 at 06:31:47PM +, Srinivas Kandagatla wrote:
> This patch adds the shared memory in the Device tree reserved memory
> list so that kernel would not map it as normal memory.
>
> Signed-off-by: Srinivas Kandagatla
Looks fine to me.
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On Thu, Dec 10, 2015 at 02:39:16PM +0300, Vladimir Davydov wrote:
> mem_cgroup_lruvec_online() takes lruvec, but it only needs memcg. Since
> get_scan_count(), which is the only user of this function, now possesses
> pointer to memcg, let's pass memcg directly to mem_cgroup_online()
> instead of pi
On Fri, Dec 11, 2015 at 06:32:11PM +, Srinivas Kandagatla wrote:
> This patch adds support hwspinlock devicetree node.
>
> Signed-off-by: Srinivas Kandagatla
Looks fine to me. Thanks for the patch.
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On Thu, Dec 10, 2015 at 02:39:17PM +0300, Vladimir Davydov wrote:
> The following patches will add more functions to the memcg section of
> include/linux/swap.h. Some of them will need values defined below the
> current location of the section. So let's move the section to the end of
> the file. No
On Thu, Dec 10, 2015 at 02:39:18PM +0300, Vladimir Davydov wrote:
> We don't scan anonymous memory if we ran out of swap, neither should we
> do it in case memcg swap limit is hit, because swap out is impossible
> anyway.
>
> Signed-off-by: Vladimir Davydov
Acked-by: Johannes Weiner
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On Fri, 11 Dec 2015 18:58:09 +
Russell King - ARM Linux wrote:
> Oops, sorry. "makes more sense if *you* take it" was what I thought I
> typed!
>
OK, will do.
Thanks!
-- Steve
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If there is 'no suitable DMA available' error, device should be disabled
before returning
Signed-off-by: Saurabh Sengar
---
drivers/net/wan/wanxl.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/wan/wanxl.c b/drivers/net/wan/wanxl.c
index e73f138..a20d688 100644
--- a/drivers/ne
Copy the existing page fault fixup mechanisms to create a new table
to be used when fixing machine checks. Note:
1) At this time we only provide a macro to annotate assembly code
2) We assume all fixups will in code builtin to the kernel.
3) Only for x86_64
4) New code under CONFIG_MCE_KERNEL_RECOV
This series is initially targeted at the folks doing filesystems
on top of NVDIMMs. They really want to be able to return -EIO
when there is a h/w error (just like spinning rust, and SSD does).
I plan to use the same infrastructure in parts 1&2 to write a
machine check aware "copy_from_user()" tha
Extend the severity checking code to add a new context IN_KERN_RECOV
which is used to indicate that the machine check was triggered by code
in the kernel with a fixup entry.
Add code to check for this situation and respond by altering the return
IP to the fixup address and changing the regs->ax so
Using __copy_user_nocache() as inspiration create a memory copy
routine for use by kernel code with annotations to allow for
recovery from machine checks.
Notes:
1) Unlike the original we make no attempt to copy all the bytes
up to the faulting address. The original achieves that by
re-execu
On Thu, Dec 10, 2015 at 02:39:19PM +0300, Vladimir Davydov wrote:
> Swap cache pages are freed aggressively if swap is nearly full (>50%
> currently), because otherwise we are likely to stop scanning anonymous
> when we near the swap limit even if there is plenty of freeable swap
> cache pages. We
Hello,
Running
scripts/checkpatch.pl -f drivers/usb/host/ehci-sched.c
I got this
...
ERROR: spaces required around that ':' (ctx:VxE)
#496: FILE: drivers/usb/host/ehci-sched.c:496:
+ default:
...
496:default:
ehci_dbg (ehci,
On Wed, 09 Dec 2015 16:09:38 +1100
Michael Ellerman wrote:
> I suspect because my /bin/sh is dash?
>
> # /bin/dash
> # kill -1
> /bin/dash: 1: kill: Usage: kill [-s sigspec | -signum | -sigspec] [pid |
> job]... or
> kill -l [exitstatus]
>
I did some digging and found a better way to do this.
> >> diff --git a/Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt
> >> b/Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt
> >> new file mode 100644
> >> index 000..b632635
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt
> >> @@ -0,0 +1
Hi Peter,
On Fri, 11 Dec 2015 15:10:28 +0100
Peter Zijlstra wrote:
[...]
> Thomas just reported a 'fun' problem with our rt 'load-balancer'.
I suspect the root of the proble is that rt push/pull do not implement
a load balancer, but just make sure that the M high priority tasks
(where M is the nu
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