The CRG(Clock and Reset Generator) block provides clock
and reset signals for other modules in hi3519 soc.
Signed-off-by: Jiancheng Xue
---
drivers/clk/hisilicon/Kconfig| 7 ++
drivers/clk/hisilicon/Makefile | 2 +
drivers/clk/hisilicon/clk-hi3519.c | 95
On Tuesday 01 December 2015 06:59 PM, Marc Zyngier wrote:
>> +static int nps400_irq_map(struct irq_domain *d, unsigned int irq,
>> > +irq_hw_number_t hw)
>> > +{
>> > + switch (irq) {
>> > + case TIMER0_IRQ:
>> > +#if defined(CONFIG_SMP)
>> > + case IPI_IRQ:
>> > +#endif
>> >
Hi Laura,
> drivers/net/wireless/intel/iwlwifi/mvm/sta.c:1226 suspicious
> rcu_dereference_protected() usage!
> If I revert 9513c5e18a0dc55a1fc9c890715098ba2315830b
> (iwlwifi: mvm: Avoid dereferencing sta if it was already flushed)
> The warning goes away. Known issue?
Thanks for the report -
add hi3519 debug uart.
Signed-off-by: Jiancheng Xue
---
arch/arm/Kconfig.debug | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 259c0ca..29af057 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -270,6 +270,14
On 11.12.2015 16:52, Chanwoo Choi wrote:
> Dear MyungJoo,
>
> Almost device tree patches in this series are reviewed by Exynos maintainer.
> Could you please review this series?
Are there any objections to merging DT patches through Samsung-soc?
Looking at the code, there are no dependencies bet
Hello,
Hi3519 soc is mainly used for ip camera and sport DV solutions. This patchset
adds initial support
for Hi3519 soc. It includes clock driver, arch configuration, debug uart
configuration and device tree.
It has been tested on hi3519 reference board.
Spi-nor flash driver and other peripher
add dts files for Hi3519
Signed-off-by: Jiancheng Xue
---
arch/arm/boot/dts/Makefile| 2 +
arch/arm/boot/dts/hi3519-demb.dts | 42 +++
arch/arm/boot/dts/hi3519.dtsi | 142 ++
3 files changed, 186 insertions(+)
create mode 100644 arch/ar
Add device tree bindings for Hi3519 system controller.
Signed-off-by: Jiancheng Xue
---
Documentation/devicetree/bindings/mfd/hi3519.txt | 14 ++
1 file changed, 14 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mfd/hi3519.txt
diff --git a/Documentation/devicetr
I have completed testing of the following patch, added the fix and log
a message when the error occurs. I also reviewed the code paths that
touch this section of code. The lazy debug register behaviors pass
state back and forth with this subsystem through the thread.debugred6
virtualized register
* Andy Lutomirski wrote:
> diff --git a/arch/x86/include/asm/fixmap.h b/arch/x86/include/asm/fixmap.h
> index f80d70009ff8..6d7d0e52ed5a 100644
> --- a/arch/x86/include/asm/fixmap.h
> +++ b/arch/x86/include/asm/fixmap.h
> @@ -19,7 +19,6 @@
> #include
> #include
> #include
> -#include
> #
add dt-binding document for Hi3519 CRG block
Signed-off-by: Jiancheng Xue
---
.../devicetree/bindings/clock/hi3519-crg.txt | 46 ++
1 file changed, 46 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/hi3519-crg.txt
diff --git a/Documentation/de
If read_node_page return LOCKED_PAGE, in its caller it's better a) skip
unneeded 'Update' flag and mapping info verfication; b) check nid value
stored in footer structure of node page.
Signed-off-by: Chao Yu
---
fs/f2fs/node.c | 26 +++---
1 file changed, 15 insertions(+), 11
Do more sanity check for superblock during ->mount.
Signed-off-by: Chao Yu
---
fs/f2fs/super.c | 98 +
1 file changed, 98 insertions(+)
diff --git a/fs/f2fs/super.c b/fs/f2fs/super.c
index 5434186..624fc2c 100644
--- a/fs/f2fs/super.c
+++
* Namhyung Kim wrote:
> IIRC David said that thread per cpu seems too much especially on a large
> system
> (like ~1024 cpu). [...]
Too much in what fashion? For recording I think it's the fastest, most natural
model - anything else will create cache line bounces.
For perf report, I suspect
On Wed, Dec 09, 2015 at 12:52:58AM +0100, Nicolas Iooss wrote:
> On 12/09/2015 12:28 AM, Emil Velikov wrote:
> > On 8 December 2015 at 22:12, Nicolas Iooss
> > wrote:
> >> drm_dev_set_unique() uses a format string to define the unique name of a
> >> device. This feature is not used as currently
Thanks Valentin.
Ironically I first noticed the spelling mistake in the original UBSAN
patchset[1], but wanted it to work on powerpc straight away so I went
with the mis-spelled version. It's since been corrected upstream[2]; and
I was going to spin a v2 of my original patch with this fix, especia
Add device ID 0x1604 for Broadwell to commit cb171f7abb9a ("PNP:
Work around BIOS defects in Intel MCH area reporting").
>From a Lenovo ThinkPad T550:
system 00:01: [io 0x1800-0x189f] could not be reserved
system 00:01: [io 0x0800-0x087f] has been reserved
system 00:01: [io 0x0880-0x08ff
From: Johannes Berg
Properly protect the RCU dereference in iwl_mvm_get_key_sta_id() when
coming from iwl_mvm_update_tkip_key() which cannot hold the mvm->mutex
by moving the call into the RCU critical section.
Modify the check to use rcu_dereference_check() to permit this.
Fixes: 9513c5e18a0d (
* Alexei Starovoitov wrote:
> On Thu, Dec 10, 2015 at 10:02:51AM +0100, Peter Zijlstra wrote:
> > On Wed, Dec 09, 2015 at 07:54:35PM -0800, Alexei Starovoitov wrote:
> > > Freeing memory is a requirement regardless.
> > > Even when kernel running with kasan, there must be a way to stop
> > > sta
Brian,
On Thu, Dec 10, 2015 at 12:20:52PM -0800, Brian Norris wrote:
> On Fri, Dec 04, 2015 at 11:35:28PM +0100, Antoine Tenart wrote:
> > The JEDEC standard defines the JEDEC parameter page data structure.
> > One page plus two redundant pages are always there, in bits 0-1535.
> > Additionnal red
drivers/staging/lustre/lustre/osc/osc_cache.c:622:19: warning: symbol
'osc_extent_find' was not declared. Should it be static?
drivers/staging/lustre/lustre/osc/osc_cache.c:1423:6: warning: symbol
'osc_unreserve_grant' was not declared. Should it be static?
Signed-off-by: Jandy Gou
---
drivers/s
On 10/12/15 22:57, Philip Elcan wrote:
>
> On 12/07/2015 03:30 AM, Adrian Hunter wrote:
>> On 04/12/15 17:40, Philip Elcan wrote:
>>> On 12/03/2015 09:14 AM, Adrian Hunter wrote:
On 03/12/15 15:48, Philip Elcan wrote:
> This allows setting an SDHC controller as non-removable
> by usin
Hi Linus
I will try to review it before end of next week
Patrice
On 12/10/2015 06:08 PM, Linus Walleij wrote:
On Tue, Dec 1, 2015 at 10:53 AM, Maxime Coquelin
wrote:
2015-10-17 19:23 GMT+02:00 Maxime Coquelin :
This patch adds pinctrl and GPIO support to STMicroelectronic's STM32
family o
Hi,
On Thu, Dec 10, 2015 at 09:31:59PM +0100, Karsten Merker wrote:
> The Olimex A20-SOM-EVB is an evaluation board for the Olimex
> A20-SOM system-on-module. It provides a set of android-style
> buttons (labeled "VOL+", "VOL-", "MENU", "SEARCH", "HOME", "ESC"
> and "ENTER") which are connected t
Signed-off-by: Maxime Coquelin
---
.../bindings/pinctrl/st,stm32-pinctrl.txt | 126 +
1 file changed, 126 insertions(+)
create mode 100644
Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt
diff --git a/Documentation/devicetree/bindings/pinctrl/st,stm32
This patch adds pinctrl and GPIO support to STMicroelectronic's STM32
family of MCUs.
While it only supports STM32F429 for now, it has been designed to enable
support of other MCUs of the family (e.g. STM32F746).
Signed-off-by: Maxime Coquelin
---
drivers/pinctrl/Kconfig |
The STM32F429 MCU has 11 GPIO banks, with 16 pins per bank.
Signed-off-by: Maxime Coquelin
---
arch/arm/boot/dts/stm32f429.dtsi | 97
1 file changed, 97 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index
This patch selects USART1 pin configuration on PA9/PA10 pins
for both Eval and Disco boards.
Acked-by: Linus Walleij
Signed-off-by: Maxime Coquelin
---
arch/arm/boot/dts/stm32429i-eval.dts | 2 ++
arch/arm/boot/dts/stm32f429-disco.dts | 2 ++
arch/arm/boot/dts/stm32f429.dtsi | 13 ++
Acked-by: Linus Walleij
Signed-off-by: Maxime Coquelin
---
arch/arm/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 4d2fcba..365714b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -963,6 +963,7 @@ config ARCH_STM32
select ARC
Acked-by: Linus Walleij
Signed-off-by: Maxime Coquelin
---
arch/arm/configs/stm32_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/stm32_defconfig b/arch/arm/configs/stm32_defconfig
index 4725fab..92ade2e 100644
--- a/arch/arm/configs/stm32_defconfig
+++ b/arch/arm/
2015-12-11 9:20 GMT+01:00 Patrice Chotard :
> Hi Linus
>
> I will try to review it before end of next week
Thanks Patrice, I resent the series.
Regards,
Maxime
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To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
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More maj
Signed-off-by: Maxime Coquelin
---
arch/arm/boot/dts/stm32429i-eval.dts | 17 +
arch/arm/boot/dts/stm32f429-disco.dts | 11 +++
2 files changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/stm32429i-eval.dts
b/arch/arm/boot/dts/stm32429i-eval.dts
index 71fe17a..e392
Signed-off-by: Maxime Coquelin
---
include/dt-bindings/pinctrl/pinctrl-stm32.h | 12 +
include/dt-bindings/pinctrl/stm32f429-pinfunc.h | 1241 +++
2 files changed, 1253 insertions(+)
create mode 100644 include/dt-bindings/pinctrl/pinctrl-stm32.h
create mode 100644 incl
For MLC NAND, paired page issue is now a common known issue.
This patch is just for master node cannot be recovered while
there will two pages be damaged in one single master node block.
As for this patch, if there are more than one page data in
master node block being damaged, and as long as exist
Hi Linus, Patrice,
I resend the series for Patrice to review it.
Thanks,
Maxime
This is the third round of STM32 pinctrl series, which improves DT
bindings declaration and documentation, and also fixes some commit fixup
issues. The series also contains two more patches, adding GPIO LEDs
suppor
This patch introduces the MACH_STM32F429 to make possible to only select
STM32F429 pinctrl driver.
By default, all the MACH_STM32Fxxx flags will be set with STM32 defconfig.
Signed-off-by: Maxime Coquelin
---
arch/arm/Kconfig | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/Kco
We were getting build warning about unused variables "vpd_pg83" and "d"
Fixes: 83ea0e5e3501 ("scsi_dh_alua: use scsi_vpd_tpg_id()")
Cc: Hannes Reinecke
Signed-off-by: Sudip Mukherjee
---
build warning with next-20151211 and build log is at:
https://travis-ci.org
On 2015년 12월 11일 16:20, Krzysztof Kozlowski wrote:
> On 11.12.2015 14:07, Chanwoo Choi wrote:
>> THis patch adds the bus device tree nodes for both MIF (Memory) and INT
>> (Internal) block to enable the bus frequency.
>>
>> The DMC bus is parent device in MIF block using VDD_MIF and the LEFTBUS
>>
On 12/11/2015 09:36 AM, Sudip Mukherjee wrote:
We were getting build warning about unused variables "vpd_pg83" and "d"
Fixes: 83ea0e5e3501 ("scsi_dh_alua: use scsi_vpd_tpg_id()")
Cc: Hannes Reinecke
Signed-off-by: Sudip Mukherjee
---
build warning with next-20151
Hi Noam,
On Thu, Dec 10, 2015 at 04:33:39PM +, Noam Camus wrote:
> Please see
> https://lkml.org/lkml/2015/8/3/806
> Why I added private accessors.
Greg is not saying anything about the iotype checking there? Looks
more like confusion about what exactly is that patch trying to
achieve. I thin
Hi Lee,
On Fri, Nov 27, 2015 at 2:43 PM, Chen-Yu Tsai wrote:
> Hi everyone,
>
> This is v5 of the AXP223 PMIC series. v5 cleans up the code before and
> after the axp20x split, as suggested by Andy.
Any chance you could merge this series (patches 1~7) for 4.5?
The DTS patches can't be merged wi
On Fri, Dec 11, 2015 at 3:31 PM, Alexander Shishkin
wrote:
> Chunyan Zhang writes:
>
>> sw_end represents the last software master, sw_start is index of the
>> first master, so the number of software masters should be
>> sw_end - sw_start + 1.
>
> Looks about right, but it needs to be in two sepa
On Thu, Dec 10, 2015 at 08:51:34PM -0800, Andrew Pinski wrote:
> So looking further I think I understand what is going wrong and why
> c55a6ffa6285e29f874ed403979472631ec70bff is incorrect.
The osq_wait_next() call in osq_lock() is when we fail the lock. This is
effectively trylock() semantics an
On 11/12/2015 08:52, Ingo Molnar wrote:
>
> * Paolo Bonzini wrote:
>
>>
>>
>> On 10/12/2015 00:12, Andy Lutomirski wrote:
>>> From: Andy Lutomirski
>>>
>>> The pvclock vdso code was too abstracted to understand easily and
>>> excessively paranoid. Simplify it for a huge speedup.
>>>
>>> This
On 12/11/2015 02:02 PM, Xiangliang Yu wrote:
Because of some hardware limitation, AMD I2C controller can't
trigger pending interrupt if interrupt status has been changed
after clearing interrupt status bits. Then, I2C will lost
interrupt and IO timeout.
According to hardware design, this patch i
Hi Tejun,
> Patches just got merged into mainline. Please let me know if the
> current git master doesn't fix the issue.
Seems to have worked - I don't see the kernel hangs anymore. What remains
are problems with DRI/DRM, but I will report separately.
Thanks a lot
Norbert
Hi Brian,
On Thu, Dec 10, 2015 at 9:54 PM, Brian Norris
wrote:
> On Sat, Dec 05, 2015 at 11:15:54AM +0100, Geert Uytterhoeven wrote:
>> On Sat, Dec 5, 2015 at 6:19 AM, Brian Norris
>> wrote:
>> > There have been several discussions [1] about adding a device tree binding
>> > for
>> > associatin
Explicitly set the transmit data level on the transceiver to 16 samples
rather then the default 0. This matches both the level set in the vendor
kernel and the (seemingly very similar) i2s engine. This fixes audio
glitches when playing back at 192k rate.
At the same time, fix a trivial typo in the
On Thu, Dec 10, 2015 at 04:08:08PM +0100, Gregory CLEMENT wrote:
> Hi Sascha,
>
> On jeu., déc. 10 2015, Sascha Hauer wrote:
>
> > Hi Gregory,
> >
> > On Wed, Dec 09, 2015 at 06:49:43PM +0100, Gregory CLEMENT wrote:
> >> With device tree it is no more possible to reset the PHY at board
> >> le
On Thu, Dec 10, 2015 at 04:14:17PM -0800, K. Y. Srinivasan wrote:
> The hv_fc_wwn_packet is exchanged over vmbus. Make the definition in Linux
> match
> the Window's definition.
>
> Signed-off-by: K. Y. Srinivasan
> Reviewed-by: Long Li
> Tested-by: Alex Ng
> ---
> drivers/scsi/storvsc_drv.c
Are there any other issues except empty changelog that I have to fix before v5?
2015-12-05 19:06 GMT+03:00 Greg KH :
> On Sat, Dec 05, 2015 at 01:54:49PM +0300, Matwey V. Kornilov wrote:
>> Signed-off-by: Matwey V. Kornilov
>
> Why?
>
> Please say so in the changelog.
>
> thanks,
>
> greg k-h
>
Chunyan Zhang writes:
> On Fri, Dec 11, 2015 at 3:31 PM, Alexander Shishkin
> wrote:
>> Chunyan Zhang writes:
>>
>>> sw_end represents the last software master, sw_start is index of the
>>> first master, so the number of software masters should be
>>> sw_end - sw_start + 1.
>>
>> Looks about ri
We were getting build warning about unused variable "tsc_msr" and
"va_tsc" while building for i386 allmodconfig.
Signed-off-by: Sudip Mukherjee
---
build warning with next-20151211 and build log is at:
https://travis-ci.org/sudipm-mukherjee/parport/jobs/96209206
---
Current vfio-pci implementation disallows to mmap
sub-page(size < PAGE_SIZE) MMIO BARs and MSI-X table. This is because
sub-page BARs' mmio page may be shared with other BARs and MSI-X table
should not be accessed directly from the guest for security reasons.
But these would cause some performance
PAGE_SIZE is 64KB by default on PPC64 platform. When vfio
passthrough a pci device of which MMIO BARs are smaller than
64KB(PAGE_SIZE), guest would not handle the mmio accesses
to the BARs which leads to mmio emulations in host.
This is because vfio would not allow to passthrough one
BAR's mmio pa
Current vfio-pci implementation disallows to mmap
sub-page(size < PAGE_SIZE) MMIO BARs because these BARs' mmio page
may be shared with other BARs.
But we should allow to mmap these sub-page MMIO BARs if all MMIO BARs
are page aligned which leads the BARs' mmio page would not be shared
with other
Current vfio-pci implementation disallows to mmap MSI-X table in
case that user get to touch this directly.
However, EEH mechanism could ensure that a given pci device
can only shoot the MSIs assigned for its PE and guest kernel also
would not write to MSI-X table in pci_enable_msix() because
para
On Thu, Dec 10, 2015 at 04:14:18PM -0800, K. Y. Srinivasan wrote:
> For FC devices managed by this driver, atttach the appropriate transport
> template. This will allow us to create the appropriate sysfs files for
> these devices. With this we can publish the wwn for both the port and the
> node.
On Thu, Dec 10, 2015 at 04:14:19PM -0800, K. Y. Srinivasan wrote:
> The function storvsc_channel_init() repeatedly interacts with the host to
> extract various channel properties. Refactor this code to eliminate code
> repetition.
>
> Signed-off-by: K. Y. Srinivasan
> Reviewed-by: Long Li
> Test
Signed-off-by: Biao Huang
---
.../devicetree/bindings/pinctrl/pinctrl-mt65xx.txt |9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt
b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt
index 0480b
On Fri, Dec 4, 2015 at 6:31 PM, Martyn Welch
wrote:
> Select Chromebooks have gpio attached to switches used to cause the
> firmware to enter alternative modes of operation and/or control other
> device characteristics (such as write protection on flash devices). This
> patch adds a driver that e
Add pinfunc header file, mt2701 related dts will include it
Signed-off-by: Biao Huang
Acked-by: Linus Walleij
---
arch/arm/boot/dts/mt2701-pinfunc.h | 735
1 file changed, 735 insertions(+)
create mode 100644 arch/arm/boot/dts/mt2701-pinfunc.h
diff --git
Add pinctrl and GPIO node to mt2701.dtsi
Signed-off-by: Biao Huang
Acked-by: Linus Walleij
---
arch/arm/boot/dts/mt2701.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
index dc02f76..bd88ae9 100644
---
Add mt2701 support using mediatek common pinctrl driver.
MT2701 have some special pins need an extra setting register
than other ICs, so adding this support to common code.
Signed-off-by: Biao Huang
---
drivers/pinctrl/mediatek/Kconfig |6 +
drivers/pinctrl/mediatek/Makefile
On Fri, Dec 11, 2015 at 4:51 PM, Alexander Shishkin
wrote:
> Chunyan Zhang writes:
>
>> On Fri, Dec 11, 2015 at 3:31 PM, Alexander Shishkin
>> wrote:
>>> Chunyan Zhang writes:
>>>
sw_end represents the last software master, sw_start is index of the
first master, so the number of softw
From: Erin Lo
The upcoming MTK pinctrl driver have a big pin table for each SoC
and we don't want to bloat the kernel binary if we don't need it.
Add config options so we can build for one SoC only. Add MT2701.
Signed-off-by: Erin Lo
Acked-by: Linus Walleij
---
arch/arm/mach-mediatek/Kconfig
Change in v2:
1. add special pinmux setting for some pins.
2. fix mt2701 direction control issue
3. resort dt-bindings
Biao Huang (4):
dt-bindings: mediatek: Modify pinctrl bindings for mt2701
pinctrl: dt bindings: Add pinfunc header file for mt2701
pinctrl: mediatek: Add Pinctrl/GPIO/EINT d
On Thu, Dec 10, 2015 at 04:14:20PM -0800, K. Y. Srinivasan wrote:
> On the interrupt path, we repeatedly establish the pointer to the
> storvsc_device. Fix this.
>
> Signed-off-by: K. Y. Srinivasan
> Reviewed-by: Long Li
> Tested-by: Alex Ng
> ---
> drivers/scsi/storvsc_drv.c | 23 --
Bean,
Am 11.12.2015 um 09:26 schrieb Bean Huo 霍斌斌 (beanhuo):
> For MLC NAND, paired page issue is now a common known issue.
> This patch is just for master node cannot be recovered while
> there will two pages be damaged in one single master node block.
> As for this patch, if there are more than
On Fri, Dec 4, 2015 at 10:24 PM, Jens Kuske wrote:
> The H3 uses the same pin controller as previous SoC's from Allwinner.
> Add support for the pins controlled by the main PIO controller.
>
> Signed-off-by: Jens Kuske
Patch applied with Rob's & Maxime's ACKs.
Yours,
Linus Walleij
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To unsubs
On Thu, Dec 10, 2015 at 05:50:09PM -0300, Geyslan G. Bem wrote:
> This patch removes redundant conditions.
>
> (!A || (A && B)) is the same as (!A || B).
> (length && length > 5) can be reduced to a single evaluation.
>
> Tested by compilation only.
> Caught by cppcheck.
>
> Signed-off-by: Gey
On 12/10/2015 04:13 PM, Arnaldo Carvalho de Melo wrote:
> Em Thu, Dec 10, 2015 at 02:24:00PM +0100, Jiri Olsa escreveu:
>> On Thu, Dec 10, 2015 at 02:07:35PM +0100, Martin Liška wrote:
>>
>> SNIP
>>
> I've also tried to run './perf test' and terminate the process at random
> places, b
On Mon, Dec 7, 2015 at 10:24 AM, Richard Fitzgerald
wrote:
> The CS47L24 and WM1831 codecs only have two GPIO lines, but are
> otherwise similar to the WM8280.
>
> Signed-off-by: Richard Fitzgerald
> Acked-by: Linus Walleij
OK I guess it should just be optimistically merged to the MFD
tree whe
Le 07/12/2015 15:09, Cyrille Pitchen a écrit :
> This patch documents the DT bindings for the driver of the Atmel QSPI
> controller embedded inside sama5d2x SoCs.
>
> Signed-off-by: Cyrille Pitchen
The change is very small from previous one and moreover accepted by Rob.
So, for sure:
Acked-by:
This fixes the sparse warnings about dereferencing a userspace pointer.
Once I updated the sparse annotations, I noticed a bug in
gdm_wimax_ioctl() where we pass a user space pointer to gdm_update_fsm()
which dereferences it. I fixed this.
Signed-off-by: Wim de With
---
drivers/staging/gdm72xx/
On Thu, Dec 10, 2015 at 06:38:09AM +, Wang, Annie wrote:
> >
> >Why not DT or ACPI for this?
> >
> We choose to use private data, as pl330 already has struct
> dma_pl330_platdata.
> Physically DMA share ACPI device with UART, however, BIOS believes DMA and
> UART is one device.
> We can't
On Fri, Dec 11, 2015 at 06:57:51AM +, Wang, Annie wrote:
> >> + /*
> >> + * If the ACPI device already has a node attached. It must be
> >> + * renamed.
> >> + */
> >> + if (quirk->quirk & MULTI_ATTACHED_QUIRK)
> >> + sprintf(amba_devname, "%s%s", dev_name(&adev->dev),
> >"DMA"
On Thu, Dec 10, 2015 at 03:10:48PM -0500, Sinan Kaya wrote:
> On 12/5/2015 3:00 AM, Vinod Koul wrote:
> > On Wed, Dec 02, 2015 at 02:04:05PM -0500, Sinan Kaya wrote:
> > You are missing the point. Channel can be paused, yes but the descriptor
> > is in queue and is not paused. The descripto
On 10/12/15 20:18, Bjorn Helgaas wrote:
> [+cc Marc for irq_dispose_mapping() question]
+ }
+ } while (status);
+
+ return retval;
+ for (i = 0; i < 4; i++) {
+ irq = irq_find_mapping(pcie->legacy_irq_domain, i + 1);
+ if (irq >
On 11 December 2015 at 13:05, David Long wrote:
> There is a moderate amount of code already in kprobes on ARM and the current
> ARMv8 patch to deal with conditional execution of instructions. One aspect
> of how this is handled is that instructions that fail their predicate and
> are not (technic
2015-12-11 6:16 GMT-03:00 Johan Hovold :
> On Thu, Dec 10, 2015 at 05:50:09PM -0300, Geyslan G. Bem wrote:
>> This patch removes redundant conditions.
>>
>> (!A || (A && B)) is the same as (!A || B).
>> (length && length > 5) can be reduced to a single evaluation.
>>
>> Tested by compilation only
Chunyan Zhang writes:
> On Fri, Dec 11, 2015 at 4:51 PM, Alexander Shishkin
> wrote:
>> Chunyan Zhang writes:
>>
>>> On Fri, Dec 11, 2015 at 3:31 PM, Alexander Shishkin
>>> wrote:
Chunyan Zhang writes:
> sw_end represents the last software master, sw_start is index of the
>
Hello,
On 2015-12-10 18:13, Felipe Balbi wrote:
Felipe Balbi writes:
Felipe Balbi writes:
Marek Szyprowski writes:
This is a resurrection of the patches initially submitted by Ruslan
Bilovol in the following thread: https://lkml.org/lkml/2015/6/22/554
The changes since the original submis
Laura Abbott writes:
> print_modules currently uses pr_cont to print all module information.
> This has the side effect of printing lots of modules on one very long
> line. This makes copy/pasting oopses more effort if manual wrapping is
> required. Place a reasonable limit (80 chars) on the numbe
Hi Sascha,
On ven., déc. 11 2015, Sascha Hauer wrote:
> On Thu, Dec 10, 2015 at 04:08:08PM +0100, Gregory CLEMENT wrote:
>> Hi Sascha,
>>
>> On jeu., déc. 10 2015, Sascha Hauer wrote:
>>
>> > Hi Gregory,
>> >
>> > On Wed, Dec 09, 2015 at 06:49:43PM +0100, Gregory CLEMENT wrote:
>> >> With
On Thu 10-12-15 17:48:31, Sebastian Frias wrote:
> On 12/10/2015 03:06 PM, Michal Hocko wrote:
> >On Thu 10-12-15 14:37:38, Sebastian Frias wrote:
> >>On 12/10/2015 12:40 PM, Michal Hocko wrote:
> >>>On Wed 09-12-15 16:35:53, Sebastian Frias wrote:
> >>>[...]
> We've seen that drivers/media/pci
On 2015/12/11 13:53, Izumi, Taku wrote:
> Dear Xishi,
>
>> Hi Taku,
>>
>> Whether it is possible that we rewrite the fallback function in buddy system
>> when zone_movable and mirrored_kernelcore are both enabled?
>
> What does "when zone_movable and mirrored_kernelcore are both enabled?"
> m
This patch removes redundant conditions.
(!A || (A && B)) is the same as (!A || B).
Tested by compilation only.
Caught by cppcheck.
Signed-off-by: Geyslan G. Bem
---
drivers/usb/serial/io_edgeport.c | 35 ++-
1 file changed, 14 insertions(+), 21 deletions(-)
d
This patch removes redundant condition.
(length && length > 5) can be reduced to a single evaluation.
Tested by compilation only.
Caught by cppcheck.
Signed-off-by: Geyslan G. Bem
---
drivers/usb/serial/mos7840.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/
Hi Daniel,
thank you for the links and the explanation.
On Dec 11 '15 19:13, Daniel Axtens wrote:
> Thanks Valentin.
>
> Ironically I first noticed the spelling mistake in the original UBSAN
> patchset[1], but wanted it to work on powerpc straight away so I went
> with the mis-spelled version. I
From: Andrew-CT Chen
Add a DT binding documentation of Video Processor Unit for the
MT8173 SoC from Mediatek.
Signed-off-by: Andrew-CT Chen
Signed-off-by: Tiffany Lin
---
.../devicetree/bindings/media/mediatek-vpu.txt | 27
1 file changed, 27 insertions(+)
create m
Add h264 encoder driver for MT8173
Signed-off-by: Daniel Hsiao
Signed-off-by: Tiffany Lin
---
drivers/media/platform/mtk-vcodec/Makefile |3 +-
.../media/platform/mtk-vcodec/h264_enc/Makefile|8 +
.../platform/mtk-vcodec/h264_enc/venc_h264_if.c| 495
Add vp8 encoder driver for MT8173
Signed-off-by: Daniel Hsiao
Signed-off-by: Tiffany Lin
---
drivers/media/platform/mtk-vcodec/Makefile |2 +
drivers/media/platform/mtk-vcodec/venc_drv_if.c|3 +
drivers/media/platform/mtk-vcodec/vp8_enc/Makefile |8 +
.../platform/mtk-vc
From: Andrew-CT Chen
Add v4l2 layer encoder driver for MT8173
Signed-off-by: Tiffany Lin
---
drivers/media/platform/Kconfig | 11 +
drivers/media/platform/Makefile|2 +
drivers/media/platform/mtk-vcodec/Makefile |8 +
drivers/media/plat
Add a DT binding documentation of Video Encoder for the
MT8173 SoC from Mediatek.
Signed-off-by: Tiffany Lin
---
.../devicetree/bindings/media/mediatek-vcodec.txt | 58
1 file changed, 58 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/mediatek-v
Add video encoder node for MT8173
Signed-off-by: Tiffany Lin
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 47 ++
1 file changed, 47 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index b8c8ff0..a6b0
On Thu, Dec 10, 2015 at 11:43:46AM -0800, David Daney wrote:
> We are getting soft lockup OOPs on Cavium CN88XX (A.K.A. ThunderX), which is
> an arm64 implementation.
[...]
> At this point it is unknown if this patch is incorrect, or if the underlying
> ARM64 atomic_*_{acquire,release} primitives
==
Introduction
==
The purpose of this RFC is to discuss the driver for a hw video codec
embedded in the Mediatek's MT8173 SoCs. Mediatek Video Codec is able to
handle video encoding of in a range of formats.
This RFC also include VPU driver. Mediatek Video Codec driver r
Add VPU drivers for MT8173
Signed-off-by: Andrew-CT Chen
Signed-off-by: Tiffany Lin
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 4dd5f93.
The VPU driver for hw video codec embedded in Mediatek's MT8173 SOCs.
It is able to handle video decoding/encoding of in a range of formats.
The driver provides with VPU firmware download, memory management and
the communication interface between CPU and VPU.
For VPU initialization, it will create
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